Chapter 02
Chapter 02
Chapter 02
1. The inputs of this system A and B represent one binary number in the range 0:3.
The inputs C and D represent a second binary number (also in the range 0:3). There
are three outputs, X, Y and Z.
Show a truth table such that Y and Z represent a number equal to the the first
minus the second (if that is non-negative) and X is 1 if and only if the first is larger. If
the second is larger than the first, X is 0, and Y and Z don't matter.
2. Show the truth table for a system with four inputs, A3, A2, A1, and A0, and five
outputs, carry, Z3,,Z2, Z1, and Z0. The inputs represent a BCD digit between 0 and 9
(8421 code). All other inputs never happen. The output represents a the BCD code for
a decimal number equal to 3 plus 1.5 times the input (where fractions are rounded up).
The row for the input 7 has been completed.
A3 A2 A1 A0 Carry Z3 Z2 Z1 Z0
0 0 0 0
0 0 0 1
0 0 1 0
0 0 1 1
0 1 0 0
0 1 0 1
0 1 1 0
0 1 1 1 1 0 1 0 0
1 0 0 0
1 0 0 1
1 0 1 0
1 0 1 1
1 1 0 0
1 1 0 1
1 1 1 0
1 1 1 1
3. Use a truth table to demonstrate whether or not the following functions are equal.
(Be sure to state which, if any, are equal.)
1
4. Using Properties 1 – 10, reduce each of the expressions below to a sum of
products expression. Show each step.
2
6. For the following functions,
f (x, y, z) = ∑ m (0, 2, 4, 6, 7)
g (x, y, z) = ∑ m (0, 1, 2, 6)
Complete the truth table
x y z f g
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
a. g = a b’ + b c d’ + a’ b’ c’ d + a b’ c’ + b c’ d’
(3 terms. 7 literals)
b. f = a' b' d + a b + a b' d + b' c' d' + a b d’ (3 t, 6 l)
c. g = w x' + w' y + w y z' + x' y + w' x z + x y' z (4t, 9 l)
d. f = x’ z’ + x y z + w x’ + w y’ z (3t, 7l)
10. Assume all inputs are available both uncomplemented and complemented. For
each, show
3
a. a two-level implementation of using NAND gates of any size.
b. a two-level implementation of using NOR gates of any size.
c. An implementation using 2-input NAND gates (none of which may be used
as a NOT)
11. Implement each of the following function using only two-input NAND gates. NO
GATE MAY BE USED AS A NOT GATE. The functions are in minimum sum of product
form. Assume all inputs are available both uncomplemented and complemented.