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LH22S83D SERVICE MANUAL

INDEX:

PART 1:Brief Introduction Of The LH22S83D


◆Schematic Diagram Block
◆ Printed Circuit

PART 2: Exploded view

PART 3 :IC Introduction

PART 4: Detailed Circuit


◆ Main Board

◆ DVD Board

PART 5: Components List

PART6: Debug Instruction


Part1:

R L

IR Board TV KeyBoard Loud


Inverter Board Panel Speaker

CN4
CN8 Speaker Connector
IR Connector CN1
Inv erter Connector KEY Connector J4 J3
RE D G REEN IR 5V GND
GND GND ADJ EN 12V 12V G ND R G ND NC L

IN V- V+ SOURCE NC P+ P- M ENU POWER

LVDS Connector

GND
IR

CN2
GND RXD TXD 5V

FLI8125 Main Board


Debug Connector

Y G ND P b GND Pr GND R L GND ON/OFF

J 18

DVD power Connector DVD signal Connector


GND GND 12V 12V

CN13/CN14

DVD Board

connecting board
DVD Keyboard

Schematic Diagram
Printed Circuit

TV Main Board (Top View)

TV Main Board(Bottom view)


DVD Board (top view)

DVD Board(bottom view)


Part2: Exploded view
Part3:
ICs On FLI8125 Board and DVD Board
IC Introduction
KP1500

150Khz, 3A PWM Buck Switching Regulator Preliminary


General Description Features
The KP1500 series are monolithic integrated - 3.3V, 5V, 12V and adjustable output versions
circuits that provide all the active functions for a - Adjustable version output voltage range, 1.23V to
step-down DC/DC converter, capable of driving a 28V +4% max over line and load condiction
3A load without additional transistor component. - Available in TO220-5L and TO263-5L packages
Requiring a minimum number of external - Voltage mode non-synchronous PWM control
component, the board space can be saved easily. - Thermal-shutdown and current-limit protection
The external shutdown function can be controlled - ON/OFF shutdown control input
by TTL logic level and then come into standby - Input voltage range up to 32V
mode. The internal compensation makes feedback - Output load current: 3A
control have good line and load regulation without - 150 kHz fixed frequency internal oscillator
external design. Regarding protected function, - Low power standby mode
thermal shutdown is to prevent over temperature - Built-in switching transistor on chip
operating from damage, and current limit is against
over current operating of the output switch. The
KP1500 series operates at a switching frequency of
Applications
150Khz thus allowing smaller sized filter
- Simple High-efficiency step-down(buck) regulator
components than what would be needed with lower
- Efficient preregulator for linear regulators
frequency switching regulators. Other features
- On-card switching regulators
include a guaranteed +4% tolerance on output
voltage under specified input voltage and output - Positive to negative converter
load conditions, and +15% on the oscillator - Battery Charger
frequency. The output version included fixed 3.3V,
5V, 12V, and an adjustable type. The packages are
available in a standard 5-lead TO-220(T) package
and a 5-lead TO-263(U).

Pin Assignments

( Top View )
Pin Descriptions
5 SD
4 FB
Name Description
3 Gnd VIN Operating voltage input
2 Output
1 VIN Output Switching output
Metal Tab GND
TO263-5L Gnd Ground
FB Output voltage feedback control
( Top View ) SD ON/OFF Shutdown
5 SD
4 FB
3 Gnd
2 Output
1 VIN
TO220-5L
AP1084

5A Low Dropout Positive Adjustable or Fixed-Mode Regulator

„ Features „ General Description


• 1.4V maximum dropout at full load current AP1084 is a low dropout positive adjustable or fixed-
• Built-in thermal shutdown mode regulator with minimum of 5.0A output current
• Output current limiting capability. The product is specifically designed to
• Adjustable output voltage or fixed 1.5V, 1.8V, 2.5V, provide well-regulated supply for low voltage IC
3.3V, 5.0V applications such as high-speed bus termination and
• Fast transient response low current 3.3V logic supply. AP1084 is also well
• Good noise rejection suited for other applications such as VGA cards.
• Package : TO252, TO263, TO220 AP1084 is guaranteed to have lower than 1.4V
dropout at full load current making it ideal to provide
well-regulated outputs of 1.25 to 3.3V with 4.7 to
12V input supply.

„ Ordering Information
AP1084 X X X X

Low Dropout Regulator Package Vout Lead Free Packing


D : TO252-3L Blank : Adj Blank : Normal Blank : Tube
K : TO263-3L 15 = 1.5V L : Lead Free Package A : Taping
T : TO220-3L 18 = 1.8V
25 = 2.5V
33 = 3.3V
50 = 5.0V

„ Typical Circuit

5.0V to 3.3V Fixed Mode Regulator Adjustable Regulator


5V
5V C1
C1 100uF
100uF

Vin Vin

Vout 3.3V/5A Vout 2.5V/5A


R1 121Ω C2
GND C2 Adj
100uF
100uF R2 121Ω
Tab is Vout Tab is Vout

R2
Note: Vo = VREF ∗ (1+ )
R1
AP1117
1A Low Dropout Positive Adjustable or Fixed-Mode Regulator

Features General Description


- 1.4V maximum dropout at full load current AP1117 is a low dropout positive adjustable or
- Fast transient response fixed-mode regulator with minimum of 1A output
- Output current limiting current capability. The product is specifically
- Built-in thermal shutdown designed to provide well-regulated supply for low
- Packages: SOT223, TO263, TO252, TO220, voltage IC applications such as high-speed bus
SOT89 termination and low current 3.3V logic supply.
- Good noise rejection AP1117 is also well suited for other applications
- 3-Terminal Adjustable or Fixed 1.5V, 1.8V, 1.9V, such as VGA cards. AP1117 is guaranteed to have
2.5V, 3.3V, 5.0V lower than 1.4V dropout at full load current making
it ideal to provide well-regulated outputs of 1.25 to
Applications 5.0 with 6.4V to 12V input supply.

- PC peripheral
- Communication

Ordering Information

AP 1117 X XX X X

Low Dropout Regulator Package Vout Lead Free Packing


E : SOT223-3L Blank : ADJ Blank : Normal Blank : Tube
K : TO263-3L 15 : 1.5V L : Lead Free Package A : Taping
D : TO252-3L 18 : 1.8V
T : TO220-3L 19: 1.9V
Y : SOT89-3L 25 : 2.5V
33 : 3.3V
50 : 5.0V

Typical Circuit
5V
5V C1
C1 100uF
100uF

Vin Vin

Vo
Vout 3.3V/1A Vout 2.5V/1A
R1
C2 121 Ω C2
GND Adj
100uF R2 100uF
121 Ω
Tab is Vout Tab is Vout

( 5V/3.3V fixed output ) ( 5V/2.5V ADJ output )

R2
Note: Vo = VREF ∗ (1+ )
R1
EN29LV040A

EN29LV040A
da0.
4 Megabit (512K x 8-bit ) Uniform Sector,
CMOS 3.0 Volt-only Flash Memory

FEATURES

• High performance program/erase speed


• Fully compatible with EN29LV040 - Byte/Word program time: 8µs typical
- Sector erase time: 500ms typical
• Single power supply operation
- Full voltage range: 2.7-3.6 volt read and write
• JEDEC Standard program and erase
operations for battery-powered applications.
commands
- Regulated voltage range: 3.0-3.6 volt read
and write operations for high performance • JEDEC standard DATA polling and toggle
3.3 volt microprocessors. bits feature
• Single Sector and Chip Erase
• High performance
- Access times as fast as 45 ns • Embedded Erase and Program Algorithms
• Erase Suspend / Resume modes:
• Low power consumption (typical values at 5
Read or program another Sector during
MHz)
Erase Suspend Mode
- 7 mA typical active read current
- 15 mA typical program/erase current • triple-metal double-poly triple-well CMOS
- 1 µA typical standby current (standard access Flash Technology
time to active mode)
• Low Vcc write inhibit < 2.5V
• Flexible Sector Architecture: • minimum 100K program/erase endurance
- Eight 64 Kbyte sectors cycle
- Supports full chip erase
• Package options
- Individual sector erase supported
- 8mm x 20mm 32-pin TSOP (Type 1)
- Sector protection and unprotection:
- 8mm x 14mm 32-pin TSOP (Type 1)
Hardware locking of sectors to prevent
- 32-pin PLCC
program or erase operations within individual
sectors • Commercial and industrial Temperature
Range

GENERAL DESCRIPTION

The EN29LV040A is a 4-Megabit, electrically erasable, read/write non-volatile flash memory,


organized as 524,288 bytes. Any byte can be programmed typically in 8µs. The EN29LV040A
features 3.0V voltage read and write operation, with access times as fast as 45ns to eliminate the
need for WAIT states in high-performance microprocessor systems.
The EN29LV040A has separate Output Enable ( OE ), Chip Enable ( CE ), and Write Enable (WE)
controls, which eliminate bus contention issues. This device is designed to allow either single
Sector or full chip erase operation, where each Sector can be individually protected against
program/erase operations or temporarily unprotected to erase or program. The device can sustain a
minimum of 100K program/erase cycles on each Sector.
EN29LV040A
CONNECTION DIAGRAMS

TABLE 1. PIN DESCRIPTION FIGURE 1. LOGIC DIAGRAM

Pin Name Function


EN29LV040A
A0-A18 Addresses
DQ0-DQ7 8 Data Inputs/Outputs
DQ0 – DQ7
WE# Write Enable A0 - A18

CE# Chip Enable


OE# Output Enable
Vcc Supply Voltage CE#
Vss Ground OE#

WE#
Philips Semiconductors Product specification

2 × 6 W stereo power amplifier TDA1517; TDA1517P

FEATURES GENERAL DESCRIPTION


• Requires very few external components The TDA1517 is an integrated class-B dual output
• High output power amplifier in a plastic single in-line medium power package
with fin (SIL9MPF) and a plastic heat-dissipating dual
• Fixed gain
in-line package (HDIP18). The device is primarily
• Good ripple rejection developed for multi-media applications.
• Mute/standby switch
• AC and DC short-circuit safe to ground and VP
• Thermally protected
• Reverse polarity safe
• Capability to handle high energy on outputs (VP = 0 V)
• No switch-on/switch-off plop
• Electrostatic discharge protection.

QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT


VP supply voltage 6.0 14.4 18.0 V
IORM repetitive peak output current − − 2.5 A
Iq(tot) total quiescent current − 40 80 mA
Isb standby current − 0.1 100 µA
Isw switch-on current − − 40 µA
|ZI| input impedance 50 − − kΩ
Po output power RL = 4 Ω; THD = 0.5% − 5 − W
RL = 4 Ω; THD = 10% − 6 − W
SVRR supply voltage ripple rejection fi = 100 Hz to 10 kHz 48 − − dB
αcs channel separation 40 − − dB
Gv closed loop voltage gain 19 20 21 dB
Vno(rms) noise output voltage (RMS value) − 50 − µV
Tc crystal temperature − − 150 °C

ORDERING INFORMATION

TYPE PACKAGE
NUMBER NAME DESCRIPTION VERSION
TDA1517 SIL9MPF plastic single in-line medium power package with fin; 9 leads SOT110-1
TDA1517P HDIP18 plastic heat-dissipating dual in-line package; 18 leads SOT398-1
Philips Semiconductors Product specification

2 × 6 W stereo power amplifier TDA1517; TDA1517P

PINNING

SYMBOL PIN DESCRIPTION


−INV1 1 non-inverting input 1
SGND 2 signal ground
SVRR 3 supply voltage ripple rejection output
OUT1 4 output 1
PGND 5 power ground
OUT2 6 output 2
VP 7 supply voltage
M/SS 8 mute/standby switch input
−INV2 9 non-inverting input 2

ndbook, halfpage ndbook, halfpage


INV1 1 INV1 1 18

SGND 2 SGND 2 17

SVRR 3 SVRR 3 16

OUT1 4 OUT1 4 15

PGND 5 TDA1517 PGND 5 TDA1517P 14

OUT2 6 OUT2 6 13

VP 7 VP 7 12

M/SS 8 M/SS 8 11

INV2 9 INV2 9 10

MLC352 MLC353

Pins 10 to 18 should be connected to GND or floating.

Fig.2 Pin configuration for SOT110-1. Fig.3 Pin configuration for SOT398-1.

FUNCTIONAL DESCRIPTION
The TDA1517 contains two identical amplifiers with
differential input stages. The gain of each amplifier is fixed
at 20 dB. A special feature of the device is the
mute/standby switch which has the following features:
• Low standby current (<100 µA)
• Low mute/standby switching current
(low cost supply switch)
• Mute condition.
数字控制音频处理芯片

SM9613

2 共 12 页
2-wire Serial EEPROM 32K/64K
AF24BC32/64
FEATURES:
• Internally organized as 4096 x 8 (32K),
8192 x 8 (64K) • Self-timed write cycle (5ms max)
• Low-voltage and standard-voltage • Bi-directional data transfer protocol
operation : 1.8 to 5.5 V • Write protect pin for hardware data
• 2-wire serial interface bus protection
• Data retention: 100 years • 32-byte page write modes
• High endurance: 1,000,000 Write • Allows for partial page writes
Cycles • 8-lead PDIP, 8-lead JEDEC SOIC, and
• 100 kHz (1.8V) & 400kHz (2.7V, 5V) 8-lead TSSOP, 8-lead MSOP
compatibility (AF24BC32) Packages

DESCRIPTION

Aplus Flash Technology’s AF24BC32/64 provides 32K/64K of serial electrically erasable and
programmable read-only memory (EEPROM). The wide Vdd range allows for low-voltage
operation down to 1.8V. The device, fabricated using traditional CMOS EEPROM technology, is
optimized for many industrial and commercial applications where low-voltage and low-power
operation is essential. The AF24BC32/64 is available in 8-pin PDIP, 8-lead JEDEC SOIC, 8-
lead TSSOP and 8-lead MSOP (AF24BC32) packages and is accessed via a 2-wire serial
interface.

Figure 1. Pin Configurations

8-pin PDIP/TSSOP/SOIC/MSOP

A0 1 8 Vcc Pin Name Function


A0 – A2 Address inputs
A1 2 7 WP SDA Serial Data
SCL Serial Clock Input
A2 3 6 SCL WP Write Protect
GND Ground
GND 4 5 SDA Vcc Power Supply
Philips Semiconductors Product specification

I2C-bus controlled single and multistandard


TDA9885; TDA9886
alignment-free IF-PLL demodulators

1 FEATURES
• 5 V supply voltage
• Gain controlled wide-band Vision Intermediate
Frequency (VIF) amplifier, AC-coupled
• Multistandard true synchronous demodulation with
active carrier regeneration: very linear demodulation,
• SIF-AGC for gain controlled SIF amplifier, single
good intermodulation figures, reduced harmonics, and reference QSS mixer able to operate in high
excellent pulse response performance single reference QSS mode and in
• Gated phase detector for L and L-accent standard intercarrier mode, switchable via I2C-bus
• Fully integrated VIF Voltage Controlled Oscillator • AM demodulator without extra reference circuit
(VCO), alignment-free, frequencies switchable for all
• Alignment-free selective FM-PLL demodulator with high
negative and positive modulated standards via I2C-bus
linearity and low noise
• Digital acquisition help, VIF frequencies of 33.4, 33.9,
• I2C-bus control for all functions
38.0, 38.9, 45.75, and 58.75 MHz
• I2C-bus transceiver with pin programmable Module
• 4 MHz reference frequency input: signal from Address (MAD)
Phase-Locked Loop (PLL) tuning system or operating
as crystal oscillator • Four I2C-bus addresses via MAD.
• VIF Automatic Gain Control (AGC) detector for gain
control, operating as peak sync detector for negative 2 GENERAL DESCRIPTION
modulated signals and as a peak white detector for The TDA9885 is an alignment-free multistandard
positive modulated signals (PAL and NTSC) vision and sound IF signal PLL
• External AGC setting via pin OP1 demodulator for negative modulation only and
• Precise fully digital Automatic Frequency Control (AFC) FM processing.
detector with 4-bit digital-to-analog converter, AFC bits The TDA9886 is an alignment-free multistandard
readable via I2C-bus (PAL, SECAM and NTSC) vision and sound IF signal PLL
• TakeOver Point (TOP) adjustable via I2C-bus or demodulator for positive and negative modulation,
alternatively with potentiometer including sound AM and FM processing.
• Fully integrated sound carrier trap for 4.5, 5.5, 6.0,
and 6.5 MHz, controlled by FM-PLL oscillator 3 APPLICATIONS
• Sound IF (SIF) input for single reference Quasi Split • TV, VTR, PC and STB applications.
Sound (QSS) mode, PLL controlled

4 ORDERING INFORMATION

PACKAGE
TYPE NUMBER
NAME DESCRIPTION VERSION
TDA9885T/V3 SO24 plastic small outline package; 24 leads; body width 7.5 mm SOT137-1
TDA9885TS/V3 SSOP24 plastic shrink small outline package; 24 leads; body width 5.3 mm SOT340-1
TDA9885HN/V3 HVQFN32 plastic, heatsink very thin quad flat package; no leads; 32 terminals; SOT617-1
body 5 × 5 × 0.85 mm
TDA9886T/V3 SO24 plastic small outline package; 24 leads; body width 7.5 mm SOT137-1
TDA9886TS/V3 SSOP24 plastic shrink small outline package; 24 leads; body width 5.3 mm SOT340-1
Philips Semiconductors Product specification

I2C-bus controlled single and multistandard


TDA9885; TDA9886
alignment-free IF-PLL demodulators

7 PINNING

PIN
SYMBOL TDA9886T TDA9885T DESCRIPTION
TDA9885HN
TDA9886TS TDA9885TS
VIF1 1 1 30 VIF differential input 1
VIF2 2 2 31 VIF differential input 2
n.c. − − 32 not connected
OP1 3 3 1 output port 1; open-collector
FMPLL 4 4 2 FM-PLL for loop filter
DEEM 5 5 3 de-emphasis output for capacitor
AFD 6 6 4 AF decoupling input for capacitor
DGND 7 7 5 digital ground
n.c. − − 6 not connected
AUD 8 8 7 audio output
TOP 9 9 8 tuner AGC TakeOver Point (TOP) for resistor adjustment
SDA 10 10 9 I2C-bus data input and output
SCL 11 11 10 I2C-bus clock input
SIOMAD 12 12 11 sound intercarrier output and MAD select with resistor
n.c. − − 12 not connected
n.c. 13 13 13 not connected
n.c. − − 14 not connected
TAGC 14 14 15 tuner AGC output
REF 15 15 16 4 MHz crystal or reference signal input
VAGC 16 − − VIF-AGC for capacitor
n.c. − 16 17 not connected
CVBS 17 17 18 composite video output
n.c. − − 19 not connected
AGND 18 18 20 analog ground
VPLL 19 19 21 VIF-PLL for loop filter
VP 20 20 22 supply voltage
AFC 21 21 23 AFC output
OP2 22 22 24 output port 2; open-collector
n.c. − − 25 not connected
SIF1 23 23 26 SIF differential input 1 and MAD select with resistor
SIF2 24 24 27 SIF differential input 2 and MAD select with resistor
n.c. − − 28 not connected
n.c. − − 29 not connected
SHANGHAI JINXIN MODEL
ELECTRONICS LTD. UVL7605VMW

1. SCOPE.

This specification applies to VHF and UHF tuner model


UVL7605VMW

2. INPUT IMPEDANCE AND OUTPUT IMPEDANCE

Input impedance:75 Ohm unbalanced


Output impedance:75 Ohm unbalanced

3. INTERMEDIATE FREQUENCY

Picture carrier:45.75MHz
Sound carrier:41.25MHz

4. Receiving Channel

Ch.2~B
Ch.C~W+11
Ch.W+12~69

5. STANDARD SUPPLY VOLTAGE AND CURRENT.

STD Voltage(V) Current(mA)


Term Term
No. Name. VHF VHF VHF UHF
UHF
LOW HIGH Min Typ Max Min Typ Max
1 AGC 4.0 4.0 4.0 - - - - - -
2 VT - - - - - - - - -
7 BP 5.0 5.0 5.0 - - - 150 - 180
9 BT 32 32 32 - - - 3 - 3
SHANGHAI JINXIN SPECIFICATION
ELECTRONICS LTD. UVL7605VMW

6. Maximum supply voltage

No. Terminal name Maximum supply voltage(V)


1 AGC +4.5V,DC
3 AS +5.5V,DC
4 SCL +5.5V,DC
5 SDA +5.5V,DC
6 +B +5.5V,DC
7 BP +5.5V,DC
9 BT +34V,DC

7. Operation guaranteed voltage

No. Terminal name Supply voltage


1 AGC 0~4.0V,DC
3 AS 0~5.25V,DC
4 SCL 0~5.25V,DC
5 SDA 0~5.25V,DC
6 +B +5.0V±0.25V,DC
7 BP +5.0V±0.25V,DC
9 BT +32V±1V,DC

8. Temperature range

Operation guaranteed temperature:-10℃~+60℃


Storage temperature:-10℃~+70℃

9. Construction and mechanical characteristics.

External connection terminals


SHANGHAI JINXIN SPECIFICATION
ELECTRONICS LTD. UVL7605VMW
No. Terminal name Terminal Description
1 AGC VHF/UHF AGC Terminal
2 VT Tuning Voltage monitor
3 AS Address Select
4 SCL Serial Clock Line
5 SDA Serial Data Line
6 +B 5V supply voltage
7 BP Internal connection to pin 6
9 BT Tuning Voltage Supply
10 IF1 IF Output (balanced)
11 IF2 IF Output (balanced)
12 U /V ANT VHF/UHFANT Terminal

10. STANDRAD TEST CONDITIONS


Unless otherwise specified, the tests shall be carried out at the temperature
of 25℃±2℃and relative humidity of 65%±15%

11.ELECTRICAL CHARATERISTICS
11.1 Power gain

Min Typ Max Unit


VHF L 32 35 dB
VHF H 32 35 dB
UHF 32 35 dB

11.2 Gain variation

Min Typ Max Unit


VHF L 8.0 dB
VHF H 8.0 dB
UHF 8.0 dB

11.3 Noise figure

Min Typ Max Unit


VHF L 5.0 9.0 dB
VHF H 5.0 9.0 dB
HF 5.0 9.0 dB
UTC 78DXX LINEAR INTEGRATED CIRCUIT
3-TERMINAL 0.5A POSITIVE
VOLTAGE REGULATOR

DESCRIPTION
The UTC 78DXX family is monolithic fixed voltage
regulator integrated circuit .They are suitable for
applications that required supply current up to 0.5 A.

1
FEATURE
*Output current up to 0.5 A
*Fixed output voltage of 5V, 6V, 8V, 9V, 12V,
15V ,18V and 24V available
*Thermal overload shutdown protection
*Short circuit current limiting
*Output transistor SOA protection TO-252

1:Input 2:GND 3:Output

EQUIVALENT CIRCUIT

INPUT

1
Z2
R13 R17 R9 T12

T14
T10 T8 T9
R19
R18
R12
R14 T13
T11 R11
OUTPUT
T5 R10
3
T6
R8

R15 R5
T4
Z1

T15
R4
R6
T7
R7
R1 R2 C1
R16
T3
T1 T2

R3 GND
2

UTC UNISONIC TECHNOLOGIES CO. LTD


Philips Semiconductors Product specification

Dual 4-channel analog multiplexer,


74HC4052; 74HCT4052
demultiplexer

FEATURES DESCRIPTION
• Wide analog input voltage range from −5 V to +5 V The 74HC4052 and 74HCT4052 are high-speed Si-gate
• Low ON-resistance: CMOS devices and are pin compatible with the
HEF4052B. They are specified in compliance with JEDEC
– 80 Ω (typical) at VCC − VEE = 4.5 V
standard no. 7A.
– 70 Ω (typical) at VCC − VEE = 6.0 V
The 74HC4052 and 74HCT4052 are dual 4-channel
– 60 Ω (typical) at VCC − VEE = 9.0 V analog multiplexers or demultiplexers with common select
• Logic level translation: to enable 5 V logic to logic. Each multiplexer has four independent
communicate with ±5 V analog signals inputs/outputs (pins nY0 to nY3) and a common
• Typical “break before make” built in input/output (pin nZ). The common channel select logics
include two digital select inputs (pins S0 and S1) and an
• Complies with JEDEC standard no. 7A
active LOW enable input (pin E). When pin E = LOW, one
• ESD protection: of the four switches is selected (low-impedance ON-state)
– HBM EIA/JESD22-A114-B exceeds 2000 V with pins S0 and S1. When pin E = HIGH, all switches are
in the high-impedance OFF-state, independent of pins S0
– MM EIA/JESD22-A115-A exceeds 200 V.
and S1.
• Specified from −40 °C to +85 °C and −40 °C to +125 °C.
VCC and GND are the supply voltage pins for the digital
control inputs (pins S0, S1, and E). The VCC to GND
APPLICATIONS ranges are 2.0 V to 10.0 V for 74HC4052 and
• Analog multiplexing and demultiplexing 4.5 V to 5.5 V for 74HCT4052. The analog inputs/outputs
(pins nY0 to nY3 and nZ) can swing between VCC as a
• Digital multiplexing and demultiplexing positive limit and VEE as a negative limit. VCC − VEE may
• Signal gating. not exceed 10.0 V.
For operation as a digital multiplexer/demultiplexer, VEE is
connected to GND (typically ground).

FUNCTION TABLE

INPUT(1)
CHANNEL BETWEEN
E S1 S0
L L L nY0 and nZ
L L H nY1 and nZ
L H L nY2 and nZ
L H H nY3 and nZ
H X X none
Note
1. H = HIGH voltage level
L = LOW voltage level
X = don’t care.
Philips Semiconductors Product specification

Dual 4-channel analog multiplexer,


74HC4052; 74HCT4052
demultiplexer

PINNING

PIN SYMBOL DESCRIPTION


1 2Y0 independent input or output
2 2Y2 independent input or output
3 2Z common input or output
4 2Y3 independent input or output
5 2Y1 independent input or output
6 E enable input (active LOW)
7 VEE negative supply voltage
8 GND ground (0 V)
9 S1 select logic input
10 S0 select logic input
11 1Y3 independent input or output
12 1Y0 independent input or output
13 1Z common input or output
14 1Y1 independent input or output
15 1Y2 independent input or output
16 VCC positive supply voltage

16 VCC
2Y0

handbook, halfpage
terminal 1
2Y0 1 16 VCC index area
1

2Y2 2 15 1Y2 2Y2 2 15 1Y2


2Z 3 14 1Y1
2Z 3 14 1Y1
2Y3 4 13 1Z
2Y3 4 13 1Z 4052
4052 2Y1 5 12 1Y0
2Y1 5 12 1Y0 E 6 11 1Y3
VCC(1)
E 6 11 1Y3 VEE 7 10 S0
8

VEE 7 10 S0
GND

S1

001aac117
GND 8 9 S1
Transparent top view
MNB039

(1) The die substrate is attached to this pad using conductive die
attach material. It can not be used as a supply pin or input.
Fig.1 Pin configuration DIP16, SO16 and
(T)SSOP16. Fig.2 Pin configuration DHVQFN16.
PRELIMINARY PRODUCT BRIEF

FLI8125
Single-Chip LCD TV Controller

A P P L I C AT I O N DESCRIPTION
ƒ Cost Effective, Large Screen LCD The FLI8125 is a highly integrated cost effective mixed signal solution for LCD
TVs TV and Digital Video applications. Capable of meeting global broadcast market
ƒ Portable / Handheld LCD TVs requirements, the FLI8125 incorporates a multi-standard video decoder, high-
ƒ Small Screen Video Displays speed triple 8-bit Analog-to-Digital Converter (ADC), and front end switching.
The integrated VBI Slicer adds Closed Captioning (CC) and Teletext service
support, and the integrated microprocessor enables full system control without
F E AT U R E S external devices.
ƒ Faroudja DCDi – Edge™ The FLI8125 can capture and process both video and RGB graphics streams.
ƒ Integrated Triple ADC The multi-standard video decoder is capable of accepting NTSC, PAL or
SECAM and other sub-formats. The integrated ADC accepts both analog RGB
ƒ Digital Input Port
and YPrPb inputs.
ƒ Scaling Engine
ƒ Image Enhancement Interlaced video signals are converted into progressive scan signals using a
memory-less deinterlacing technique. Progressive scan signals are then
ƒ Digital Output passed to the Faroudja DCDi – Edge suite for further image processing.
ƒ OSD Controller Faroudja DCDi – Edge incorporates Faroudja’s patented and Emmy award
ƒ Embedded Microprocessor winning Edge Correction technology eliminating objectionable staircasing on
diagonal lines; Horizontal Enhancement technology is used to make an image
ƒ VBI Slicer look crisper and more realistic; Adaptive Contrast and Color (ACC) enables
ƒ JTAG Support dynamic contrast enhancement and color saturation correction; and Active
Color Management-II (ACM-II) enables color correction for subtle changes in
color that can dramatically improve the image (e.g., flesh tone, green stretch,
P AC K AG E etc.). A fully programmable 3x3 matrix provides color space conversion and
ƒ 208 PQFP global color correction technology. Programmable Color Look Up Tables
(CLUT) provides gamma correction of the output signal. Combined, these
features facilitate accurate color reproduction that enables use of the full
dynamic range on any fixed pixel display device.

FLI8125 B ASED “S MART ” V IDEO D ISPLAY


Audio
Amplifier
IR Sensor
GPIOs

Audio
EEPROM
Processor

Flash/
ROM
User Keypad I2C Bus

RGB + FB Backlight
Composite
FLI8125
S-Video LCD
Panel
RGB / YPrPb
GENESIS MICROCHIP INC. FLI8125 PR ELIMINAR Y PRODUCT BR IEF

FLI8125 F UNCTIONAL B LOCK D IAGRAM


24-bit Pattern
Input Port Generator
OSD
Video Image Processing Controller
Decoder
CVBS .. VBI Slicer
Inputs

Enhancement
Input Capture
24-bit RGB /

ACC / ACM
3x3 Matrix
Horizontal
Correction
Decoder 18-bit RGB /

CLUTs
..

Overlay
S-Video
Video
Analog Front

Scaling
Output

Engine
Edge
Inputs End Formatter 16-bit YUV
TTL Output
YPrPb/RGB ..
DUAL LVDS
Inputs Sync
Sync Stripper Processing

Input
Format DDC2bi
Measurement Embedded
ROM RAM Interface
Micro-processor
Low Low Internal Micro-
Bandwidth . 2-wire
... Bandwidth processor Bus Controller
Analog ADC
Inputs
GP
IR GPIOs Input
IR Sensor External ROM /Out-
Interface
Input puts

FLI8125 F EATURE D ESCRIPTIONS


I N T E G R AT E D T R I P L E ADC F AR O U D J A DCD I – E D G E ™
ƒ RGB / YPbPr support up to 135MHz ƒ Edge Correction
ƒ SCART – RGB + Fast Blank support – Eliminates objectionable stair-casing
ƒ Interlaced and progressive scan – Enhances clarity and realism
ƒ External OSD support ƒ Horizontal Enhancement
ƒ Adaptive Contrast and Color (ACC)
D I G I T AL I N P U T P O R T ƒ Active Color Management - II (ACM-II)
ƒ 24-bit re-configurable input port
D I G I T AL O U T P U T
I N T E G R AT E D 2D V I D E O D E C O D E R ƒ 18/24-bit 85Mhz TTL output
ƒ Worldwide NTSC/PAL/SECAM support ƒ Dual LVDS up to SXGA
ƒ Macrovision / VCR trick mode support ƒ Energy Spectrum Management for reducing EMI
EMBEDDED MICROPROCESSOR ƒ Programmable CLUT for gamma correction
ƒ Turbo 186 core OSD C O N T R O L L E R
ƒ Internal RAM / ROM ƒ Up to 4 windows: 1, 2 or 4-bits per pixel color
ƒ Serial Flash / Parallel ROM support ƒ Programmable Font scalar to meet Teletext requirements
ƒ 2-wire slave controller, UART support
ƒ Internal RESET Controller VBI S L I C E R
ƒ GPIOs , Low Bandwidth ADC – 6 input ƒ V-Chip, Closed Captioning, XDS, CGMS, WSS decode
ƒ Infra-red Interface ƒ Teletext 1.5 support

S C AL I N G E N G I N E JTAG S U P P O R T
ƒ Independent H & V scaling factors ƒ Boundary Scan support
ƒ 4:2:2 YPbPr or 4:4:4 RGB scaling
ƒ Anamorphic scaling (non-linear)
GENESIS MICROCHIP FLI8125 Preliminary Datasheet

2 Pin Diagram
The FLI8125 device is packaged in a 208-pin Plastic Quad Flat Pack (PQFP).

Figure 2: FLI8125 Pinout

AVDD_ADC
GND18_SC

ADC_TEST
VDD18_SC

VDD18_AB
AVDD_SC

GND18_C
VDD18_C
VO_GND

AVDD_C

AVDD_B

AVDD_A

VSYNC1
VOUT2

GNDS

GNDS

GNDS

GNDS

GNDS

GNDS

GNDS

GNDS

GNDS

GNDS

GNDS

GNDS
AGND

AGND

AGND

AGND
AGND
SV4P

SV3P

SV2P

SV1P
SVN

C4P

C3P

C2P

C1P
B4P

A4P

B3P

A3P

B2P

A2P

B1P

A1P
CN

NC
BN

AN
208
207
206
205
204
203
202
201
200
199
198
197
196
195
194
193
192
191
190
189
188
187
186
185
184
183
182
181
180
179
178
177
176
175
174
173
172
171
170
169
168
167
166
165
164
163
162
161
160
159
158
157
VDDA33_LBADC 1 156 HSYNC1
LBADC_IN1 2 155 CRVSS
LBADC_IN2 3 154 RVDD_3.3
LBADC_IN3 4 153 VID_CLK_1
LBADC_IN4 5 152 VID_DATA_IN_15/GPIO23
LBADC_IN5 6 151 VID_DATA_IN_14/GPIO22
LBADC_IN6 7 150 VID_DATA_IN_13/GPIO21
LBADC_RTN 8 149 VID_DATA_IN_12/GPIO20
VSAA33_LBADC 9 148 VID_DATA_IN_11/GPIO19
RESETn 10 147 VID_DATA_IN_10/GPIO18
GND_RPLL 11 146 VID_DATA_IN_9/GPIO17
VDD_RPLL_18 12 145 VID_DATA_IN_8/GPIO16
144 CRVSS
FLI8125
VBUFC_RPLL 13
AGND_RPLL 14 143 CVDD_1.8
XTAL 15 142 VID_DATA_IN_7
TCLK 16 141 VID_DATA_IN_6
AVDD_RPLL_33 17 140 VID_DATA_IN_5
CVDD_1.8 18 139 VID_DATA_IN_4
CRVSS 19 138 VID_DATA_IN_3
TEST 20 137 VID_DATA_IN_2
GPIO15 21 136 VID_DATA_IN_1
HSYNC2 22 135 VID_DATA_IN_0
VSYNC2 23 134 CRVSS
HOST_SCLK 24 133 CVDD_1.8
HOST_SDATA 25 132 VID_DATA_IN_23/D7/PD46
DDC_SCLK 26 131 VID_DATA_IN_22/D6/PD45
DDC_SDATA 27 130 VID_DATA_IN_21/D5/PD44
CVDD_1.8 28 129 VID_DATA_IN_20/D4/PD43
CRVSS 29 128 VID_DATA_IN_19/D3/PD42
MSTR_SCLK 30 127 CRVSS
MSTR_SDATA 31 126 CVDD_1.8
RVDD_3.3 32 125 VID_DATA_IN_18/D2/PD41
CRVSS 33 124 VID_DATA_IN_17/D1/PD40
TCK 34 123 VID_DATA_IN_16/D0/PD39
TDI 35 122 GPIO4/VIDIN_HS
TMS 36 121 GPIO5/VIDIN_VS
TRST 37 120 CRVSS
GPIO6/IRin 38 119 CVDD_1.8
CVDD_1.8 39 118 VID_CLK2/ROM_OEN/PD47
CRVSS 40 117 CRVSS
GPIO7/IRQin 41 116 RVDD_3.3
GPIO8/IRQout 42 115 VID_DE/FLD/A0/PD24
GPIO9/SIPC_SCLK 43 114 A1/PD25
GPIO10/SIPC_SDATA/A18 44 113 A2/PD26
CVDD_1.8 45 112 A3/PD27
CRVSS 46 111 A4/PD28
GPIO11/PWM0 47 110 A5/PD29
GPIO12/PWM1 48 109 A6/PD30
RVDD_3.3 49 108 A7/PD31
CRVSS 50 107 A8/PD32
GPIO13/PWM2 51 106 A9/PD33
GPIO14/PWM3/SCART16 52 105 A10/PD34
100
101
102
103
104
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
ROM_SCSN/ROM_CSN
ROM_SCLK/A17
ROM_SDO/A16

ADC_CLAMP/A15
PBIAS

VCO_LV
AVSS_LV

AVSS_OUT_LV

AVSS_OUT_LV

CRVSS

DHS
DVS
DCLK

CRVSS
PPWR

DEN
TDO
AVDD_LV_33

AVDD_OUT_LV_33
CH3P_LV_E/R0
CH3N_LV_E/R1
CLKP_LV_E/R2
CLKN_LV_E/R3
CH2P_LV_E/R4
CH2N_LV_E/R5
CH1P_LV_E/R6
CH1N_LV_E/R7
CH0P_LV_E/G0
CH0N_LV_E/G1

AVDD_OUT_LV_33
CH3P_LV_O/G2
CH3N_LV_O/G3
CLKP_LV_O/G4
CLKN_LV_O/G5
CH2P_LV_O/G6
CH2N_LV_O/G7
CH1P_LV_O/B0
CH1N_LV_O/B1
CH0P_LV_O/B2
CH0N_LV_O/B3

AVDD_OUT_LV_33
CVDD_1.8

PD20/B4/GPIO0
PD21/B5/GPIO1
PD22/B6/GPIO2
PD23/B7/GPIO3

RVDD_3.3

XOSD_CLK/A14/PD38
XOSD_HS/A13/PD37
XOSD_VS/A12/PD36
XOSD_FLD/A11/PD35
ROM_SDI/ROM_WEN
GENESIS MICROCHIP FLI8125 Preliminary Datasheet

3 Pin List
I/O Legend: A = Analog, I = Input, O = Output, P = Power, G= Ground

Table 1: Analog Input Port

Pin Name No. I/O Description

VDD18_AB 158 AP Analog Power (1.8V) for A & B Channels. Must be bypassed with 0.1uF capacitor to the
analog system ground plane.
NC 159 No Connection. Leave this pin open for normal operation.
GND18_C 160 AG Analog Ground (1.8V Return) for C channel. Must be directly connected to the analog system
ground plane on board.
VDD18_C 161 AP Analog Power (1.8V) for C Channel. Must be bypassed with 0.1uF capacitor to the analog
system ground plane.
ADC_TEST 162 O Analog Front End Test O/P. Leave this Pin open. Used for factory testing purpose only.
AVDD_ADC 163 AP Analog Power (3.3V) for ADC. Must be bypassed with 0.1uF capacitor to the analog system
ground plane.
AGND 164 AG Analog Ground. Must be directly connected to the analog system ground plane on board.
AGND 165 AG Analog Ground. Must be directly connected to the analog system ground plane on board.
SV1P 166 AI Positive analog sync input for channel 1.
The input has to be AC coupled using a series 20 Ohm resistor and 0.1uF Capacitor network.
GNDS 167 AG Analog Ground. Must be directly connected to the analog system ground plane on board.
A1P 168 AI Positive analog input ‘A’ for channel 1.
The input has to be AC coupled using a series 20 Ohm resistor and 0.1uF Capacitor network.
GNDS 169 AG Analog Ground. Must be directly connected to the analog system ground plane on board.
B1P 170 AI Positive analog input ‘B’ for channel 1.
The input has to be AC coupled using a series 20 Ohm resistor and 0.1uF Capacitor network.
GNDS 171 AG Analog Ground. Must be directly connected to the analog system ground plane on board.
C1P 172 AI Positive analog input ‘C’ for channel 1.
The input has to be AC coupled using a series 20 Ohm resistor and 0.1uF Capacitor network.
AVDD_A 173 AP Analog Power (3.3V) for ADC of Channel-A. Must be bypassed with 0.1uF capacitor to the
analog system ground plane.
AN 174 AI Negative analog input ‘A’ for channels 1 through 4.
This acts as the return Path for the Sources connected to Channel-A Inputs. This has to be AC
coupled using a series 20 Ohm resistor and 0.1uF Capacitor network to Analog Ground Plane
on board.
AGND 175 AG Analog Ground. Must be directly connected to the analog system ground plane on board.
SV2P 176 AI Positive analog sync input for channel 2.
The input has to be AC coupled using a series 20 Ohm resistor and 0.1uF Capacitor network.
GNDS 177 AG Analog Ground. Must be directly connected to the analog system ground plane on board.
A2P 178 AI Positive analog input ‘A’ for channel 2.
The input has to be AC coupled using a series 20 Ohm resistor and 0.1uF Capacitor network.
GNDS 179 AG Analog Ground. Must be directly connected to the analog system ground plane on board.
B2P 180 AI Positive analog input ‘B’ for channel 2.
The input has to be AC coupled using a series 20 Ohm resistor and 0.1uF Capacitor network.
GNDS 181 AG Analog Ground. Must be directly connected to the analog system ground plane on board.
C2P 182 AI Positive analog input ‘C’ for channel 2.
The input has to be AC coupled using a series 20 Ohm resistor and 0.1uF Capacitor network.
AVDD_B 183 AP Analog Power (3.3V) for ADC of Channel-B. Must be bypassed with 0.1uF capacitor to the
analog system ground plane.
BN 184 AI Negative analog input ‘B’ for channels 1 through 4.
This acts as the return Path for the Sources connected to Channel-B Inputs. This has to be AC
coupled using a series 20 Ohm resistor and 0.1uF Capacitor network to Analog Ground Plane
on board.
AGND 185 AG Analog Ground. Must be directly connected to the analog system ground plane on board.
SV3P 186 AI Positive analog sync input for channel 3.
The input has to be AC coupled using a series 20 Ohm resistor and 0.1uF Capacitor network.
GENESIS MICROCHIP FLI8125 Preliminary Datasheet

Pin Name No. I/O Description

GNDS 187 AG Analog Ground. Must be directly connected to the analog system ground plane on board.
A3P 188 AI Positive analog input ‘A’ for channel 3.
The input has to be AC coupled using a series 20 Ohm resistor and 0.1uF Capacitor network.
GNDS 189 AG Analog Ground. Must be directly connected to the analog system ground plane on board.
B3P 190 AI Positive analog input ‘B’ for channel 3.
The input has to be AC coupled using a series 20 Ohm resistor and 0.1uF Capacitor network.
GNDS 191 AG Analog Ground. Must be directly connected to the analog system ground plane on board.
C3P 192 AI Positive analog input ‘C’ for channel 3.
The input has to be AC coupled using a series 20 Ohm resistor and 0.1uF Capacitor network.
AVDD_C 193 AP Analog Power (3.3V) for ADC of Channel-C. Must be bypassed with 0.1uF capacitor to the
analog system ground plane.
CN 194 AI Negative analog input ‘C’ for channels 1 through 4.
This acts as the return Path for the Sources connected to Channel-C Inputs. This has to be
AC coupled using a series 20 Ohm resistor and 0.1uF Capacitor network to Analog Ground
Plane on board.
AGND 195 AG Analog Ground. Must be directly connected to the analog system ground plane on board.
SV4P 196 AI Positive analog sync input for channel 4.
The input has to be AC coupled using a series 20 Ohm resistor and 0.1uF Capacitor network.
GNDS 197 AG Analog Ground. Must be directly connected to the analog system ground plane on board.
A4P 198 AI Positive analog input ‘A’ for channel 4.
The input has to be AC coupled using a series 20 Ohm resistor and 0.1uF Capacitor network.
GNDS 199 AG Analog Ground. Must be directly connected to the analog system ground plane on board.
B4P 200 AI Positive analog input ‘B’ for channel 4.
The input has to be AC coupled using a series 20 Ohm resistor and 0.1uF Capacitor network.
GNDS 201 AG Analog Ground. Must be directly connected to the analog system ground plane on board.
C4P 202 AI Positive analog input ‘C’ for channel 4.
The input has to be AC coupled using a series 20 Ohm resistor and 0.1uF Capacitor network.
AVDD_SC 203 AP Analog Power (3.3V) for ADC of SYNC Channel. Must be bypassed with 0.1uF capacitor to
the analog system ground plane.
SVN 204 AI Negative analog sync input for channels 1 through 4.
This acts as the return Path for the Sources connected to SV Channel Inputs. This has to be
AC coupled using a series 20 Ohm resistor and 0.1uF Capacitor network to Analog Ground
Plane on board.
VO_GND 205 AG Analog Ground. Must be directly connected to the analog system ground plane on board.
VOUT2 206 AO Analog VOUT signal
This is the Analog Video Output from the Decoder in the Composite Video format. This can be
amplified and be fed to any video display device.
VDD18_SC 207 AP Analog Power (1.8V) for SYNC Channel. Must be bypassed with 0.1uF capacitor to the analog
system ground plane.
GND18_SC 208 AG Analog Ground (1.8V Return) for SYNC channel. Must be directly connected to the analog
system ground plane on board.

Table 2: Low Bandwidth ADC Input Port

Pin Name No I/O Description

VDDA33_LBADC 1 AP Analog Power (3.3V) for Low Bandwidth ADC Block. Must be bypassed with 0.1uF capacitor.
LBADC_IN1 2 AI Low Bandwidth Analog Input-1. The Input signal connected to this Pin, must be bypassed with
a 0.1uF capacitor and could be in the range of 0V to 3.3V (peak to peak).
LBADC_IN2 3 AI Low Bandwidth Analog Input-2. The Input signal connected to this Pin, must be bypassed with
a 0.1uF capacitor and could be in the range of 0V to 3.3V (peak to peak).
LBADC_IN3 4 AI Low Bandwidth Analog Input-3. The Input signal connected to this Pin, must be bypassed with
a 0.1uF capacitor and could be in the range of 0V to 3.3V (peak to peak).
LBADC_IN4 5 AI Low Bandwidth Analog Input-4. The Input signal connected to this Pin, must be bypassed with
a 0.1uF capacitor and could be in the range of 0V to 3.3V (peak to peak).
LBADC_IN5 6 AI Low Bandwidth Analog Input-5. The Input signal connected to this Pin, must be bypassed with
a 0.1uF capacitor and could be in the range of 0V to 3.3V (peak to peak).
LBADC_IN6 7 AI Low Bandwidth Analog Input-6. The Input signal connected to this Pin, must be bypassed with
GENESIS MICROCHIP FLI8125 Preliminary Datasheet

Pin Name No I/O Description

a 0.1uF capacitor and could be in the range of 0V to 3.3V (peak to peak).


LBADC_RTN 8 AG This Pin provides the Return Path for LBADC inputs. Must be directly connected to the analog
system ground plane on board.
VSSA33_LBADC 9 AG Analog Ground for Low Bandwidth ADC Block. Must be directly connected to the analog
system ground plane on board.

Table 3: RCLK PLL Pins

Pin Name No I/O Description

GND_RPLL 11 DG Digital GND for ADC clocking circuit. Must be directly connected to the digital system ground
plane.
VDD_RPLL_18 12 DP Digital power (1.8V) for ADC digital logic. Must be bypassed with capacitor to Ground Plane.
VBUFC_RPLL 13 O Test Output. Leave this Pin Open. This is reserved for Factory Testing Purpose.
AGND_RPLL 14 AG Analog ground for the Reference DDS PLL. Must be directly connected to the analog system
ground plane.
XTAL 15 AO Crystal oscillator output.
TCLK 16 AI Reference clock (TCLK) from the 14.3MHz crystal oscillator.
AVDD_RPLL_33 17 AP Analog Power (3.3V) for RCLK PLL. Must be bypassed with 0.1uF capacitor.

Table 4: Digital Video Input Port

Pin Name No I/O Description

VID_CLK_1 153 I Video port data clock input meant for Video Input – 1. Up to 75Mhz
[Input, 5V-tolerant]
VIDIN_HS 122 I When Video Input – 1 is in BT656 Mode, this Pin acts as Horizontal Sync Input for Video
Input – 2.
OR when Video Input – 1 is in 16 Bit Mode this Pin acts as Horizontal Sync Input for Video
Input – 1.
OR this Pin acts as Horizontal Sync Input for 24 Bit Video Input
VIDIN_VS 121 I When Video Input – 1 is in BT656 Mode, this Pin acts as Vertical Sync Input for Video Input
– 2.
OR when Video Input – 1 is in 16 Bit Mode this Pin acts as Vertical Sync Input for Video
Input – 1.
OR this Pin acts as Vertical Sync Input for 24 Bit Video Input
VID_DATA_IN_0 135 IO Input YUV data in 8-bit BT656 of Video Input – 1
VID_DATA_IN_1 136 [Bi-Directional, 5V-tolerant]
VID_DATA_IN_2 137
VID_DATA_IN_3 138 OR Input Y Data in case of 16 Bit Video Input (CCIR601) of Video Input – 1
VID_DATA_IN_4 139
VID_DATA_IN_5 140 OR Input Red Data in case of 24 Bit Video Input
VID_DATA_IN_6 141
VID_DATA_IN_7 142
VID_DATA_IN_8 145 IO Input Pr / Pb Data in case of 16 Bit Video Input (CCIR601) of Video Input – 1
VID_DATA_IN_9 146
VID_DATA_IN_10 147 OR Input Green Data in case of 24 Bit Video Input
VID_DATA_IN_11 148
VID_DATA_IN_12 149
VID_DATA_IN_13 150
VID_DATA_IN_14 151
VID_DATA_IN_15 152
VID_DATA_IN_16 123 IO Input Blue Data in case of 24 Bit Video Input
VID_DATA_IN_17 124
VID_DATA_IN_18 125 OR Video Input – 2 in 8-bit with Embedded Sync / Separate Sync Sync in which case
VID_DATA_IN_19 128 VID_DATA_IN_16 acts as the LSB of the 8-bit Video input and VID_DATA_IN_23 acts as
VID_DATA_IN_20 129 the MSB of the 8-bit Video input.
VID_DATA_IN_21 130
VID_DATA_IN_22 131
VID_DATA_IN_23 132
GENESIS MICROCHIP FLI8125 Preliminary Datasheet

Pin Name No I/O Description

VID_CLK2 118 I Video port data clock input meant for Video Input – 2. Up to 75Mhz
[Input, 5V-tolerant]
VID_DE/FLD 115 I Video Active Signal Input or the Field Signal Input from external Digital Video Source.

Note: In case of Multiple Digital Video Input Sources, only one source could be in 8-Bit
with embedded Sync (BT656 mode) format.

Table 5: System Interface

Pin Name No I/O Description

RESETn 10 I Hardware Reset (active low) [Schmitt trigger, 5v-tolerant]


Connect to ground with 0.01uF (or larger) capacitor.
TEST 20 I For normal mode of operation connect this Pin to Ground.
GPIO15 21 IO This pin is available as a general-purpose input/output port. Also it is optionally
programmable to give out the external chip select signal meant for external SRAM.
Refer to note below.
HSYNC2 22 I Horizontal Sync signal Input-2. Used when Analog RGB component signal carries
separate HSYNC signal.
VSYNC2 23 I Vertical Sync signal Input-2. Used when Analog RGB component signal carries separate
VSYNC signal.
HOST_SCLK 24 IO Host input clock or 186 UART Data In or JTAG clock signal.
[Input, Schmitt trigger, 5V-tolerant]
HOST_SDATA 25 IO Host input data or 186 UART Data Out or JTAG mode signal.
[Bi-directional, Schmitt trigger, slew rate limited, 5V-tolerant]
DDC_SCLK 26 IO DDC2Bi clock for VGA Port [internal 10KΩ pull-up resistor]
DDC_SDATA 27 IO DDC2Bi data for VGA Port [internal 10KΩ pull-up resistor]
MSTR_SCLK 30 O Clock signal from Master Serial 2 Wire Interface Controller
MSTR_SDATA 31 IO Data signal meant for Master Serial 2 Wire interface Controller
TCK 34 IO This Pin accepts the Input Clock signal in case of Boundary Scan Mode.
TDI 35 IO This Pin accepts the Input Data signal in case of Boundary Scan Mode.
TMS 36 IO This Pin accepts the Input Test Mode Select signal in case of Boundary Scan Mode.
TRST 37 IO This Pin accepts the Boundary Scan Reset signal in case of Boundary Scan Mode.
GPIO6/IRin 38 IO Input from Infra Red Decoder can be connected to this Pin. When not used, this pin is
available as General Purpose Input/output Port.
GPIO7/IRQin 41 IO Input Interrupt Request signal can be connected to this Pin. When not used, this pin is
available as General Purpose Input/output Port.
GPIO8/IRQout 42 IO This Pin will give out the Interrupt Signal to interrupt external Micro. When not used, this
pin is available as General Purpose Input/output Port.
GPIO9/SIPC_SCLK 43 IO This Pin accepts the Clock signal from External Serial 2 Wire interface Bus if FLI8125 is
programmed to be in Slave mode. When not used, this pin is available as General
Purpose Input/output Port.
GPIO10/SIPC_SDATA/ 44 IO This Pin acts as the Data I/O signal when used with External Serial 2 Wire interface Bus if
A18 FLI8125 is programmed to be in Slave mode. Or this Pin is programmable to give out
Address # 18 from the Internal Micro when used with 512K External Memory. When not
used, this pin is available as General Purpose Input/output Port.
GPIO11/PWM0 47 IO This Pin can be programmed to give out Pulse Width Modulated Output Pulses for
external use. When not used, this pin is available as General Purpose Input/output Port.
GPIO12/PWM1 48 IO This Pin can be programmed to give out Pulse Width Modulated Output Pulses for
external use. When not used, this pin is available as General Purpose Input/output Port.
GPIO13/PWM2 51 IO This Pin can be programmed to give out Pulse Width Modulated Output Pulses for
external use. When not used, this pin is available as General Purpose Input/output Port.
GPIO14/PWM3/ 52 IO This Pin can be programmed to give out Pulse Width Modulated Output Pulses for
SCART16 external use. Or it can be programmed to sense the Fast Blank Input signal from a
SCART I/P source. When not used, this pin is available as General Purpose Input/output
Port.
TDO 55 O This Pin provides the Output Data in case of Boundary Scan Mode.
HSYNC1 156 I Horizontal Sync signal Input-1. Used when Analog RGB component signal carries
GENESIS MICROCHIP FLI8125 Preliminary Datasheet

Pin Name No I/O Description

separate HSYNC signal.


VSYNC1 157 I Vertical Sync signal Input-1. Used when Analog RGB component signal carries separate
VSYNC signal.
101 O Clock Output meant for External OSD Controller
102 O Horizontal Sync Output meant for External OSD Controller
XOSD_CLK 103 O Vertical Sync Output meant for External OSD Controller
XOSD_HS 104 O Field Signal Output meant for External OSD Controller
PD20/B4/GPIO0 86 IO These Pins provide the Panel Data as shown in the TTL Display Interface Table below.
PD21/B5/GPIO1 87 These are available as General Purpose Input / Output Pins when not used as Panel
PD22/B6/GPIO2 88 Data.
PD23/B7/GPIO3 89

Table 6: LVDS Display Interface

Pin Name No I/O Description

PBIAS 53 O Panel Bias Control (backlight enable) [Tri-state output, 5V- tolerant]
PPWR 54 O Panel Power Control [Tri-state output, 5V- tolerant]
AVDD_LV_33 56 DP Digital Power for LVDS Block. Connect to digital 3.3V supply.
VCO_LV 57 O Reserved. Output for Testing Purpose only at Factory.
AVSS_LV 58 G Ground for LVDS outputs.
AVDD_OUT_LV_33 59 DP Digital Power for LVDS outputs. Connect to digital 3.3V supply.
CH3P_LV_E 60 O These form the Differential Data Output for Channel – 3 (Even).
CH3N_LV_E 61 O
CLKP_LV_E 62 O These form the Differential Clock Output Even Channel.
CLKN_LV_E 63 O
CH2P_LV_E 64 O These form the Differential Data Output for Channel – 2 (Even).
CH2N_LV_E 65 O
CH1P_LV_E 66 O These form the Differential Data Output for Channel – 1 (Even).
CH1N_LV_E 67 O
CH0P_LV_E 68 O These form the Differential Data Output for Channel – 0 (Even).
CH0N_LV_E 69 O
AVSS_OUT_LV 70 G Ground for LVDS outputs.
AVDD_OUT_LV_33 71 DP Digital Power for LVDS outputs. Connect to digital 3.3V supply.
CH3P_LV_O 72 O These form the Differential Data Output for Channel – 3 (Odd).
CH3N_LV_O 73 O
CLKP_LV_O 74 O These form the Differential Clock Output Odd Channel.
CLKN_LV_O 75 O
CH2P_LV_O 76 O These form the Differential Data Output for Channel – 2 (Odd).
CH2N_LV_O 77 O
CH1P_LV_O 78 O These form the Differential Data Output for Channel – 1 (Odd).
CH1N_LV_O 79 O
CH0P_LV_O 80 O These form the Differential Data Output for Channel – 0 (Odd).
CH0N_LV_O 81 O
AVSS_OUT_LV 82 G Ground for LVDS outputs.
AVDD_OUT_LV_33 83 DP Digital Power for LVDS outputs. Connect to digital 3.3V supply.
GENESIS MICROCHIP FLI8125 Preliminary Datasheet

Table 7: TTL Display Interface

Pin Name No I/O Description


For 8-bit panels For 6-bit panels

PBIAS 53 O Panel Bias Control (backlight enable) [Tri-state output, 5V- tolerant]
PPWR 54 O Panel Power Control [Tri-state output, 5V- tolerant]
AVDD_LV_33 56 DP Digital Power for TTL Block. Connect to digital 3.3V supply.
VCO_LV 57 O Reserved. Output for Testing Purpose only at Factory.
AVSS_LV 58 G Ground for TTL outputs.
AVDD_OUT_LV_33 59 DP Digital Power for TTL outputs. Connect to digital 3.3V supply.
R0 60 O Red channel bit 0 (Even) Not used.
R1 61 O Red channel bit 1 (Even) Not used.
R2 62 O Red channel bit 2 (Even) Red channel bit 0 (Even)
R3 63 O Red channel bit 3 (Even) Red channel bit 1 (Even)
R4 64 O Red channel bit 4 (Even) Red channel bit 2 (Even)
R5 65 O Red channel bit 5 (Even) Red channel bit 3 (Even)
R6 66 O Red channel bit 6 (Even) Red channel bit 4 (Even)
R7 67 O Red channel bit 7 (Even) Red channel bit 5 (Even)
G0 68 O Green channel bit 0 (Even) Not used.
G1 69 O Green channel bit 1 (Even) Not used.
AVSS_OUT_LV 70 G Ground for TTL outputs.
AVDD_OUT_LV_33 71 DP Digital Power for TTL outputs. Connect to digital 3.3V supply.
G2 72 O Green channel bit 2 (Even) Green channel bit 0 (Even)
G3 73 O Green channel bit 3 (Even) Green channel bit 1 (Even)
G4 74 O Green channel bit 4 (Even) Green channel bit 2 (Even)
G5 75 O Green channel bit 5 (Even) Green channel bit 3 (Even)
G6 76 O Green channel bit 6 (Even) Green channel bit 4 (Even)
G7 77 O Green channel bit 7 (Even) Green channel bit 5 (Even)
B0 78 O Blue channel bit 0 (Even) Not used.
B1 79 O Blue channel bit 1 (Even) Not used.
B2 80 O Blue channel bit 2 (Even) Blue channel bit 0 (Even)
B3 81 O Blue channel bit 3 (Even) Blue channel bit 1 (Even)
AVSS_OUT_LV 82 G Ground for TTL outputs.
AVDD_OUT_LV_33 83 DP Digital Power for TTL outputs. Connect to digital 3.3V supply.
PD20/B4 86 O Blue channel bit 4 (Even) Blue channel bit 2 (Even)
PD21/B5 87 O Blue channel bit 5 (Even) Blue channel bit 3 (Even)
PD22/B6 88 O Blue channel bit 6 (Even) Blue channel bit 4 (Even)
PD23/B7 89 O Blue channel bit 7 (Even) Blue channel bit 5 (Even)
DEN 90 O Display Data Enable
DHS 91 O Display Horizontal Sync.
DVS 92 O Display Vertical Sync.
DCLK 93 O Display Pixel Clock
PD24 115 O Red channel bit 0 (Odd) Not used.
PD25 114 O Red channel bit 1 (Odd) Not used.
PD26 113 O Red channel bit 2 (Odd) Red channel bit 0 (Odd)
PD27 112 O Red channel bit 3 (Odd) Red channel bit 1 (Odd)
PD28 111 O Red channel bit 4 (Odd) Red channel bit 2 (Odd)
PD29 110 O Red channel bit 5 (Odd) Red channel bit 3 (Odd)
PD30 109 O Red channel bit 6 (Odd) Red channel bit 4 (Odd)
PD31 108 O Red channel bit 7 (Odd) Red channel bit 5 (Odd)
PD32 107 O Green channel bit 0 (Odd) Not used.
GENESIS MICROCHIP FLI8125 Preliminary Datasheet

Pin Name No I/O Description


For 8-bit panels For 6-bit panels

PD33 106 O Green channel bit 1 (Odd) Not used.


PD34 105 O Green channel bit 2 (Odd) Green channel bit 0 (Odd)
PD35 104 O Green channel bit 3 (Odd) Green channel bit 1 (Odd)
PD36 103 O Green channel bit 4 (Odd) Green channel bit 2 (Odd)
PD37 102 O Green channel bit 5 (Odd) Green channel bit 3 (Odd)
PD38 101 O Green channel bit 6 (Odd) Green channel bit 4 (Odd)
PD39 123 O Green channel bit 7 (Odd) Green channel bit 5 (Odd)
PD40 124 O Blue channel bit 0 (Odd) Not used.
PD41 125 O Blue channel bit 1 (Odd) Not used.
PD42 128 O Blue channel bit 2 (Odd) Blue channel bit 0 (Odd)
PD43 129 O Blue channel bit 3 (Odd) Blue channel bit 1 (Odd)
PD44 130 O Blue channel bit 4 (Odd) Blue channel bit 2 (Odd)
PD45 131 O Blue channel bit 5 (Odd) Blue channel bit 3 (Odd)
PD46 132 O Blue channel bit 6 (Odd) Blue channel bit 4 (Odd)
PD47 118 O Blue channel bit 7 (Odd) Blue channel bit 5 (Odd)

Note: In case of 24 Bit TTL Panels the RGB Odd Channel Outputs will not be used. In that case they can be
made available for other purposes as Address & Data from On-Chip Micro or Digital Video Input Data.

Table 8: Parallel/Serial ROM Interface

Pin Name No I/O Description

A17 95 O 256K x8 PROM Address. These pins also have bootstrap functionality.
A16 96 For serial SPI ROM interface:
A15 100 - ROM_ADDR17 will be Serial Clock (ROM_SCLK)
A14 101 - ROM_ADDR16 will be Serial Data Output (ROM_SDO)
A13 102
A12 103 For 512K X 8 PROM, Address Signal A18 is available thru Pin # 44 which is GPIO10.
A11 104
A10 105
A9 106
A8 107
A7 108
A6 109
A5 110
A4 111
A3 112
A2 113
A1 114
A0 115
D7 132 IO External PROM data input.
D6 131
D5 130
D4 129
D3 128
D2 125
D1 124
D0 123
ROM_OEN 118 O External PROM data Output Enable.
ROM_SDI/ 97 O External PROM data Write Enable (for In-System-Programming of FLASH) or Serial Data
ROM_WEN Input (SDI) for SPI ROM interface.
ROM_SCSN/ 94 O External PROM data Chip Select or Serial PROM Chip Select (ROM_SCSN) for SPI ROM
ROM_CSN interface.
GENESIS MICROCHIP FLI8125 Preliminary Datasheet

Table 9: Digital Power and Ground

Pin Name No I/O Description

RVDD_3.3 32 P Ring VDD. Connect to digital 3.3V.


49
98
116
154
CVDD_1.8 18 P Core VDD. Connect to digital 1.8V.
28
39
45
84
119
126
133
143
CRVSS 19 G Chip ground for core and ring.
29
33
40
46
50
85
99
117
120
127
134
144
155

Table 10: JTAG Boundary Scan

Pin Name No I/O Description

TCK 34 I JTAG Boundary Scan TCK signal


TDO 55 O JTAG Boundary Scan TDO signal
TDI 35 I JTAG Boundary Scan TDI signal. Pad has internal 50K pull-up resistor.
TMS 36 I JTAG Boundary Scan RST signal. Pad has internal 50K pull-up resistor.
TRST 37 I JTAG Boundary Scan TMS signal. Pad has internal 50K pull-up resistor.
AP9435M

Advanced Power P-CHANNEL ENHANCEMENT MODE


Electronics Corp. POWER MOSFET

▼ Simple Drive Requirement D BVDSS -30V


D
▼ Low On-resistance D RDS(ON) 50mΩ
D
▼ Fast Switching ID -5.3A
G
S
S
SO-8 S

Description D
The Advanced Power MOSFETs from APEC provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and cost-effectiveness. G
S
The SO-8 package is universally preferred for all commercial-industrial
surface mount applications and suited for low voltage applications
such as DC/DC converters.

Absolute Maximum Ratings


Symbol Parameter Rating Units
VDS Drain-Source Voltage -30 V
VGS Gate-Source Voltage ± 20 V
3
ID@TA=25℃ Continuous Drain Current -5.3 A
3
ID@TA=70℃ Continuous Drain Current -4.7 A
1
IDM Pulsed Drain Current -20 A
PD@TA=25℃ Total Power Dissipation 2.5 W
Linear Derating Factor 0.02 W/℃
TSTG Storage Temperature Range -55 to 150 ℃
TJ Operating Junction Temperature Range -55 to 150 ℃

Thermal Data
Symbol Parameter Value Unit
3
Rthj-amb Thermal Resistance Junction-ambient Max. 50 ℃/W
Silicore

4 CHANNEL DRIVER MOTOR DRIVER D5954

DESCRIPTION Outline Drawing


The D5954 is a 4 channel
driver for optical disc mo tor
driver. Dual channel current
feedback type drivers are built
in, in addition to dual channel
motor drivers

FEATURE
Wide dynamic range. (4.0V (typ .) at PreVcc=12V,PVcc=5V,RL=8Ω)
Separating Vcc into Pre+Power of sled motor, Power of loading mo tor and Power
of actuator ,can make better power efficiency, by low supply voltage drive.
Level shift circuit built in.
Thermal-shut-down circuit built in
Stand-by mode built in

BLOCK DIAGRAM
Silicore D5954

PIN DESCRIPTION

No Symbol Function NO. Symbol Function


Non inverting output for
1 VINFC Input for focus driver 15 VOTK+
tracking
2 CECerr1 16 VOTK- Inverting output for tracking
Connectio n with capacitor
Non inverting output for
3 CECerr2 for error amplifier 17 OLD+
loading
VINSL Non inverting input for
4 18 VOLD- Inverting output for loading
+ OP-amp
5 VINSL- Inverting input for OP-amp 19 PGND GND for power block
6 VOSL Output of OP-amp 20 VNFTK Feedback for tracking driver
Vcc for po wer block of
7 VNFFC Feedback for focus driver 21 PVcc2
actuator
Vcc for pre-driver block
8 Vcc 22 PreGND GND for pre-drive block
and power block of sled
Vcc for power block of
9 PVcc1 23 VINLD Input for loading driver
loading
10 PGND GND for power block 24 CTKerr2 Connectio n with capacitor
11 VOSL- Inverting output for sled 25 CTKerr1 for error amplifier
Non inverting output for
12 VOSL+ 26 VINTK Input for tracking driver
sled
13 VOFC- Inverting output for focus 27 BIAS Input for reference voltage
Non inverting output fo r
14 VOFC+ 28 STBY Input for stand-by control
focus

ABSOLUTE MAXIMUM RATINGS (Ta=25 °C)

Characteristic Symbol Value Unit


Supply voltage Vcc 13.5 V
Power dissipation PD 1.7* W
Operating temperature Topr -35~85 °C
Storage Temperature Tstg -40~150 °C
2
* On less than 3%(percentage occupied by copper foil), 70×70mm , t=1.6mm, glass
epoxy mounting. Reduce power by 13.6mW for each degree above 25°C
Semiconductor STS8050
NPN Silicon Transistor

Descriptions
• High current application
• Radio in class B push-pull operation

Feature
• Complementary pair with STS8550

Ordering Information
Type NO. Marking Package Code

STS8050 STS8050 TO-92

Outline Dimensions unit : mm

3.45±0.1
4.5±0.1
2.25±0.1
4.5±0.1

0.4±0.02
2.06±0.1
14.0±0.40

1.27 Typ.

2.54 Typ.

1 2 3

PIN Connections
1. Emitter
1.20±0.1

2. Base
0.38

3. Collector

KST-9012-000
Part4: Detailed Circuit
5 4 3 2 1

+12V_LIGHT
+5V JP3

1
1
2
3
HEADER 3
+3.3V_COMMON +12V R184

NC_10K C235

1
L74 NC_470uF/16V

4
3
2
1
Q21 R185 R236
NC_2N3904 Q20
D NC 0R_0805 0R_0805 D

1
1 2

2
4 PPW R
R75 NC_NDS9435A/SO
R187
10K NC_2K2

5
6
7
8
2
C131
470uF/16V R188

4
3
2
1
NC_75R C236 C237
Q4 NC _1UF NC_100nF

R76 Q5
1 2 C132 NDS9435A/SO
4 PPW R 2N3904 1 UF
2K2 Panel_Power G ND

5
6
7
8
R77
75R/1% C105 C267 C268 C269 C N8
Can switch backlight Can not switch backlight
1uF 100nF 10nF 1nF 1
+12V
Q20 NDS9435 NC
C
2 Q21 2N3904 NC C
+12V
R187 2K2 NC
BKLON 3 R184 10K NC
BL_ON
R188 75 NC
G ND BRIGHT 4 C236 1uF NC
+5V ADJ(BRT)
C237 0.1uF NC
5
GND C235 470uF/16V NC
R185 NC 0
6
R78 GND
+5V 6PIN/2.0mm
10K G ND

R79

10K
R80 Q6
2N3904

R81 Q7
10K
Inverter Interface
PBIAS
4 PBIAS 2N3904
B 10K B

G ND

G ND

+5V

R82
1K R83
10K

C134
R84 4.7K Q8
1uF
4 PWM0 2N3904

G ND
A A

G ND
Genesis Microchip Inc.
Title
07. Outputs
Size Document Number R ev
B 1

D ate: Monday, October 30, 2006 Sheet 3 of 8


5 4 3 2 1
5 4 3 2 1

DVD_Connect SV4 4
C146 These four holes are in
J18 0.1uF
DVD_Y GND J11 0.1uF four corners of PCB.
1 R122
2 DVD_Pb 4 L14 20R/1% C167
3 3 Y
Y J6 J14
4 SV3 4 2 B2 4

3
DVD_Pr R274 0R MTHOLE MTHOLE
5 0.1uF C136 1 L-0805 6 2 6 2
6 DVD_Rin C173 150/100M 7 3 7 3 GND
7 DVD_Lin DVD_Rin 4
R275 0R GND NC_CON4 D11 R125 J8
8 DVD_Lin 4 27P
BAV99 8 4 8 4

15
14
13
12
1

2
9 I/O15 R276 0R 75R/1% TUNER: UVL7605VMW
9 5 9 5
10 I/O15 4 L34 CON5
100R C140 +5V GND

GND
BM GND
GND
NC GND
CON10/2.0mm R11 20R/1% D_Pr component 0.1uF

1
A3 4
R239 2 R134 R204 3R R205 3R

GND
AGC

SDA

NC1
SCL

BT1
U21 L-0805 0.1uF 3 Pr_IN_0 L16 GND 20R/1% C178

AS
Pb

BT

IF
2 4 R_OUT C37 150/100M R242 1 PB
C2 4

3
GND 5 IA1 OUT1 GND GND RF_AGC
27P

10

11
11 IA2 7 G_OUT 75R/1% 5 L-0805 J7 J15 IF
D 14 IA3 OUT2 6 Pb_IN_0 C179 150/100M MTHOLE MTHOLE C243 C244 C270 C271 C272 R208 D
IA4

75R/1%
9 B_OUT 4 DTV_Rin D15 6 2 6 2 1uF 1uF 15pF 15pF 15pF 100R
OUT3 DTV_Rin 4 27P
J20 3 BAV99 7 3 7 3

2
ATSC_Y 6 IB1 12 GND GND 8 VDD5_TUNER GND
1 10 IB2 OUT4 +5V 9 Y _IN_0 +5V GND 8 4 8 4 R209
2 ATSC_Pb 13 IB3 R237 C138 7 DTV_Lin 9 5 9 5 GND 3K_0805 +33V
3 IB4 L32 DTV_Lin 4
20R/1% 0.1uF R-0805
4 ATSC_Pr D_Y C245
15 16

10
13
12
11

1
5 /EN VCC B3 4
1 8 GND R206 3R R207 3R 0.1UF R210

2
6 ATSC_Rin SEL GND C11 L-0805 0.1uF 3K_0805
7 ATSC_Lin ATSC_Rin 4
NC_100nF C35 150/100M R240 R139 C246 + D42 R-0805
8 ATSC_Lin 4 L18 C180
NC_PI5V330 27P GND 20R/1% GND GND GND 10uF/50V D43 15V
9 R273 75R/1% Pr 4,5 M_SCL M_SCL R211 100R NC_uPC574
DIP16-SSOP

1
A2 4

3
10 GND GND 4,5
NC_CON10/2.0mm NC_33R L-0805 M_SDA M_SDA R212 100R
GND GND C182 150/100M
D17 D44
L33 27P

R141
GND RGB_SWITCH RGB_SWITCH R238 C139 BAV99 17V/18V

75R/1%
20R/1% D_Pb
C3 4
0.1uF +5V GND
L-0805
150/100M R241 GND
C36
75R/1%
27P
GND

GND GND
C141
C4 4

TCVBS
AGND

VAGC

TAGC
VPLL
SIF2

SIF1

REF
OP2
0.1uF

Vp
GND

24

23
22

21

20

19

18

17

16

15

14

13
U19

SIF2

SIF1
OP2

Vp

VPLL

CVBS
AFC

AGND

VAGC

REF

TAGC

NC
TAD9886

0.1uF
+3.3VA_ADC L5 R102
3

SIOMAD
SCP621U_Y 2.7uH 20R/1% C143

FMPLL

DGND
DEEM
CN15 1 2 CVBS_IN1

VIF1

VIF2

AUD

TOP

SDA
AFD
OP1

SCL
B4 4
10M
R194 D8
4

5.6V L3 VDD5_TUNER

FMPLL 4

TSDA 10

TSCL 11

12
SIOMAD
1 2

DGND
C147 C148

DEEM
22uH(DIP)
3

VIF1

VIF2

AUD
AFD
OP1
20R/1% SCP621U_W 330pF 680pF R103 C53
C151 0.1uF A_RETURN 100uF/16v
R105 CN16 1 2 GND 75R/1%
C A_RET 4 C
+5V_1
L4 GND
4

1 2
AV_AUDIO_LIN
GND GND
4 100uH(DIP)
3

20R/1% SCP621U_R L7 VDD5_9886


C152 0.1uF B_RETURN
R109 CN17 1 2 1 2
B_RET 4 AV_AUDIO_RIN 4
22uH(DIP) VDD5_9886 VDD5_IF VDD5_9886
4

GND
4 L76 C247
20R/1% GND 3 C222 L-0805
C157 0.1uF 1uF
R112 C_RETURN 2 470uF/16v 10UH
C_RET 4 1 GND Q30
J12 GND GND 2N3904
NC_CON4
GND R213
J13 J16 1k

20R/1% 3 F9370 R214


C164 0.1uF D_RETURN 2
R118 0.1uF 47R
SV_RET 4 1 R121
C166 A4 4

1
2
3
4
5
20R/1% C249
NC_ 2.0X3 C_IN IF 1.5K L77 R215 C248
SV2 4
GND 1K/100M 20R/1% 0.1uF

R123 R216
75R/1% GND 75R

CN10 0.1uF CLOSE TO 9886


1 R130
2 L2 GND 20R/1% C174 VDD5_9886 GND GND
VGA_SDA 4 4 3 Y _IN
3
VGA_SCL 4 SV1 4
2 1 4 2.7uH C250
D14 470uF/16v

SVIDEO JACK
5.1V C14
330pF
C15
680pF
R133
75R/1%
C16
1000pF
analog Interface C251
1uF
C252
100nF
GND GND

GND GND C253


10nF Y2 VDD5_9886
GND C254 4MHz
GND 470nF X'TAL
R222
12K
R223 C255
D35 D36 B1 330 1.5nF C258
VGA_5V 1N4148 1N4148 +5V C256 47uF/16V RF_AGC
100nF
B 1 2 2 1 C257 B

TCVBS
20R/1% C181 220nF

AGND

VAGC
VPLL
SIF2

SIF1

REF
OP2
R140

14 TAGC
Vp
RED_IN 0.1uF RED+ R224
A1 4
3

VGA_5V 100K

24

23
22

21

20

19

18

17

16

15

13
C183
R143 R144 D18 U20

SIF2

SIF1
OP2

Vp

VPLL

CVBS
AFC

AGND

VAGC

REF

TAGC

NC
S1

0.1uF 10K 10K CN11 BAV99 NC_TAD9886 GND


1

20R/1% ** C184
11 1 R145
GRN_IN 0.1uF GREEN+
GND R146 150R 6 +5V GND A3
B1 4
3

SIOMAD
12 2

FMPLL

DGND
DEEM
7

VIF1

VIF2

AUD

TOP

SDA
AFD
OP1

SCL
13 3
U9 8 D19
1 8 14 4 BAV99
1

FMPLL 4

TSDA 10

TSCL 11

SIOMAD 12
A0 VCC 20R/1% C188 T1
2 7 9
A1 WP

DGND
DEEM
3 6 15 5 R151 L4.5M
0.1uF

VIF1

VIF2
A2 SCL

AUD
AFD
OP1
4 5 10 /VGACON +5V GND BLU_IN BLUE+ J17 L4.5M
C1 4
3

GND SDA R150 150R F3953M

1
3
2
M24C02 VDD5_IF
S2

SOIC08 DB15 R152 R153 R154

1
3
2
1
2
3
4
5
GND GND GND D20 C259 QSS_IF
2

BAV99 75R/1% 75R/1% 75R/1% R225 100pF C260 4


1

D21 D22 Pins 6/7/8 are R/G/B C261 2.2K R226 R227 100nF
75-ohm terminating +5V GND 10nF GND
5.6V 5.6V r eturn lines resp. GND 100 100
r esistor very close to GND R228 C262 C263 C264

M_SDA
1

M_SCL
the VGA conn. 2.2K VDD5_IF C265 10nF 10nF 470nF L78
GND 390pF NC_10UH R230
R231 R232 R229 L-0805 1K
AIP_RAW_VS 4
GND 1K 22k 5.6K
GND R155
TUNER_AUDIO
150R D47 GND
4
NC_BA277
R233 GND GND GND
R156 0R R235 GND
150R NC_1K
Q33 R234
AIP_RAW_HS_CS 4
2N3904 3.9k
2

GND
R157 R158 C189 C190 h igh :pal pin2-gnd GND
Default 2-3 lo w :ntsc pin2-pin1
4K7 4K7 47pF 47pF u s a:d47=0R q33=open
Schm itt Triggers
1

D23 D24
NC_5.1V NC_5.1V
Default 2-3
ANALOG INPUT TO MUX SWITCHING
GND Optional
A A
1 2 3 4
DNP

A GRAPHIC_RED+ HD-IN_Pr / S CART-1-IN_RED_C TUNER_CVBS1

B GRAPHIC_GREEN+ HD-IN_Y / S CART-1-IN_GREEN CV BS-2-IN/SCART-2-IN_CVBS

C GRAPHIC_BLUE+ HD-IN_Pb / S CART-1-IN_BLUE / SCART-1-FB

SV Y/C-1_Y Y/C-1_C

RET
Ge n esis Microchip Inc.
Title
03. Analog Inputs
Size D ocument Number Rev
1
D
Date: Thursday , August 23, 2007 Sheet 4 of 8
5 4 3 2 1
5 4 3 2 1

C 194 C 195
10uF/ 25V 10uF/ 25V
CN7

N C _DC JA CK _4P IN
1
1 2
6 7 3 U 12

1
2 3 4 A P 1501 BAV99 BAV99 BAV99 +33V
4 5 5 4 D 39 D 40 D 41
6 1 FEEDBACK
VIN

ON/OFF
GND

GNDP
2

GND
7

3
OUTPUT L21
D D
BEAD C199
+12V

6
+ 12V _LIGHT 10uF/ 50V
C 196
C N12 10uF/ 25V 10uF/ 25V 10uF/ 25V
B NC F1 C 197 C 198
3 1 + 12V _IN
R 200 R195 GND
FUS E / 4A CN5 0. 39R/ 2W 0R
2

C N 13 C N14
C 202 4 C 203 C 204 C 205
4 4 3
3 3 0 . 1uf 2 470uF/ 16V 4 7 0 uf/ 16v 0 . 1uf +5V
2 2 1 33uH/ 3A (33uH/3A)
1 1 GND L22 1 2
N C_4P IN/ 2. 0mm
4P IN/ 2. 0mm N C_4P IN/ 2. 0mm
D-5819-1
S S M5822 D 31
C 207 C 206 C208
470uF/ 16V 0. 01uF 470uF/ 16V

G ND
GND

NEED GND
H EAT
SINK + 3. 3V _COMMON
+5V U 13
A IC1084-33CMTR
1.5A Max
C C
3 2
VIN VOUT
4
C 210 AdjustTAB
C 209 + TO-263 C 211 +
100uF/ 16V 0. 1uF 1 100uF/ 16V

TV Board Power
GND
L e a v e 1 s q i n c h - e x p o s e d c o pper area attached to Tab of U 902
L e a v e r o o m f o r h eat sink
+ 3. 3V _COMMON

+5V

2
+1.8V
+ 1. 8V _CORE D 32

U 14 1n4148
LM1117-1.8V

1
D 33
3 2 +1.8V
VIN VOUT L23 + 1. 8V _ADC
1N4001(DIP ) BEAD +1.8V
GND TAB
C 214 S OT-223 C 212
C 213 1 4 100uF/ 16V
100uF/ 16V
Power Sequencing Diode
0. 1uF L24
B
BEAD B

L e a v e 1 s q i n c h - e x p o s e d c o pper area attached to Tab of U 903


GND +1.8V + 1. 8V _RPLL

L25
BEAD

+5V U 15 + 3. 3V _ADC
LM1117MPX-3.3V + 3. 3V _COMMON

3 2 + 3. 3V _I/O
VIN VOUT

GND TAB L26


C 216 S OT-223 BEAD
C 215 1 4 C 217 + 3. 3V _I/ O_HUDS ON
100uF/ 16V 0. 1uF 47uF/ 16V

L27
GND BEAD

+ 3. 3V _ADC + 3. 3V _RPLL
+ 3. 3V A _ADC

L28
L29 BEAD
BEAD
+ 3. 3V _LVDS
A A

L30
BEAD

+ 3. 3V _LBADC

G e n e s i s M i c r ochip Inc.
L31 Title
BEAD 0 8 . P o w er1
Size Doc ument Number Rev
C 1

Dat e: Friday , Dec ember 15, 2006 S heet 5 of 8


5 4 3 2 1
5 4 3 2 1

+3.3V_I/O

C191 C192
D 0.1uF 0.1uF D

G ND

U10
OCMADDR18 1 21 OCMDATA7
OCMADDR17 A18 DQ7 OCMDATA6
30 20
OCMADDR16 A17 DQ6 OCMDATA5
2 19
OCMADDR15 3 A16 DQ5 18 OCMDATA4
OCMADDR14 A15 DQ4 OCMDATA3
29 17
OCMADDR13 A14 DQ3 OCMDATA2
28 15
OCMADDR12 A13 DQ2 OCMDATA1
4 14
OCMADDR11 A12 DQ1 OCMDATA0
25 13
OCMADDR10 A11 DQ0
23
OCMADDR9 A10
26
OCMADDR8 A9 ROM_CSN
27 22
OCMADDR7 A8 CE# ROM_OEN
5 24
OCMADDR6 A7 OE# ROM_W EN
6 31
OCMADDR5 7 A6 WE# +3.3V_I/O
C A5 C
OCMADDR4
OCMADDR3
8
9
A4
32
TV Board Flash
OCMADDR2 A3 VCC
10
OCMADDR1 A2
11 16
OCMADDR0 A1 VSS
12
A0
SKT\PLCC32 G ND
29LV040B
Socket for a X8 Flash (64/128/256/512K) and
P ROM JETmemory Emulator

OCMDATA[0..7]
4 OCMDATA[0..7]

OCMADDR[0..18]
4 OCMADDR[0..18]

ROM_W EN
4 ROM_W EN
ROM_OEN
4 ROM_OEN
B ROM_CSN +3.3V_I/O B
4 ROM_CSN

SERIAL FLASH 512K C193

0.1uF
U11
S CSN 1 8 G ND
4 S CSN CE# VCC
ROM_SDI 2 7 HOLD#
4 ROM_SDI SO HOLD#
WP# 3 6
WP# SCK
4 5
VSS SI +3.3V_I/O
NC_SST25VF040
* G ND SOIC-8
ROM_SDO ROM_SDO OPTIONAL
4 ROM_SDO
ROM_SCLK ROM_SCLK OPTIONAL R159 R160
4 ROM_SCLK
10K 10K
WP# HOLD#

A A

Genesis Microchip Inc.


Title
06. Memory I/F
Size Document Number R ev
B 1

D ate: Tuesday, October 17, 2006 Sheet 6 of 8


5 4 3 2 1
5 4 3 2 1

A9V
2 R1 A GND3 2 R2 2 C1
10K 5.1K 27pF
2 C2
47uF/ 16V

A GND3 Y1
+12V
3. 58MHz
2Q1 2Q2
R174 R179
2N3904 2N3904
R 177 10K 10K
R 167
47K
MUTE _C
U2 R 178
D D
la72700 47K C 240
N C_220
L A 7 2 7 0 0 s u b address:80/81 R 173 Q18 47UF/ 16V
2 R3 2 R4 2 R5 3 MUTE 1K 2N3904
2 C3 0. 1uF 1 36 2 C4 1uF_0805 2.2K 2 C5 4.7K 2 C6 10K MUTE Q19
PC_DC_IN PCPLC2 2N3904
150pF 1200pF
2 35 R 172 R 175
A GND3 2 C7 0. 1uF
3
PC_DCOUT PCPLC
34 2 C8 47uF/ 16V A GND3
high:normal C 274
1 uF
N C_10K 6.8K

2 R6 4.7K 2 C9 1uF_0805
2C10 1uF_08054
PCSTHILT PCDJFIL
33 2C11 0. 01uF
A GND3
low:mute
PCPLDET PICLKFSC A GND4 A GND4
2 C12 0. 1uF 5 32 A GND4
QS S _IF PISIF POLED
A GND3 6 31
GND VCC
2 C13 0. 1uF 7 30 2 C14 2. 2uF_0805
CSAPDET PCREG76
8 29 2 R7 1.2K A GND4
NC PMAINOUT
2 C15 10uF/ 16V 9 28 2 C16 2. 2uF_0805 2 R8 10K
PC FIL PMAIN_IN

2
10 27 2 C17 2. 2uF_0805 A GND3
MUTE PCREG D3 D4
M_SDA 2 R9 1 00R 11 26 2 C18 1 uF B TS C_A UDIO_L N C_1N4148 N C_1N4148
M_SDA

1
SDA POLCH R 176 C223 U8
M_S CL 2 R10 1 00R 12 25 2 C19 1 uF B TS C_A UDIO_R 1 00R 1uF
M_S CL SCL PORCH DA CML LIN 1 20
2 C20 0. 1uF 13 24 2 C21 10uF/ 16V -INV1 GND
A GND3 PC DBXIN PCALCFIL 2 19
G ND SGND GND
2 R11 N C 14 23 2 C22 1uF_0805 C ON3/ 2. 0mm
PSTSENS PCDBX_IN C 45 3 18 J3
GND SVRR GND
2 R12 N C 15 22 2 C23 2700pF 100uF/ 16V
PSAPSENS PCDBXOUT S P E A K E R_LOUT C 46 L OUT S P E A K E R_LOUT
4 17
2 C24 22uF/ 16V 16 21 2 C25 4. 7uF/ 16V 470uF/ 16V OUT1 GND 1
PCTNWID PCDOSPE 5 16 2
G ND PGND GND 3
2 C26 4. 7uF/ 16V 17 20 2 C27 4. 7uF/ 16V
PCDETWID PCSPECIN R4 S P E A K E R_ROUT C 47 R O UT 6 15
C 2 C28 4. 7uF/ 16V 18 19 2 C29 22uF/ 16V +12V 0. 39R/ 2W 470uF/ 16V OUT2 GND C
PCTIMSPS PCDETSPE A GND3
A _P OWER 7 14
VP GND GND
C 48 C 49 MUTE _C R180 C 229 8 13
47uF/ 16V 0. 1uF 100R 1 uF M/SS GND
D A CMR R IN 9 12
-INV2 GND J4
10 11
GND GND S P E A K E R_ROUT
GND GND 1
+5V +5V_1 G ND TP A 1517 2
1

Q22 2
A P 2301
S OT-23
R190 GND
3

10K
C 239 GND A GND4 A GND3
47uF/ 16V GND A GND G ND9V
R 191 CA P 100
100K
3 S TA NDB Y Q23
2N3904 GND
AUDIO
high:normal
low:STANDBY +12V GND
Q34
1 2N3906
3
A9V
U 25 GND
78D09
2

R203 C 34
+
1K 1
in out
3 < = 100mA 22uF/ 16V
CA P 10 U3 R 22 47
GND

GND

1 28 R-0603 M_S CL
B REF CLK B
2 27 R 23 47 M_SDA
1

A9V VDD DATA


R193 3 26 R-0603
G ND9V
2

100K C273 C 242 4 AGND DGND 25 G ND9V


C 38 1 uF S C_A L_OUT
Q25 47uF/ 16V C 43 TREB_L LFOUT C 44 1uF S C_A R_OUT
1uF 5 24
2

2N3904 0 . 1 uF TREB_R RFOUT DA CML


6 23
C-0603 C 52 1 uF RIN LROUT D A CMR
7 22
C 10 1 uF R 24 2.4K G ND9V 8 ROUT RROUT 21
GND DTV _Rin R-0603 LOUD_R BOUT_R
DTV _Rin 9 20
10 RIN3 BIN_R 19
RIN2 BOUT_L
TU N ER_AUDIO

C 55 1 uF R 25 2.4K 11 18
P H ONE _RIN R-0603 RIN1 BIN_L
12 17
13 LOUD_L LOUT 16 C 56 1 uF
LIN3 LIN
ATSC_Lin

A9V C9 1 uF R 26 2.4K 14 15 C 57 C 58 C 59 C 60
DTV _Lin DTV _Lin R-0603 LIN2 LIN1 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1uF
P T2313L/ SM9613 C-0603 C-0603 C-0603 C-0603
C 62 1 uF R 27 2.4K DIP 28-S OP1
C 227 P HONE _LIN R-0603 R 28
0. 1uF C 63 C 64 C 65 2.4K C 66 R 29 R 30 R 31
R 243 R 244 R 245 R246 R 247 R 248 R 249 R250 R251 R 252 2. 7nF 2. 7nF 0 . 1uF R-0603 0 . 1 uF 5.6K 5.6K
100K 100K 100K 100K 100K 100K 100K 100K 10K 10K C-0603 C-0603 C-0603 C-0603 2.4K R-0603 R-0603
GND R-0603
R171
GND9V G ND9V G ND9V G ND9V G ND9V G ND9V
N C _ 0R J1 J2 C 68 C 69
P HON N C_CON3/ 2. 0mm 1uF 1uF
P HONE _LIN S C_A L_OUT
1 P H ONE _RIN S C_A R_OUT 1
U 17 2 2
C1 1 16 3 3 S WR
DV D_Lin 0Y VDD 4
A TS C_Lin C2 1uF 2 15 C 4 A TS C_Rin G ND p t 2 3 1 3 s u b a ddress:88/89
2Y 2X A TS C_Rin 5
SWL 1uF 3 14 C5 1 uF SWL
YOUT 1X A V _A UDIO_RIN
TU N E R_A UDIO_LR C 7 B TS C_A UDIO_L 4 13 1uF S WR G ND
C3 1 uF 5 3Y XOUT 12 C6
A V _A UDIO_LIN 1Y 0X D V D_Rin
1uF 6 11 1uF B TS C_A UDIO_R C8 TU N E R_A UDIO_LR
INH 3X 1uF
7 10
8 VEE A 9
VSS B J9
A C D4052 C 12 N C_1uF N C_CON3/ 2. 0mm A
SWL
S WR 1
Q24 2
2N3904 C 13 N C_1uF 3
R267 100K
R 253 R 254 R 255 R256 R 257 R 258 R 259 R260 S W _AUB 3
100K 100K 100K 100K 100K 100K 100K 100K Q26 A V _A UDIO_LIN A V _A UDIO_RIN GND For S P H E 7300
4 A V _A UDIO_LIN 4 A V _A UDIO_RIN
2N3904
R268 100K R3 R8
S W _AUA 3
100K 100K
Title
GND GND <Title>

GND GND Size Doc ument Number Rev


C <Doc> < RevCode>

Dat e: S at urday , January 06, 2007 S heet 7 of 8


5 4 3 2 1
5 4 3 2 1

+1.8V_CORE +1.8V_ADC +1.8V_RPLL +3.3V_RPLL


JP1
+3.3V_LBADC
+1.8V_ADC IL-FHR-50S-HF(JAE)
C76 C78 C79 C80 C81 C82 C83 C84 C85 C86 C87 C88 C89 C90 C91 C92 +3.3V_ADC +3.3V_LVDS
OCMADDR0 OCMADDR[0..18] 6
470uF/16V 1
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 47uF/16V 0.1uF 0.1uF 0.1uF 47uF/16V 0.1uF +1.8V_CORE +3.3VA_ADC +3.3V_I/O_HUDSON NC OCMADDR1
+1.8V_RPLL RN401, RN404, RN406 to be very close to CN402 snd 2 OCMADDR2
NC OCMADDR3
GND p lace d enroute on the trace to avoid stub on the 3 OCMADDR4
GND +3.3V_RPLL +3.3V_LBADC +3.3V_ADC +3.3VA_ADC GND L V DS lines and also to have a very sm all stub on the NC OCMADDR5
d igital lines 4 OCMADDR6
GND OCMADDR7

143
133
126
119

207
161
158

163

203

193

183

173

154
116
PANEL_POWER 5 OCMADDR8

12

84
45
39
28
18

17

98
49
32

59
71
83

56
1
GND OCMADDR9
C93 C94 C95 C96 C97 C98 C99 C100 C101 C102 C103 6

VDD_RPLL_18

CVDD_18
CVDD_18
CVDD_18
CVDD_18
CVDD_18
CVDD_18
CVDD_18
CVDD_18
CVDD_18

VDD18_AB

AVDD_RPLL_33

AVDD_B

AVDD_A

RVDD_33
RVDD_33
RVDD_33
RVDD_33
RVDD_33

AVDD_OUT_LV_33
AVDD_OUT_LV_33
AVDD_OUT_LV_33

AVDD_LV_33
VDD18_SC
VDD18_C

VDDA33_LBADC

AVDD_ADC

AVDD_SC

AVDD_C
DEBLU7 VCC
1 8
47uF/16V 0.1uF 47uF/16V 0.1uF 47uF/16V 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 100uF/16V 2 7 DEBLU6 7

1
89 PD23/B7 3 6 DEBLU5 C133 VCC Panel_Power Panel_Power
PD23/B7 88 PD22/B6 4 5 DEBLU4 C104 8
GND PD22/B6 87 PD21/B5 R P1 1 8 33RX4 DEBLU3 47uF/16V 0 . 1 uF VCC OCMADDR10
J5

2
GND GND GND PD21/B5 PD20/B4 DEBLU2 OCMADDR11
86 2 7 9
168 PD20/B4 3 6 DEBLU1 VCC 1 2 OCMADDR12
3 A1 A1P TXB0- DEBLU0 3 4 OCMADDR13
178 81 4 5 10
D 3 A2 A2P CH0N_LV_O/B3 TXB0+ GND DCLK 5 6 DEN OCMADDR14 D
188 80 R P2 33RX4
3 A3 A3P CH0P_LV_O_B2 TXB1- DHS DVS 7 8 DHS OCMADDR15
+3.3V_I/O_HUDSON +3.3V_LVDS 198 79 11
3 A4 A4P CH1N_LV_O_B1 HSY NC 9 10
174 78 TXB1+ OCMADDR16
3 A_RET AN CH1P_LV_O_B0 TXB2- DEGRN7 DVS DEBLU6 11 12 DEBLU7 OCMADDR17
77 R P3 1 8 33RX4 12
170 CH2N_LV_O_G7 76 TXB2+ 2 7 DEGRN6 GND VSY NC DEBLU4 13 14 DEBLU5 OCMADDR18
3 B1 B1P CH2P_LV_O_G6 TXBC- DEGRN5 DEBLU2 15 16 DEBLU3 ROM_WEN
C107 C108 C109 C110 C111 C112 C113 C114 C115 C116 C117 180 75 3 6 13
3 B2 B2P CLKN_LV_O_G5 TXBC+ DEGRN4 GND DEBLU0 17 18 DEBLU1 ROM_WEN 6
190 74 4 5
3 B3 B3P CLKP_LV_O_G4 19 20
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 100uF/16V 0.1uF 0.1uF 0.1uF 0.1uF 200 73 TXB3- R P4 1 8 33RX4 DEGRN3 DEN 14
3 B4 B4P CH3N_LV_O_G3 TXB3+ DEGRN2 DE DEGRN6 21 22 DEGRN7
100uF/16V 184 72 2 7
3 B_RET BN CH3P_LV_O_G2 DEGRN1 DEGRN4 23 24 DEGRN5
3 6 15
+3.3V_LBADC DEGRN0 GND DEGRN2 25 26 DEGRN3 OCMDATA0 OCMDATA[0..7] 6
172 4 5
3 C1 C1P TXA0- DCLK DEGRN0 27 28 DEGRN1 OCMDATA1
GND GND 182 69 16
3 C2 C2P CH0N_LV_E/G1 DCLK 29 30
192 68 TXA0+ OCMDATA2
3 C3 C3P CH0P_LV_E/G0 TXA1- DERED7 DERED6 31 32 DERED7 OCMDATA3
0.578 202 67 RP5 1 8 33RX4 17
3 C4 C4P CH1N_LV_E/R7 TXA1+ DERED6 GND DERED4 33 34 DERED5 OCMDATA4
1.03 194 66 2 7
3 C_RET CN CH1P_LV_E/R6 TXA2- DERED5 DERED7 DERED2 35 36 DERED3 OCMDATA5
1.5 65 3 6 18
R32 R33 R34 R35 R36 R37 R38 R39 166 CH2N_LV_E/R5 64 TXA2+ 4 5 DERED4 R7 DERED0 37 38 DERED1 OCMDATA6
2.0 3 SV1 SV1P CH2P_LV_E/R4 39 40
2.48 176 63 TXAC- R P6 1 8 33RX4 DERED3 DERED6 19 OCMDATA7
3 SV2 SV2P CLKN_LV_E/R3 TXAC+ DERED2 R6
2.75 47K 22K 10K 6K2 3K3 2K 1.2K 470R 186 62 2 7 NC_20x2PIN/2.0mm
3 SV3 SV3P CLKP_LV_E/R2 TXA3- DERED1 DERED5
2.95 196 61 3 6 20
3 SV4 SV4P CH3N_LV_E/R1 TXA3+ DERED0 R5 ROM_OEN
3.15 204 60 4 5
3 SV_RET SVN CH3P_LV_E/R0 DERED4 ROM_CSN ROM_OEN 6
C N1 21 GND GND
1 VOUT
162
ADC_TEST
HUDSON VCO_LV
57
R4 ROM_CSN 6
206 22
2 205 VOUT GND
3
4 156
VO_GND FLI8125 DCLK/VOP_CLK
93
91
DCLK/VOPCLK
DHS/VOP_HS
DERED3 23
R3
5 AIP_RAW_HS_CS HSY NC1 DHS/VOP_HS
GND 157 92 DVS/VOP_VS DERED2 24
6
7
AIP_RAW_VS VSY NC1 U6 DVS/VOP_VS
DEN/VOP_FLD
90 DEN/VOP_FLD 1 8 DCLK
DVS DERED1
R2
2 7 25
8 ADC_IN1 ADC_IN1 2 153 3 6 DHS R1
9 R40 ADC_IN2 3 LBADC_IN1 VID_CLK_1/VID1_CLK 4 5 DEN DERED0 26
22R ADC_IN3 ADC_IN3 LBADC_IN2 RP7 33RX4 R0
4 122
3

CON9/2.0mm ADC_IN4 5 LBADC_IN3 GPIO4/VID_HS/VID2_HS/VID1_HS 121 27


ADC_IN5 ADC_IN5 6 LBADC_IN4 GPIO5/VID_VS/VID2_VS/VID1_VS GND
7 LBADC_IN5 DEGRN7 28
D1 +5V RET 8 LBADC_IN6 135 G7
GND LBADC_RTN VID_D0/VID1_D0
BAV99 C123 R12 10K 136 DEGRN6 29
1

+5V 20 VID_D1/VID1_D1 137 G6


0.1uF R45 R46 I/O15 21 STI_TM2 VID_D2/VID1_D2 138 DEGRN5 30
2.7K 2.7K 3 I/O15 22 GPIO15/STI_TM1/EXT_CS VID_D3/VID1_D3 139 G5
CN2 R17 23 SY NC2 VID_D4/VID1_D4 140 DEGRN4 31
+5V GND GND GND GND GND GND R18 47R VSY NC2 VID_D5/VID1_D5 G4
141
R41 C118 R42 C119 C120 GND GND 1 TXD/JTMODE 47R 25 VID_D6/VID1_D6 142 32
10K 0.1uF 10K 0.1uF 0.1uF C121 C122 GND 2 RXD/JTCLK 24 HOST_SDA/UART_DO/JTAG_MODE VID_D7/VID1_D7 GND
0.1uF 0.1uF 3 HOST_SCL/UART_DI/JTAG_CLK 145 DEGRN3 33
4 VGA_SCL 26 VID_D8/JTRST/VID1_D8/GP16 146 G3 CN3 +3.3V_COMMON
3 VGA_SCL DDC_SCL VID_D9/JTAG_TDO/VID1_D9/GP17
HEADER 4 VGA_SDA 27 147 DEGRN2 34 PANEL_POWER
1 2 PANEL_POWER
GPROBE 3 VGA_SDA DDC_SDA VID_D10/JTAG_TDI/VID1_10/GP18 148 G2 PANEL_POWER
3 1 2 4
M_SDA 31 VID_D11/VID1_11/GP19 149 DEGRN1 35 5 3 4 6
C GND +3.3V_RPLL M_SCL 30 I2CM_SDA VID_D12/VID1_12/GP20 150 G1 GND TXB0- 7 5 6 8 TXB0+ GND R166 NC C
+3.3V_RPLL I2CM_SCL VID_D13/VID1_13/GP21 151 DEGRN0 36 TXB1- 9 7 8 10 TXB1+
C124 C125 XTAL VID_D14/VID1_14/GP22 G0 TXB2- 9 10 TXB2+
15 152 11 12
19.6608MHz TCLK 16 XTAL VID_D15/VID1_15/GP23 37 13 11 12 14
30pF X1 30pF TCLK 123 OCMDATA0 GND GND TXBC- 15 13 14 16 TXBC+ GND
VID_DIN16/D0/PD39/VID2_0 124 OCMDATA1 DEBLU7 38 TXB3- 17 15 16 18 TXB3+
VID_DIN17/D1/PD40/VID2_1 125 OCMDATA2 B7 TXA0- 19 17 18 20 TXA0+
VID_DIN18/D2/PD41/VID2_2 OCMDATA3 DEBLU6 TXA1- 19 20 TXA1+
128 39 21 22
13 VID_DIN19/D3/PD42/VID2_3 129 OCMDATA4 B6 TXA2- 23 21 22 24 TXA2+
VBUFC_RPLL VID_DIN20/D4/PD43/VID2_4 130 OCMDATA5 DEBLU5 40 25 23 24 26
VID_DIN21/D5/PD44/VID2_5 131 OCMDATA6 B5 GND TXAC- 27 25 26 28 TXAC+ GND
34 VID_DIN22/D6/PD45/VID2_6 132 OCMDATA7 DEBLU4 41 TXA3- 29 27 28 30 TXA3+
+5V GPIO0/LED1/TCK VID_DIN23/D7/PD46/VID2_7 B4 29 30
35
36 GPIO1/LED2/TDI 118 ROM_OEN SCSN 42
GPIO2/PWR_CTRL/TMS VID_CLK2/ROM_OEN/PD47/VID2_CLK ROM_WEN ROM_SDI ROM_SDO SCSN 6 GND
97 R51 0R
ROM_SDI/ROM_WEN ROM_CSN SCSN ROM_SDI ROM_SDO 6 DEBLU3
R52 R272 37 94 R53 0R 43 15x2PIN/2.0mm
GPIO3/SCART16_1 ROM_SCSN/ROMCSN ROM_SCLK ROM_SDI 6 B3
10K NC_10K R54 100R
ROM_SCLK 6
+5V IR0 GPIO6/IR 38 DEBLU2 44
GPIO6/IRin 115 OCMADDR0 B2
41 VID_DE/FLD/A0/GPIO16/PD24 114 OCMADDR1 DEBLU1 45
7 STANDBY RGB_SWITCH GPIO7/IRQin VBI_CLK/A1/GPIO17/PD25 OCMADDR2 B1
42 113 R55 0R L V DS Panel connector
3 RGB_SWITCH GPIO8/IRQout VBI_VALID/A2/GPIO18/PD26 OCMADDR3 OCMADDR16 ROM_SDO DEBLU0
112 46
R2 43
VBI_D0/A3/GPIO19/PD27
111 OCMADDR4 B0 In t erfaces directly to Sam sung
7 MUTE OCMADDR18 GPIO9/SIPC_SCL VBI_D1/A4/GPIO20/PD28 OCMADDR5 WXGA and SXGA LVDS Panels
10K R1 44 110 R56 0R 47
10K GPIO10/SIPC_SDA/A18 VBI_D2/A5/GPIO21/PD29 109 OCMADDR6 OCMADDR17 ROM_SCLK GND
47 VBI_D3/A6/GPIO22/PD30 108 OCMADDR7 48
SW_AUA 7 PWM0 GPIO11/PWM0 VBI_D4/A7/GPIO23/PD31 OCMADDR8 GND
+3.3V_COMMON 48 107
7 SW_AUA GPIO12/PWM1 VBI_D5/A8/PD32/BT0
SW_AUB 51 106 OCMADDR9 49
7 SW_AUB GPIO13/PWM2/VBI_VALID VBI_D6/A9/PD33/BT1 OCMADDR10 NC
105
52 VBI_D7/A10/PD34/BT2 104 OCMADDR11 50
Q16 R168 R169 GPIO14/PWM3/SCART16_2 XOSD_FLD/A11/PD35/ROM512K 103 OCMADDR12 NC

GND

GND
R170 2N3906 1k 10k 55 XOSD_VS/A12/PD36/JT_BSCAN 102 OCMADDR13
BSCAN_TDO XOSD_HS/A13/PD37/OP_MD0
1

10k 101 OCMADDR14 +3.3V_I/O


2 XOSD_CLK/A14/PD38/OP_MD1 100 OCMADDR15 GND

51

52
EXT_ADC_CLMP/A15/SPI_EN
/RESET 10 96 OCMADDR16
TTL PANEL OUTPUT
3

RESETn ROM_SDO/A16/OCM_ROM 95 OCMADDR17


C218 Q17 ROM_SCLK/A17/OSC_SEL R58
47uF/16V 2N3904 54 PPWR OCMADDR17 R59 10K 1K GND
PPWR PBIAS PPWR 7
53
PBIAS PBIAS 7 OCMADDR12 R60 10K JP2
VSSA33_LBADC

AVSS_OUT_LV
AVSS_OUT_LV
GND GND BIT0 1
AGND_RPLL

1 8 OCMADDR10 BIT1 OCMADDR9 LBADC'S


GND_RPLL

GND18_SC
GND18_AB

2 7 2
BIT2
GND18_C

AVSS_LV
3 6 OCMADDR9 ROM512K HEADER 2 LBADC_IN1 KEYBOARD1
GNDS
GNDS
GNDS
GNDS
GNDS
GNDS
GNDS
GNDS
GNDS
GNDS
GNDS
GNDS
AGND
AGND
AGND
AGND
AGND

RVSS
RVSS
RVSS
RVSS
RVSS
RVSS
RVSS
RVSS
RVSS
RVSS
RVSS
RVSS
RVSS
RVSS
4 5 OCMADDR8 OP_MODE0
OP_MODE1 LBADC_IN2 KEYBOARD2
R P 8 10KX4 OCM_ROM
+5V +3.3V_COMMON
LBADC_IN3 S CART-1-IN_PIN8/EIAJ1
9
11
14

159
160
208

164
165
175
185
195

167
169
171
177
179
181
187
189
191
197
199
201

19
29
33
40
46
50
85
99
117
120
127
134
144
155

58

70
82
B B
LBADC_IN4 S CART-2-IN_PIN8/EIAJ2
1

LBADC_IN5 EIAJ3
R62 #OPTIONAL
1

100R R162 10K OCMADDR13 LBADC_IN6 FOR LDR( OPTION)


R61
R161 10K OCMADDR14
2

100R R63
Q2
1K GND R13 10K OCMADDR16
GPIO'S USED
2

2 N 3 9 06 GPIO0 JTAG_TCK
2 2 1 STANDBY

GND
GPIO1 JTAG_TDI
3

Q3 R65
GPIO2 JTAG_TMS
2 N 3 9 04
1 2 #OPTIONAL
1K
R453 TO BE GPIO3 JTAG_RST
USED FOR GPIO4 DI GITAL VIDEO INPUT HS
R66 BOUNDARY
10k CN4 OCMADDR11 SCAN GPIO5 DI GITAL VIDEO INPUT VS
+3.3V_I/O GPIO6 I R DECODING
5 +3.3V_I/O
IR0 4
1 2 3 R69
GPIO7 S TDBY / IRQIN
+5V
R68 2 I 2C address: 4K7
47R 1 A0H and GPIO8 MUTE / IRQOUT
C128 GPIO9 SIPSCL
47uF/16V GND CON5/2.0mm +5V R70
A1H
3

C129 C130 GND GPIO10 SIPSDA


D2 2.7K R71 U7
GND 0.1uF 0.1uF 2.7K 8 1
BAV99 VCC A0 GPIO11 P W M0-PANEL BACKLIGHT
1

7 2
R7 R5 M_SCL 6 WP A1 3 GPIO12 P WM1- LED1
1

NC_22R NC_12k M_SDA 5 SCK A2 4


SI VSS +3.3V_I/O
GND +5V GND GND 24LC32-SN
GPIO13 P WM2- LED2
2

SOIC08 GND #OPTIONAL GPIO14 P W M3- SCART-1-IN-FB/EIAJ SENSE


C77
GND
VOUT R72 R456 TO BE
GPIO15 CHI P SELECT FOR FLASH/SRAM
J10
R15 3 M_SCL
NC_4K7 USED FOR
1

NC_2N3904 GPIO16 FOR ROM ADDRESS/16-bit INPUT


1 CVBS-OVT Q9 R6 NC_1uF 3 M_SDA SERIAL
1 2
2 NC_22k OCMADDR15 FLASH
GPIO17 FOR ROM ADDRESS/16-bit INPUT
1

3 SCL 1 R14 2 NC_47R M_SCL


4 SDA 1 R16 2 NC_47R M_SDA NC_75R R9 1:SERIAL GPIO18 FOR ROM ADDRESS/16-bit INPUT
2

5 NC_1k R73
6 STD +5V 4K7
7
0:PARALLEL GPIO19 FOR ROM ADDRESS/16-bit INPUT
IR1 1 R21 2 NC_47RIR0
2

8
A 9 GPIO20 FOR ROM ADDRESS/16-bit INPUT A
1

GND GPIO21 FOR ROM ADDRESS/16-bit INPUT


NC_CON9/2.0mm R20 GND
+5V NC_10k GPIO22 FOR ROM ADDRESS/16-bit INPUT

HUDSON GPIO23 FOR ROM ADDRESS/16-bit INPUT


2

J19 R269 NC_47R R19


IR2 1 2 1 2 STANDBY
1 R270 NC_47R
2 GND
1 2 M_SCL NC_10K
NC_2N3904
3 1 2 M_SDA Q10
4
NC_CON4/2.0mm R271 NC_47R

Ge n esis Microchip Inc.


GND Title
04. FLI8125 (HUDSON)
Size D ocument Number Rev
D 1

Date: Friday , December 15, 2006 Sheet 8 of 8


5 4 3 2 1
5 4 3 2 1

A+5V

R1 2.2
Servo analog +5V
BC1

0. 1UF

D D
R F G ND

M+5V
L1
Servo MOTOR +5V
Power Bead > 2A, RAC@100 MHz
FB
BC2 = 70 ohm, RDC(max)= 0.4 ohm P LL3.3V
0. 1UF
R2 2.2
PLL+3.3V
(PLL bypass)
M GND

L2 DV CC

GND BC4
FB + E C1
System +5V
0. 1UF RF3. 3V
100UF16V L3 FB
R3
RF +3.3V
10K + E C2 B C5 BC6
V IN D1 V+11 P+5V USB+5V
1N5822 EC3 U1 1500 GND 100UF16V 0 . 1UF 0 . 1UF
220u/16V1 4
Video buffer +5V
Vin FEE L4 FB V+5V R F G ND
260mA
ON/OFF

+ FB1 3 3uH R F G NDR F G ND


2 L5
GND

OUT
close to 8202
FB EC5 BC7
D2 C1 + EC4 BC8 BC9 B C10
3

GND 1N5822 100n 220u/16V 220UF16V0 . 1UF


330PF 0 . 1UF 33P F S D_V CC3
FB
SDRAM +3.3V
C V G ND L6 C
GND GND GND GND GND
34ma~58ma(64Mx1)
ROM_V CC3
FB
Flash +3.3V
R4 NC L7
P OW E R_ON/ OFF

R5 D V CC3
0 A P LLV CC3
U2 A MS 1085 TO-252
3
IN OUT
2 R6 33 Audio PLL +3.3V
EC6
3 mA

ADJ
GND B C11 R7 B C12 B C13
220UF16V + E C7
0 . 1UF 0 . 1UF 0 . 1UF

1
470 100UF16V
G ND GND
750 R8 GND
GND
V V CC3
GND L8
Video DAC +3.3V
FB
TO Connect Board 8202 B C14+ EC8

CN1 V CC1. 8
kernel 100PF 220UF16V

1 +1.8V V P LLV CC1.8


Video
CV B 1_O 4
14
D3
U3 A MS 1085 TO-252 PLL V GND
2
G / Y _O 4 +1.8V
15 3
IN OUT
2 R9 10
3 US B _P LL3.3
B / U_O 4 E C9 B C15 L9
16

ADJ
4 D V CC 1N4004 B C16 + B C17
R/ V _O 4 R 10 0. 1UF FB
17
5 0 . 1UF 470 0 . 1UF

1
B 18 DV CC 220UF16V B C18+ E C10 B
6 GND
MR_OUT 4
19 R110 220 R 11 0 . 1UF 100UF16V
7 1K GND
ML_OUT 4 R 111 GND
20
8 NC R 112 GND
21 4.7K
9
22 R 113 100
10 IR V CC3A
Q18 I R _ IN 4 L10
23 Internal DA +3.3V
11 P OW E R_ON/ OFF C 72 3904
24 12
12 33P F B C19
25 + E C11
13 GND 0 . 1UF
V IN
220UF16V

C ONNE CTOR DB 25 GND DVD POWER D A _GND

A A

TP1 TP2 TP3 TP4 TP5 SUNPLUS TECHNOLOGY


Title
Power & Connnector
A G ND D A _GND GND V GND M GND R F G ND A G ND G ND GND MGND
Size Doc ument Number Rev
C 8202D-16-HI-216-0-J 1. 02

Dat e: S at urday , S ept ember 23, 2006 S heet 1 of 4


5 4 3 2 1
5 4 3 2 1

CN5
EL C O-C ON 2 4 (buttom) I R _ IN
A+5 V I R _ IN 1

26
C N4
BC20 33p TV_ D AC 5 L11 FB
R F GN D TV_ D AC 4 TV_ D AC 5 4 1 D VC C 3
TV_ D AC 4 4 2 GND
24 TV_ D AC 3
R AD - 3 V re f0 TV_ D AC 0 TV_ D AC 3 4 3 MS_ C LK
23 MS_ BS
R AD + 3 TV_ D AC 0 4 4
22 C2 1 UF C3 4 7 PF PD V _ BAIS
F OC - 3 V_ BIAS 4 5 GND
21 R F GN D V _ C OMP
D V D MD I F OC + 3 FD V _ R EF V_ C OMP 4 6 MS_ D0
20 BC21 0 .0 1U C4 4 7 PF
H FM R F GN D V_ R EF 4 7 MS_ D1
19 BC22 0 .1 U V_ FSAD J
R F GN D V_ FSAD J 4 8 MS_ D2
18 R12 100 R13 1 .5 K R14 5.1K
9 GND
17 R15 5.1K XOPVIP1
XOPVIP1 3 10 GND
16 L12 10UH PU H _ D VD L D XOPVIN 1
D
PU H _ C D LD L GIN XOPOP1 XOPVIN 1 3 11 MS_ D3 D
15 L13 10UH C5 0 .0 6 8UF
XOPOP1 3 12 C AR D _ SEN SE2
14 R16 100 C6 680PF R FI
R F GN D 13 C AR D _ SEN SE1
13 D ISC _ SEN CE
D ISC _ SEN C E 3 14 C AR D _ R ST
12 C D MD I BC23 0 .0 1U C7 1 0 0 PF
R F GN D 15 GND
11 C8 0 .0 1 U F AU D IO_ MU TE
P U HRF D A_ L AU D IO_ MU TE 4 16 U SB_ D M_O
10 C9 100PF R F GN D C10 0 .0 1 UF TP9 TP8
R F GN D D A_ L 4 17 U SB_ D P_O
9 C R17 20K R18 150K D A_ R
B D A_ R 4 18 GND
8
A R F GN D 19
7

DA _GND
20 U SB+5 V

V V CC3

V V CC3

V V CC3
P LL3.3V

P LL3.3V

V C C3A
R FGND

DV CC3
D

V GND
6

R F 3 .3V

V GND

V GND

G ND
5 E TP6 C AR D _ U SB
4 F R FR P EC12

1 .2K (1%)
3 + C12
2 V R EF1 R F GN D C11 N C /1 0 0 PF R FO

0 . 1 UF
1 1 0 U F1 6V 0 .1 U F

V _ H _ S YNC

A U D IO_MUTE
V _ V _ SYNC
BC24 BC25

D A C _ REF
V _ FSADJ
T V _DAC5

T V _DAC4
T V _DAC3

T V _DAC0

V _ COMP

K EY_S4
U4

V_BIAS
V _ REF

DA _R
RFRP
0 .1 U 0 .1 U C13 1 UF R A1 25 29 RD0

R A 18
R A 16

D A _L

R A 15
25

A0 DQ0

C 14
C15 1 UF D A_ GN D R A2 24 31 RD1
A1 DQ1

R19
R A3 23 33 RD2
R A4 22 A2 DQ2 35 RD3
R F GN D R A5 A3 DQ3 RD4
21 38

216
215
214
213
212
211
210
209
208
207
206
205
204
203
202
201
200
199
198
197
196
195
194
193
192
191
190
189
188
187
186
185
184
183
182
181
180
179
178
177
176
175
174
173
172
171
170
169
168
167
166
165
164
163
R A6 20 A4 DQ4 40 RD5
U5 R A7 A5 DQ5 RD6
Hitachi Bottom CONTACT R A8
19
18 A6 DQ6
42
44 RD7

DAC_REF
PDFLT

V_REFOUT
FDFLT
AGCCAP
GMRES

PLL_DS_AVSS

V_COMP

DA_VSS
RFRP

V_BIAS
FLTIP

RFI

V_FSADJ
DS_AVDD

CNIN

LGIN

PLL_AVDD

VSS_K6/VSS_O6

DA_VDD
DA_R
RF_AVDD

LPFNIN

LPFN
FLTIN

SLVL

VDD_O5

R_A18
R_A16

DA_L

R_A15
VSS_TVA2
TV_DAC5
VDD_TVA2
TV_DAC4
TV_DAC3
VSS_TVA1
VDD_TVA1
VSS_TVA0
VDD_TVA0
TV_DAC0
RFO

VREFO

LPFO

UA0_RX/GPIO
A_XCK/GPIO
A_BCK/GPIO

A_LRCK/GPIO
A_DATA3/GPIO
A_DATA2/GPIO
A_DATA1/GPIO

A_DATA0/GPIO
A_IEC_TX/GPIO
UA0_TX/GPIO
R F IP R A9 8 A7 DQ7 30
P U HRF C16 R A1 0 A8 DQ8
7 32
A+5 V 1 UF R A1 1 6 A9 DQ9 34
C17 N C (1 2 0 PF) R A1 2 R A1 2 A10 DQ10
1 162 5 36
2 AGCON R_A12 161 R A7 R A1 3 4 A11 DQ11 39

R O M_ VCC3
C18 6 8 0 PF 3 AGCOP R_A7 160 R A6 R A1 4 3 A12 DQ12 41
HFM SW R245
4
RFIP R_A6
159 R A5 R A1 5 2
A13 DQ13
43

D V CC
BC26 EC13 C19 6 8 0 PF RFIS R_A5 R A4 R A1 6 A14 DQ14 R A0
close to + HOP1200W as above NC 5
RFSUM R_A4
158 1
A15 DQ15/A-1
45
D PD A 6 157 R A3 R A1 7 48
connector! 0 .1 U F 1 0 0 U F1 0V C20 6 8 0 PF DPDA R_A3 R A2 R A1 8 A16
OTHER NC 0 7
DPDB R_A2
156 17
A17
D PD C 8 155 R A1 R A1 9 16 9
C21 6 8 0 PF DPDC R_A1 R A0 A18 NC
9 154 10
D 10 DPDD R_A0 153 RD0 NC 13 R20 R21
R F GN D C DVDD R_D0 RD1 NC NC 0
11 152 14
C B 12 DVDC R_D1 151 RD2 R _ C S1 26 NC 15 C
A 13 DVDB R_D2 150 R OE 28 CE RY/BY
DVDA VSS_O5/VSS_K5 RD3 GN D OE
14 149
15 CDB R_D3 148 RD4 R WE 11 37 F L ASH _ POWER
F CDA R_D4 RD5 R ESET_B WE VCC
16 147 12
A+5 V E 17 CDF R_D5 146 RD6 RST 46
18 CDE R_D6 145 RD7 47 GND 27 BC27
R F GN D RF_AVSS R_D7 GND BYTE GND
19 144 R OE
D VD L D O 20 APC_AVSS R_OE_B 143 GN D
C DLDO DVDLDO VDD_K4 LED1 VC C 1 .8 0 .1 u F
21 142
EC 1 4 4 7 U F1 6 V D V D MD I 22 CDLDO M_DQM2/GPIO 141 LED2 MX2 9 L V8 0 0 T/B,MX29F800T/B
R22 C D MD I 23 DVDMDI M_DQM3/GPIO 140 R A1 0 TSOP-48 GND
10K + CDMDI R_A10 R A1 1
R F3 .3 V
24 139
R23 BC 2 8 0 .1 U F V R EF1 25 APC_SRV_AVDD R_A11 138 R A9
Q2 R F GN D V21 R_A9
1

NC R25 R24 3 3 K (1%) 26 137 R A8

SPHE8202D
R F GN D R33K R_A8
2 9014 27 136
R F GN D 3 VR EF2 V165 VDD_O4 R A1 3 D VC C 3
C22 0 .2 2 UF 28 135 U6
Q1 4.7K C23 0 .0 1 U F SVOTST R_A13 R A1 4 R N1 33
29 134
3

R F GN D RFRPPH R_A14 R A1 7 M A0 D0 MD0


9015 BC29 + EC15 C24 0 .0 1 UF 30 133 23 2 7 8
R26 0 .1 U F R FC T RFRPBH R_A17 R WE M A1 A0 D0 D1 MD1
R FC T TP7 31 132 24 4 5 6
H FM R27 4.7K L D SW 4 7 U F1 6 V C25 0 .0 4 7 UF 32 RFRPMEAN R_WE_B 131 M A3 M A2 25 A1 D1 5 D2 3 4 MD2
C26 1 0 0 PF S BAD 33 SBADPH M_A3 130 M A2 M A3 26 A2 D2 7 D3 1 2 RN2 33 MD3
R F GN D SBAD M_A2 M A4 A3 D3 D4 MD4
1K C27 8 2 0 PF F EO 34 129 M A1 29 8 7 8
R28 NC TEO 35 FEO M_A1 128 M A5 30 A4 D4 10 D5 5 6 MD5
R F GN D C28 0 .1 U F TEO VSS_O4/VSS_K4 M A0 GN D M A6 A5 D5 D6 MD6
R F GN D 36 127 31 11 3 4
C29 3 3 0 PF XOPVIP1 37 TEOLP M_A0 126 MA1 0 M A7 32 A6 D6 13 D7 R N3 33 1 2 MD7
HFM SW R F GN D XOPVIN 1 38 OPVIP
OPVIN
M_A10
M_BA1/GPIO
125 M_ BA1 M A8
M A9
33 A7
A8
D7
D8
42 D8
D9
7 8 MD8
MD9
XOPOP1 39 124 D QM0 34 44 5 6
40 OPVOP M_DQM0/GPIO 123 D QM1 MA1 0 22 A9 D9 45 D10 3 4 MD 1 0
3 TCO R F GN D SRV_AD_AVSS_VRGD M_DQM1/GPIO A10/AP D10
R F3 .3 V C30 1 0 0 0PF 41 122 M A4 MA1 1 35 47 D11 1 2 RN4 33 MD 1 1
R F GN D R F3 .3 V R29 AD_DA_AVDD M_A4 A11 D11
39K 42 121 D QM0 15 48 D12 7 8 MD 1 2
C31 1 0 0 0PF R30 20K DATEO VDD_K3 M A5 VC C 1 .8 D QM1 LDQM D12 D13 MD 1 3
43 120 39 50 5 6
DAFEO M_A5 M A6 MW E UDQM D13 D14 MD 1 4
R F GN D 44 119 16 51 3 4
3 FC O T R A YIN DA_AVSS M_A6 M A7 M _ C AS WE D14 D15 MD 1 5
3 SPD C O 3 T R AYIN
45 118 17 53 1 2
T R AYOU T TRAY_IS_IN M_A7 M A8 M _ R AS CAS D15
3 T R AYOU T 46 117 18 36
TRAY_IS_OUT M_A8 RAS NC

GPIO/ttio0_4/SD_D0/MS_D0

GPIO/ttio1_5/SD_D1/MS_D1
GPIO/ttio2_6/SD_D2/MS_D2
GPIO/ttio3_7/SD_D3/MS_D3
R31 + EC16 C32 0 .1 U F R32 2 .2 K 47 116 M A9 M_ C S0 19 40
BC30 5.1 4 7 U F1 6V C33 0 .1 U F R33 2 .2 K 48 SPDC_OUT/GPIO M_A9 115 M_ C KE CS NC/RFU
MG N D SC_OUT/GPIO M_CKE/GPIO M_ C KE 37
0 .1 U F 49 114 R34 33 28

GPIO/SD_CMD/MS_BS
3 S CO SC1_OUT/GPIO VSS_O3/VVV_K3 GN D CKE VSS GND
GPIO/SD_CK/MS_CK
50 113 SD R AM_ C L K R AM_ C L K38 41 SD _ VC C 3
3 T R AY- TRAY_OUT/GPIO M_CLKO M_ BA0 20 CLK VSS
Q3 51 112 C34 54
B 3 T R AY+ DMEA/GPIO VDD_O3 D VC C 3 BA0 VSS B

VSS_O1/VSS_K1

VSS_O2/VSS_K2
VFD_DATA/GPIO
R35 0 D VD L D O 52 111 MA1 1 M_ BA1 21 1

M_CS0_B/GPIO
R_CS4_B/GPIO
R_CS3_B/GPIO
R_CS2_B/GPIO
R_CS1_B/GPIO

VFD_CLK/GPIO
VFD_STB/GPIO
3 D MEA FGIN/GPIO M_A11/GPIO MD8 1 0 PF BA1 VDD
53 110 14

R_20/E_MX10
3 D ISC _ SEN CE HOMESW/GPIO M_D8 VDD
2 SB1 1 3 2 (R type) L D SW 54 109 MD9 27 EC17

IR_IN/GPIO
DFCT/GPIO

VDD_PLLA

VDD_PLLV
VSS_PLLA

VSS_PLLV
3 H OME LDSW/GPIO M_D9 VDD

USB_GND
USB_VDD

M_CAS_B
M_RAS_B
PU H _ D VD L D 6 3 +

M_WE_B
USB_DM
CLKOUT
VDD_O1

VDD_O2
USB_DP
VSSq VDDq
VDD_K1

VDD_K2
R36 4.7K GN D 12 9 BC31 BC32 BC33

M_BA0
M_D15
M_D14
M_D13

M_D12
M_D11
M_D10
RST_B

R_A19
D VC C 3

CLKIN
VSSq VDDq

M_D7
M_D6
M_D5
M_D4
M_D3

M_D2
M_D1
M_D0
1 0 0 U F16V0 .1 U F 0 .1 U F 0 .1 U F

GPIO
R37 4.7K 46 43
D VC C 3 VSSq VDDq
D4 52 49
1 N 4 1 4 8(SMT) VSSq VDDq
S D R AM 1 Mx1 6 x4
55
56
57
58
59
60
61
62
63
64
C A R D _SENSE1 65
C A R D _SENSE2 66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
GND GN D
EliteMT M12L64164A-5T
54-Pin TSOPII(400mil x 875mil)
C A R D _RST

R38 4.7K T R A YIN


I 2 C_DATA

RESET_B
D VC C 3

U S B _DM
I 2 C _ CLK

U S B_DP
C L KOUT
MS _CLK

K EY_S3
K EY_S1
K EY_S2
R F GN D R39 4.7K T R AYOU T

M_ CAS
M_ RAS

M_ CS0
MS _D0

MS _D1
MS _D2
MS _D3

R _ C S1
MS_BS

M _BA0
C L K IN
IR_IN

MD 1 5
MD 1 4
MD 1 3

MD 1 2
MD 1 1
MD 1 0
R A 19

MW E
MD 7
MD 6
MD 5
MD 4
MD 3

MD 2
MD 1
MD 0
R F3 .3 V
D VC C 3
TO DVD KEY Board

D V CC3
G ND
DV CC3

U S B_PLL3.3
D VC C 3 D VC C
V C C 1 .8

V P L L VCC1.8
G ND

G ND

G ND

V C C 1.8
G ND

A P LLVCC3
+ EC18
BC34 R40 4 7 U F1 6V R45 R46 R47 R114 R115 R116
0 .1 U F 5.1 10K 10K 10K 10K 10K 10K BC35
C ON 8 EC 1 9 + R41 R42 R43
1 0 U F1 6V 10K U7 0 .1 U F 1K 1K
Q4 8 KEY_ S1 1 8
R48 0 C DLDO 7 KEY_ S2 R49 100 2 A0 VCC 7
6 KEY_ S3 R ESET_B A1 WP GND I2 C _ C LK
3 6
5 A2 SCL I2 C _ D ATA
PU H _ C D LD
2 SB1 1 3 2 (R type)
4
3
2
KEY_ S4
LED1
LED2
DVD Main IC R50
10K
D5
1 N 4 1 48(SMT)
Q5 C35
0.1u
4
GND

24C02
SDA
5

GN D
D6 1 C36 C37 C38 C73 C74 C75 3904 I2C ADDR = 0XA0
1 N 4 1 4 8(SMT) CN6
33PF 3 3 PF 3 3 PF 3 3 PF 33PF 33PF

GND
A GN D C L KOUT A

R F GN D XT1 U SB_ D M R51 22 U SB_ D M_O


C L KIN U SB_ DP R52 22 U SB_ D P_O U SB_ D M_O
U SB_ D P_O
2 7 MHz C39 C40

R F3 .3 V D VC C 3 VC C 1 .8 PL L 3 .3V R55 R53 R54 NC NC


VVC C 3 L15 N C (4 .7 uH) 15K 15K

4.7K C41 GND GND


BC36 BC37 BC 3 8 BC39 BC40 BC41 BC42 BC43 BC44 BC45 BC46 BC47 BC48 BC49 BC50 BC51 SUNPLUS TECHNOLOGY
C42 C43 N C (68p) GND GND
0 .1 U F 0 .1 U F 0 .1 U F 0 .0 1 U F 1 0 0 0PF 0 .1 U F 0 .1 U F 0 .1 U F 0 .1 U F 0 .1 U F 0 .1 U F 0 .1 U F 0 .1 U F 0 .1 U F 1 0 0 0PF 0 .1 U F 3 3 PF 3 3 PF Title
DSP
GND
VG N D GN D Size D o cu m e n t Number Rev
R F GN D GND GND R F GN D 1.02
8202D-16-HI-216-0-J
D a te : Sa tu rd a y, Se p te m b e r 23, 2006 Sh eet 2 of 4
5 4 3 2 1
5 4 3 2 1

U8
BA5954FP / AT5954
DIP28-SSOPH

20K
14 FOC+ CON12
F CO VOFC+ SP-
1 10K - Driver
VINFC R56 1 FOC- 1 SP+
+ 13
BIAS VOFC- 2 T R AYIN
D + R57 1 3 D
R58 22K 2
- 4 TRAYOUT
CFCerr1 7.5K 5 LOAD-
C44 3
7.5K X2 7 6 LOAD+
330P CFCerr2 VNFFC 7 DISC_SENCE
8 SLED-
20K 9 SLED+
RAD+ 10 + EC20
15
TCO VOTK+ 11 HOME
26 - Driver
VINTK 10K 16 R59 1 RAD- 12 4.7UF16V
VREF2 27
+ VOTK- VREF2 C N7
BIAS + R60 1
BC52 R61 22K 25
- MGND
CTKerr1 7.5K SP+ R62 C46
0.1uF C45 24
7.5K X2 20 470K 4700PF
330P CTKerr2 VNFTK
MGND
BIAS 12 SP+SNSR R63 1 R64 150K XOPVIP1
4
+ VOSL+
VINSL+ + Driver 11 SP- R65 150K XOPVIN1 R66 470K XOPOP1
SPDCO R67 10K 5
10K - VOSL-
VINSL- - C47 4700PF
R68 6.2K 6
VOSL 25K
C C

BIAS 17 SLED-
+ VOLD+
SCO
Driver
23 18 SLED+
VINLD 10K - VOLD-

15K V+11 U9
M+5V LM7808/TO
8 28 DMEA 1 2
Vcc STBY VIN VOUT
PreGND
PGND2

9
PGND

PVcc1
GND1

GND2

21

GND
PVcc2 BA5954FP EC21 + BC53
BC54 BC55 + EC22
100UF16V 0 .1UF
10

19

22

29

30

3
0 .1UF 0 .1UF 100UF16V

MGND MGND
MGND

B Motor Driver B

1
LOAD- R69 220R 2 Q6 Q7 2 R70 220R LOAD+
S8550 S8550

3
TRAY- R71 680R Q8 Q9 R72 680R TRAY+
DMEA FOC+ S8050 S8050
DMEA 2 FOC+ 2
FOC- R73 1K R74 1K
TRAYOUT RAD+ FOC- 2
TRAYOUT 2 RAD+ 2
T R AYIN RAD- C48 390PF C49 390PF
HOME T R AYIN 2 RAD- 2
HOME 2 TCO
TCO 2
XOPVIP1 F CO
XOPVIP1 2 F CO 2
XOPVIN1 SCO MGND
XOPVIN1 2 SCO 2
XOPOP1 SPDCO
XOPOP1 2 SPDCO 2
VREF2 TRAY-
VREF2 2 TRAY- 2
A TRAY+ A
DISC_SENCE TRAY+ 2
DISC_SENCE 2

SUNPLUS TECHNOLOGY
Title
Motor-Driver
Size Document Number R ev
B 8202D-16-HI-216-0-J 1.02

D ate: Saturday, September 23, 2006 Sheet 3 of 4


5 4 3 2 1
5 4 3 2 1

V+5V V GND V+5V V GND

V+5V V+5V C 50 NC
V V CC3 V _B IAS 2

D7 D8 CV B 1 C 51 0. 1UF
D TV _DA C0 2 V GND D
R 75 C 52 10P F R 76 C 53 10PF G /Y
75(0805) BAV99 75(0805) BAV99 B/U TV _DA C3 2
R/V TV _DA C4 2
TV _DA C5 2
L16 1UH CV B 1_O L17 1UH R/ V _O C 54 0. 1UF
R 77 R 78 R 79 R 80 V V CC3 V _COMP 2

1
75 150 150 150 C 55 0. 1UF
CV B 1 Q10 C 56 C 57 R/V Q11 C 58 C 59 V GND V _RE F 2
2 2
9015 100PF 100P F 9015 100PF 100PF R 81 680
V GND V _FS A DJ 2
3

3
V GND V G ND V GND
1/2 current config
V G ND V GND
1/2 current config
R 82 NC R 83 NC

DVD Signal
V+5V V GND V+5V V GND

V+5V V+5V

CV B 1_O
D9 D 10 CV B 1_O 1
R 84 C 60 10P F R 85 C 61 10P F G/ Y _O VIDEO DAC R118 R169 R268 R269 R270 R16 R17 R24
G/ Y _O 1
75(0805) BAV99 75(0805) BAV99
R/ V _O Full Current 390 0 0 0 0 75 75 75
R/ V _O 1
L18 1UH G/ Y _O L19 1UH B / U_O B / U_O Half Current 680 NC NC NC NC 150 150 150
B / U_O 1
1

1
C G /Y 2 Q12 C 62 C 63 B/U 2 Q13 C 64 C 65 C
9015 100PF 100P F 9015 100PF 100P F
3

3
V GND V G ND
V G ND V GND

R 86 NC R 87 NC

R 88
33K C 66

120P
R 90 A GND D V CC
4

E C23 R 89 10k E C24 R 91


DA _L 2 - U10A 10uF/ 16V 100
2 DA _L
1 ML_OUT
+

ML_OUT 1
20k C 67 3 +
10uF/ 16V NJM4558 Q14 C 68 R 92
820P SOP8 R 93 A _MUTE
8

R 94 1K 47P 4.7K

1
10k 3904
A GND A UDIO_MUTE 2 Q15
B 2 A UDIO_MUTE B
3906
A GND A GND A GND R 95 1K

3
R 96 100
R 97 10K
OP RE F OP _V CC R 98 2 . 2R
DV CC
+ E C25 B C56 R 99 B C57 + E C26 D V CC Q16
3906 R 100 100
100uF/10V 0. 1uF 10K 0. 1uF 100uF/ 16V 1 3 A _MUTE

+
A GND A GND A GND R 101

2
E C27 150K
D 11 100uF/ 10V
B A V 99/SOT23
A GND R103
R 102 10K A GND
33K C 69 R 104 22K

120P
R 106 A GND
4

E C28 R105 10k E C30 R 107 +


D A _R 6 - U10B 10uF/ 16V 100 E C29
2 D A _R
7 MR_OUT 100uF/10V
+

MR_OUT 1
20k C 70 OP RE F 5 +
10uF/ 16V NJM4558 Q17 C 71
820P SOP8 R 108 A _MUTE A GND
8

R 109 1K 47P
10k 3904
A GND
OP _V CC
A G ND A GND A GND

A A

SUNPLUS TECHNOLOGY
Title
Audio Filter
Size Doc ument Number Rev
C 8202D-16-HI-216-0-J 1. 02

Dat e: S at urday , S ept ember 23, 2006 S heet 4 of 4


5 4 3 2 1
Part5: Components List
TV Board BOM
序号 名称 规格型号 位号 用量 需求量 实发量

插座
HEADER 2P插针式插针(连接器插针式2.54mm间距)
1 JP2 1
2/2.54MM 不带钩,立式
HEADER 3P插针式插针(连接器插针式2.54mm间距)
2 JP3 1
3/2.54MM 不带钩,立式
3P插针式插座(连接器插针式2.0mm间距)
3 CON2/2.0MM 不带钩,立式
J4 1
2P插针式插座(连接器插针式2.0mm间距)
4 CON3/2.0MM 不带钩,立式
J3 1
4P插针式插座(连接器插针式2.0mm间距)
5 CON4/2.0MM 不带钩,立式
CN2,CN13 2
5P插针式插座(连接器插针式2.0mm间距)
6 CON5/2.0MM 不带钩,立式
CN4 1
6P插针式插座(连接器插针式2.0mm间距)
7 CON6/2.0MM 不带钩,立式
CN8 1
9P插针式插座(连接器插针式2.0mm间距)
8 CON9/2.0MM 不带钩,立式
CN1 1
10P插针式插座(连接器插针式2.0mm间距)
9 CON10/2.0MM 不带钩,立式
J18 1
10 F9370 声表 J16 1
11 F3953M 声表 J17 1
12 15x2PIN 15X2P插针式插针(连接器插针式2.0间距) CN3 1
13 IL-FHR-50S-HF IL-FHR-50S-HF(JAE) JP1 0
14 SVIDEO JACK Mini DIN JACK S端子 CN10 1
15 DB15 DZ11A31-B8 (15P-Dsub,30X15mm 卧式) CN11 1
16 BNC DC+12V电源插座(巨大2.0mm) CN12 1
17 PHONE JACK 音频输入插座 J1 1
18 SCP621U_Y 黄 CN15 1
19 SCP621U_W 白 CN16 1
20 SCP621U_R 红 CN17 1
21 component AV端子(双层:绿.蓝.红+白.红) CON5 1
晶振
22 19.6608MT 19.6608MHz石英晶体振荡器(49S矮封装) X1 1
23 3.58MHz 3.58MHz石英晶体振荡器(49S矮封装) Y1 1
24 4MHz 4MHz石英晶體振蕩器(49S矮封裝) Y2 1
二极管
25 5.6V 稳压二极管 5.6Vz D8,D21,D22 3
26 5.1V 稳压二极管 5.1Vz D14 1
27 SSM5822 整流二极管60V/3A(肖特基)快恢复型,DII D31 1
28 1N4148 片状二极管LL4148(开关二极管),DII D32,D35,D36 3
29 1N4001(DIP) 插件二极管1N4001 D33 1
30 15V 稳压二极管 15Vz D42 1
31 17V/18V 稳压二极管 17Vz D44 1
三极管
D1,D2,D11,D15,D17,D18,D19,D20,D39,D40
32 BAV99 ESD片狀三極管 11
,D41
片状三极管,SOT23,PNP
33 2N3906 TR,VCEO=40V/IC=200mA,DII/AUK
Q2,Q16,Q34 3
片状三极管,SOT23,NPN Q3,Q5,Q6,Q7,Q8,Q17,Q18,Q19,2Q1,2Q2,Q2
34 2N3904 TR,VCEO=40V/IC=200mA,DII/AUK
16
3,Q24,Q25,Q26,Q30,Q33
电解电容
35 4.7uF/16V DIP电解电容器(5X7) 16V ± 20% 2C25,2C26,2C27,2C28 4
36 10uF/16V DIP電解電容器(4X7) 16V ± 20% 2C15,2C21 2
37 10uF/25V DIP電解電容器(4X7) 16V ± 20% C194,C195,C196,C197,C198 5
38 10uF/50V DIP電解電容器(4X7) 16V ± 20% C246,C199 2
39 22uF/16V DIP電解電容器(4X7) 16V ± 20% C34,2C24,2C29 3
2C2,2C8,C48,C87,C91,C93,C95,C97,C104,
40 47uF/16V DIP電解電容器(4X7) 16V ± 20% 16
C128,C217,C218,C239,C240,C242,C258
C45,C53,C103,C107,C113,C209,C211,C212
41 100uF/16V DIP電解電容器(5X7) 16V ± 20% 10
,C213,C215
C46,C47,C76,C131,C203,C204,C207,C208,
42 470uF/16V DIP电解电容器(8X9)16V ± 20% 10
C222,C250
保险管
43 FUSE/5A 熔断器5A轴向引线式(玻璃外壳) F1 1
电感
44 2.7uH 贴片0805 L5,L2 2
45 22uH(DIP) DIP色环電感器 L7,L3 2
46 100uH(DIP) 立式固定電感器 for Tuner (4*6) L4 1
47 33uH/3A 环型立式固定電感器 33μH±20% L22 1
48 10UH 贴片式电感0805 L76 1
49 L4.5M DIP滤波器 T1 1
磁珠
50 1K/100M 0805磁珠 1/16W ±5% L77 1
51 MG2012150YS 贴片式铁氧体磁珠0805 150Ω,25% L14,L16,L18,L32,L33,L34 6
L21,L23,L24,L25,L26,L27,L28,L29,L30,L
52 BEAD 贴片式铁氧体磁珠0805 150Ω,25% 10
31
排阻
53 33RX4 排状电阻器 KX0603 1/16W ±5% RP1,RP2,RP3,RP4,RP5,RP6,RP7 7
54 10K排阻 排状电阻器 KX0603 1/16W ±5% RP8 1
贴片电阻
R51,R53,R55,R56,R195,R233,R274,R275,R
55 0R 片状电阻器 KX0603 1/16W ±5% 9
276
56 0R_0805 片状电阻器 KX0805 1/16W ±5% R236,R185 2
57 0.39R/2W 插件电阻 2W R200,R4 2
58 3R 片状电阻器 KX0603 1/16W ±5% R204,R205,R206,R207 4
R102,R105,R109,R112,R118,R121,R122,R1
59 20R/1% 片状电阻器 KX0603 1/16W ±1% 30,R134,R139,R140,R145,R151,R215,R237 17
,R238,R239
60 22R 片状电阻器 KX0603 1/16W ±5% R40 1
61 47R 片状电阻器 KX0603 1/16W ±5% R17,R18,R68,R214,R23,R22 6
R77,R103,R123,R125,R133,R136,R141,R15
62 75R/ 1% 片状电阻器 KX0603 1/16W ±1%
2,R153,R154,R240,R241,R242
13
63 75R 片状电阻器 KX0603 1/16W ±5% R216 1
R11,2R9,R54,R61,R62,R176,R180,R208,2R
64 100R 片状电阻器 KX0603 1/16W ±5% 13
10,R211,R212,R226,R227
65 150R 片状电阻器 KX0603 1/16W ±5% R146,R150,R155,R156 4
66 330 片状电阻器 KX0603 1/16W ±5% R223 1
67 470R 片状电阻器 KX0603 1/16W ±5% R39 1
R58,R63,R65,R82,R168,R173,R203,R213,R
68 1k 片状电阻器 KX0603 1/16W ±5% 10
230,R231
69 1.2K 片状电阻器 KX0603 1/16W ±5% 2R7,R38 2
70 1.5K 片状电阻器 KX0603 1/16W ±5% C249 1
71 2K 片状电阻器 KX0603 1/16W ±5% R37 1
72 2.2K 片状电阻器 KX0603 1/16W ±5% 2R3,R225,R228,R76 4
73 2.4K 片状电阻器 KX0603 1/16W ±5% R24,R25,R26,R27,R28,R29 6
74 2.7K 片状电阻器 KX0603 1/16W ±5% R45,R46,R70,R71 4
75 3K_0805 片状电阻器 KX0805 1/16W ±5% R210,R209 2
76 3K3 片状电阻器 KX0603 1/16W ±5% R36 1
77 3.9k 片状电阻器 KX0603 1/16W ±5% R234 1
78 4K7 片状电阻器 KX0603 1/16W ±5% R69,R73,R157,R158,2R4,2R6,R84 7
79 5.1K 片状电阻器 KX0603 1/16W ±5% 2R2 1
80 5.6K 片状电阻器 KX0603 1/16W ±5% R30,R31,R229 3
81 6K2 片状电阻器 KX0603 1/16W ±5% R35 1
82 6.8K 片状电阻器 KX0603 1/16W ±5% R175 1
83 12K 片状电阻器 KX0603 1/16W ±5% R222 1
84 22K 片状电阻器 KX0603 1/16W ±5% R232,R33 2
85 47K 片状电阻器 KX0603 1/16W ±5% R32,R177,R178 3
R1,R2,R12,R13,2R1,2R5,2R8,R34,R41,R42
,R52,R59,R60,R66,R75,R78,R79,R80,R81,
86 10K 片状电阻器 KX0603 1/16W ±5% 33
R83,R143,R144,R159,R160,R161,R162,R16
9,R170,R174,R179,R190,R251,R252
R3,R8,R191,R193,R224,R243,R244,R245,R
87 100K 片状电阻器 KX0603 1/16W ±5% 246,R247,R248,R249,R250,R253,R254,R25 23
5,R256,R257,R258,R259,R260,R267,R268
88 10M 片状电阻器 KX0603 1/16W ±5% R194 1
贴片电容
89 15pF 片状独石电容器CC41-0603 50V±20% C270,C271,C272 3
C35,C36,C37,C124,C125,C173,C179,C182,
90 27PF 片状独石电容器CC41-0603 50V±5% 9
2C1
91 47pF 片状独石电容器CC41-0603 50V±20% C190,C189 2
92 100pF 片状独石电容器CC41-0603 50V±20% C259 1
93 150pF 片状独石电容器CC41-0603 50V±20% 2C5 1
94 330pF 片状独石电容器CC41-0603 50V±20% C147,C14 2
95 390pF 片状独石电容器CC41-0603 50V±20% C265 1
96 680pF 片状独石电容器CC41-0603 50V±20% C148,C15 2
97 1000pF 片状独石电容器CC41-0603 50V±20% C16,C269 2
98 1200pF 片状独石电容器CC41-0603 50V±20% 2C6 1
99 1.5nF 片状独石电容器CC41-0603 50V±20% C255 1
100 2.7nF 片状独石电容器CC41-0603 50V±20% C63,C64,2C23 3
101 10nF 片状独石电容器CC41-0603 50V±20% C253,C261,C262,C263,C268,C206,2C11 7
2C3,2C7,C43,C49,C57,C58,C59,C60,C65,C
66,C78,C79,C80,C81,C82,C83,C84,C85,C8
6,C88,C89,C90,C92,C94,C96,C98,C99,C10
0,C101,C102,C108,C109,C110,C111,C112,
C114,C115,C116,C117,C118,C119,C120,C1
102 0.1uF/100nF 片状独石电容器CC41-0603 50V±20% 21,C122,C123,C129,C130,C133,C136,C138 86
,C139,C140,C141,C143,C146,C151,C152,C
157,C164,C166,C167,C174,C178,C180,C18
1,C183,C184,C188,C191,C192,C193,C202,
C205,C210,2C12,2C13,C214,C216,2C20,C2
27,C245,C248,C252,C256,C260,C267
103 220nF 片状独石电容器CC41-0603 50V±20% C257 1
104 470nF 片状独石电容器CC41-0603 50V±20% C254,C264 2
C1,C2,C3,C4,C5,C6,C7,C8,C9,C10,C38,C4
4,C52,C55,C56,C62,C68,C69,C105,C132,C
105 1uF 片状独石电容器CC41-0603 50V±20% 31
134,2C18,2C19,C223,C229,C243,C244,C24
7,C251,C273,C274
106 1uF_0805 片状独石电容器CC41-0805 50V±20% 2C4,2C9,2C10,2C22 4
107 2.2uF_0805 片状独石电容器CC41-0805 50V±20% 2C14,2C16,2C17 3
电路板
108 PCB H K-USA-DVD-YPBPR-L+R-V4.0 1
芯片
1 la72700 U2 1
2 SM9613 U3 1
3 FLI8125 集成电路QFP208 U6 1
半导体存储器SO8(32K ROM),ST
4 24LC32-SN /Ceramate /SEC 厂家
U7 1
5 TDA1517+散热片 DIP20 U8 1
6 M24C02 半导体存储器SO8(2K ROM), U9 1
7 29LV040B SKT\PLCC32 U10 1
AP1506-50K5LA 开关电源控制IC,5A,TO263,Anachip
8 U12 1
AP1501-50K5LA /MATRIX 厂家
集成电路3.3V/5A TO-263,Anachip
9 AP1084K-33LA /Gamma /ADD
U13 1
功率集成电路SOT223(基准电压1.8V,
10 1117-1.8V 800mA),Anachip /MATRIX
U14 1
11 LM1117MPX-3.3V SOT223 U15 1
12 CD4052 DIP16-SOP U17 1
13 TAD9886/9885 DIP24-SOP-1.27 U19 1
14 78D09 SMD-TO-252-4 U25 1
15 APM9435A 片状场效应晶体管SO8,P沟道SW Q4 1
16 AP2301 SOT-23 Q22 1
17 TUNER: 高频头 UVL7605VMW J8 1
DVD_COMBO BOM
序号 名称 规格型号 位号 用量 需求量 实发量

贴片电容
BC1,BC2,BC4,BC5,BC6,BC7,BC9,BC11,C12,BC12,
BC13,C14,BC15,BC16,BC17,BC18,BC19,BC26,BC27,C28,
BC28,BC29,BC30,BC31,C32,BC32,C33,BC33,BC34,BC35,
1 100NF 片状独石电容器CC41-0603 50V±20% BC36,BC37,BC38,BC41,BC42,BC43,BC44,BC45,BC46,BC47, 57
BC48,BC49,C51,BC51,BC52,BC53,C54,BC54,C55,BC55,
BC56,BC57,BC22,BC24,BC25,C35,C1
2 330PF 片状独石电容器CC41-0603 50V±20% C29,BC8, C44,C45 4
3 33PF 片状独石电容器CC41-0603 50V±20% BC10,C36,C37,C38,C42,C43,C72, BC20 8
4 100PF 片状独石电容器CC41-0603 50V±20% C7,C9,BC14,C26,C56,C57,C58,C59,C62,C63,C64,C65 12
5 10nF 片状独石电容器CC41-0603 50V±20% BC21,BC23, C8,C10,C23,C24,BC39 7
6 1000PF 片状独石电容器CC41-0603 50V±20% C30,C31,BC40,BC50 4
7 1UF 片状独石电容器CC41-0603 50V±20% C2,C13,C15,C16,BC3 5
8 47PF 片状独石电容器CC41-0603 50V±20% C4,C3, C68,C71 4
9 68nF 片状独石电容器CC41-0603 50V±20% C5 1
10 680PF 片状独石电容器CC41-0603 50V±20% C6,C18,C19,C20,C21 5
11 220nF 片状独石电容器CC41-0603 50V±20% C22 1
12 47nF 片状独石电容器CC41-0603 50V±20% C25 1
13 820PF 片状独石电容器CC41-0603 50V±20% C27 ,C70,C67 3
14 10PF 片状独石电容器CC41-0603 50V±20% C34,C52,C53,C60,C61 5
15 4700PF 片状独石电容器CC41-0603 50V±20% C47,C46 2
16 390PF 片状独石电容器CC41-0603 50V±20% C48,C49 2
17 120P 片状独石电容器CC41-0603 50V±20% C69,C66 2
二极管
18 IN5820 DIP整流二极管60V/3A(肖特基)快恢复 D2,
1
型,DII
19 1N4004 DIP二极管(开关二极管),DII D3 ,D1 2
20 1N4148 片状二极管LL4148(开关二极管),DII D4,D5,D6 3
21 BAV99 ESD片狀二極管 D7,D8,D9,D10, D11 5

电解电容
22 100UF16V DIP電解電容器(6.3X5) 16V ± 20% ,EC6,EC8,EC9,EC11,EC22,EC13, 6
23 100UF16V DIP電解電容器(5X11) 16V ± 20% EC1,EC26,EC25,EC27,EC29,EC21,EC7,EC10,EC17, 9
24 10UF16V DIP電解電容器(4X5) 16V ± 20% EC12,EC19, EC23,EC24,EC28,EC30 6
25 47UF16V DIP电解电容器(5×5) 16V ± 20% EC15,EC16,EC18 , 3
26 47UF10V SMT钽电容 10V ± 20% EC14 1
27 4.7UF16V DIP電解電容器(4X5) 16V ± 20% EC20 1
28 220u/16V DIP電解電容器(6.3X7) 16V ± 20% EC3,EC4 ,EC5 3
29 220UF16V DIP電解電容器(8X5) 16V ± 20% EC2 1
30 470UF16V DIP電解電容器(8X7) 16V ± 20% EC32 1
电感
31 33uH 环型立式固定電感器 33μH±20% 3A FB1 1
32 10UH SMT0805贴片式電感器 for Tuner L12,L13 2
33 1UH SMT0805贴片式電感器 for Tuner L16,L17,L18,L19 4
磁珠
34 FB 75Ω 0805贴片式磁珠 L1,L2,L3,L4,L5,L6,L7,L8,L9, L10,L11 11
三极管
35 9015 三极管SOT23 Q1,Q10,Q11,Q12,Q13 5
36 9014 三极管SOT23 Q2 1
37 2SB1132 BAR Q3,Q4 2
38 3904 三极管SOT23 Q5,Q18 2
39 3906 三极管SOT23 Q16,Q15 2
40 S8550D 三极管SO-92 Q7,Q6 2
41 S8050D 三极管SO-92 Q8,Q9 2
排阻
42 33Ω 片状电阻器 KX0603 1/16W ±5% RN1,RN2,RN3,RN4, 4
贴片电阻
43 0Ω 片状电阻器 KX0603 1/16W ±5% R4,R21,R35,R48 ,R11,R8 6

.
DVD_COMBO BOM
序号 名称 规格型号 位号 用量 需求量 实发量

44 1Ω 片状电阻器 KX0603 1/16W ±5% R56,R57,R59,R60,R63 5


45 2.2Ω 片状电阻器 KX0603 1/16W ±5% R1,R2, R98 3
46 5.1Ω 片状电阻器 KX0603 1/16W ±5% R40,R31 2
47 10Ω 片状电阻器 KX0603 1/16W ±5% R9 1
48 22Ω 片状电阻器 KX0603 1/16W ±5% R51,R52 2
49 33Ω 片状电阻器 KX0603 1/16W ±5% R6,R34 2
50 75Ω 0805 片状电阻器 KX0805 1/16W ±5% R75,R76,R84,R85 4
51 75Ω 片状电阻器 KX0603 1/16W ±5% R77, 1
52 100Ω 片状电阻器 KX0603 1/16W ±5% R12,R16,R49,R91,R96,R100,R107,R113 8
53 150Ω 片状电阻器 KX0603 1/16W ±5% R78,R79,R80 3
54 220Ω 片状电阻器 KX0603 1/16W ±5% R69,R70 2
55 680Ω 片状电阻器 KX0603 1/16W ±5% R72,R71, R81 3
56 1KΩ 片状电阻器 KX0603 1/16W ±5% R26,R42,R43,R73,R74,,R95,R110 7
57 1.2KΩ (1%) 片状电阻器 KX0603 1/16W ±1% R19 1
58 2.2KΩ 片状电阻器 KX0603 1/16W ±5% R33,R32 2
59 1.5KΩ 片状电阻器 KX0603 1/16W ±5% R13 1
60 4.7KΩ 片状电阻器 KX0603 1/16W ±5% R25,R27,R36,R37,R38,R39,R55,R92,R112 9
61 5.1KΩ 片状电阻器 KX0603 1/16W ±5% R15,R14 2
62 6.2KΩ 片状电阻器 KX0603 1/16W ±5% R68 1
63 R3,R22,R41,R45,R46,R47,R50,R67,R90,R93, 18
10KΩ 片状电阻器 KX0603 1/16W ±5% R97,R99,R103,R106,R108,R114,R115,R116
64 15KΩ 片状电阻器 KX0603 1/16W ±5% R53,R54 2
65 20KΩ 片状电阻器 KX0603 1/16W ±5% R17,R30,R89,R105 4
66 22KΩ 片状电阻器 KX0603 1/16W ±5% R58,R61,R104 3
67 33KΩ (1%) 片状电阻器 KX0603 1/16W ±1% R24 1
68 33KΩ 片状电阻器 KX0603 1/16W ±5% R88,R102 2
69 39KΩ 片状电阻器 KX0603 1/16W ±5% R29 1
70 150KΩ 片状电阻器 KX0603 1/16W ±5% R18,R64,R65,R101 4
71 470KΩ 片状电阻器 KX0603 1/16W ±5% R62,R66 2
IC类
72 1500-50 U1 1
73 LM1117-3.3 U2 1
74 LM1117-1.8 U3 1
75 EN29LV800BA U4 1
76 SPHE8202D U5 1
77 1Mx16x4 HY57V641620ETP U6 1
78 24C02 U7 1
79 D5954 U8 1
80 LM7808 U9 1
81 NJM4558 U10 1
晶振
82 27MHz 石英晶体振荡器(矮封装)20pF XT1 1
插座
83 CONNECTOR CN1 1
DB25 卧式 公座

84 20PIN-1.0mm DIP插针式插座(1.0间距) CN4 1


85 24PIN-0.5mm SMT卧式贴片插座0.5间距) CN5(塑胶缺口和丝印反向) 1
86 8P-2.0mm DIP立式插针式插座(2.0间距) CN6 1
87 12PIN-1.0mm SMT卧式贴片插座(1.0间距) CN7 1
电路板
88 PCB MPEG_BOARD V2.0 1

.
Part6: Debug Instruction

FLI8125 TV block DEBUG INSTRUCTION


1.BALCK SCREEN

Is power adapter NO
Change another power adapter.
OK?

YES

1、5V power(U12) is abnormal: 12V short


circuit; fuse(F1)is broken or 5V short
NO
circuit;
power on the
2、Program isn’t on, check FLI8125 &
TV succefully?
(U13、U14,U15), 19.6608M crystalloid
( X1 ) works ok? Check the FLI8125
connected with flash ok?

YES

NO The logic voltage of CN8 (ON/OFF) is


The backr light
wrong.,check the circuit ; Inverter
OK?
board(12V)power fuse is broken.

YES

NO JP3 shot circuit hat brush off or the connection is


LVDS not correctly(5V ok) ;IC9435(Q4)is abnormal;
voltage OK? LVDS connection is wrong.

YES

Change another PANEL .(Same type)


2.ABNORMAL PICTURE

NO
Check the LVDS connective cable,LVDS
Is OSD ok?
plug (CN3)

YES

Check the FLI8125(U6) ;some


accessory are broken.

3.NO TV SIGNAL
NO
Signal of AV The circuit(ADC)of FLI8125(U6)is wrong
ok? or the voltage is low.

YES

NO Check communications between the TDA9886(U19)CVBS


TV image
and FLI8125(U6)check the U19 and crystalloid;IIC
snow ok?
signal not send to U19.

YES

NO
All channels can’t The TUNER circuit of voltage(3V) is low; check
play program. the in series inductance (L3)
,the voltage( 5V) is
too low.

YES

Change Tuner and TDA9886


4.TV NO SOUND

NO Check amplifer IC( U8),12V and output capacitance are


Is AV signal
abnormal ;MUTE circuit is wrong ;sound IC(U3)is abnormal,
ok?
the circuit of 78D09(U25)not ok.

YES

NO Check the supply power of LA72700(U2,9V ok) ,


In MONO mode.
check the IC ;the circuit of L4.5M(T1)is
sound ok?
broken.

YES

SIF of LA72700(U2) signal is not correctly:;3.58M crystalloid


(Y1)work ok?
DVD BLOCK DEBUG INSTRUCTION

1.DVD NO PICTURE

NO
Is the connection cable
Jointing and signal of connection block are
OK?
broken.

YES

NO Check TV connector J18 (on/off) is low?


Check the voltage
Check DVD block power IC):5V(U1),3.3V
of DVD block.
(U2),1.8V(U3)are abnomal.

YES

program no work , the jointing of


8202D(U5)、FLASH(U4)、SDRAM
(U6)is not correctly.

2. DVD MODULE CAN’T CLOSE

Is the module distortion? DVD button was pressed all


Disc can’t be closed
the time; Check the communication between CN1 and
into the module .
CN7 .

3. DISC CAN’T BE READ

Is the Disc side correctly ;check the DVD laser


Disc can’t be read . protection is take off ok? Check the soft wire
between CN5 and the model.

Change DVD main board

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