Learning Switched Mode Power Supply Design Using MATLAB SIMULINK

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Learning Switched Mode Power Supply Design Using

MATLAB/SIMULINK
Wei-Hsin Liao* Shun-Chung Wang** Yi-Hua Liu*
*Department of Electrical Engineering **Department of Electrical Engineering
National Taiwan University of Science and Technology Lunghwa University of Science and Technology
Taipei, Taiwan Taoyuan, Taiwan

Abstract—Switched Mode Power Supplies (SMPS) have Electromagnetic Compatibility (EMC). Among them, the
become an indispensable part of modem electronic systems. In magnetic and EMC design depend on the real-world design,
this paper, a generalized MATLAB/SIMULINK modeling therefore is often not taken into account in simulation level. In
techniques is presented. The proposed techniques have been this paper, a description of the modeling techniques for power
successfully integrated into SMPS design course at Lunghua
converter and control ICs along with their use in SMPS
University, Taiwan. The main objective of the course is to teach
final year undergraduate students and first year Master’s courses will be presented. The various types of converters are
students how to design an SMP in real life. Positive response considered to be examples to clearly show the validity of the
from students indicates that the proposed technique is useful for proposed technique, and will be described in detail in the
SMPS design courses. following sections.

Keywords-switched mode power supply (SMPS); MATLAB


/SIMULINK; pulsewidth modulation (PWM); Power factor
correction (PFC)

I. INTRODUCTION
Fig. 1 Typical SMPS block diagram
As to today more than 75% of all generated power was
processed by power electronics. The extensive usage of II. SIMULINK MODEL OF SWITCHED MODE POWER
switching converter circuits in electronic products and systems
SUPPLY
makes the fundamental understanding of power electronics a
necessity for students and electronic engineers. This trend has In this section, the generalized construction method of
resulted in an increasing interest in providing power electronic SMPS SIMULINK model will be presented. In this paper, the
courses at the senior undergraduate and the graduate levels in behavior model technique as presented in [4] is adopted. Take
various institutions [1-3]. Traditionally, SMPS are taught as the flyback power converter shown in Fig. 2 as an example. In
part of a typical introductory undergraduate elective course in a flyback converter, the switch Q is continuously switching on
power electronics. However, the practical design of SMPS and off with high frequency in order to provide the transfer of
calls for design expertise which can only be gained with years electric power via energy storage components. Assuming the
of experience. Fig. 1 shows the block diagram of a typical flyback converter operates in continuous conduction mode
SMPS, the AC input voltage is rectified by a full-wave bridge (CCM), the state equation of the power circuit when Q is on
rectifier. The rectified input voltage is next applied to power can be written as
factor correction (PFC) pre-regulator followed by output DC- diL 1
= (vg − iL rL ) (1)
DC converter(s). Downstream DC-DC converter generates a dt L
set of DC voltages required for the load, and normally also dvC 1 vO
provides input-to-output isolation. There are a number of =− (2)
topologies utilized in a DC-DC converter, and a large variety dt C RO
of regulator ICs suitable for each of these topologies. The and the relationship between the transformer voltage on the
selection of right topology and controller depends on specific primary side v1 and secondary side v2 can be shown as
requirements for the power supply and personal experience of v1 = vg (3)
the designer.
In this paper, a generalized MATLAB/SIMULINK n2 n
v2 = − v1 = − 2 vg (4)
modeling techniques for SMPS is presented. The objective of n1 n1
the proposed technique is to assist the learning of SMPS where n1 is the number of turns of primary side, and n2 is
through simulation. A practical SMPS design consists of the number of turns of secondary side.
several parts: power converter topology selection, controller When the switch Q turned off, the state equation of the
(compensation circuit) design, magnetic design and power circuit can be written as

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diL 1 ⎛ n1 ⎞ the PFC is to control input AC current so that it is in phase
= ⎜ − vO − iL rL ⎟ (5) with mains AC voltage and its waveform repeats the input
dt L ⎝ n2 ⎠ voltage waveform. The objective of the DC-DC converter is
dvC 1 n1 v to maintain a constant voltage across the load given a variable
= iL − O (6) input voltage and load current. There are three major types of
dt C n2 RO
power supply control ICs: voltage mode control IC and current
The relationship between v1 and v2 is
mode control IC for DC-DC converter control and the power
n1 n factor correction ICs for PFC control. The modeling
v1 = v2 = − 1 vO (7)
n2 n2 techniques of these three types of ICs will be presented as
follows.
v2 = −vO (8)
the output voltage vO for switch on and off is the same
vO = iC rC + vC (9) A. Voltage mode control IC for DC-DC converter
Taking Eq. (1)~(9) into account, the corresponding behavior For DC-DC converter, a negative feedback loop is utilized
model can then be implemented in SIMULINK environment. to maintain a constant value for the output voltage(s). To
It can be noted that the constructed model can be masked into accomplish this, an error amplifier (EA) is used, which
a subsystem in SIMULINK, the users can then uses a dialog attempts to minimize the error between the output voltage and
window to change the circuit parameters during simulations an ideal reference voltage. Deficiencies in gain and phase
easily. margins must be compensated for using an appropriate
compensation network. Fig. 4 shows the general form and the
n1 : n2
equivalent circuit of a feedback controller. From Fig. 4(b),
iL D iC assuming the input impedance of the EA is infinite, the output
L + - C voltage of the EA can be calculated as
+ v2 +
v1 + RO vO Z2 Z1
vg + - + rC vC - v1 = vO′ + vC (10)
- rL vL - Z1 + Z 2 Z1 + Z 2
-
(
vC = A ( s ) vref − v1 ) (11)
Q where the transfer function of the open loop gain A(s) can
be represented as
Fig. 2 Flyback switching power converter p
A( s) = K (12)
s+ p
where K is the DC gain and p is the pole. Using Eq.
(10)~(12), the SIMULINK model for OP AMP with
compensation network can be obtained, as shown in Fig. 5.

(a) general form (b) equivalent circuit


Fig. 4 SIMULINK model for OP AMP with compensation network

Fig. 5 SIMULINK model for OP AMP with compensation network

The important trait of voltage mode control is that the error


voltage is placed into a pulsewidth modulation (PWM)
Fig. 3 SIMULINK model for flyback converter
comparator and compared against a clock generated sawtooth
waveform. As the error voltage rises and falls, the pulsewidth
III. SIMULINK MODEL FOR CONTROLLER IC of the output signal increases and decreases accordingly.
From Fig. 1, a typical SMPS consists of two parts: a PFC There are many commercially available voltage mode ICs,
pre-regulator and a DC-DC conversion stage. The objective of however, the operating principles of this type of control IC is

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similar. In this paper, UC3525 from Texas Instrument is taken the current threshold is raised to allow more energy to reach
as an example to show the validity of the proposed method. the load. The converse is true too.
Fig. 6 shows the block diagram of the UC3525. From Fig. 6, Similarly, there are many commercially available current
UC3525 comprises an error amplifier, a PWM comparator and mode ICs. In this paper, UC3842 from Texas Instrument is
an S-R flip-flop. The EA with a compensation network can be taken as an example. Fig. 8 shows the block diagram of the
constructed using Eq. (10), and the error voltage is derived in UC3842. From Fig. 8, UC3842 also consists of an error
the feedback system from the EA that amplifies the difference amplifier, a PWM comparator and an S-R flip-flop. The only
between the output voltage and the reference voltage. The difference between current mode control and voltage mode
generated error voltage is then compared to a sawtooth ramp control is that current mode control uses the oscillator only as
to control the duty cycle of the power switch. A flip-flop is a fixed-frequency clock and the ramp waveform in voltage
used in UC3525 to assure that only one output pulse is mode control is replaced with a signal derived from output
generated for each clock period. The SIMULINK model of inductor current. Using similar techniques describe in section
UC3525 is shown in Fig. 7. It should also be noted that the III (a), the SIMULINK model of UC3842 can be obtained as
model shown in Fig. 7 can also be integrated into a subsystem, shown in Fig. 9.
and a dialog window can be used to enter the parameters of the
compensation network.

Fig. 8 Block diagram of UC3842

Fig. 6 Block diagram of UC3525

Fig. 9 SIMULINK model of UC3842

C. Power factor correction IC for AC-DC converter


Fig. 7 SIMULINK model of UC3525 Power factor correction shapes the input current of SMPS to
maximize the real power available from the utility. There are
three general methods of control: discontinuous conduction
B. Current mode control IC for DC-DC converter mode (DCM), transition mode (TRM), and continuous
A second control method for DC-DC converter is called the conduction mode (CCM). However, the main objective of
current mode control. Current mode methods control the peak these three types of ICs is similar: the input current should be
current excursion points flowing though the power switch. nearly sinusoidal and in phase with the AC line voltage and
This equates to the excursions of the flux density within the the output dc bus should be regulated at a fixed voltage.
magnetic core. In a current mode controller, a fixed frequency There are many commercially available PFC ICs. In this
oscillator sets a flip-flop and a high speed current comparator paper, L6561 from SGS-Thompson is taken as an example.
resets the flip-flop. The “1” state of the flip-flop is when the L6561 is a transition mode controller which is very popular for
power switch is conducting. The threshold for the current lighting and other lower power applications. Fig. 10 shows
comparator is set by the output of the voltage EA. If the the block diagram of the L6561. From Fig. 10, an error
voltage EA indicates that the output voltage is too low, then amplifier with a low frequency pole provides an error signal
into the reference multiplier. The other input to the multiplier

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is a scaled version of the rectified input ac line voltage. The compensation circuits. The procedures of a typical
multiplier output is the product of the near dc signal from the compensation circuit design can be summarized as follows:
error amplifier and the rectified sine waveform at the ac input. 1. Obtain the transfer function of the power stage, and
The signal out of the multiplier is then used as the reference then plot the bode plot using the sistool in MATLAB.
for the input voltage. This amplitude of this signal is adjusted 2. Select the poles and zeros of a compensation circuit so
to maintain the output voltage to remain at its regulated value. that a cascade transfer function of the power stage and
The SIMULINK model of L6561 can be obtained as shown in compensation circuit exhibits desired frequency
Fig. 11. characteristics and does not violate stability conditions.
3. Verify the result using simulation and experiments.

Fig. 10 Block diagram of L6561

Fig. 12. SIMULINK model of a buck converter using UC3525


Take the buck converter shown in Fig. 13 as example,
assuming the circuit parameters is vg = 15 V, vO = 5 V, L= 115
μH, C = 3300 μF, RO = 20 Ω, switching frequency = 50kHz.
Using the state-space average modeling techniques, the
control-to-output transfer function can be obtained as
vˆO ( s ) Vg
=
dˆ ( s ) vˆg ( s ) = 0 LCs 2 +
L
s +1
RO
(13)

Fig. 11 SIMULINK model of L6561

IV. EXAMPLES USING THE PROPOSED SIMULINK MODEL


In order to validate the effectiveness and correctness of the Fig. 13 A typical buck converter
proposed technique, examples are provided in this section. The DC steady state operating point is I L = 0.25 A ,
Due to limited space, only selected waveforms are presented.
Three examples will be given in the following sections. VC = 5 V and duty cycle D = 0.33 . Using the sistool, the
bode plot of Eq. (13) can be plotted as Fig. 14. Adding a zero
at 142 Hz and a pole at 2842 Hz can improve the phase margin
A. a voltage mode controlled buck converter and crossover frequency. The bode plot after adding the
Fig. 12 shows the SIMULINK model of a buck converter compensation circuit is shown in Fig. 15.
using UC3525 as the control IC. From a theoretical approach,
compensation circuit design often involves complicated
equations, making this a challenging task. Typically,
compensation circuit design is often conducted on a trial-and-
error basis for many practicing engineers. However, using the
SIMULINK model presented in the previous sections,
engineers can learn the compensation circuit design in a
graphical and generalized way.
There are a number of well-documented techniques for
designing the compensation circuit of a SMPS [7, 8]. Due to
its graphical nature and simplicity, the frequency response
technique is widely adopted in practical design of SMPS Fig. 14 Open loop bode plot of the presented buck converter

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Two additional examples are also presented to validate the
proposed technique. The design techniques are similar to that
presented in section IV.a, and will be neglected due to limited
space. The block diagram and obtained waveforms for these
two examples will be provided in the following subsections.

b. a current mode controlled flyback converter


Fig. 19 shows the SIMULINK model of a flyback converter
using UC3842 as the control IC. The simulated and
Fig. 15 Close loop bode plot of the presented buck converter with
compensation circuit experimental waveform of this system is presented in Fig. 20.
From Fig. 20, the simulated waveform correctly follows the
The users can then use the presented SIMULINK model to experimental waveform.
simulate this circuit. Adding a zero and a pole is equivalent to c. a transition mode power factor correction circuit
a Type II compensation circuit, using the parameter setting Fig. 21 shows the SIMULINK model of a PFC circuit using
dialog window as shown in Fig. 16, the parameters of the L6561 as the control IC. The simulated and experimental
compensation circuit can be inputted. To verify the waveform of this system is presented in Fig. 22. From Fig. 22,
correctness of the proposed method, a prototype using the the simulated waveform correctly follows the experimental
same parameters is also implemented, and is shown in Fig. 17. waveform.
The simulated and experimental waveform of this system is
presented in Fig. 18. From Fig. 18, the simulated and
experimental waveforms are nearly identical; this verifies the
correctness of the proposed modeling technique.

Fig. 19. SIMULINK model of flyback converter using UC3842

Fig. 16 Parameters setting dialog window of UC3525 subsystem


(a) Simulated waveform (b) Experimetal waveform
Fig. 20. The waveforms of output voltage vo and switch current iS waveform

Fig. 17 The photo of the buck converter prototype system

Fig. 21. PFC Circuit using L6561

(a) Simulated waveform (b) Experimetal waveform


Fig. 18 The waveforms of output voltage vo and inductor current iL waveform

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Taiwan, under research grant NSC 97-2622-E-262-006-CC3.

REFERENCES
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ACKNOWLEDGMENT Berlin: Springer, 2000.
This work was supported by National Science Council,

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