PD- 93804A

IRFB41N15D
SMPS MOSFET IRFS41N15D
IRFSL41N15D
HEXFET® Power MOSFET
Applications VDSS RDS(on) max ID
l High frequency DC-DC converters
150V 0.045Ω 41A

Benefits
l Low Gate-to-Drain Charge to Reduce
Switching Losses
l Fully Characterized Capacitance Including
Effective COSS to Simplify Design, (See
App. Note AN1001)
l Fully Characterized Avalanche Voltage
and Current TO-220AB D2Pak TO-262
IRFB41N15D IRFS41N15D IRFSL41N15D

Absolute Maximum Ratings

Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 41
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 29 A
IDM Pulsed Drain Current  164
PD @TA = 25°C Power Dissipation ‡ 3.1 W
PD @TC = 25°C Power Dissipation 200
Linear Derating Factor 1.3 W/°C
VGS Gate-to-Source Voltage ± 30 V
dv/dt Peak Diode Recovery dv/dt ƒ 2.7 V/ns
TJ Operating Junction and -55 to + 175
TSTG Storage Temperature Range °C
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Mounting torqe, 6-32 or M3 screw† 10 lbf•in (1.1N•m)

Typical SMPS Topologies

l Telecom 48V input DC-DC Active Clamp Reset Forward Converter

Notes  through … are on page 11

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IRFB/IRFS/IRFSL41N15D
Static @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 150 ––– ––– V VGS = 0V, ID = 250µA
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.17 ––– V/°C Reference to 25°C, ID = 1mA
RDS(on) Static Drain-to-Source On-Resistance ––– ––– 0.045 Ω VGS = 10V, ID = 25A „
VGS(th) Gate Threshold Voltage 3.0 ––– 5.5 V VDS = VGS, ID = 250µA
––– ––– 25 VDS = 150V, VGS = 0V
IDSS Drain-to-Source Leakage Current µA
––– ––– 250 VDS = 120V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100 VGS = 30V
IGSS nA
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -30V

Dynamic @ TJ = 25°C (unless otherwise specified)

Parameter Min. Typ. Max. Units Conditions
gfs Forward Transconductance 18 ––– ––– S VDS = 50V, ID = 25A
Qg Total Gate Charge ––– 72 110 I D = 25A
Qgs Gate-to-Source Charge ––– 21 31 nC VDS = 120V
Qgd Gate-to-Drain ("Miller") Charge ––– 35 52 VGS = 10V, „
td(on) Turn-On Delay Time ––– 16 ––– VDD = 75V
tr Rise Time ––– 63 ––– ns ID = 25A
td(off) Turn-Off Delay Time ––– 25 ––– RG = 2.5Ω
tf Fall Time ––– 14 ––– VGS = 10V „
Ciss Input Capacitance ––– 2520 ––– VGS = 0V
Coss Output Capacitance ––– 510 ––– VDS = 25V
Crss Reverse Transfer Capacitance ––– 110 ––– pF ƒ = 1.0MHz†
Coss Output Capacitance ––– 3090 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
Coss Output Capacitance ––– 230 ––– VGS = 0V, VDS = 120V, ƒ = 1.0MHz
Coss eff. Effective Output Capacitance ––– 250 ––– VGS = 0V, VDS = 0V to 120V …
Avalanche Characteristics
Parameter Typ. Max. Units
EAS Single Pulse Avalanche Energy‚ ––– 470 mJ
IAR Avalanche Current ––– 25 A
EAR Repetitive Avalanche Energy ––– 20 mJ
Thermal Resistance
Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 0.75
RθCS Case-to-Sink, Flat, Greased Surface † 0.50 ––– °C/W
RθJA Junction-to-Ambient† ––– 62
RθJA Junction-to-Ambient‡ ––– 40
Diode Characteristics
Parameter Min. Typ. Max. Units Conditions
D
IS Continuous Source Current MOSFET symbol
––– ––– 41
(Body Diode) showing the
A
ISM Pulsed Source Current integral reverse G

––– ––– 164

(Body Diode)  p-n junction diode. S

VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 25A, VGS = 0V „
trr Reverse Recovery Time ––– 170 260 ns TJ = 25°C, IF = 25A
Qrr Reverse RecoveryCharge ––– 1.3 1.9 µC di/dt = 100A/µs „
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
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 IRFB/IRFS/IRFSL41N15D

1000 VGS 1000 VGS

TOP 15V TOP 15V
10V 10V
9.0V 9.0V
I D , Drain-to-Source Current (A)

I D , Drain-to-Source Current (A)

8.0V 8.0V
7.5V 7.5V
7.0V 7.0V
6.5V 6.5V
BOTTOM 6.0V BOTTOM 6.0V
100 100

10 10
6.0V

6.0V 20µs PULSE WIDTH 20µs PULSE WIDTH

TJ = 25 °C TJ = 175 °C
1 1
0.1 1 10 100 0.1 1 10 100
VDS , Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics

1000 3.0
ID = 41A
R DS(on) , Drain-to-Source On Resistance
I D , Drain-to-Source Current (A)

2.5

100 2.0
(Normalized)

TJ = 175 ° C

1.5

TJ = 25 ° C
10 1.0

0.5
V DS = 25V
20µs PULSE WIDTH VGS = 10V
1 0.0
6 7 8 9 10 11 -60 -40 -20 0 20 40 60 80 100 120 140 160 180
VGS , Gate-to-Source Voltage (V) TJ , Junction Temperature ( °C)

Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance

Vs. Temperature
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IRFB/IRFS/IRFSL41N15D

100000 20
VGS = 0V, f = 1 MHZ ID = 25A
Ciss = Cgs + Cgd, Cds SHORTED
VDS = 120V

VGS , Gate-to-Source Voltage (V)

Crss = Cgd
16 VDS = 75V
10000 Coss = Cds + Cgd VDS = 30V
C, Capacitance(pF)

Ciss 12

1000

Coss 8

100 Crss
4

FOR TEST CIRCUIT

10 SEE FIGURE 13
0
1 10 100 1000 0 20 40 60 80 100 120
VDS , Drain-to-Source Voltage (V) QG , Total Gate Charge (nC)

Fig 5. Typical Capacitance Vs. Fig 6. Typical Gate Charge Vs.

Drain-to-Source Voltage Gate-to-Source Voltage

1000 1000
OPERATION IN THIS AREA LIMITED
BY RDS(on)
ISD , Reverse Drain Current (A)

100
I D , Drain Current (A)

TJ = 175 ° C 100 10us

10 100us

TJ = 25 ° C
10
1ms
1

TC = 25 ° C 10ms
TJ = 175 ° C
V GS = 0 V Single Pulse
0.1 1
0.2 0.6 1.0 1.4 1.8 1 10 100 1000
VSD ,Source-to-Drain Voltage (V) VDS , Drain-to-Source Voltage (V)

Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area

Forward Voltage
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 IRFB/IRFS/IRFSL41N15D

50 RD
VDS

VGS
40 D.U.T.
RG
+
I D , Drain Current (A)

-VDD

30 VGS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %

20
Fig 10a. Switching Time Test Circuit

10 VDS
90%

0
25 50 75 100 125 150 175
TC , Case Temperature ( ° C)
10%
VGS
Fig 9. Maximum Drain Current Vs. td(on) tr t d(off) tf
Case Temperature
Fig 10b. Switching Time Waveforms

10
Thermal Response (Z thJC )

D = 0.50

0.20 P DM
0.1 0.10
t1
0.05 t2
0.02
0.01 SINGLE PULSE Notes:
(THERMAL RESPONSE) 1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.01
0.00001 0.0001 0.001 0.01 0.1 1
t1 , Rectangular Pulse Duration (sec)

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

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IRFB/IRFS/IRFSL41N15D

1200
1 5V ID

EAS , Single Pulse Avalanche Energy (mJ)

TOP 10A
1000 21A
L D R IV E R BOTTOM 25A
VDS

800
RG D .U .T +
V
- DD
IA S A
600
20V
tp 0 .0 1 Ω

400
Fig 12a. Unclamped Inductive Test Circuit
V (B R )D SS
tp 200

0
25 50 75 100 125 150 175
Starting TJ , Junction Temperature ( °C)

IAS
Fig 12c. Maximum Avalanche Energy
Fig 12b. Unclamped Inductive Waveforms
Vs. Drain Current
QG

VGS
QGS QGD

VG

Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.

50KΩ

12V .2µF
.3µF

+
V
D.U.T. - DS

VGS

3mA

IG ID
Current Sampling Resistors

Fig 13b. Gate Charge Test Circuit

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 IRFB/IRFS/IRFSL41N15D

Peak Diode Recovery dv/dt Test Circuit

+ Circuit Layout Considerations

D.U.T
• Low Stray Inductance
• Ground Plane
ƒ
• Low Leakage Inductance
Current Transformer
-

+
‚
„
- +
-


RG • dv/dt controlled by RG +
• Driver same type as D.U.T. VDD
-
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test

Driver Gate Drive

P.W.
Period D=
P.W. Period

VGS=10V *

D.U.T. ISD Waveform

Reverse
Recovery Body Diode Forward
Current Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
VDD

Re-Applied
Voltage Body Diode Forward Drop
Inductor Curent

Ripple ≤ 5% ISD

* VGS = 5V for Logic Level Devices

Fig 14. For N-Channel HEXFET® Power MOSFETs

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IRFB/IRFS/IRFSL41N15D

TO-220AB Package Outline

Dimensions are shown in millimeters (inches)

1 0 .5 4 (.4 1 5 ) 3 .7 8 (.1 4 9 ) -B -
2 .8 7 (.1 1 3 ) 1 0 .2 9 (.4 0 5 ) 3 .5 4 (.1 3 9 ) 4 .6 9 (.1 8 5 )
2 .6 2 (.1 0 3 ) 4 .2 0 (.1 6 5 )
-A - 1 .3 2 (.0 5 2 )
1 .2 2 (.0 4 8 )
6.4 7 (.2 5 5 )
6.1 0 (.2 4 0 )
4
1 5 .2 4 (.6 0 0 )
1 4 .8 4 (.5 8 4 )
1 .1 5 (.0 4 5 ) L E A D A S S IG N M E N T S
M IN 1 - GATE
1 2 3 2 - D R A IN
3 - S OU RC E
4 - D R A IN
1 4 .0 9 (.5 5 5 )
1 3 .4 7 (.5 3 0 ) 4 .0 6 (.1 6 0 )
3 .5 5 (.1 4 0 )

0 .9 3 (.0 3 7 ) 0 .5 5 (.0 2 2 )
3X 3X
0 .6 9 (.0 2 7 ) 0 .4 6 (.0 1 8 )
1 .4 0 (.0 5 5 )
3X
1 .1 5 (.0 4 5 ) 0 .3 6 (.0 1 4 ) M B A M
2 .9 2 (.1 1 5 )
2 .6 4 (.1 0 4 )
2 .5 4 (.1 0 0)
2X
N O TE S :
1 D IM E N S IO N IN G & T O L E R A N C IN G P E R A N S I Y 1 4 .5 M , 1 9 8 2 . 3 O U T L IN E C O N F O R M S T O J E D E C O U T L IN E T O -2 2 0 A B .
2 C O N T R O L L IN G D IM E N S IO N : IN C H 4 H E A T S IN K & L E A D M E A S U R E M E N T S D O N O T IN C L U D E B U R R S .

TO-220AB Part Marking Information

E X A M P L E : T H IS IS A N IR F 1 0 1 0
W IT H A S S E M B L Y A
LOT C ODE 9B1M IN T E R N A T IO N A L PART NU M BER
R E C T IF IE R
IR F 1 0 1 0
LOGO 9246
9B 1M D ATE CO DE
ASSEMBLY
(Y Y W W )
LOT CODE
YY = YEAR
W W = W EEK

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 IRFB/IRFS/IRFSL41N15D

D2Pak Package Outline

1 0.54 (.4 15) -B - 1 0.16 (.4 00 )

1 0.29 (.4 05) 4.69 (.1 85) RE F.
1.4 0 (.055 ) 4.20 (.1 65)
-A- 1.3 2 (.05 2)
M AX. 1.2 2 (.04 8)
2
6.47 (.2 55 )
6.18 (.2 43 )

1.7 8 (.07 0) 15 .4 9 (.6 10) 2.7 9 (.110 )

1.2 7 (.05 0) 1 3 14 .7 3 (.5 80) 2.2 9 (.090 )

5 .28 (.20 8) 2.61 (.1 03 )

4 .78 (.18 8) 2.32 (.0 91 )

8.8 9 (.3 50 )
1.40 (.0 55) 1.3 9 (.0 5 5) R E F.
3X
1.14 (.0 45) 0 .93 (.03 7 ) 0.5 5 (.022 ) 1.1 4 (.0 4 5)
3X 0.4 6 (.018 )
0 .69 (.02 7 )
5 .08 (.20 0) 0 .25 (.01 0 ) M B A M M IN IM U M R E CO M M E ND E D F O O TP R IN T

1 1.43 (.4 50 )

NO TE S: LE A D A SS IG N M E N TS 8.89 (.3 50 )
1 D IM EN S IO N S A FTER SO L D ER D IP. 1 - G A TE
2 - D R AIN 17 .78 (.70 0)
2 D IM EN S IO N IN G & TO LE RA N C IN G PE R A N S I Y1 4.5M , 198 2.
3 - S O U RC E
3 C O N TRO L LIN G D IM EN SIO N : IN C H .
4 H E ATSINK & L EA D D IM EN S IO N S D O N O T IN C LU D E B UR R S.
3 .8 1 (.15 0)

2.5 4 (.100 )
2 .08 (.08 2) 2X
2X

D2Pak Part Marking Information

A
IN TE R N A TIO N A L PART NUM BER
R E C T IF IE R
F530S
LO G O
9 24 6
9B 1M DATE CODE
(Y YW W )
A S S E M B LY
YY = Y E A R
LO T C O D E
W W = W EEK
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IRFB/IRFS/IRFSL41N15D

TO-262 Package Outline

TO-262 Part Marking Information

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 IRFB/IRFS/IRFSL41N15D
D2Pak Tape & Reel Information
TR R

1 .6 0 (.0 6 3 )
1 .5 0 (.0 5 9 )
1 .6 0 (.0 6 3 )
4 .1 0 ( .1 6 1 ) 1 .5 0 (.0 5 9 )
3 .9 0 ( .1 5 3 ) 0.3 6 8 (.01 4 5 )
0.3 4 2 (.01 3 5 )

F E E D D IR E C TIO N 1 .8 5 ( .0 7 3 ) 1 1.6 0 (.4 57 )

1 .6 5 ( .0 6 5 ) 1 1.4 0 (.4 49 ) 2 4 .3 0 (.9 5 7 )
1 5 .42 (.60 9 )
2 3 .9 0 (.9 4 1 )
1 5 .22 (.60 1 )
TRL
1 .75 (.06 9 )
1 0.9 0 (.4 2 9) 1 .25 (.04 9 )
1 0.7 0 (.4 2 1) 4 .7 2 (.1 3 6)
16 .1 0 (.63 4 ) 4 .5 2 (.1 7 8)
15 .9 0 (.62 6 )

F E E D D IR E C T IO N

13.50 (.532 ) 2 7.4 0 (1.079 )

12.80 (.504 ) 2 3.9 0 (.9 41)

3 30 .00 6 0.0 0 (2.36 2)

( 14.1 73 ) M IN .
MAX.

30.4 0 (1.19 7)
N O TE S : M A X.
1 . CO M F OR M S TO E IA -418 . 26 .40 (1 .03 9) 4
2 . CO N TR O L LIN G D IM E N SIO N : M IL LIM E T ER . 24 .40 (.9 61 )
3 . DIM E NS IO N M EA S UR E D @ H U B.
3
4 . IN C LU D ES FL AN G E DIST O R T IO N @ O UT E R E D G E.
Notes:
 Repetitive rating; pulse width limited by „ Pulse width ≤ 300µs; duty cycle ≤ 2%.
max. junction temperature.
‚ Starting TJ = 25°C, L = 1.5mH … Coss eff. is a fixed capacitance that gives the same charging time
RG = 25Ω, IAS = 25A. as Coss while VDS is rising from 0 to 80% VDSS
ƒ ISD ≤ 25A, di/dt ≤ 340A/µs, VDD ≤ V(BR)DSS, † This is only applied to TO-220AB package
TJ ≤ 175°C
‡ This is applied to D2Pak, when mounted on 1" square PCB ( FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to application note #AN-994.

WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 252-7105
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Data and specifications subject to change without notice. 02/2000
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