1 CS202 Computer Organisation Architecture - Model QP

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FOURTH SEMESTER BTECH DEGREE EXAMINATION, 2017

CS202: COMPUTER ORGANISATION & ARCHITECTURE

Time:3 hrs Max. Marks:100

PART A

(Answer all questions. Each carries 3 marks)

1. Differentiate between big endian and little endian byte ordering.


2. Describe the basic instruction types.
3. Give the control sequence for execution of instruction Add[R3],R1
4. Design a 2x3 array multiplier. 4x3=12
PART B
(Answer any two. Each carries 9 marks)
5. a) Describe the different addressing modes. (5)
b) Give the flow chart for Booth’s Multiplication. (4)
6. Explain how nested subroutines are processed internally.
7. Explain restoring method of division with an example. 2x9=18
PART C
(Answer all questions. Each carries 3 marks)
8. Write notes on vectored interrupts.
9. Differentiate between synchronous and asynchronous buses.
10. Briefly explain static memory.
11. Describe the LRU algorithm for cache replacement. 4x3=12
PART D
(Answer any two. Each carries 9 marks)
12. a) Which are the different bus arbitration schemes? (5)
b) Write notes on flash memory (4)
13. Explain the working of Universal Serial Bus (USB).
14. a) Describe the different types of DRAMS. (5)
b) Compare the speed, size and cost of different types of memories. 9x2=18
PART E
(Answer any four. Each carries 10 marks)
15. Which are the different methods of processor organization?
16. Explain the design of a 4bit Arithmetic unit with two selection variables, which performs the
basic arithmetic functions.
17. a) Explain the design of status register. (5)
b) Give the design of a 4 bit shifter. (5)
18. Explain the design of micro program sequencer with an example.
19. Explain the procedure for designing a hardwired control, using an appropriate example.
20. a) Explain the different methods of control organization. (5)
b) Explain micro programmed CPU organization with the help of a diagram. (5) 10x4=40
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