ST JOSEPH’S COLLEGE(AUTONOMOUS)

P.B.27094, 36, Lalbhagh Road, Banglore-560027

TERM PAPER ON

“ MICROPROCESSOR 8086”
As a partial requirement for the Degree of
BACHELOR OF SCIENCE

Guided by: Submitted by:

Ms. REGINA MATHIAS SYED SAIF
(M.Sc., Ph.D.) 17MEC24019
Department of Electronics

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ST JOSEPH’S COLLEGE(AUTONOMOUS)
P.B.27094, 36, Lalbhagh Road, Banglore-560027

TERM PAPER REPORT BY

SYED SAIF (17MEC24019)

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Acknowledgement

I would never have been able to finish my term paper

without the guidance of the following people, who
have shown there constant support .I express thanks
to St.joseph’s college Bangalore for giving me the
opportunity .I’m highly grateful to Ms.Regina
Mathias for having given me this opportunity to
undertake this term paper. I would like to thank my
guide Ms.Regina Mathias for her invaluable support
which helped to complete this task.
I am thankful to all people who have been a part of
this,especially my parents .I feel deeply indepted to
all the people who helped me to finish this task.

SYED SAIF
17MEC24019

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 ST JOSEPH’S COLLEGE(AUTONOMOUS)
P.B.27094, 36, Lalbhagh Road, Banglore-560027

CERTIFICATE
This is to certify that term paper entitled “A Compact Study
On Microprocessor(8086)” a bonafide work carried out by Syed
Saif student of Department of BSC, ST JOSEPH’S
COLLEGE(AUTONOMOUS) This term paper report is been
submitted during the year 2018-19 in partial fulfilment of the
requirement of the degree of Bachelor of Science 5th Semester.

Ms Regina Mathias
Term paper Guide

Date:…………
Place: Bangalore

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 Contents
Microprocessor

 INTRODUCTION OF MICROPROCESSOR
 GENERATION OF MICROPROCESSORS
 MICROPROCESSOR 8086
 COMPARITISON BETWEEN 8086 AND 8085
 ARCHITECHTURE OF 8086
 8086 INSTRUCTION SETS
 8086 INTERRUPTS
 80086 ADDRESSING MODES
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Microprocessor
A microprocessor is a controlling unit of a micro-computer, fabricated on
a small chip capable of performing Arithemetic Logical Unit (ALU)
operations and communicating with the other devices connected to it.

Microprocessor over-view
Microprocessor is a controlling unit of a micro-computer, fabricated on a
small chip capable of performing ALU (Arithmetic Logical Unit) operations
and communicating with the other devices connected to it.
Microprocessor consists of an Arithmetic Logic Unit, register array, and a
control unit. ALU performs arithmetical and logical operations on the
data received from the memory or an input device. Register array
contains the registers identified by letters like B, C, D, E, H, L and
accumulator. The CU controls the flow of data and instructions within the
computer.

Introduction
 History
Fair child semiconductors (founded in 1957) invented the first IC in 1959 that
marked the microprocessor history. In 1968, Gordan Moore, Robert Noyce and
Andrew Grove resigned from the Fair child semiconductors and started their own
company: Integrated Electronics (Intel). The first microprocessor Intel 4004 was
invented in 1971. A microprocessor is also known as a central processing unit in
which numbers of peripherals’ are fabricated on a single chip. It has ALU , a control
unit, registers, bus systems and a clock to perform computational tasks.

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Generation of Microprocessor
1st Generation

This was the period during 1971 to 1973 of microprocessor’s history. In 1971 intel
created the 1st microprocessor “4004” that would run at a clock speed of (108
KHz).With only 4 bits as the word size, the 4004 could only represent signed
numbers in the range -8 to +7, which is indeed very small. So, it was not really of
practical use for arithmetic calculations. However, it found applications in controlling
devices.

2nd Generation

Intel 8008 was the next in the evolution, the first 8-bit microprocessor. This was in
the year 1972. This was soon followed by Intel 8080, also an 8-bit microprocessor.
Intel 8080 was the first commercially popular 8bit microprocessor. With 8 bits as the
word size, it could represent signed numbers in the range of −128 to +127. This is
also not a good enough range for performing arithmetic calculations. Thus, the 8080
also was used only for control applications.

Some other microprocessors like 6800 from Motorola, Z-80 from Zilog were also
Popular at this time.

They were costly as they were based on NMOS technology fabrication and also for
their superfast speed.

3rd Generation

Around 1978, Intel released 8086, the first 16-bit microprocessor. With 16-bit word
size, it was possible to represent signed numbers in the range of −32,768 to
+32,767, which is quite a decent range for performing arithmetic calculations. As
such, this processor became very popular for control applications and also for
number crunching operations. Speeds of those processors were 4 times better than
the 2nd generation processors. Not to be outdone, Motorola came out with 68000,
their 16-bit processor. Zilog released Z-8000, again a 16-bit processor. These are
the most popular 16-bit processors.

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4th Generation

In the early 80s, Intel released the 32-bit processor, the Intel 80386, by using
HCMOS fabrication. With 32-bit word size, it was possible to represent signed
numbers in the range ±2×109, which is quite a large range for performing arithmetic
calculations. If floating point notation is used, it can represent much larger numbers.
As such, this processor became very popular as the Control Process Unit in
computers for number crunching operations. At this time, Motorola came out with
68020, their 32-bit processor. Intel released 80486, which was basically an 80386
processor and 80387 numeric co-processor on a single chip. Motorola released
68030. In the early 90s, Intel released 80586 by the name Pentium processor. It is
so fast in performing arithmetic operations and executing instructions. The Pentium
4 released in 2000 has 42 Million transistors worked with a clock frequency of (1.5
GHz) and is rated for 1500 MIPS (Million instructions per second).

5th Generation

From 1995 to until now so many processors pocessing high-performance and high-
speed processors that make use of 64-bit processors. The present-day computers
based on microprocessors are already faster than the mini computers and
sometimes the main frame computers of yesteryear, and they are available at a
small fraction of the cost of such main frame computers.

Block Diagram of a Basic Microcomputer

How does a Microprocessor Work?

The microprocessor follows a sequence: Fetch, Decode, and then
Execute.

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Fisrt the instructions are stored in the memory in a sequential order. The
microprocessor fetches those instructions from the memory, then
decodes it and executes those instructions till STOP instruction is
reached. it sends the result in binary to the output port later. Between
these processes, the register stores the temporarily data and ALU
performs the computing functions.

List of Terms Used in a Microprocessor

List of some of the frequently used terms in a microprocessor −
 Instruction Set − It is the set of instructions that are given to the
microprocessor to execute and perform operations.
 Bandwidth − It is the total number of bits processed in a single
instruction.
 Clock Speed − It determines operations performed by the
microprocessor per-second, It is expressed in MHz or GHz.It is also
known as Clock Rate.
 Word Length − It depends upon the width of internal data bus,
registers, ALU, etc. An 8-bit microprocessor can process 8-bit data
at a time. The word length ranges from 4 bits to 64 bits depending
upon the type of the microcomputer.
 Data Types − The microprocessor has multiple data type formats
like binary, BCD, ASCII, signed and unsigned numbers.

Features of a Microprocessor
List of some of the most prominent features of any microprocessor −
 Cost-effective − The microprocessor chips are available at low
prices and results its low cost.
 Size − The microprocessor is of small size chip, hence is portable.
 Low Power Consumption − Microprocessors are manufactured by
using metaloxide semiconductor technology, which has low power
consumption.
 Versatility − The microprocessors are versatile as we can use the
same chip in a number of applications by configuring the software
program.
 Reliability − The failure rate of an IC in microprocessors is very
low, hence it is reliable.

Microprocessor classification
Microprocessor can be classified into three categories −

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RISC Processor
RISC stands for Reduced Instruction Set Computer. It is designed to
reduce the execution time by simplify the instruction set of the
computer. Using RISC processors, each instruction requires only one
clock cycle to execute results in uniform execution time. This reduces the
efficiency as there are more lines of code, hence more RAM is needed to
store the instructions. The compiler also has to work more to convert
high-level language instructions into machine code.
Some of the RISC processors are −

 Power PC: 601, 604, 615, 620

 DEC Alpha: 210642, 211066, 21068, 21164
 MIPS: TS (R10000) RISC Processor
 PA-RISC: HP 7100LC

Architecture of RISC
RISC microprocessor architecture uses highly-optimized set of
instructions. It is used in portable devices like Apple iPod due to its
power efficiency.
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Characteristics of RISC
The major characteristics of a RISC processor are as follows −
 It consists of simple instructions.
 It supports various data-type formats.
 It utilizes simple addressing modes and fixed length instructions for
pipelining.
 It supports register to use in any context.
 One cycle execution time.
 “LOAD” and “STORE” instructions are used to access the memory
location.
 It consists of larger number of registers.
 It consists of less number of transistors.
CISC Processor
CISC stands for Complex Instruction Set Computer. It is designed to
minimize the number of instructions per program, ignoring the number
of cycles per instruction. The emphasis is on building complex
instructions directly into the hardware.
The compiler has to do very little work to translate a high-level language
into assembly level language/machine code because the length of the
code is relatively short, so very little RAM is required to store the
instructions.
Some of the CISC Processors are −

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  IBM 370/168
 VAX 11/780
 Intel 80486
Architecture of CISC
Its architecture is designed to decrease the memory cost because more
storage is needed in larger programs resulting in higher memory cost. To
resolve this, the number of instructions per program can be reduced by
embedding the number of operations in a single instruction.

Characteristics of CISC

 Variety of addressing modes.

 Larger number of instructions.
 Variable length of instruction formats.
 Several cycles may be required to execute one instruction.
 Instruction-decoding logic is complex.
 One instruction is required to support multiple addressing modes.
Special Processors
These are the processors which are designed for some special purposes.
Few of the special processors are briefly discussed −

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Coprocessor
A coprocessor is a specially designed microprocessor, which can handle
its particular function many times faster than the ordinary
microprocessor.
For example − Math Coprocessor.
Some Intel math-coprocessors are −

 8087-used with 8086

 80287-used with 80286
 80387-used with 80386
Input/Output Processor
It is a specially designed microprocessor having a local memory of its
own, which is used to control I/O devices with minimum CPU
involvement.
For example −

 DMA (direct Memory Access) controller

 Keyboard/mouse controller
 Graphic display controller
 SCSI port controller
Transputer (Transistor Computer)
A transputer is a specially designed microprocessor with its own local
memory and having links to connect one transputer to another
transputer for inter-processor communications. It was first designed in
1980 by Inmos and is targeted to the utilization of VLSI technology.
A transputer can be used as a single processor system or can be
connected to external links, which reduces the construction cost and
increases the performance.
For example − 16-bit T212, 32-bit T425, the floating point (T800, T805
& T9000) processors.

DSP (Digital Signal Processor)

This processor is specially designed to process the analog signals into a
digital form. This is done by sampling the voltage level at regular time
intervals and converting the voltage at that instant into a digital form.
This process is performed by a circuit called an analogue to digital
converter, A to D converter or ADC.
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A DSP contains the following components −
 Program Memory − It stores the programs that DSP will use to
process data.
 Data Memory − It stores the information to be processed.
 Compute Engine − It performs the mathematical processing,
accessing the program from the program memory and the data
from the data memory.
 Input/Output − It connects to the outside world.
Its applications are −

 Sound and music synthesis

 Audio and video compression
 Video signal processing
 2D and 3d graphics acceleration.
For example − Texas Instrument’s TMS 320 series, e.g., TMS 320C40,
TMS320C50.

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 Microprocessor 8086
8086 Microprocessor is an enhanced version of 8085Microprocessor that was
designed by Intel in 1976. It is a 16-bit Microprocessor having 20 address lines
and16 data lines that provides up to 1MB storage. It consists of powerful instruction
set, which provides operations like multiplication and division easily.
It supports two modes of operation, i.e. Maximum mode and Minimum mode.
Maximum mode is suitable for system having multiple processors and Minimum
mode is suitable for system having a single processor.
 Intel 8086 was launched in 1978.
 It was the first 16-bit microprocessor.
 This microprocessor had major improvement over the execution
speed of 8085.
 It is available as 40-pin Dual-Inline-Package(DIP).
 It is available in three versions:
 8086 (5 MHz)
 8086-2 (8 MHz)
 8086-1 (10 MHz)
It consists of 29000 transistors.
 It has a 16 line data bus.
 And 20 line address bus.
 It could address up to 1MB of memory.
 It has more than 20000 instructions.
 It supports multiplication and division.

Features of 8086
The most prominent features of a 8086 microprocessor are as follows −
 It has an instruction queue, which is capable of storing six
instruction bytes from the memory resulting in faster processing.
 It was the first 16-bit processor having 16-bit ALU, 16-bit registers,
internal data bus, and 16-bit external data bus resulting in faster
processing.
 It is available in 3 versions based on the frequency of operation −
o 8086 → 5MHz
o 8086-2 → 8MHz
o (c)8086-1 → 10 MHz
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 It uses two stages of pipelining, i.e. Fetch Stage and Execute Stage,
which improves performance.
 Fetch stage can prefetch up to 6 bytes of instructions and stores
them in the queue.
 Execute stage executes these instructions.
 It has 256 vectored interrupts.
 It consists of 29,000 transistors.
Comparison between 8085 & 8086 Microprocessor
 Size − 8085 is 8-bit microprocessor, whereas 8086 is 16-bit
microprocessor.
 Address Bus − 8085 has 16-bit address bus while 8086 has 20-bit
address bus.
 Memory − 8085 can access up to 64Kb, whereas 8086 can access
up to 1 Mb of memory.
 Instruction − 8085 doesn’t have an instruction queue, whereas
8086 has an instruction queue.
 Pipelining − 8085 doesn’t support a pipelined architecture while
8086 supports a pipelined architecture.
 I/O − 8085 can address 2^8 = 256 I/O's, whereas 8086 can
access 2^16 = 65,536 I/O's.
 Cost − The cost of 8085 is low whereas that of 8086 is high.

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 o Architecture of 8086
The following diagram depicts the architecture of a 8086 Microprocessor −

8086 Microprocessor is divided into two functional units,

i.e., EU (Execution Unit) and BIU (Bus Interface Unit).

EU (Execution Unit)
Execution unit gives instructions to BIU stating from where to fetch the data and
then decode and execute those instructions. Its function is to control operations on
data using the instruction decoder & ALU. EU has no direct connection with system
buses as shown in the above figure, it performs operations over data through BIU.
Let us now discuss the functional parts of 8086 microprocessors.

ALU
It handles all arithmetic and logical operations, like +, −, ×, /, OR, AND,
NOT operations.

Flag Register
It is a 16-bit register that behaves like a flip-flop, i.e. it changes
its status according to the result stored in the accumulator. It has
9 flags and they are divided into 2 groups − Conditional Flags
and Control Flags.
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Conditional Flags
It represents the result of the last arithmetic or logical instruction executed.
Following is the list of conditional flags −
 Carry flag − This flag indicates an overflow condition for arithmetic
operations.
 Auxiliary flag − When an operation is performed at ALU, it results
in a carry/barrow from lower nibble (i.e. D0 – D3) to upper nibble
(i.e. D4 – D7), then this flag is set, i.e. carry given by D3 bit to D4
is AF flag. The processor uses this flag to perform binary to BCD
conversion.
 Parity flag − This flag is used to indicate the parity of the result,
i.e. when the lower order 8-bits of the result contains even number
of 1’s, then the Parity Flag is set. For odd number of 1’s, the Parity
Flag is reset.
 Zero flag − This flag is set to 1 when the result of arithmetic or
logical operation is zero else it is set to 0.
 Sign flag − This flag holds the sign of the result, i.e. when the
result of the operation is negative, then the sign flag is set to 1 else
set to 0.
 Overflow flag − This flag represents the result when the system
capacity is exceeded.

Control Flags
Control flags controls the operations of the execution unit. Following is the list of control flags −

 Trap flag − It is used for single step control and allows the user to execute
one instruction at a time for debugging. If it is set, then the program can be
run in a single step mode.
 Interrupt flag − It is an interrupt enable/disable flag, i.e. used to allow/prohibit
the interruption of a program. It is set to 1 for interrupt enabled condition and
set to 0 for interrupt disabled condition.
 Direction flag − It is used in string operation. As the name suggests when it
is set then string bytes are accessed from the higher memory address to the
lower memory address and vice-a-versa.

General purpose register

There are 8 general purpose registers, i.e., AH, AL, BH, BL, CH, CL, DH,
and DL. These registers can be used individually to store 8-bit data and
can be used in pairs to store 16bit data. The valid register pairs are AH
and AL, BH and BL, CH and CL, and DH and DL. It is referred to the AX,
BX, CX, and DX respectively.
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  AX register − It is also known as accumulator register. It is used
to store operands for arithmetic operations.
 BX register − It is used as a base register. It is used to store the
starting base address of the memory area within the data segment.
 CX register − It is referred to as counter. It is used in loop
instruction to store the loop counter.
 DX register − This register is used to hold I/O port address for I/O
instruction.

Stack pointer register

It is a 16-bit register, which holds the address from the start of the
segment to the memory location, where a word was most recently
stored on the stack.

BIU (Bus Interface Unit)

BIU takes care of all data and addresses transfers on the buses for the
EU like sending addresses, fetching instructions from the memory,
reading data from the ports and the memory as well as writing data to
the ports and the memory. EU has no direction connection with System
Buses so this is possible with the BIU. EU and BIU are connected with
the Internal Bus.
It has the following functional parts −
 Instruction queue − BIU contains the instruction queue. BIU gets
upto 6 bytes of next instructions and stores them in the instruction
queue. When EU executes instructions and is ready for its next
instruction, then it simply reads the instruction from this instruction
queue resulting in increased execution speed.
 Fetching the next instruction while the current instruction executes
is called pipelining.
 Segment register − BIU has 4 segment buses, i.e. CS, DS, SS&
ES. It holds the addresses of instructions and data in memory,
which are used by the processor to access memory locations. It
also contains 1 pointer register IP, which holds the address of the
next instruction to executed by the EU.
o CS − It stands for Code Segment. It is used for addressing a
memory location in the code segment of the memory, where
the executable program is stored.
o DS − It stands for Data Segment. It consists of data used by
the program andis accessed in the data segment by an offset

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 address or the content of other register that holds the offset
address.
o SS − It stands for Stack Segment. It handles memory to store
data and addresses during execution.
o ES − It stands for Extra Segment. ES is additional data
segment, which is used by the string to hold the extra
destination data.
 Instruction pointer − It is a 16-bit register used to hold the
address of the next instruction to be executed.
 8086 was the first 16-bit microprocessor available in 40-pin DIP
(Dual Inline Package) chip. Let us now discuss in detail the pin
configuration of a 8086 Microprocessor.

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  8086 Pin Diagram
 Here is the pin diagram of 8086 microprocessor −

A19/S6, A18/S5, A17/S4, A16/S3

Pin 35-38(Unidirectional)

 These lines are multiplexed bi-directional address/data bus.

 During T, they carry lower order 16-bit address.
 In the remaining clock cycles, they carry 16-bit data.
 AD-AD carry lower order byte of data.
 AD-AD carry higher order byte of data.
BHE / S7
Pin 34 (output)
 BHE stands for Bus High Enable.
 BHE signal is used to indicate the transfer of the data over higher
order data bus (D8-D15).
 8-bit i/o devices use this signal.

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  It is multiplexed with status pin S7.
RD (Read)
Pin 32(ouput)

 it is a read signal used for read operation. indicates the

peripherals
 Power supply and frequency signals
 It uses 5V DC supply at VCC pin 40, and uses ground at VSS pin 1 and
20 for its operation.
 Clock signal
 Clock signal is provided through Pin-19. It provides timing to the
processor for operations. Its frequency is different for different
versions, i.e. 5MHz, 8MHz and 10MHz.
Address/data bus
 AD0-AD15. These are 16 address/data bus. AD0-AD7 carries low
order byte data and AD8AD15 carries higher order byte data.
During the first clock cycle, it carries 16-bit address and after that it
carries 16-bit data.
 Address/status bus
 A16-A19/S3-S6. These are the 4 address/status buses. During the
first clock cycle, it carries 4-bit address and later it carries status
signals.
 S7/BHE
 BHE stands for Bus High Enable. It is available at pin 34 and used to
indicate the transfer of data using data bus D8-D15. This signal is
low during the first clock cycle, thereafter it is active.
 Read($\overline{RD}$)
 It is available at pin 32 and is used to read signal for Read
operation.
 Ready
 It is available at pin 22. It is an acknowledgement signal from I/O
devices that data is transferred. It is an active high signal. When it
is high, it indicates that the device is ready to transfer data. When it
is low, it indicates wait state.
 RESET
 It is available at pin 21 and is used to restart the execution. It
causes the processor to immediately terminate its present activity.
This signal is active high for the first 4 clock cycles to RESET the
microprocessor.

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 INTR
 It is available at pin 18. It is an interrupt request signal, which is
sampled during the last clock cycle of each instruction to determine
if the processor considered this as an interrupt or not.
 NMI
 It stands for non-maskable interrupt and is available at pin 17. It is
an edge triggered input, which causes an interrupt request to the
microprocessor.
 $\overline{TEST}$
 This signal is like wait state and is available at pin 23. When this
signal is high, then the processor has to wait for IDLE state, else the
execution continues.
 MN/$\overline{MX}$
 It stands for Minimum/Maximum and is available at pin 33. It
indicates what mode the processor is to operate in; when it is high,
it works in the minimum mode and vice-aversa.
 INTA
 It is an interrupt acknowledgement signal and id available at pin 24.
When the microprocessor receives this signal, it acknowledges the
interrupt.
 ALE
 It stands for address enable latch and is available at pin 25. A
positive pulse is generated each time the processor begins any
operation. This signal indicates the availability of a valid address on
the address/data lines.
 DEN
 It stands for Data Enable and is available at pin 26. It is used to
enable Transreceiver 8286. The transreceiver is a device used to
separate data from the address/data bus.
 DT/R
 It stands for Data Transmit/Receive signal and is available at pin
27. It decides the direction of data flow through the transreceiver.
When it is high, data is transmitted out and vice-a-versa.
 M/IO
 This signal is used to distinguish between memory and I/O
operations. When it is high, it indicates I/O operation and when it is
low indicates the memory operation. It is available at pin 28.
 WR
 It stands for write signal and is available at pin 29. It is used to
write the data into the memory or the output device depending on
the status of M/IO signal.
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 HLDA
 It stands for Hold Acknowledgement signal and is available at pin
30. This signal acknowledges the HOLD signal.
 HOLD
 This signal indicates to the processor that external devices are
requesting to access the address/data buses. It is available at pin
31.
 QS1 and QS0
 These are queue status signals and are available at pin 24 and 25.
These signals provide the status of instruction queue. Their
conditions are shown in the following table −

QS0 QS1 Status

0 0 No operation

0 1 First byte of opcode from the queue

1 0 Empty the queue

1 1 Subsequent byte from the queue

 S0, S1, S2
 These are the status signals that provide the status of operation,
which is used by the Bus Controller 8288 to generate memory & I/O
control signals. These are available at pin 26, 27, and 28. Following
is the table showing their status −

S2 S1 S0 Status

0 0 0 Interrupt acknowledgement

0 0 1 I/O Read

0 1 0 I/O Write

0 1 1 Halt
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 1 0 0 Opcode fetch

1 0 1 Memory read

1 1 0 Memory write

1 1 1 Passive

 LOCK
 When this signal is active, it indicates to the other processors not to
ask the CPU to leave the system bus. It is activated using the LOCK
prefix on any instruction and is available at pin 29.
 RQ/GT1 and RQ/GT0
 These are the Request/Grant signals used by the other processors
requesting the CPU to release the system bus. When the signal is
received by CPU, then it sends acknowledgment. RQ/GT0 has a
higher priority than RQ/GT1.

Microprocessor - 8086 Instruction Sets

The 8086 microprocessor supports 8 types of instructions −

 Data Transfer Instructions

 Arithmetic Instructions
 Bit Manipulation Instructions
 String Instructions
 Program Execution Transfer Instructions (Branch & Loop Instructions)
 Processor Control Instructions
 Iteration Control Instructions
 Interrupt Instructions
Let us now discuss these instruction sets in detail.
Data Transfer Instructions
These instructions are used to transfer the data from the source operand to the
destination operand. Following are the list of instructions under this group −
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Instruction to transfer a word
 MOV − Used to copy the byte or word from the provided source to the
provided destination.
 PPUSH − Used to put a word at the top of the stack.
 POP − Used to get a word from the top of the stack to the provided location.
 PUSHA − Used to put all the registers into the stack.
 POPA − Used to get words from the stack to all registers.
 XCHG − Used to exchange the data from two locations.
 XLAT − Used to translate a byte in AL using a table in the memory.
Instructions for input and output port transfer
 IN − Used to read a byte or word from the provided port to the accumulator.
 OUT − Used to send out a byte or word from the accumulator to the provided
port.
Instructions to transfer the address
 LEA − Used to load the address of operand into the provided register.
 LDS − Used to load DS register and other provided register from the memory
 LES − Used to load ES register and other provided register from the memory.
Instructions to transfer flag registers
 LAHF − Used to load AH with the low byte of the flag register.
 SAHF − Used to store AH register to low byte of the flag register.
 PUSHF − Used to copy the flag register at the top of the stack.
 POPF − Used to copy a word at the top of the stack to the flag register.
Arithmetic Instructions
These instructions are used to perform arithmetic operations like addition,
subtraction, multiplication, division, etc.
Following is the list of instructions under this group −
Instructions to perform addition
 ADD − Used to add the provided byte to byte/word to word.
 ADC − Used to add with carry.
 INC − Used to increment the provided byte/word by 1.
 AAA − Used to adjust ASCII after addition.
 DAA − Used to adjust the decimal after the addition/subtraction operation.
Instructions to perform subtraction
 SUB − Used to subtract the byte from byte/word from word.
 SBB − Used to perform subtraction with borrow.
 DEC − Used to decrement the provided byte/word by 1.

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  NPG − Used to negate each bit of the provided byte/word and add 1/2’s
complement.
 CMP − Used to compare 2 provided byte/word.
 AAS − Used to adjust ASCII codes after subtraction.
 DAS − Used to adjust decimal after subtraction.
Instruction to perform multiplication
 MUL − Used to multiply unsigned byte by byte/word by word.
 IMUL − Used to multiply signed byte by byte/word by word.
 AAM − Used to adjust ASCII codes after multiplication.
Instructions to perform division
 DIV − Used to divide the unsigned word by byte or unsigned double word by
word.
 IDIV − Used to divide the signed word by byte or signed double word by word.
 AAD − Used to adjust ASCII codes after division.
 CBW − Used to fill the upper byte of the word with the copies of sign bit of the
lower byte.
 CWD − Used to fill the upper word of the double word with the sign bit of the
lower word.
Bit Manipulation Instructions
These instructions are used to perform operations where data bits are involved, i.e.
operations like logical, shift, etc.
Following is the list of instructions under this group −
Instructions to perform logical operation
 NOT − Used to invert each bit of a byte or word.
 AND − Used for adding each bit in a byte/word with the corresponding bit in
another byte/word.
 OR − Used to multiply each bit in a byte/word with the corresponding bit in
another byte/word.
 XOR − Used to perform Exclusive-OR operation over each bit in a byte/word
with the corresponding bit in another byte/word.
 TEST − Used to add operands to update flags, without affecting operands.
Instructions to perform shift operations
 SHL/SAL − Used to shift bits of a byte/word towards left and put zero(S) in
LSBs.
 SHR − Used to shift bits of a byte/word towards the right and put zero(S) in
MSBs.
 SAR − Used to shift bits of a byte/word towards the right and copy the old
MSB into the new MSB.
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Instructions to perform rotate operations
 ROL − Used to rotate bits of byte/word towards the left, i.e. MSB to LSB and
to Carry Flag [CF].
 ROR − Used to rotate bits of byte/word towards the right, i.e. LSB to MSB and
to Carry Flag [CF].
 RCR − Used to rotate bits of byte/word towards the right, i.e. LSB to CF and
CF to MSB.
 RCL − Used to rotate bits of byte/word towards the left, i.e. MSB to CF and
CF to LSB.
String Instructions
String is a group of bytes/words and their memory is always allocated in a
sequential order.
Following is the list of instructions under this group −
 REP − Used to repeat the given instruction till CX ≠ 0.
 REPE/REPZ − Used to repeat the given instruction until CX = 0 or zero flag
ZF = 1.
 REPNE/REPNZ − Used to repeat the given instruction until CX = 0 or zero
flag ZF = 1.
 MOVS/MOVSB/MOVSW − Used to move the byte/word from one string to
another.
 COMS/COMPSB/COMPSW − Used to compare two string bytes/words.
 INS/INSB/INSW − Used as an input string/byte/word from the I/O port to the
provided memory location.
 OUTS/OUTSB/OUTSW − Used as an output string/byte/word from the
provided memory location to the I/O port.
 SCAS/SCASB/SCASW − Used to scan a string and compare its byte with a
byte in AL or string word with a word in AX.
 LODS/LODSB/LODSW − Used to store the string byte into AL or string word
into AX.
Program Execution Transfer Instructions (Branch and Loop
Instructions)
These instructions are used to transfer/branch the instructions during an execution.
It includes the following instructions −
Instructions to transfer the instruction during an execution without any condition −
 CALL − Used to call a procedure and save their return address to the stack.
 RET − Used to return from the procedure to the main program.
 JMP − Used to jump to the provided address to proceed to the next
instruction.
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Instructions to transfer the instruction during an execution with some conditions −
 JA/JNBE − Used to jump if above/not below/equal instruction satisfies.
 JAE/JNB − Used to jump if above/not below instruction satisfies.
 JBE/JNA − Used to jump if below/equal/ not above instruction satisfies.
 JC − Used to jump if carry flag CF = 1
 JE/JZ − Used to jump if equal/zero flag ZF = 1
 JG/JNLE − Used to jump if greater/not less than/equal instruction satisfies.
 JGE/JNL − Used to jump if greater than/equal/not less than instruction
satisfies.
 JL/JNGE − Used to jump if less than/not greater than/equal instruction
satisfies.
 JLE/JNG − Used to jump if less than/equal/if not greater than instruction
satisfies.
 JNC − Used to jump if no carry flag (CF = 0)
 JNE/JNZ − Used to jump if not equal/zero flag ZF = 0
 JNO − Used to jump if no overflow flag OF = 0
 JNP/JPO − Used to jump if not parity/parity odd PF = 0
 JNS − Used to jump if not sign SF = 0
 JO − Used to jump if overflow flag OF = 1
 JP/JPE − Used to jump if parity/parity even PF = 1
 JS − Used to jump if sign flag SF = 1
Processor Control Instructions
These instructions are used to control the processor action by setting/resetting the
flag values.
Following are the instructions under this group −
 STC − Used to set carry flag CF to 1
 CLC − Used to clear/reset carry flag CF to 0
 CMC − Used to put complement at the state of carry flag CF.
 STD − Used to set the direction flag DF to 1
 CLD − Used to clear/reset the direction flag DF to 0
 STI − Used to set the interrupt enable flag to 1, i.e., enable INTR input.
 CLI − Used to clear the interrupt enable flag to 0, i.e., disable INTR input.
Iteration Control Instructions
These instructions are used to execute the given instructions for number of times.
Following is the list of instructions under this group −
 LOOP − Used to loop a group of instructions until the condition satisfies, i.e.,
CX = 0

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  LOOPE/LOOPZ − Used to loop a group of instructions till it satisfies ZF = 1 &
CX = 0
 LOOPNE/LOOPNZ − Used to loop a group of instructions till it satisfies ZF = 0
& CX = 0
 JCXZ − Used to jump to the provided address if CX = 0
Interrupt Instructions
These instructions are used to call the interrupt during program execution.
 INT − Used to interrupt the program during execution and calling service
specified.
 INTO − Used to interrupt the program during execution if OF = 1
 IRET − Used to return from interrupt service to the main program

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 Microprocessor - 8086 Interrupts
Interrupt is the method of creating a temporary halt during program
execution and allows peripheral devices to access the microprocessor.
The microprocessor responds to that interrupt with an ISR (Interrupt
Service Routine), which is a short program to instruct the
microprocessor on how to handle the interrupt.
The following image shows the types of interrupts we have in a 8086
microprocessor −

Hardware Interrupts
Hardware interrupt is caused by any peripheral device by sending a
signal through a specified pin to the microprocessor.
The 8086 has two hardware interrupt pins, i.e. NMI and INTR. NMI is a
non-maskable interrupt and INTR is a maskable interrupt having lower
priority. One more interrupt pin associated is INTA called interrupt
acknowledge.
NMI
It is a single non-maskable interrupt pin (NMI) having higher priority
than the maskable interrupt request pin (INTR)and it is of type 2
interrupt.
When this interrupt is activated, these actions take place −
 Completes the current instruction that is in progress.
 Pushes the Flag register values on to the stack.
 Pushes the CS (code segment) value and IP (instruction pointer)
value of the return address on to the stack.
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  IP is loaded from the contents of the word location 00008H.
 CS is loaded from the contents of the next word location 0000AH.
 Interrupt flag and trap flag are reset to 0.
INTR
The INTR is a maskable interrupt because the microprocessor will be
interrupted only if interrupts are enabled using set interrupt flag
instruction. It should not be enabled using clear interrupt Flag
instruction.
The INTR interrupt is activated by an I/O port. If the interrupt is enabled
and NMI is disabled, then the microprocessor first completes the current
execution and sends ‘0’ on INTA pin twice. The first ‘0’ means INTA
informs the external device to get ready and during the second ‘0’ the
microprocessor receives the 8 bit, say X, from the programmable
interrupt controller.
These actions are taken by the microprocessor −
 First completes the current instruction.
 Activates INTA output and receives the interrupt type, say X.
 Flag register value, CS value of the return address and IP value of
the return address are pushed on to the stack.
 IP value is loaded from the contents of word location X × 4
 CS is loaded from the contents of the next word location.
 Interrupt flag and trap flag is reset to 0

Software Interrupts
Some instructions are inserted at the desired position into the program
to create interrupts. These interrupt instructions can be used to test the
working of various interrupt handlers. It includes −

INT- Interrupt instruction with type number

It is 2-byte instruction. First byte provides the op-code and the second
byte provides the interrupt type number. There are 256 interrupt types
under this group.
Its execution includes the following steps −
 Flag register value is pushed on to the stack.
 CS value of the return address and IP value of the return address
are pushed on to the stack.
 IP is loaded from the contents of the word location ‘type number’ ×
4
 CS is loaded from the contents of the next word location.
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  Interrupt Flag and Trap Flag are reset to 0
The starting address for type0 interrupt is 000000H, for type1 interrupt
is 00004H similarly for type2 is 00008H and ……so on. The first five
pointers are dedicated interrupt pointers. i.e. −
 TYPE 0 interrupt represents division by zero situation.
 TYPE 1 interrupt represents single-step execution during the
debugging of a program.
 TYPE 2 interrupt represents non-maskable NMI interrupt.
 TYPE 3 interrupt represents break-point interrupt.
 TYPE 4 interrupt represents overflow interrupt.
The interrupts from Type 5 to Type 31 are reserved for other advanced
microprocessors, and interrupts from 32 to Type 255 are available for
hardware and software interrupts.

INT 3-Break Point Interrupt Instruction

It is a 1-byte instruction having op-code is CCH. These instructions are
inserted into the program so that when the processor reaches there,
then it stops the normal execution of program and follows the break-
point procedure.
Its execution includes the following steps −
 Flag register value is pushed on to the stack.
 CS value of the return address and IP value of the return address
are pushed on to the stack.
 IP is loaded from the contents of the word location 3×4 = 0000CH
 CS is loaded from the contents of the next word location.
 Interrupt Flag and Trap Flag are reset to 0

INTO - Interrupt on overflow instruction

It is a 1-byte instruction and their mnemonic INTO. The op-code for this
instruction is CEH. As the name suggests it is a conditional interrupt
instruction, i.e. it is active only when the overflow flag is set to 1 and
branches to the interrupt handler whose interrupt type number is 4. If
the overflow flag is reset then, the execution continues to the next
instruction.
Its execution includes the following steps −
 Flag register values are pushed on to the stack.
 CS value of the return address and IP value of the return address
are pushed on to the stack.
 IP is loaded from the contents of word location 4×4 = 00010H
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 CS is loaded from the contents of the next word location.
 Interrupt flag and Trap flag are reset to 0

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 Microprocessor - 8086 Addressing Modes
The different ways in which a source operand is denoted in an instruction
is known as addressing modes. There are 8 different addressing
modes in 8086 programming −

Immediate addressing mode

The addressing mode in which the data operand is a part of the
instruction itself is known as immediate addressing mode .
Example
MOV CX, 4929 H, ADD AX, 2387 H, MOV AL, FFH

Register addressing mode

It means that the register is the source of an operand for an instruction.
Example
MOV CX, AX ; copies the contents of the 16-bit AX register into
; the 16-bit CX register),
ADD BX, AX

Direct addressing mode

The addressing mode in which the effective address of the memory
location is written directly in the instruction .
Example
MOV AX, [1592H], MOV AL, [0300H]

Register indirect addressing mode

This addressing mode allows data to be addressed at any memory
location through an offset address held in any of the following registers:
BP, BX, DI & SI.
Example
MOV AX, [BX] ; Suppose the register BX contains 4895H, then the contents
; 4895H are moved to AX
ADD CX, {BX}

Based addressing mode

In this addressing mode, the offset address of the operand is given by
the sum of contents of the BX/BP registers and 8-bit/16-bit
displacement.
Example
MOV DX, [BX+04], ADD CL, [BX+08]

Indexed addressing mode

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In this addressing mode, the operands offset address is found by adding
the contents of SI or DI register and 8-bit/16-bit displacements .
Example
MOV BX, [SI+16], ADD AL, [DI+16]

Based-index addressing mode

In this addressing mode, the offset address of the operand is computed
by summing the base register to the contents of an Index register.
Example
ADD CX, [AX+SI], MOV AX, [AX+DI]

Based indexed with displacement mode

In this addressing mode, the operands offset is computed by adding the
base register contents. An Index registers contents and 8 or 16-bit
displacement.
Example
MOV AX, [BX+DI+08], ADD CX, [BX+SI+16]

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 Bibliography
Reference of books
1. Introduction to Microprocessors and Microcontrollers-By
John Crisp
2. Microprocessor interfacing and applications- By Rena
SINGH and B.P. SINGH
3. Advanced microprocessors and Peripherals- By AKRAY
and K.M. BHURCHANDI
4. Microprocessor and its applications-By
R.THEAGARAJAN and S.DHANAPAL and
S.DHANASEKARAN
5. Fundamentals of microprocessors and its Applications –
By ANOKH SINGH AND A.K.CHHABRA

Reference of web pages

www.google.com
www.wikipedia.com
www.electrosome.com
www.nptel.ac.in
www.tutorialspoint.com
www.gradeup.com

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