SSM 2120 Nivel Detector dn126
SSM 2120 Nivel Detector dn126
SSM 2120 Nivel Detector dn126
Replacing the
SSM2120 Level Detector
The circuits within this application note feature THAT218x to provide the essential
function of voltage-controlled amplifier (VCA) and THAT 2252 as an rms-level detector
(RMS). Since writing this note, THAT has introduced a new dual VCA, as well as several
Analog Engines®. Analog Engines combine a VCA and am RMS with optional opamps in one
part. With minor modifications, these newer ICs are generally applicable to the designs
shown herein, and may offer advantages in performance, cost, power consumption, etc.,
depending on the design requirements. We encourage readers to consider the following
alternatives in addition to the 218x and 2252:
Introduction
In the course of providing applications support for our VCAs, we’ve noticed that a signifi-
cant number of designers have used our VCAs in conjunction with the dual level-detectors
available in the SSM 2120 (having disabled the SSM 2120’s VCAs). Since the 2120 has been
discontinued, users need an alternative to this device.
The detectors employed in the SSM 2120 function in a manner somewhat similar to THAT
Corporation’s RMS detectors. Like the THAT 2252, an SSM 2120 detector input is held at a
virtual ground by a feedback servo (but offset from the IC’s ground pin by two volts), and the
subsequent stage rectifies a replica of the feedback current which is then shunted through a
logging transistor whose emitter is connected to the IC’s ground. Another transistor acts
as both a buffer and a log filter diode (See the THAT 2252 datasheet for a more in-depth
discussion of log filtering). Additionally, since the log-rectified signal is only a single diode
drop above ground after logging, the log filter diode also acts to “buck out” this logging
diode’s offset and make the signal properly referenced to ground. Since the log filter diode
operates at a fixed current and the logging transistor operates at a signal dependent
current, the output has a temperature coefficient that is proportional to absolute tempera-
ture (as a result of the VT term in the diode equation), just like the THAT 2252. A signifi-
cant difference between the SSM 2120 and the THAT 2252 is that the SSM 2120 has an
open emitter output buffer. This feature allows the output to act as a threshold diode when
the circuit is configured as a gate (below-threshold downward expander) but, on the other
hand, complicates the implementation of an above-threshold compressor.
The remainder of this Design Note describes circuitry for using the THAT 2252 in place of
the SSM2120 in two common applications — a downward expander and a hard-knee
compressor/limiter.
The downward expander and noise gate
Figure 1 shows the SSM 2120 configured as a downward expander, a device commonly
known as a “gate”. The circuit shown is in many ways similar to the application circuit shown
in the SSM 2120 datasheet, but has been modified to have an op-amp based control port
buffer which is more appropriate for driving the control port of one of THAT Corporation’s
VCAs.
The value of R2 is 1.5 MΩ which, with ±15 V supplies, programs the timing current (IRef in
the SSM 2120 datasheet) to the recommended 10 μA. We have chosen C1, the timing capaci-
tor, to be 2 μF, a value which results in a release (decrementation) rate of over 1665 dB/s at
the timing capacitor.
The SSM 2120, like THAT Corporation’s RMS detectors, has what we refer to as a “zero
dB reference current”, defined as the particular input current which results in zero volts at
the output of the detector. In the SSM 2120, this current is equal to the timing current. We
can translate this to voltage by the appropriate choice of resistor. We have chosen 245 mV,
or -10 dBu, as our zero dB reference voltage. Thus,
0.245
R In = 10 A { 24.3 k
As previously mentioned, the open emitter output of the SSM 2120 acts as a threshold
diode when the IC is configured as a downward expander. ConOut begins to sink current when
the voltage on the filter capacitor (which is the voltage on the positive input of the output
buffer) drops below that on the inverting input of this buffer. By adding a DC offset to this
C5
+15 22p
R10
2
4 20k
EC+ 7
Input C4 R8 SYM
+ 1
IN
V+
OUT
8 2
1 Out
20k GND V- 3
22u
U4 EC- 6 5 U3A
3
VR1 2180C 5532
-10dBu 20k -40dBu R9
-10dBu=0dB ref C3 5k1
R3 -15 100n -15
C2 + R7 160k
22u 1k R6 R4 R5
39k 8k06 4k02
R1 2
1
24k3
Thresh
3
|IIn| V+ ConOut U2A
5532
Log Av
_ _
Rec In
+ +
-2V+ V-
U1
R2 + C1 2120RMS
1M5 2u
-15
point, one can adjust the threshold of the circuit. As shown, the circuit shown provides
30 dB of adjustment range.
Let Req equal the parallel combination of R6 + R4 and R7. Then using the voltage divider
rule,
R eq
V Thresh = 15 V % R eq + R3
and
mV
V Thresh = 30 dB % 3 dB
Substituting yields
R eq
90 mV = 15 V % R eq + R3
and after rearranging,
15 − 0.09
R3 = R eq % 0.09 { 160 k
Since the level detector’s output is zero volts at -10 dBu, the threshold adjustment
range is, therefore, -10 dBu to -40 dBu.
It can be shown (see Extra credit: The mathematics of expanders and compressors at
the end of this document) that the expansion ratio of a feedforward expander is
dB Out
E.R. = dB In =1+
where β is the sidechain gain. In our case, the SSM 2120 threshold amplifier has a gain
of 40, and the control port buffer has a gain of one half. Additionally, there is an implicit
gain of one half that results from the output sensitivity of the detector being 3 mV/dB, and
the VCA control port sensitivity being 6 mV/dB. Thus, the net sidechain gain is 10 for a
resulting expansion ratio of 11:1.
The sidechain gain also affects the effective release rate of the circuit. The initial rate of
1665 dB/s is multiplied by the sidechain gain for a total release rate of 16650 dB/s. Note
that if the designer chooses to make the expansion ratio variable, the release rate becomes
a function of the expansion ratio as well as of the timing current and the value of the timing
capacitor.
Downward expander using a THAT 2252
Figure 2 shows the THAT 2252 configured to mimic the performance of the previous
circuit. The THAT 2252 is capable of both sourcing and sinking current, though its ability to
sink current is limited to 12 times IBias.
In this implementation, the symmetry adjustment is disabled for simplicity, and we have
set IBias to be 16 μA, which results in a maximum sink current of 192 μA. In this
configuration, the THAT 2252 is still capable of driving a 2 kΩ load to -0.3 V, or -50 dB.
R11 programs IBias to 16 μA. We calculate this resistor value using:
|V CC − 2.1|
R11 = 16 A { 820 k
We’ve set the timing current to 10 μA to match the SSM 2120:
−V EE + 1.4
R12 = 10 A = 1.6 M
The zero dB reference current is then calculated:
I Bias % I tim
I ZERO dB = 2.9 = 4.36 A
To make the zero dB reference voltage 245 mVRMS to match the earlier circuit,
0.245 V RMS
R10 = 4.36 A { 56 k
In order to provide 30 dB of threshold adjustment, we calculate the current sensitivity
at the input to the threshold amplifier (U2A):
6 mV
dB 6 mV
dB A
Thresh Sens = R in = 10 k
= 0.6 dB
Thus the current needed for 30 dB of adjustment is
A
I 30 dB = 30 dB % 0.6 dB = 18 A
We have a maximum of 15 volts to generate this current, so
15 V
R14 = 18 A { 820 k
Since the output of the level detector is referenced to -10 dBu, the adjustment range is
-10 dBu to -40 dBu.
C3
+15 22p
U3 R4
2180C 2
4
Input C2 EC+ 7 20k
+ R3 1 SYMV+ 8 2 _ Out
IN OUT 1
V-
22u 20k EC-
GND
5
3
+
VR2 +15 3
6 U4A
50k R2 5532
+15 5k1
R14
820k R15 -15
R1
D3 20k
22M + C7
R16 10u 1N4148 C1
20R 4 -15 C10
C9
8 5
100n
R10 R13 _ 22p
SYM VCC VEE
+ 1 7 2 D4 R17 R18
IN RMS OUT 1
The net gain of the sidechain of this circuit is 10, and since the THAT 2252’s output
sensitivity matches that of the VCA, the resulting expansion ratio is, again, 11:1.
The release rate at C5 is
dV It
dt = C5 = 10 Vs
When multiplied by the gain of the sidechain (which is 10), this becomes 100 V/s and if we
divide by the control port sensitivity, the release rate is
100 Vs
R el Rate = = 16667 dB
s
6 mV
dB
which reasonably approximates the release rate of the SSM 2120 expander under the
same conditions.
In either this or the SSM 2120 based designs, allowing variable expansion ratios results
in correspondingly variable release rate.
The factor of two difference between the timing capacitor of the SSM 2120 detector and
that of the THAT RMS detectors is due to the difference in their output sensitivities
(3 mV/dB for the former, 6 mV/dB for the latter).
The hard-knee compressor / limiter
Compression is another popular application for the SSM 2120 and THAT Corporation’s
products. Figure 3 shows one implementation, adapted from the 2120 datasheet, of an
infinite compressor, or “limiter”. As was mentioned before, the SSM 2120’s output topology
is convenient for implementing gates, but problematic when designing compressors. The
C4
+15 22p
R6
2
4 20k
Input C3 R9
EC+
SYM
7
+ 1
IN
V+
OUT
8 2
1
Out
20k GND V- 3
22u U4 EC- 5
U1B
6
2180C 3
5532
R10
VR1 +15 5k1
50k
-10dBu=0dB ref -15
R11 D2
R3 10k R4 R5
160k
C2 + R8 1N4148 20k 1k
22u R7 D1 2
1
1k 1N4148 3
39k U1A
R1
24k9 5532
Thresh
|Iin| V+ Conout
Log Av
_ _
Rec In
+ +
-2V+ V-
U2
R2 + C1 2120 RMS
1M5 22u
-15
gain of 2, the implicit gain of one-half at the VCAs control port results in a net gain of one,
making this circuit an infinite compressor, or limiter. Further reducing the gain of the
control port buffer (U1A) would result in lower compression ratios.
The hard-knee compressor / limiter using the THAT 2252
Figure 4 shows the sidechain of a hard-knee compressor / limiter based on the THAT
2252. The RMS detector in this circuit is configured nearly identically with the one in Figure
2, with the exception of the value of the timing capacitor. In this case, we’re using a value of
10 μF, which results in essentially the same 150 dB/s release rate we saw in the SSM 2120
version of the compressor / limiter. As noted before, the difference in capacitor values is a
direct result of the factor of two difference in the two devices’ output scaling constants.
Since the timing current is still 10 μA, the zero dB reference current is unchanged, and
setting R1 to 56 kΩ still results in a zero dB reference level of -10 dBu.
The threshold amplifier in this circuit is identical to the threshold circuit in Figure 2,
except that the diode polarities and the supply polarity on VR1 have been reversed. Reversing
the diodes results in gain changing above the threshold. The reversed voltage polarity on VR1
results in the threshold polarity varying from -10 dBu to 20 dBu.
The net sidechain gain, including the effect of the relative device sensitivities, is one,
making this a limiter. See THAT Corporation’s Design Note DN00A (formerly AN 100A),
Basic Compressor / Limiter Design, for more insights into soft-knee thresholds and pot
taper shaping when implementing variable compression.
C2
+15 22p
2
R12
4
Input C5 EC+ 7 20k
+ R13 1 SYM
V+ 8 2 _ Out
IN OUT 1
20k GNDV- 3
+
22u EC- 5
VR1 U4 3
6 U3A
100k 2180C R14 5532
5k1
R15 -15 R3
810k R6 -15
+15 22M
20k
D1
R8
C3 + 1N4148
20R 4 8 5 -15 10u
C6 R1 SYM VCC VEE
R2
+ 1 7 2
_ 1 D2 R7 R9
IN RMS OUT
22u 56k U1 BIAS GND CAP 2252 10k 3
+ 20k
2 3 6 1N4148 10k
U2A 6 _ 7
+ C1 5532 5
+
R4 +C4 R5 10u U2B
820k 1u 1M6
5532
-15 -15