Clippers Experiment
Clippers Experiment
Clippers Experiment
(SELECT)
Lab Manual
of
for
LIST OF EXPERIMENTS
2. Diode Applications - Half Wave and Full Wave rectifier with and
without filter
configuration
8. Astable Multivibrator
9. Schmitt Trigger
APPENDIX
B. Breadboard Tutorial
SIMULATION USING PSPICE
1. Open Orcad-capture.
2. Go to File tab and click on "New project" and give an approriate name.
3. Select "Analog or Mixed A/D". Select the Location where you want to save your files.
4. Connect the circuits as per the circuit diagram given in Experiment from the parts
library and save the schematic. Do not connect measuring instruments in the Orcad-
Pspice schematic.
5. Go to Pspice in the menu and select new simulation profile and give appropriate
simulation name and click on create. Simulation settings window will be displayed.
6. Select the appropriate analysis type and set the variables accordingly.
7. Run the simulation using F11 or run command in the PSPICE menu.
AIM:
APPARATUS REQUIRED:
3. Resistor 1kΩ 1
(0-100mA)MC,
4. Ammeters 1
(0-250μA)MC
(0-1V) MC,
5. Voltmeter 1
(0-10V)MC
6. Breadboard 1
CIRCUIT DIAGRAM:
MODEL GRAPH:
PROCEDURE:
Forward biasing:
1. Connections are made as per the circuit diagram.
2. The supply voltage is increased gradually and readings of the
voltage drop across the diode and the diode current are noted from
voltmeter and ammeter.
3. Draw the graph between the voltage across the diode and the
current flowing through the diode.
Reverse biasing:
S.No V I S.No V I
RESULT:
Thus the VI characteristics of the forward and reverse biased PN junction diode
were studied.
EXPERIMENT NO.1.b
V - I CHARACTERISTICS OF A ZENER DIODE
AIM:
APPARATUS REQUIRED:
3. Resistor 1kΩ 1
(0-50mA)MC,
4. Ammeters 1
(0-1V) MC,
5. Voltmeter 1
(0-10V)MC
6. Breadboard 1
CIRCUIT DIAGRAM:
Forward biasing:
1. Connections are made as per the circuit diagram.
1. The supply voltage is increased gradually and readings of the
voltage drop across the diode and the diode current are noted from
voltmeter and ammeter.
2. Draw the graph between the voltage across the diode and the
current flowing through the diode.
Reverse biasing:
S.No V I S.No V I
RESULT:
Thus the VI characteristics of the forward and reverse biased zener diode were
studied.
EXPERIMENT NO.2
AIM:
To rectify the given input AC signal and to visualize the output waveform in a
CRO for Half wave and Full wave rectifier with and without filters and to calculate the
ripple factor.
APPARATUS REQUIRED:
2. Resistor 1kΩ 1
3. Transformer 230/12V 1
5. Breadboard 1
6. CRO 1
FORMULAE:
Half Wave Rectifier(without filter) Full Wave Rectifier (without filter)
Result:
Thus the working of the half wave rectifier and full wave bridge rectifier with and
without filter was studied.
EXPERIMENT NO.3
AIM:
To study the diode clipper and voltage doubler circuits and observe waveforms at
the output.
APPARATUS REQUIRED:
2. Resistor 1kΩ 1
3. Transformer 230/12V 1
5. Breadboard 1
6. CRO 1
CIRCUIT DIAGRAMS:
Combination Clipper
Voltage Doubler
Model Graph:
Input Voltage
Output voltage
Positive clipper Negative clipper
Combination clipper Voltage doubler
Procedure:
Result:
Thus, the working of the Clipper and Voltage Doubler Circuit was studied.
EXPERIMENT NO.4
AIM:
APPARATUS REQUIRED:
FORMULAE:
(0-50) µA (0-50) mA
68KΩ 1KΩ
E C
_ _
+ +
A A
+
+
+ B
(0-30)V (0-30)V
RPS V V DC
RPS
+
(0-2)V (0-30)V
DC MC
Base Diagram:
C
Model Graphs:
Input Characteristics
IE
( mA) VCB2 VCB1
VCB2 >VCB1
VBE
Output Characteristics
IC
(mA) IE3> IE3> IE3
Saturation
region
IE3
Active region
IE2
IE1
Cut off region
VEB
PROCEDURE:
Input Characteristics:
1. Connections are made as per the circuit diagram.
2. The collector-base voltage is kept constant
3. The base-emitter voltage is varied and corresponding readings of
the emitter current are noted.
Output Characteristics:
OBSERVATION:
Table 1
Input Characteristics
VCB1(v) VCB2(v)
S.no.
VEB (v) IE (mA) VEB (v) IE (mA)
Table 2
Output Characteristics
Result:
AIM:
To design and construct a common emitter amplifier and to draw the frequency
response characteristics and to obtain the bandwidth.
APPARATUS REQUIRED:
FORMULAE:
4. VB = VBE+IERE
Where-
VB–Base voltage
RE–Emitter Resistance
VBE–Base to emitter voltage
5. R1 = (VCC RB) / VB
6. R2 = (VCC RB) / (VCC_- VB)
7. XCE << RE , XCE = RE / 10
8. XCC >> Ri , XCC = Ri / 10
9. AV =VO/Vi
Where-
AV –Voltage Gain
Vo-output voltage
Vi-input voltage
CIRCUIT DIAGRAM:
BASE DIAGRAM:
MODEL GRAPH:
PROCEDURE:
1. The circuit is designed and connections are made as per the circuit
diagram.
2. Using the function Generator the input voltage and frequency are
set to a suitable value.
3. The frequency of the signal is increased and the output waveform
is obtained.
4. The output voltage is measured for various frequencies.
5. Gain in dB is calculated and Band Width is obtained from the
frequency response characteristics.
OBSERVATION:
Table
RESULT:
Thus, the frequency response characteristic of common emitter amplifier is drawn
and the bandwidth is obtained.
EXPERIMENT NO.6
AIM:
APPARATUS REQUIRED:
FORMULAE:
3. μ = rD x gM
(0-30) mA
1KΩ
BFW10
D
+ +
G V
+ + S
(0-30)V (0-30)V
DC V (0-30)V DC
RPS MC RPS
(0-30)V
MC
BASE DIAGRAM:
shield D
G
MODEL GRAPH:
TransferCharacteristics
ID
(mA)
VDS1
VDS2
VGS
VP
Drain Characteristics
VDS
PROCEDURE:
Drain Characteristics
Transfer Characteristics
OBSERVATION:
Table 1
Drain Characteristics
Table 2
Transfer Characteristics
RESULT:
AIM:
To design and construct a Common Source JFET Amplifier and to draw the
frequency response characteristics
APPARATUS REQUIRED:
FORMULAE:
1. AV = [- gm(rd // Rd)]
Where-AV –Voltage Gain
gm- trans conductance
// -parallel connection
2. Zi = (R1 // R2) , // -parallel connection
3. Zi = (rd // Rd) // -parallel connection
4. cc = [10/(2πfL Zi)]
5. cs = [10/(2πfL Zo)]
6. AV =VO/Vi
Where-AV –Voltage Gain
Vo-output voltage
Vi-input voltage
7. Gain = 20 log 10(AV)
8. 3db line calculation = 20 log(Av(max)*√2/2)
CIRCUIT DIAGRAM:
BASE DIAGRAM:
MODEL GRAPH:
PROCEDURE:
1. The circuit is designed using design data and connections are made as per the
circuit diagram.
2. Using the function Generator the input voltage and frequency are set to a suitable
value.
3. The frequency of the signal is increased and the output waveform is obtained.
4. The output voltage is measured for various frequencies.
5. Gain in dB is calculated and the frequency response characteristics is plotted.
OBSERVATION:
Table 1
RESULT:
ASTABLE MULTIVIBRATOR
AIM:
APPARATUS REQUIRED:
FORMULAE:
5. Ttot = (1 / f)
Where-
Ttot –Total On time of transistor
f–frequency
6. TON = (Ttot / 2)
Where-
TON–On time of transistor
7. C1 = C2 =[TON / (0.693RB1)]
MODEL GRAPH:
PROCEDURE:
1. The circuit is designed using design data and connections are made as per the
circuit diagram.
2. The power supply is switched ON.
3. The Waveforms of VCE1, VCE2, VBE1, VBE2 are obtained from CRO.
4. Graphs are plotted.
OBSERVATION:
Table
1. VCE1
2. VCE2
3. VBE1(max)
4. VBE1(min)
5. VBE2(max)
6. VBE2(min)
7. TON
8. TOFF
9. Ttot
10. f
RESULT:
SCHMITT TRIGGER
AIM:
To design and construct a Schmitt Trigger and to study its output characteristics.
APPARATUS REQUIRED:
FORMULAE:
1. VB2 = UTL
Where-
UTL-Upper trigger Level
VB2 –Base Voltage of transistor2
2. VE = VB2 - VBE
Where-
VE –Emitter Voltage
VBE –Base to Emitter Voltage
3. IE = IC
Where-
IE –Emitter current -
IC –Collector current
4. RE = (VE / IE)
Where-
RE–Emitter Resistance
IE –Emitter current
7. R2 = (VB2 / I2)
1. I1 = (VB2 / R2 )
Where-
I1–current through transistor 1
4. T = 1/ f
Where-
T – Total time
f – frequency
6. C =( T/ 2.3 R)
Where -
C-Capacitance
CIRCUIT DIAGRAM: BASE DIAGRAM:
MODEL GRAPH:
PROCEDURE:
1. The circuit is designed using design data and connections are made
as per the circuit diagram.
2. The power supply is switched ON.
3. Using Function Generator both Sinusoidal and Triangular signals
are supplied.
4. The Output and Input Waveforms are obtained from CRO.
5. Graphs are plotted.
OBSERVATION:
Table
1. Vi
2. VO= VCC
3. VCC - ICRC
4. UTL
5. LTL
6. T
RESULT:
Resistor values are always coded in ohms. Band A is first significant figure of
component value. Band B is the second significant figure. Band C is the decimal
multiplier. Band D if present, indicates tolerance of value in percent (no color means
20%).The standard color code per EN 60062:2005 is as follows:
Temp.
Significant
Color Multiplier Tolerance Coefficient
figures
(ppm/K)
Black 0 ×100 – 250 U
1
Brown 1 ×10 ±1% F 100 S
2
Red 2 ×10 ±2% G 50 R
Orange 3 ×103 – 15 P
Yellow 4 ×104 – 25 Q
Green 5 ×105 ±0.5% D 20 Z
Blue 6 ×106 ±0.25% C 10 Z
Violet 7 ×107 ±0.1% B 5 M
8
Gray 8 ×10 ±0.05% A 1 K
9
White 9 ×10 – –
-1
Gold – ×10 ±5% J –
-2
Silver – ×10 ±10% K –
None – – ±20% M –
1. Any temperature coefficent not assigned its own letter shall be markd "Z", and the
coefficient found in other documentation.
2. For more information, see EN 60062.
For example, a resistor with bands of yellow, violet, red, and gold will have first
digit 4 (yellow in table below), second digit 7 (violet), followed by 2 (red) zeros:
4,700 ohms. Gold signifies that the tolerance is ±5%, so the real resistance could lie
anywhere between 4,465 and 4,935 ohms.
Tight tolerance resistors may have three bands for significant figures rather than
two, and/or an additional band indicating temperature coefficient, in units of ppm/K.
All coded components will have at least two value bands and a multiplier; other bands are
optional.
As an example, let us take a resistor which (read left to right) displays the colors
yellow, violet, yellow, brown. We take the first two bands as the value, giving us 4, 7.
Then the third band, another yellow, gives us the multiplier 104. Our total value is then 47
x 104 Ω, totalling 470,000 Ω or 470 kΩ. Our brown is then a tolerance of ±1%.
APPENDIX - B
BREADBOARD TUTORIAL
The bread board has many strips of metal (copper usually) which run underneath the
board. The metal strips are laid out as shown below.
These strips connect the holes on the top of the board. This makes it easy to
connect components together to build circuits. To use the bread board, the legs of
components are placed in the holes (the sockets). The holes are made so that they will
hold the component in place. Each hole is connected to one of the metal strips running
underneath the board. Each wire forms a node. A node is a point in a circuit where two
components are connected. Connections between different components are formed by
putting their legs in a common node.
On the bread board, a node is the row of holes that are connected by the strip of
metal underneath. The long top and bottom row of holes are usually used for power
supply connections. The rest of the circuit is built by placing components and connecting
them together with jumper wires.
Then when a path is formed by wires and components from the positive supply
node to the negative supply node, we can turn on the power and current flows through the
path and the circuit comes alive. For chips with many legs (ICs), place them in the middle
of the board so that half of the legs are on one side of the middle line and half are on the
other side.
When putting parts on breadboard you must concentrate on their connections, not
their positions on the circuit diagram. The IC (chip) is a good starting point so place it in
the centre of the breadboard and work round it pin by pin, putting in all the connections
and components for each pin in turn.
The best way to explain this is by example, so the process of building this 555
timer circuit on breadboard is listed step-by-step below. The circuit will turn on the LED
for about 5 seconds when the 'trigger' button is pressed. The time period is determined by
R1 and C1 and you may wish to try changing their values. R1 should be in the range 1k
to 1M . Time Period, T = 1.1 × R1 × C1
IC pin numbers
IC pins are numbered anti-clockwise around the IC starting near the notch or dot.
The diagram shows the numbering for 8-pin and 14-pin ICs, but the principle is the same
for all sizes.
Building the example circuit
Begin by carefully insert the 555 IC in the centre of the breadboard with its notch
or dot to the left.
Circuit on Breadboard
Finally,
If your circuit does not work disconnect (or switch off) the power supply and very
carefully re-check every connection against the circuit diagram.