Tidue 64

TI Designs: TIDM-01000
4- to 20-mA Loop-Powered RTD Temperature Transmitter

Reference Design With MSP430 Smart Analog Combo
Description Features
This TI reference design provides a low-component • Sensor Input Compatible With 2-, 3-, or 4-Wire
count, low-cost solution for 4- to 20-mA, loop-powered, RTD Probes
resistance-temperature detector (RTD), temperature • Temperature Range for RTD: –200°C to +850°C
transmitter. The design takes advantage of the on-chip • Maximum Measured Error: <1°C
Smart Analog Combo (SAC) module in the
MSP430FR2355 MCU to control the loop current, so • IEC61000-4-2: ESD: Air Discharge: ±8 kV Class A
that the standalone DAC is no longer required. This • Small Form Factor (L × W): 60 mm × 8 mm
design achieves a 12-bit output resolution. The output • Operating Temperature Range: –40°C to +105°C
current resolution is 6 µA. The design incorporates
reverse-polarity protection as well as IEC61000-4-2 Applications
and IEC61000-4-4 protection on the loop-power input.
• Factory Automation and Process Control
TI reference designs provide the required foundation, • Sensors and Field Transmitters
including methodology, testing, and design files, to let
designers quickly evaluate and customize a system. TI • Building Automation
reference designs also help accelerate time to market. • Test and Measurement
Resources
TIDM-01000 Design Folder

MSP430FR2355 Product Folder
ADS1120 Product Folder
TPS7A16 Product Folder
ASK Our E2E™ Experts
5 µA VIN Loop +
TPS7A1601
3.3 V LDO
3.3 V
IDEVICE = IADC + IDAC1 + IDAC2 + Loop

915 µA = 415 µA + 250 µA + 250 µA 142 µA / 1 MHz Supply
0-25 mA Loop ±
RTD
Excitation
Current
SAC
ADS1120 SPI
RTD 16-Bit -û ADC USCI_A1
VRTD
Loop
MSP430FR2355 Receiver
16-Bit MCU
Loop -
An IMPORTANT NOTICE at the end of this TI reference design addresses authorized use, intellectual property matters and other
important disclaimers and information.
TIDUE64 – May 2018 4- to 20-mA Loop-Powered RTD Temperature Transmitter Reference Design 1
Submit Documentation Feedback With MSP430 Smart Analog Combo
Copyright © 2018, Texas Instruments Incorporated
System Description www.ti.com
1 System Description
A 4- to 20-mA current loop is standard for transmitting remote-sensor information to programmable logic
controllers (PLCs) over long distances in industrial process-monitoring, control, and automation
applications. Figure 1 shows a typical RTD temperature-measurement transmitter for a 2-wire, 4- to 20-
mA, current-loop system, which consists of four major blocks.
• Analog-to-digital converter (ADC): For RTD-sensor measurement, this is typically a low-power, low-
noise, delta-sigma ADC with an internal PGA and programmable current source.
• Digital-to-analog converter (DAC): Output for the current-loop control, this is typically a low-power DAC
with an integrated operational amplifier.
• Microcontroller (MCU): Controls the whole system operation including data processing and calibration
algorithm.
• Low dropout regulator (LDO): Transmitter power supply.
Power
RTD
4 ~ 20 mA
ADC DAC
MCU Current Loop
Figure 1. Typical Block Diagram of RTD Temperature Transmitter
The MSP430FR2355 device is an ultra-low-power, mixed-signal MCU from TI, with on-chip smart analog
combo (SAC) modules that makes it possible to move the DAC block into an MCU. Leveraging the
integrated peripherals of the MSP430FR2355 device enables a low-component count and low cost
solution for the user. The MSP430FR2355 device also helps to reduce the PCB size and facilitates the
layout. Figure 2 shows the improved system block diagram based on the MSP430FR2355 MCU.
Power
RTD
ADC SAC 4 ~ 20 mA
Current Loop
MSP430FR2355
Figure 2. Block Diagram of RTD Temperature Transmitter Based on MSP430FR2355
This reference design provides a low-power consumption, low-cost, RTD temperature transmitter solution
achieving a 12-bit output resolution with the integrated smart analog combo (SAC) module. The output-
current resolution is 6 µA. The design also incorporates reverse-polarity protection capability as well as
IEC61000-4-2 and IEC61000-4-4 protection on the loop power input.
All the relevant design files such as the schematics, bill of materials (BOM), layer plots, Altium Designer
files, Gerber files, and MSP430 MCU software are provided.
2 4- to 20-mA Loop-Powered RTD Temperature Transmitter Reference Design TIDUE64 – May 2018
With MSP430 Smart Analog Combo Submit Documentation Feedback
www.ti.com System Description
1.1 Key System Specifications
Table 1. Key System Specifications

PARAMETER SPECIFICATION
2-, 3-, and 4-wire RTD probes
Sensor type
Firmware supports PT100 RTD by default.
Output signal 4 mA to 20 mA
Temperature range for RTD –200°C to +850°C
Power-supply voltage range on loop-interface
10-V to 36-V DC
terminals
Supply current consumption < 1.6 mA (to power all the functional blocks of the transmitter)
Reverse polarity on input power Supported
Output current resolution 6 µA
Power supply influence Deviation of 0.24 µA from 10 V to 36 V
System accuracy or maximum measured error Better than 1°C (–200°C to +850°C temperature range)
Calibration Offset and gain calibration for ADC and SAC
IEC61000-4-2 ESD Air discharge: ±8 kV (Class A)
–200°C to +850°C look-up table, with 1°C resolution implemented in the
RTD temperature linearization MSP430 firmware, to resolve nonlinearity of RTD or the Callendar-Van Dusen
relationship between resistance and temperature
Two-pin TH connector for loop interface
Interface connector Four-pin SMD connector for external RTD sensor probe
Four-pin SMD connector for Spy-bi-wire debug interface
Operation temperature –40°C to +105°C
Form factor (L × W) 60 mm × 8 mm
System Overview www.ti.com
2 System Overview
2.1 Block Diagram

Figure 3 shows a detailed block diagram of the 2-wire, 4- to 20-mA current-loop, RTD temperature
transmitter. This reference design consists of three blocks. The selected three integrated circuits complete
the transmitter signal chain. The ADC from TI (ADS1220) interfaces with a 2-wire, 3-wire, or 4-wire RTD
probe. The MSP430FR2355 MCU runs the application firmware, including the algorithms for system
calibration and data process. The output is controlled by an on-chip SAC module in the MSP430FR2355
device and delivers a 4- to 20-mA output current proportional to the RTD temperature reading. The LDO
(TPS7A16) supplies the system with loop power. The TPS7A16 device has an input-voltage range of 3 V
to 60 V, ultra-low quiescent current (5 µA), and high thermal-performance packaging.
To conform to the 4- to 20-mA communication standards, the complete transmitter must consume less
than 3.3 mA of current.
5 µA VIN Loop +
TPS7A1601
3.3 V LDO
3.3 V
IDEVICE = IADC + IDAC1 + IDAC2 + Loop

915 µA = 415 µA + 250 µA + 250 µA 142 µA / 1 MHz Supply
0-25 mA Loop ±
RTD
Excitation
Current
SAC
ADS1120 SPI
RTD 16-Bit -û ADC USCI_A1
VRTD
Loop
MSP430FR2355 Receiver
16-Bit MCU
Loop -
Figure 3. TIDM-01000 Block Diagram
2.2 Highlighted Products

This RTD temperature-transmitter reference design features the following devices:
• MSP430FR2355 – Ferroelectric RAM (FRAM)-based, mixed-signal, MSP430™ MCU
• ADS1120 – Low-power, low-noise, 16-bit, ADC
• TPS7A1633 – 3-V to 60-V input, ultra-low quiescent current, 100-mA, low-dropout (LDO) linear
regulator
For more information on each of these devices, see their respective product folders at www.ti.com.
www.ti.com System Overview
2.2.1 MSP430FR2355
The MSP430FR2355 FRAM MCU features a powerful 16-bit, RISC CPU, 16-bit registers, and a constant
generator that contribute to maximum code efficiency. The digitally-controlled oscillator (DCO) lets the
device wake up from low-power mode and go to active mode in typically less than 10 µs. The feature set
of this microcontroller is designed for applications such as smoke detectors, industry transmitters, and
portable health and fitness accessories.
In this design, an on-chip eUSCI module interfaces with the ADC1120. On-chip, 32KB-FRAM memory
stores the application software, RTD loop table, and calibration data. The 16-bit, RISC architecture
enables functions like arithmetic algorithms, gain and offset calibration routines, sensor linearization using
look-up tables, and scaling ADC output to DAC input code. Two on-chip SAC modules control the current
loop output. From a layout and routing perspective, the QFN40 package is a good choice when size does
not exceed 6 mm, to fit an 8-mm wide PCB.
Figure 4 shows the MSP430FR2355 block diagram.
P1.x/P2.x P3.x/P4.x P5.x/P6.x
XIN XOUT
Cap Touch I/O

DVCC SAC0, SAC1, eCOMP0
Power HF/LF ADC I/O Ports I/O Ports
SAC2, SAC3 eCOMP1 I/O Ports
DVSS Management XT1 FRAM RAM P1/P2 P3/P4
ROM P5/P6
Module Up to 12-ch 2x8 IOs 2x8 IOs
Configurable Enhanced 1x5 IOs
RST/NMI 24 MHz 32 KB + 512 B 4 KB Single-end
24 KB OA, PGA, 12- Comparator Interrupt and Interrupt and
Clock 16 KB + 512 B 2 KB 12-bit 1x5 IOs
bit DAC with 6-bit Wakeup Wakeup
System 200 ksps PC
Combo DAC PA PB
1x12 IOs
1x16 IOs 1x16 IOs
MAB
24-MHZ
CPU inc.
16 Registers
MDB
EEM
TCK RTC
SYS BAKMEM
TB0 Counter
TMS JTAG Infrared CRC16
MPY32 ICC TB1 TB3 eUSCI_A0
Manchester eUSCI_B0 32 Bytes
TB2 eUSCI_A1 16-bit
TDI/TCLK HART 16-bit eUSCI_B1 Backup
32-bit Interrupt Timer_B Real-Time
Cydic Memory
TDO Hardware Compare Timer_B 7 CC (UART, Clock
Redundancy (SPI, I2C)
Multiplier Controller 3 CC Registers IrDA, SPI)
SBWTCK SBW Check
Registers
SBWTDIO Watchdog
LPM3.5 Domain
Figure 4. MSP430FR2355 Block Diagram
MSP430FR2355 features
• Embedded MCU:
– 16-bit, RISC architecture up to 24 MHz
– Wide supply-voltage range from 1.8 V to 3.6 V
– Active mode: 142 µA/MHz
• Low-power, FRAM:
– Up to 32KB of nonvolatile memory
– Built-in error-correction code (ECC)
– Configurable write protection
– 1015 write-cycle endurance
– Radiation resistant and nonmagnetic
• Intelligent digital peripherals:
– Three 16-bit timers, with three capture and compare registers each (Timer_B3)
– 16-bit timer, with seven capture and compare registers each (Timer_B7)
– 16-bit, counter-only, real-time clock counter (RTC)
– 16-bit cyclic-redundancy checker (CRC)

– Interrupt compare controller (ICC), enables nested hardware interrupt
– 32-bit hardware multiplier (MPY32)
• Enhanced serial communications:
– Two enhanced USCI_A modules (eUSCI_A) support UART, IrDA, and SPI
– Two enhanced USCI_B modules (eUSCI_B) support SPI and I2C
• High-performance analog:
– 12-channel, 12-bit ADC
– Two enhanced comparators (eCOMP)
– Four Smart Analog Combo Modules (SAC-L3)
• Supports general-purpose operational
• Operational amplifier (OA)
• Rail-to-rail input and output
• Multiple input selections
• Configurable high-power and low-power modes
• Configurable programmable gain amplifier (PGA) mode supports
• Built-in, 12-bit reference DAC for offset and bias settings
• 12-bit voltage DAC mode with optional references
• Clock system (CS):
– On-chip, 32-kHz RC oscillator (REFO)
– On-chip, 24-MHz DCO, with frequency locked loop (FLL)
– On-chip, low-frequency, 10-kHz oscillator (VLO)
– On-chip, high-frequency, modulation oscillator (MODOSC)
– External, 32-kHz, crystal oscillator (LFXT)
– External, high-frequency, crystal oscillator up to 24 MHz (HFXT)
– Programmable MCLK prescaler of 1 to 128
– SMCLK derived from MCLK, with programmable prescaler of 1, 2, 4, or 8
• General input/output and pin functionality:
– 44 I/Os on 48-pin package
– 32 interrupt pins (P1, P2, P3, and P4) can wake MCU from low-power modes
– All I/Os are capacitive touch
• Package options:
– 48-pin: LQFP (PT)
– 40-pin: VQFN (RHA)
– 38-pin: TSSOP (DBT)
For complete module descriptions, see the MSP430FR4xx and MSP430FR2xx Family User's Guide.
2.2.2 ADS1120
The ADS1120 is a precision, 16-bit ADC that offers many integrated features, to reduce system cost and
component count in applications measuring small-sensor signals. The device features two differential or
four single-ended inputs through a flexible input multiplexer (MUX), a low-noise PGA, two programmable
excitation-current sources, a voltage reference, an oscillator, a low-side switch, and a precision-
temperature sensor.
The device performs conversions at data rates up to 2000 samples-per-second (SPS), with single-cycle
settling. At 20 SPS, the digital filter offers simultaneous 50-Hz and 60-Hz rejection for noisy industrial
applications. The internal PGA offers gains up to 128 V/V. The PGA makes the ADS1120 designed for
applications measuring small-sensor signals, such as RTDs, thermocouples, thermistors, and resistive
bridge sensors. The device supports measurements of pseudo- or fully-differential signals when using the
PGA. Alternatively, the device is configured to bypass the internal PGA while still providing high-input
impedance and gains up to 4 V/V, which allows for single-ended measurements.
The power consumption is as low as 120 µA when operating in duty-cycle mode, with the PGA disabled. A
mode-1, SPI-compatible interface establishes communication to the device. The ADS1120 device is
offered in a leadless QFN-16 or TSSOP-16 package, specified from –40°C to +125°C. Figure 5 shows the
ADS1120 block diagram.
AVDD REFP0 REFN0 DVDD
50 A to
1.5 mA
Internal Reference
AIN0/REFP1 TI Device
Reference MUX
AIN1 CS
AINP
Digital Filter SCLK
16-Bit and
MUX PGA DIN
û ADC SPI
Interface DOUT/DRDY
AIN2 AINN
DRDY
Precision
Low-Drift
AIN3/REFN1 Temperature
Oscillator
Sensor
AVSS CLK DGND

Figure 5. ADS1120 Block Diagram
ADS1120 features
• Low-current consumption:
– Duty-cycle mode: 120 µA
– Normal mode: 415 µA
• Wide supply range: 2.3 V to 5.5 V
• Programmable gain: 1 V/V to 128 V/V
• Programmable data rates: Up to 2 kSPS
• 16-bit, noise-free resolution at 20 SPS
• Simultaneous 50-Hz and 60-Hz rejection at 20 SPS, with a single-cycle settling digital filter
• Low-noise PGA: 90 nVRMS at 20 SPS
• Dual-matched, programmable current sources: 50 µA to 1.5 mA
• Internal 2.048-V reference: 5 ppm/°C drift (typical)
• Internal oscillator: 2% accuracy

• Internal temperature sensor: 0.5°C accuracy (typical)
• Two differential or four single-ended inputs
• SPI-compatible interface (mode 1)
• 3.5 mm × 3.5 mm × 0.9 mm QFN package
2.2.3 TPS7A16
The TPS7A16 family of devices consists of ultra-low power, LDO, voltage regulators that offer the benefits
of ultra-low quiescent current, high-input voltage, and miniaturized, high-thermal performance packaging.
The TPS7A16 family of devices offers an enable pin (EN) and an integrated, open-drain, active-high,
power-good output (PG) with a user-programmable delay.
The TPS7A16 family of LDOs accepts a maximum input voltage of 60 V, which makes these LDOs
designed for industrial applications where high-voltage transients are present.
Figure 6 shows the TPS7A1601 block diagram.
IN OUT
UVLO Pass
Device
Thermal
Shutdown
Current
Limit
Error
Enable Amp
FB
EN
PG
Power
Good
Control
DELAY
Figure 6. TPS7A16 Block Diagram
TPS7A16 features
• Wide input-voltage range: 3 V to 60 V
• Ultra-low quiescent current: 5 µA
• Quiescent current at shutdown: 1 µA
• Output current: 100 mA
• LDO voltage: 60 mV at 20 mA
• Accuracy: 2%
• Available in:
– Fixed-output voltage: 3.3 V, 5 V
– Adjustable version from 1.2 V to 18.5 V
• PG output with programmable delay
• Current limit and thermal-shutdown protections
• Stable, with ceramic output capacitors ≥ 2.2 µF
• Packages: high-thermal performance, MSOP-8 and SON-8 PowerPAD™

• Operating temperature range: –40°C to +125°C
2.3 System Design Theory

In this reference design, the remote sensor is an RTD temperature sensor that senses temperatures from
–200°C to +850°C . This transmitter design translates the temperature to current. The relationship
between the output-current value and measured temperature is set by an algorithm in the MCU. Here, 4
mA represents the minimum temperature (–200°C) and 20 mA represents the maximum temperature
(850°C).
There are similar RTD temperature transmitter reference designs on TI.com. The RTD sensor-
measurement and power-supply design circuits in this reference design are similar to TIDA-00095 and
TIDA-00165. For the RTD measurement theory, including sensor-signal conditioning and ratio-metric
measurement techniques, see RTD Temperature Transmitter for 2-Wire, 4- to 20-mA Current Loop
Systems (TIDA-00095) and Small Form Factor, 2-Wire 4 to 20mA Current Loop RTD Temperature
Transmitter Reference Design (TIDA-00165). This chapter focuses on how to design a current-loop control
circuit with the SAC modules in the MSP4302355.
2.3.1 Smart Analog Combo

The SAC integrates a high-performance, low-power, operational amplifier (up to 33x PGA gain) and a 12-
bit DAC core. The SAC can be used for signal conditioning of the input or output path.
SAC module features include the following:
• Op-Amp:
– Rail-to-rail input
– Rail-to-rail output
– Multiple input selection
• PGA:
– Configurable modes include buffer mode and PGA mode
– PGA gain up to 33x
– Supports inverting and noninverting modes
• DAC:
– 12-bit DAC core
– Programmable setup time
– Internal or external reference selection
– Software selectable data loading
The SAC module has the following configurations: SAC-L1, SAC-L2, and SAC-L3 (see Table 2). SAC-L1
is the minimum feature set and SAC-L3 is the maximum feature set. Each configuration can work
independently or multiple configurations can work together.
Table 2. Smart Analog Combo Configuration

SAC STRUCTURE FUNCTION
SAC-L1 Op-Amp
SAC-L2 Op-Amp and PGA
SAC-L3 Op-Amp , PGA, and DAC
Figure 7 shows the SAC L3 block diagram.

OAxí
To other peripherals
OAx+
reference
PSEL PMUXEN OAEN OAPM

See details in the section
of SAC DAC
00
12-bit
Reference 01
DAC
10 OA OAxO
00
01
10
Inverting Amplifying (00)

NSEL NMUXEN
Follower (01)
Noninverting
Amplifying (10)
Paired OA
Output (11)
MSEL GAIN
From paired
SAC output
Figure 7. SAC-L3 Block Diagram
2.3.2 Current-Loop Control Circuit Design

As shown in Figure 7, the DAC in the SAC-L3 module is a 12-bit DAC. The DAC can be used as the
reference voltage and works with the Op-Amp and PGA to directly drive the output pad.
There are four SAC-L3 modules in the MSP430FR2355. In this design, two SAC-L3 modules are used.
SAC3 is configured in DAC mode and Op-Amp is configured as an emitter-follower, to enhance the DAC
drive capability (see Figure 8).
OAxí
OAx+
12-bit 00
Reference 01 +
DAC
10 OA OAxO
í
00
01
10

NSEL NMUXEN
Follower (01)
Noninverting
Amplifying (10)
Paired OA
Output (11)
MSEL GAIN
Figure 8. Configuration of SAC3
SAC1 is configured in general Op-Amp mode to construct an Op-Amp feedback amplifier, see Figure 9.
OAxí
OAx+
00
12-bit
Reference 01 +
DAC
10 OA OAxO
í
00
01
10

NSEL NMUXEN
Follower (01)
Noninverting
Amplifying (10)
Paired OA
Output (11)
MSEL GAIN
Figure 9. Configuration of SAC1
The output of SAC3 is connected to the positive input of the OA in SAC1. The output of the OA in SAC1
controls the gate voltage of an external transistor. Figure 10 shows the block diagram.
Loop+
SAC3 SAC1
12 bit
RIN
DAC
OPA
OPA
I1 ILoop
DAC Mode OPA Mode
R1 R2 R3
I2
Loop-
Figure 10. Connections Between SAC3 and SAC1
In Figure 10, the loop current equals the sum of the current through R1 and R2 (see Equation 1).
ILOOP I1 I2 (1)
According to virtual short theory, in an OA feedback amplifier the voltage on the positive-input terminal
approximately equals the negative-input terminal (see Equation 2).
VOPA VOPA
(2)
Thus (see Equation 3):
I1 u R1 I2 u R2 (3)
And (see Equation 4):
VDACOUT
I1
RIN (4)
Therefore, the loop current equation can be written as Equation 5.
VDACOUT § R1 ·
ILOOP u ¨1 ¸
RIN © R2 ¹ (5)
DAC output voltage can be calculated using Equation 6.
VDAC _ CODE u VDACREF
VDACOUT
2DAC _ resolution (6)
In this design, the resolution of the DAC in the SAC module is 12 bit, and an internal 2.5-V shared
reference is used as the DAC reference (see Equation 7).
2.5 u DAC _ CODE
VDACOUT
212 (7)
Which gives the following values:
R1 = 99.9 kΩ
R2 = 100 Ω
RIN = 100 kΩ
Thus (see Equation 8):
VDACOUT § R1 ·
ILoop u ¨1 ¸
RIN © R2 ¹
VDACOUT § 99900 ·
ILoop u ¨1
100000 © 100 ¸¹
§ DAC _ CODE ·
ILoop ¨ 12
u 25 ¸ mA
© 2 ¹ (8)
The output range of SAC3 (VDACOUT) is 0 to approximately 2.5 V. Therefore, the output-current resolution of
the system is shown in Equation 9.
25 / 212 ≈ 0.0061 mA = 6.1 µA. (9)
2.3.3 Extend SAC Resolution

The 12-bit resolution of the DAC in the SAC-L3 module covers most use cases (see Figure 11). For
applications that require higher resolution, this chapter provides a solution to extend the DAC resolution
with software. The DAC generates a particular ratio of the reference. Resolution (Δ or LSB) is the DAC
reference divided by the total number of possible steps. For example, the DAC in the SAC module is 12
bits, so the total step number is 212. In this design, the DAC reference is 2.5 V. Therefore, the resolution
(each step) is shown in Equation 10.
2.5 V / 212 = 0.61 mV. (10)
12-bit DAC
DAC OUTPUT
VN+1
VN
Figure 11. DAC Output
To increase the resolution, generate multiple values for each step by dithering the DAC output between VN
and VN+1, similar to digital PWM and filtering the output to remove the ripples, so that a digital signal turns
into a programmable analog voltage, see Figure 12.
VN+1
DAC VN+0.5
VN
DAC output before filter
DAC output after filter
Figure 12. DAC Output After Low-Pass Filter
For example, if the DAC continuous-loop outputs 1 VN and 1 VN+1, this means two output values represent
one step. After filtering with a RC low-pass filter, the output-analog voltage value is VN+0.5. As a result, the
DAC resolution is increased by 1 bit, see Figure 13. If the DAC continuous loop outputs 4 or 22 values to
represent one step, then the DAC resolution is increased by two bits, see Figure 14. Thus, DAC resolution
can be improved by using software to vary the PWM duty cycle.
VN+1
VN+0.5
VN
Figure 13. 50% Duty-Cycle DAC Output
VN+1
VN+0.75
VN
Figure 14. 75% Duty-Cycle DAC Output
Two key parameters in this solution are discussed in the following sections:
• PWM frequency
• Filter cut-off frequency
In the firmware, the DAC PWM signal is generated by the SAC3 output and timer B0. Timer B0 is
configured to generate a periodic interrupt. The DAC output value is updated in the Timer B0 interrupt-
service routine (ISR).
The relationship between the PWM frequency and timer-B0 interrupt frequency is shown in Equation 11.
FTimer _ B0 FPWM u 2n
where:
• FTimer_B0 is the required timer-interrupt frequency.
• FPWM is the PWM-signal frequency.
• n is the desired, increased resolution of the DAC in bits. (11)
In the firmware, an 8-element array is defined, to store the DAC-dither value, so that the DAC resolution
increases by three bits in theory.
FPWM is 1 kHz, and FTimer_B0 is 1 kHz × 23 = 8 kHz.
The ripple can be reduced to an acceptable level by filtering the output with a low-pass filter. In this
design, use a low-pass RC filter. The values of the RC are dependent on the PWM frequency (FPWM). In
this design, the PWM frequency is 1 kHz. To filter the enough harmonics, the cut-off frequency must be at
least 10 times less than the PWM frequency. In this example, the cut-off frequency is 100 Hz.
2.3.3.1 Trade-Offs
A lower cut-off frequency filter results in less ripple time and longer settling time. A higher cut-off
frequency filter results in more ripple time and shorter settling time. In this application, longer settling time
is acceptable.
Increasing the FPWM frequency moves the harmonics further from the DC offset. The trade-off is to
increase FTimer_B0 so that the MCU power consumption increases.
For more details on the RC low-pass filter design for PWM, see the Voice Band Audio Playback Using a
PWM DAC (TIDU-703A)reference design and Using PWM Output as a Digital-to-Analog Converter on a
TMS320F280x Digital Signal Controller application report. Because of the system-noise floor, the
resolution cannot have unlimited increase. TI provides a SPICE-based, analog-simulation program (TINA-
TI), to help users develop and simulate filter configurations. Other resources are also available online (for
example, the RC Low-Pass Filter Design Tool).
Hardware, Software, Testing Requirements, and Test Results www.ti.com
3 Hardware, Software, Testing Requirements, and Test Results
3.1 Required Hardware and Software
3.1.1 Hardware
ADS1220 MSP430FR2355
RTD Input Loop Connector
TVS Diode
Figure 15. Top-Side PCB Assembly View
TPS7A1601
Button Debug Interface
Figure 16. Bottom-Side PCB Assembly View
www.ti.com Hardware, Software, Testing Requirements, and Test Results
3.1.1.1 Getting Started

A 20- to 30-V range power supply powers the system. TI recommends setting the current limit of the
power supply to 40 mA. The theoretical maximum that the system must draw from the power supply is
25 mA.
Connect a precision multimeter in series with the power supply. TI recommends a 6.5-digit multimeter.
Figure 17 shows the basic setup in test mode. A precision resistor (0.01%) connected to the RTD inputs
emulate a 2-wire RTD connection (jumpers J4 and J2 are installed).
Figure 17. Basic Setup in Test Mode
Figure 18 shows the basic setup in functional mode. In this setup, the connection is a 3-wire RTD and as
a result, J4 is installed and J2 is not installed, as listed in Table 3.
Figure 18. Basic Setup in Function Mode
The design supports 2-wire, 3-wire, and 4-wire RTD. Table 3 lists the jumper configurations, as shown in
Figure 19.
GND
GND
C1
R2 1800pF
4.12k
R3
3.24k C2
R4 0.018uF
4.12k
C6
1800pF
GND
GND
J2 C8
2700pF
4 R5
3 4.12k
2 C9
1 R6 0.027uF
4.12k
J3
C11
J4 2700pF
GND
D4
D3
Figure 19. Jumper Configurations for Different RTD Sensor
Table 3. 2-Wire, 3-Wire, and 4-Wire RTD Support

CONNECTORS
SETUP RTD LOCATION
INSTALLED NOT INSTALLED
2-wire RTD is installed between pins 2
2-wire J2 and J4 —
and 3 of J3.
3-wire RTD is installed between pins 2,
3-wire J4 J2
3, and 4 of J3.
4-wire RTD is installed between pins 1,
4-wire — J2 and J4
2, 3, and 4 of J3.
3.1.2 Software
The software code is designed to implement a temperature-transmitter application that highlights the
ADS1120, to receive data from an RTD temperature probe and send out the temperature reading on a 4-
to 20-mA signal using an SAC module in the MSP430FR2355. The software code addresses system-level
calibration, offset, and gain, that is implemented to improve ADC and DAC accuracy and includes linear
interpolation to address the nonlinearity of the RTD element.
The firmware project of this TI reference design can be downloaded from TIDM-01000.
For MSP430 firmware updates, TI recommends Code Composer Studio™ (CCS), see Figure 20. CCS is
an integrated development environment (IDE) for TI embedded-processor device families. CCS comprises
a suite of tools used to develop and debug embedded applications. CCS includes compilers for each of
the device families from TI, source-code editors, project-build environments, debuggers, profilers,
simulators, real-time operating systems, and other features.
An MSP430 debugger interface, such as MSP-FET, is required, as shown in Figure 20.
Figure 20. MSP-FET to Program System
Firmware is downloaded with the Spy-Bi-Wire (SBW) debug interface. The connector J5 on the board
programs and debugs the code.
GND
VCC
2 1
SBWTCK 4 3 SBWTDIO
J5
Debug connector
Figure 21. SBW Debug Interface
CAUTION
Be careful during debugging to avoid damages, due to different power domains
in conflicts (4- to 20-mA loop power and debugger tools power). Read the
following sections carefully.
3.2 Testing and Results

The overall system performance is governed by ADC accuracy, DAC accuracy, and resolution. This
section characterizes the ADC for resolution and error (adjusted for offset and gain calibration). The DAC
is then characterized for resolution and error (adjusted for offset and gain calibration). Finally, a full system
characterization is performed, for maximum-measured error of the complete system.
NOTE: The test data in this section was measured at room temperature using calibrated lab
equipment, unless otherwise specified.
3.2.1 ADS1120 Error Characterization

To test the accuracy of the acquisition circuit alone, a series of high-precision discrete resistors were used
as the input to the system. The offset error is attributed largely due to the offset of the internal PGA and
ADC, while the gain error is attributed to the accuracy of the RREF resistor and gain error of the internal
PGA and ADC. The ADC error characterization includes corrections for any mismatches in excitation
currents, offset errors, and gain errors.
The following equipment was used for the testing.
• 30-V DC power supply, with current limit set to 50 mA.
• 6.5-digit multimeter, functional as a DC ammeter and connected in series with the power supply
• 6.5-digit multimeter, to measure the high-precision resistors accurately using a 4-W resistance
measurement method, as shown in Figure 22
• MSP340 emulator (MSP-FET) for programming and debugging.
• 390-Ω, external-load resistor connected in series with the DC power supply and ammeter
Figure 22. 4-Wire Resistance Measurement Using 6.5-Digit Multimeter
Use the following steps to carry out the testing.

1. Start with the smallest-value, precision resistor that represents RTD resistance at the lowest scale.
Measure the resistance of the smallest-value, precision resistor using the 6.5-digit multimeter in 4-W
mode, and record the measured value. Ensure that the measuring probes make secure contact with
the resistor leads and avoid any human contact, because human contact may affect the resistance
measurement.
2. Immediately connect the resistor already used in Step 1 to the board.
3. Power-up the board.
4. Test the software running in the MSP430 MCU, to record the excitation current and mismatch-
corrected ADC code before and after offset calibration in the internal memory of the MSP430 MCU.
The recorded samples are then exported to an Excel® spreadsheet using the CCS IDE on the PC.
Preserve these samples safely in the Excel sheet for further calculations.
5. Repeat these steps until the highest-value precision resistor representing the RTD resistance at full-
scale is obtained. Keep recording the samples in the Excel spreadsheet.
Gain calibration occurs when a full-scale precision resistor of 390 Ω is connected. A 390-Ω resistor
corresponds to approximately 848.36°C in temperature, which is quite close to the full-scale temperature
of 850°C. Then, the gain factor is determined by dividing the full-scale, reference-precision resistor with
the measured full-scale resistance after offset calibration. Finally, the gain correction is applied to all the
measured resistances after offset calibration
NOTE: The MSP430 firmware algorithm averages a given number of measurements, with offset
correction applied to an expected result, with a 390-Ω resistor connected to determine the
gain calibration factor. To execute the algorithm, the S1 switch must be pressed with a 390-
Ω resistor in place. The gain calibration factor is determined and stored in the FRAM. Gain
calibration must be performed after compensating for offset error.
Table 4. Precision Resistors Corresponding Temperature Values

PRECISION RESISTOR VALUE (1) REFERENCE TEMPERATURE °C
20.0068 –196.556015
50.0061 –125.131149
70.0119 –75.798248
100.014 0.0358056
120.019 51.615582
150.017 130.492020
170.011 184.143661
199.998 266.341675
219.997 322.388092
250.026 408.526184
270.024 467.299652
300.02 557.749207
319.991 619.609375
350.035 715.373352
370.027 781.046509
390.027 848.448669
(1)
As measured by the 6.5-digit multimeter (ω)
Table 5. ADC Error After Gain and Offset Calibration

PRECISION RESISTOR REFERENCE RTD CALCULATION TEMPERATURE MEASURED ERROR
VALUE (Ω) (1) TEMPERATURE (°C) (2) (Ω) (3) READING (°C) (4) OF ADC (°C)
20.0068 –196.556015 20.010223 –196.548096 0.007919
50.0061 –125.131149 50.019379 –125.098839 0.032310
70.0119 –75.798248 70.041962 –75.723290 0.074959
100.014 0.035806 100.026398 0.067514 0.031708
120.019 51.615582 120.048981 51.693459 0.077877
150.017 130.492020 150.058136 130.601440 0.109420
170.011 184.143661 170.031281 184.198608 0.054947
199.998 266.341675 200.040436 266.459534 0.117859
219.997 322.388092 220.013580 322.435089 0.046997
250.026 408.526184 250.072174 408.660400 0.134216
270.024 467.299652 270.045319 467.362946 0.063294
300.020 557.749207 300.029755 557.779114 0.029907
319.991 619.609375 320.002899 619.646606 0.037231
350.035 715.373352 350.036774 715.379089 0.005737
370.027 781.046509 370.084076 781.236145 0.189636
390.027 848.448669 390.032501 848.467468 0.018799
(1)
As measured by the 6.5-digit Multimeter
(2)
Based on measured precision resistor, calculated with Callendar-Van Dusen equations
(3)
Based on ADC code after gain and offset calibration
(4)
Running linearization after offset and gain calibration
Figure 23 shows the temperature error after applying the simple first-order offset and gain calibration over
a –200°C to +850°C temperature range. The temperature error still shows some variations, even after
applying the offset and gain calibration. The temperature error is attributed mainly due to nonlinearity
errors associated with the ADC and PT100 RTD look-up table. The nonlinearity errors are difficult to
correct using a simple linear equation. Higher-order polynomial approximation may be used to correct the
nonlinearity errors.
1.2
0.8
Error (qC)
Error (qC)
0.6
Specification (qC)
0.4
0.2
0
-400 -200 0 200 400 600 800 1000
Temperature (qC) D002
Figure 23. Measured ADC Error After Calibration
3.2.2 SAC Output Current Resolution

For this test, the SAC output was programmed for a fixed, 4-mA output current, and multiple samples were
recorded over time using a 6.5-digit multimeter. The minimum and maximum currents recorded were
4.012451 mA and 4.013822 mA, respectively. Therefore, the noise-free resolution in terms of output
current is 1.37 µA (see Figure 24).
4.014
4.0138
4.0136
Output Current (mA)
4.0134
4.0132
4.013
4.0128
4.0126
4.0124
4.0122
0 50 100 150 200 250 300 350 400 450 500
Samples D003
Figure 24. SAC Output Resolution
3.2.3 SAC Error Characterization

To perform SAC error characterization, the MSP430 MCU was programmed to generate the output-loop
current from 4 mA to 20 mA, in steps of 2 mA (see Table 6). The output current was increased by 2 mA
each time the S1 switch was pressed. The output-loop current was measured using a 6.5-digit multimeter.
Table 6. SAC Error Characterization

LOOP CURRENT MEASURED (mA)
SAC VALUE APPLIED (mA) BEFORE GAIN AND OFFSET AFTER GAIN AND OFFSET
CALIBRATION CALIBRATION
4 4.012413 4.000621
6 6.007311 6.001562
8 7.999695 8.000524
10 9.990082 9.998756
12 11.98229 12.00102
14 13.97203 13.99825
16 15.95988 15.99846
18 17.95467 17.99587
20 19.95354 19.99936
As shown in Figure 25, without gain and offset calibration, an error is seen in the loop current. This error
increases linearly with the loop current. A simple gain and offset calibration implemented in the MSP430
fixes this error.
0.02
Delta Current Before Calibration
0.01 Delta Current After Calibration
Delta Loop Current (mA)
-0.01
-0.02
-0.03
-0.04
-0.05
4 6 8 10 12 14 16 18 20
SAC Value Applied (mA) D004
Figure 25. Measured Output Loop Current Error Before And After Calibration
3.2.4 Complete-System, Maximum-Measure Error

After correcting the ADC and SAC for gain and offset calibration, a complete system characterization was
performed for maximum measured error. In this setup, a power supply and 6.5-digit multimeter were used
for loop current measurement. As shown in Figure 26, multiple precision-resistor values were used,
covering –200°C to 850°C, similar to those used in Figure 22.
Figure 26. Complete System Maximum Measured Error Test
Table 7. Maximum Measured Error of the System

PRECISION RESISTOR REFERENCE IDEAL LOOP CURRENT MEASURED OUTPUT LOOP
VALUE (Ω) (1) TEMPERATURE (°C) (2) (mA) (3) CURRENT (mA) (4)
20.0068 –196.556015 4.052480 4.052370
50.0061 –125.131149 5.140859 5.144854
70.0119 –75.798248 5.892598 5.897162
100.014 0.035806 7.048165 7.053314
120.019 51.615582 7.834142 7.836075
150.017 130.492020 9.036069 9.036823
170.011 184.143661 9.853618 9.853028
199.998 266.341675 11.106159 11.10631
219.997 322.388092 11.960199 11.95832
250.026 408.526184 13.272780 13.26872
270.024 467.299652 14.168376 14.16165
(1)
As measured by the 6.5-digit multimeter
(2)
Based on the measured precision resistor
(3)
Based on the reference precision resistor
(4)
Current of the system for the connected, reference precision resistor
Table 7. Maximum Measured Error of the System (continued)

300.02 557.749207 15.546655 15.54218
319.991 619.609375 16.489286 16.48634
350.035 715.373352 17.948546 17.94501
370.027 781.046509 18.949280 18.94982
390.027 848.448669 19.976361 19.97589
1.2
0.8
Measured ADC Error (qC)
Error (qC)
Specification (qC)
0.6
0.4
0.2
0
-400 -200 0 200 400 600 800 1000
Temperature (qC) D005
Figure 27. Maximum Measured Error of Complete System
3.2.5 Power Supply Influence

For the power-supply influence test, the power supply was vetted from 10 V to 30 V, and the
corresponding loop-current change was recorded. The DAC output was programmed for a fixed 4-mA
output current for this measurement. The total deviation of the loop current across the power supply range
was approximately 0.24 μA, as shown in Figure 28 and Figure 29.
Figure 28. 10-V Power Supply on Output Loop Current
Figure 29. 30-V Power Supply on Output Loop Current
3.2.6 Reverse-Polarity Test

For this test, a 30-V power supply was connected to the J1 loop interface connector in reverse polarity,
without any polarized capacitor, as shown in Figure 30. The leakage current drawn by the system
recorded was 14.39 nA.
Figure 30. Reverse-Polarity Protection Test
3.2.7 Loop Power Consumption

The total loop power consumed by the design is 1.58 mA. Table 8 lists the total current consumed by each
device.
Table 8. Loop Power Consumption

DEVICE CURRENT CONSUMPTION
340 μA + 75 μA + 500 μA (biasing currents) = 915 μA (PGA 16, normal
ADS1120
mode, sample rate of 20 SPS)
MSP430FR2355 660 μA (MCU at 1 MHz, 3.3 V + DAC + 2OP + REFO + Shared REF)
TPS7A1601 5 µA
For a loop-powered system, a low-power consumption of approximately 1.6 mA ensures that the
remainder of the budget (approximately [3.3 mA to 1.6 mA] = approximately 1.7 mA) can be used for
system-level functions such as HART modem implementation.
Design Files www.ti.com
4 Design Files
4.1 Schematics
To download the schematics, see the design files at TIDM-01000.
4.2 Bill of Materials

To download the bill of materials (BOM), see the design files at TIDM-01000 .
4.3 PCB Layout Recommendations
4.3.1 Layout Prints

To download the layer plots, see the design files at TIDM-01000.
4.4 Altium Project

To download the Altium Designer® project files, see the design files at TIDM-01000.
4.5 Gerber Files

To download the Gerber files, see the design files at TIDM-01000.
4.6 Assembly Drawings

To download the assembly drawings, see the design files at TIDM-01000.
5 Software Files
To download the software files, see the design files at TIDM-01000.
6 Related Documentation
1. Texas Instruments, RTD Temperature Transmitter for 2-Wire, 4- to 20-mA Current Loop Systems
(TIDA-00095), reference design
2. Texas Instruments, Small Form Factor, 2-Wire 4 to 20mA Current Loop RTD Temperature Transmitter
Reference Design (TIDA-00165), reference design
3. Texas Instruments, Voice Band Audio Playback Using a PWM DAC (TIDM-VOICEBANDAUDIO),
reference design
4. Texas Instruments, Using PWM Output as a Digital-to-Analog Converter on a TMS320F280x Digital
Signal Controller, application report
6.1 Trademarks
E2E, MSP430, PowerPAD, Code Composer Studio are trademarks of Texas Instruments.
Altium Designer is a registered trademark of Altium LLC or its affiliated companies.
Excel is a registered trademark of Microsoft Corporation.
All other trademarks are the property of their respective owners.
7 About the Author

LING ZHU is an Applications Engineer at Texas Instruments, where he is responsible for developing
reference design solutions for the industrial segment. Ling brings to this role his extensive experience in
embedded-processor, capacitive touch, and low-power system-level design expertise. Ling earned his
Master of Science in Xidian University in Xi’an, China.
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TI Designs: TIDM-01000

4- to 20-mA Loop-Powered RTD Temperature Transmitter

TIDM-01000 Design Folder

ASK Our E2E™ Experts

IDEVICE = IADC + IDAC1 + IDAC2 + Loop

Figure 1. Typical Block Diagram of RTD Temperature Transmitter

Figure 2. Block Diagram of RTD Temperature Transmitter Based on MSP430FR2355

1.1 Key System Specifications

Table 1. Key System Specifications

2.1 Block Diagram

IDEVICE = IADC + IDAC1 + IDAC2 + Loop

Figure 3. TIDM-01000 Block Diagram

2.2 Highlighted Products

Cap Touch I/O

Figure 4. MSP430FR2355 Block Diagram

– 16-bit cyclic-redundancy checker (CRC)

AVSS CLK DGND

Figure 5. ADS1120 Block Diagram

• Internal oscillator: 2% accuracy

Copyright © 2017, Texas Instruments Incorporated

Figure 6. TPS7A16 Block Diagram

• Packages: high-thermal performance, MSOP-8 and SON-8 PowerPAD™

2.3 System Design Theory

2.3.1 Smart Analog Combo

Table 2. Smart Analog Combo Configuration

Figure 7 shows the SAC L3 block diagram.

PSEL PMUXEN OAEN OAPM

Inverting Amplifying (00)

Figure 7. SAC-L3 Block Diagram

2.3.2 Current-Loop Control Circuit Design

PSEL PMUXEN OAEN OAPM

Inverting Amplifying (00)

Figure 8. Configuration of SAC3

PSEL PMUXEN OAEN OAPM

Inverting Amplifying (00)

Figure 9. Configuration of SAC1

Figure 10. Connections Between SAC3 and SAC1

2.3.3 Extend SAC Resolution

Figure 11. DAC Output

DAC output after filter

Figure 12. DAC Output After Low-Pass Filter

Figure 13. 50% Duty-Cycle DAC Output

Figure 14. 75% Duty-Cycle DAC Output

3 Hardware, Software, Testing Requirements, and Test Results

3.1 Required Hardware and Software

Figure 15. Top-Side PCB Assembly View

Button Debug Interface

Figure 16. Bottom-Side PCB Assembly View

3.1.1.1 Getting Started

Figure 17. Basic Setup in Test Mode

Figure 18. Basic Setup in Function Mode

Figure 19. Jumper Configurations for Different RTD Sensor

Table 3. 2-Wire, 3-Wire, and 4-Wire RTD Support

An MSP430 debugger interface, such as MSP-FET, is required, as shown in Figure 20.

Figure 20. MSP-FET to Program System

3.2 Testing and Results

3.2.1 ADS1120 Error Characterization

Figure 22. 4-Wire Resistance Measurement Using 6.5-Digit Multimeter

Use the following steps to carry out the testing.