ASJ

1
Cover Sheet 1
Block Diagram
Intel Yonah CPU
2
3-5
MS-9631 Version 1.0
01/18/2006
Intel 945GT 6-11
Intel ICH7M-DH - PCI & DMI & CPU & IRQ 12 CPU:
Intel ICH7M-DH - LPC & ATA & USB & GPIO & POWER 13-14 Intel Yonah/Merom Processor
Clock -ICS954129 & FWH 15 System Chipset:
LPC I/O - W83627EHG 16 Intel 945 GT - GMCH (North Bridge)
Azalia ALC880 17 Intel ICH7M-DH (South Bridge)
LAN -- INTEL 82573E 18 On Board Chipset:
SATA2 - SIL 3132 19 Clock Generator - ICS954129
DDR2 System Memory 1 & 2 20 LAN -- INTEL 82573E
LPC Super I/O -- W83627EHG
DDR Termination Resistors 21
Azalia ALC880
A
TPM 22 VIA-6307 IEEE1394 Controller A
PCI Slot / PCI EXPRESS X16 Slot 23-24 SIL-3132 SATA2 Controller
BIOS -- FWH EEPROM
USB Connectors 25
TPM -- Infineon SLD9635
ATX , VGA Connetcors & Front Panel 23
26
Main Memory:
CH7307 & DVI CONNECTOR 27
DDR 2 * 2 (Max 4GB)
MS-7 ACPI Controller & MS-6 Plus 28
FAN, SATA & IDE CONNECTORS 29 Expansion Slots:
IEEE 1394 CONTROLLER 30 PCI EXPRESS X16 SLOT
Mini PCI type III *1
CPU Power 31
PCI2.3 SLOT * 1
GPIO & JUMPER SETTTING 32
MANUAL PARTS 33 V-core PWM:
Power MAP 34 IMVP-6 Controller: ISL6262
CLOCK MAP 35 System power PWM: MICRO-STAR INt'L CO. , LTD.
Title
POWER SEQUENCE/SMBUS MAP 36 MS-7 & MS-6 + Size

Cover Sheet
Document Number Rev

Custom MS-9631 1.0
Date: Monday, February 13, 2006 Sheet 1 of 37

1
IMVP-6
ISL 6262
Intel Yonah Processor Block Diagram
PCI EXPRESS X 16
FSB
533/667MHz
2 DDR II
CH7307 SDVO
64bit DDR
945GT DIMM
Modules
Type III
Mini-PCI
Calistoga 400/533/667MHz
DVI-I CRT
2GB/s
DMI
UltraDMA
PCI Slot x 1
33/66/100 PCI bus PCI BUS
IDE Primary IEEE-1394

VT6307
SATA 300 MB/s
SATA 3~4
ICH7M-DH
USB
PCI-E x1 LAN Intel
82573E
USB Port 0~7
PCI-E x1
SATA II 300 MB/s
AC97 SATA 2 SATA II 1~2

SIL 3132
[email protected]/s
LPC Bus
Azalia
ALC880
LPC SIO
Winbond
83627EHG
TPM
Flash
MICRO-STAR INt'L CO. , LTD.

Title
Block Diagram
Size Document Number Rev

Custom MS-9631 1.0

5 4 3 2 1
BI HREQ#[0..4] BI HD#[0..63]
6 HREQ#[0..4] 6 HD#[0..63]
BI HA#[3..31] BI HDSTBP#[0..3]
6 HA#[3..31] 6 HDSTBP#[0..3]
BI HASTB#[0..1] BI HDSTBN#[0..3]
6 HASTB#[0..1] 6 HDSTBN#[0..3]
IN RS#[0..2] BI DBI#[0..3]
6 RS#[0..2] 6 DBI#[0..3]
D D
V_FSB_VTT U9B
HD#0 E22 AA23 HD#32
U9A HD#1 D[0]# D[32]# HD#33
F24 AB24
HA#3 H_ADS# HD#2 D[1]# D[33]# HD#34
J4 H1 BI H_ADS# 6 E26 V24
HA#4 A[3]# ADS# H_BNR# R154 56_0402 H_IERR# HD#3 D[2]# D[34]# HD#35
L4 E2 BI H_BNR# 6 H22 V26
HA#5 A[4]# BNR# H_BPRI# HD#4 D[3]# D[35]# HD#36
M3 A[5]# G5 IN H_BPRI# 6 F23 W25
BPRI# D[4]# D[36]#
DATA GRP2
DATA GRP0
HA#6 K5 HD#5 G25 U23 HD#37
A[6]# D[5]# D[37]#
ADDR GROUP 0
HA#7 M1 H5 H_DEFER# IN R211 54.9R1%0402 H_BPM#5 HD#6 E25 U25 HD#38
A[7]# DEFER# H_DEFER# 6 D[6]# D[38]#
HA#8 N2 F21 H_DRDY# BI HD#7 E23 U22 HD#39
A[8]# DRDY# H_DRDY# 6 D[7]# D[39]#
HA#9 J1 E1 H_DBSY# BI HD#8 K24 AB25 HD#40
A[9]# DBSY# H_DBSY# 6 D[8]# D[40]#
CONTROL
HA#10 N3 V_FSB_VTT HD#9 G24 W22 HD#41
HA#11 A[10]# H_BR#0 HD#10 D[9]# D[41]# HD#42
P5 F1 BI H_BR#0 6 J24 Y23
HA#12 A[11]# BR0# HD#11 D[10]# D[42]# HD#43
P2 A[12]# J23 AA26
HA#13 H_IERR# HD#12 D[11]# D[43]# HD#44
L1 A[13]# D20 H26 Y26
HA#14 IERR# H_INIT# HD#13 D[12]# D[44]# HD#45
P4 A[14]# B3 IN H_INIT# 12 F26 Y22
HA#15 INIT# H_TMS R205 54.9R1%0402 HD#14 D[13]# D[45]# HD#46
P1 A[15]# K22 AC26
HA#16 H_LOCK# HD#15 D[14]# D[46]# HD#47
R1 H4 BI H_LOCK# 6 H25 AA24
HASTB#0 A[16]# LOCK# H_TDI R238 54.9R1%0402 HDSTBN#0 D[15]# D[47]# HDSTBN#2
L2 ADSTB[0]# H23 W24
HDSTBP#0 DSTBN[0]# DSTBN[2]# HDSTBP#2
B1 IN H_CPURST# 6 G22 Y25
HREQ#0 RESET# RS#0 DBI#0 DSTBP[0]# DSTBP[2]# DBI#2
K3 REQ[0]# F3 J26 V23
HREQ#1 RS[0]# RS#1 DINV[0]# DINV[2]#
H2 REQ[1]# F4
HREQ#2 RS[1]# RS#2 H_TCK R214 54.9R1%0402
K2 REQ[2]# G3
HREQ#3 RS[2]# H_TRDY# HD#16 HD#48
J3 REQ[3]# G2 IN H_TRDY# 6 N22 AC22
HREQ#4 TRDY# H_TRST# R220 54.9R1%0402 HD#17 D[16]# D[48]# HD#49
L5 K25 AC23
REQ[4]# H_HIT# HD#18 D[17]# D[49]# HD#50
G6 BI H_HIT# 6 P26 AB22
HA#17 HIT# H_HITM# HD#19 D[18]# D[50]# HD#51
Y2 E4 BI H_HITM# 6 R23 AA21
A[17]# HITM# D[19]# D[51]#
ADDR GROUP 1
HA#18 U5 HD#20 L25 AB21 HD#52

A[18]# D[20]# D[52]#
DATA GRP3
DATA GRP1
HA#19 R3 AD4 H_BPM#0 HD#21 L22 AC25 HD#53
HA#20 A[19]# BPM[0]# H_BPM#1 TP17 HD#22 D[21]# D[53]# HD#54
W6 A[20]# AD3 L23 AD20
HA#21 BPM[1]# H_BPM#2 TP19 HD#23 D[22]# D[54]# HD#55
U4 A[21]# AD1 M23 AE22
BPM[2]# TP24 D[23]# D[55]#
XDP/ITP SIGNALS
C HA#22 Y5 AC4 H_BPM#3 HD#24 P25 AF23 HD#56 C

HA#23 A[22]# BPM[3]# H_BPM#4 TP16 HD#25 D[24]# D[56]# HD#57
U2 A[23]# AC2 P22 AD24
HA#24 PRDY# H_BPM#5 TP23 HD#26 D[25]# D[57]# HD#58
R4 A[24]# AC1 P23 AE21
HA#25 PREQ# H_TCK HD#27 D[26]# D[58]# HD#59
HA#26
T5
T3
A[25]# TCK
AC5
AA6 H_TDI HD#28
T24
R24
D[27]# D[59]#
AD21
AE25 HD#60
0.5" max length
HA#27 A[26]# TDI H_TDO HD#29 D[28]# D[60]# HD#61
HA#28
W3
W5
A[27]# TDO
AB3
AB5 H_TMS TP18 V_FSB_VTT HD#30
L26
T25
D[29]# D[61]#
AF25
AF22 HD#62
25 MIL AWAY FROM HIGH
HA#29 Y4
A[28]#
A[29]#
TMS
TRST#
AB6 H_TRST# HD#31 N24
D[30]#
D[31]#
D[62]#
D[63]#
AF26 HD#63 SPEED SIGNAL
HA#30 W2 C20 HDSTBN#1 M24 AD23 HDSTBN#3
HA#31 A[30]# DBR# TP9 R135 HDSTBP#1 DSTBN[1]# DSTBN[3]# HDSTBP#3
HASTB#1
Y1
V4
A[31]#
D21 H_PROCHOT# DBI#1
N25
M26
DSTBP[1]# DSTBP[3]#
AE24
AC20 DBI#3
HCOMP0,2==>18MIL(27.4ohm)
ADSTB[1]# PROCHOT#
A24 BI CPU_TMPA 16
1K_1%_0603 DINV[1]# DINV[3]# HCOMP1,3==>5MIL(55ohm)
THERM
THERMDA Don't need CAP. (Design Guide P.90)

12 H_A20M# IN A6 A25 BI THERMDC 16
A20M# THERMDC C137 CPU_GTLREF HCOMP0 R133 27.4_1%_0603
12 H_FERR# OUT A5 AD26 R26
FERR# TRMTRIP# 0.1u_0603 GTLREF COMP[0] HCOMP1 R136 54.9_1%_0402
12 H_IGNNE# IN C4 C7 OUT TRMTRIP# 7,12 U26
IGNNE# THERMTRIP# 1K_0603 COMP[1] HCOMP2 R236 27.4_1%_0603
0.5" max COMP[2]
U1
IN H_STPCLK# D5 R132 C26 V1 HCOMP3 R237 54.9_1%_0402
12 H_STPCLK# STPCLK# length TEST1 COMP[3]
IN C6 R134
12 H_INTR LINT0
B4 A22 CK_H_CPU 2K_1%_0603 R131 51R D25 E5 H_DPRSTP#
12
12
H_NMI
ICH_H_SMI#
IN
IN A3
LINT1
SMI#
BCLK[0]
BCLK[1]
A21 CK_H_CPU#
IN
IN
CK_H_CPU 15
CK_H_CPU# 15
TEST2 MISC DPRSTP#
DPSLP#
B5 H_DPSLP#
IN
IN
H_DPRSTP# 12,31
H_DPSLP# 12
CLK
D24 H_DPWR# IN
DPWR# H_DPWR# 6
AA1 OUT B22 D6 H_PWRGD IN
7,15 BSEL0 H_PWRGD 12
H
RSVD[01] BSEL[0] PWRGOOD H_SLP#

AA4 T22 7,15 BSEL1 OUT B23 D7 IN H_SLP# 6
RSVD[02] RSVD[12] TP8 BSEL[1] SLP#
AB2 RSVD[03] 7,15 BSEL2 OUT C21 AE6 OUT PSI# 31
BSEL[2] PSI#
AA3
RESERVED
RSVD[04]
M4 RSVD[05] RSVD[13] D2 Yonah_Skt_0
N5 F6
RSVD[06] RSVD[14]
T2 D3
RSVD[07] RSVD[15]
V3 C1
RSVD[08] RSVD[16]
B2 AF1
RSVD[09] RSVD[17]
TP7 C3 RSVD[10] RSVD[18] D22
B B
RSVD[19] C23
B25 C24
RSVD[11] RSVD[20]
Yonah_Skt_0
Yonah 478pin socket V_FSB_VTT
(keyed)
PLACE AT CPU END OF ROUTE
V_FSB_VTT
V_FSB_VTT R218 X_56_0402 H_CPURST#
R150 56R_0402 H_PROCHOT#
V_FSB_VTT C139
V_FSB_VTT R235 X_54.9R1%0402 H_PWRGD 4.7U10V_0805
BSEL[2] BSEL[1] BSEL[0] BCLK
L L L RESERVED
L L H 133MHZ
A A
L H L RESERVED
L H H 166MHZ

Title
Yonah - Host bus

Custom MS-9631 1.0

5 4 3 2 1
5 4 3 2 1
U9D
A4 P6
VSS1 VSS82
A8 P21
VSS2 VSS83
A11 P24
VSS3 VSS84
A14 R2
VSS4 VSS85
A16 R5
VSS5 VSS86 VCORE VCORE
A19 R22
VSS6 VSS87
A23 R25
VSS7 VSS88 U9C
A26 T1
VSS8 VSS89
B6 T4 A7 AB20
VSS9 VSS90 VCC[1] VCC[68]
D B8 T23 A9 AB7 D
B11 T26 A10 AC7
B13 U3 A12 AC9
B16 U6 A13 AC12
B19 U21 A15 AC13
B21 U24 A17 AC15
B24 V2 A18 AC17
VSS16 VSS97 VCC[8] VCC[75] U9E
C5 V5 A20 AC18
C8 V22 B7 AD7
C11 V25 B9 AD9
C14 W1 B10 AD10
VSS20 VSS101 VCC[12] VCC[79] Modify X1,X2,X3,X4 to NC
C16 W4 B12 AD12
C19 W23 B14 AD14 X1 X3 2005.11.3
VSS22 VSS103 VCC[14] VCC[81] H1 H3
C2 W26 B15 AD15 XX1 XX9
VSS23 VSS104 VCC[15] VCC[82] GND GND
C22 Y3 B17 AD17 XX2 XX10
C25
VSS24
VSS25
VSS105
VSS106
Y6 B18
VCC[16]
VCC[17]
VCC[83]
VCC[84]
AD18 XX3
GND
GND
HEAT GND
GND XX11
D1 Y21 B20 AE9
D4
VSS26
VSS27
VSS107
VSS108
Y24 C9
VCC[18]
VCC[19]
VCC[85]
VCC[86]
AE10 SINK
D8 AA2 C10 AE12 X2 X4
D11
VSS28
VSS29
VSS109
VSS110
AA5 C12
VCC[20]
VCC[21]
VCC[87]
VCC[88]
AE13 XX5
H2
GND
GND H4
GND XX13
D13 AA8 C13 AE15 XX6 XX14
POWER
D16 AA11 C15 AE17 XX7 XX15
D19 AA14 C17 AE18
GND

D23 AA16 C18 AE20
D26 AA19 D9 AF9
E3 AA22 D10 AF10
E6 AA25 D12 AF12
E8 AB1 D14 AF14
E11 AB4 D15 AF15
E14 AB8 D17 AF17
VSS39 VSS120 VCC[31] VCC[98] V_FSB_VTT Yonah_Skt_0
E16 AB11 D18 AF18
C VSS40 VSS121 VCC[32] VCC[99] C
E19 AB13 E7 AF20
E21 AB16 E9
VSS42 VSS123 VCC[34]
E24 AB19 E10 V6
VSS43 VSS124 VCC[35] VCCP[1]
F5 AB23 E12 G21
F8 AB26 E13 J6
F11 AC3 E15 K6
F13 AC6 E17 M6
F16 AC8 E18 J21
F19 AC11 E20 K21
F2 AC14 F7 M21
F22 AC16 F9 N21
VSS51 VSS132 VCC[43] VCCP[9] V_1P5_CORE
F25 AC19 F10 N6
G4 AC21 F12 R21
G1 AC24 F14 R6
G23 AD2 F15 T21
G26
VSS56 VSS137
AD5 F17
VCC[48] VCCP[14]
T6 0.01uf and 10uf near B26
H3 AD8 F18 V21
H6 AD11 F20 W21
VSS58 VSS139 VCC[50] VCCP[16] Internal PLL super filter C145 10U10V_0805
H21 AD13 AA7
H24 AD16 AA9 B26
VSS60 VSS141 VCC[52] VCCA
J2 AD19 AA10 OUT VID[0..6] 31
VSS61 VSS142 VCC[53] C1460.01U25V_0402
J5 AD22 AA12
VSS62 VSS143 VCC[54] VID0
J22 AD25 AA13 AD6
VSS63 VSS144 VCC[55] VID[0] VID1
J25 AE1 AA15 AF5
K1 AE4 AA17 AE5
K4 AE8 AA18 AF4
K23 AE11 AA20 AE3
K26 AE14 AB9 AF2
L3 AE16 AC10 AE2
VSS69 VSS150 VCC[61] VID[6]
L6 AE19 AB10
L21 VSS71 VSS152 AE23 AB12 VCC[63]
B VCORE B
L24 AE26 AB14 AF7
VSS72 VSS153 VCC[64] VCCSENSE
M2 AF3 AB15
M5 AF6 AB17
M22 AF8 AB18 AE7
VSS75 VSS156 VCC[67] VSSSENSE R190
M25 AF11
VSS76 VSS157
N1 AF13 Yonah_Skt_0
VSS77 VSS158 100_1%_0402
N4 AF16
VSS78 VSS159
N23 AF19
VSS79 VSS160
N26 AF21
VSS80 VSS161
P3 AF24 OUT VCCSENSE_2 31
VSS81 VSS162
Yonah_Skt_0
OUT VSSSENSE_2 31
R192
100_1%_0402
LAYOUT NOTE:
Route VCCSENSE and VSSSENSE traces at
27.4Ohm(18mil) with 7 mil spacing.
Place PU and PD within 1 inch of CPU.
A A

Title
Yonah - Power / GND

Custom MS-9631 1.0

5 4 3 2 1
5 4 3 2 1
VCORE
C223 C231 C197 C600 C214 C606 C219 C190 C601 C597 C193
D 22UF/6.3V_0805 22UF/6.3V_0805 22UF/6.3V_0805 22UF/6.3V_0805-BOT 22UF/6.3V_0805 22UF/6.3V_0805-BOT 22UF/6.3V_0805 22UF/6.3V_0805 22UF/6.3V_0805-BOT 22UF/6.3V_0805-BOT 22UF/6.3V_0805 D
VCORE
22UF/6.3V_0805
22UF/6.3V_0805
22UF/6.3V_0805
22UF/6.3V_0805-BOT
22UF/6.3V_0805
22UF/6.3V_0805
22UF/6.3V_0805
22UF/6.3V_0805
22UF/6.3V_0805
22UF/6.3V_0805
22UF/6.3V_0805
22UF/6.3V_0805
22UF/6.3V_0805
22UF/6.3V_0805
22UF/6.3V_0805
22UF/6.3V_0805
22UF/6.3V_0805-BOT
22UF/6.3V_0805-BOT
22UF/6.3V_0805-BOT
22UF/6.3V_0805-BOT
22UF/6.3V_0805-BOT
C607 C206 C182 C218 C605 C604 C212 C598 C599 C191 C603 C194 C181 C232 C207 C224 C198 C237 C227 C175 C168
V_FSB_VTT
close to cpu socket
C C
0.1u_0402
0.1u_0402
0.1u_0402
0.1u_0603-BOT
0.1u_0603-BOT
0.1u_0603-BOT
0.1u_0603-BOT
0.1u_0603-BOT
0.1u_0603-BOT
0.1u_0603-BOT
+ C201
C595 C610 C176 C596 C609 C608 C593 C594 C179 C236
X_100U/2V
V_FSB_VTT
0.1u_0402
0.1u_0402
0.1u_0402
0.1u_0402
0.1u_0402
C233 C178 C177

C235 C234
B B
A A

Title
Yonah- Decoupling

Custom MS-9631 1.0

5 4 3 2 1
5 4 3 2 1
3 HD#[0..63] BI U11A BI HA#[3..31] 3

HD#0 F1 H9 HA#3
HD#1 H_D#_0 H_A#_3 HA#4
J1 H_D#_1 C9
HD#2 H_A#_4 HA#5
H1 H_D#_2 E11
HD#3 H_A#_5 HA#6
J6 G11
HD#4 H_D#_3 H_A#_6 HA#7
H3 F11
HD#5 H_D#_4 H_A#_7 HA#8
K2 G12
HD#6 H_D#_5 H_A#_8 HA#9
G1 F9
HD#7 H_D#_6 H_A#_9 HA#10
D G2 H11 D
HD#8 H_D#_7 H_A#_10 HA#11
K9 J12
HD#9 H_D#_8 H_A#_11 HA#12
K1 H_D#_9 G14
HD#10 H_A#_12 HA#13
K7 D9
HD#11 H_D#_10 H_A#_13 HA#14
J8 J14
HD#12 H_D#_11 H_A#_14 HA#15
H4 H13
HD#13 H_D#_12 H_A#_15 HA#16
J3 H_D#_13 J15
HD#14 H_A#_16 HA#17
K11 F14
HD#15 H_D#_14 H_A#_17 HA#18
G4 D12
HD#16 H_D#_15 H_A#_18 HA#19
T10 A11
HD#17 H_D#_16 H_A#_19 HA#20
W11 C11
HD#18 H_D#_17 H_A#_20 HA#21
T3 H_D#_18 A12
V_FSB_VTT HD#19 H_A#_21 HA#22
U7 A13
HD#20 H_D#_19 H_A#_22 HA#23
U9 H_D#_20 E13
HXRCOMP HD#21 H_A#_23 HA#24
U11 H_D#_21 G13
HD#22 H_A#_24 HA#25
T11 H_D#_22 F12
HD#23 H_A#_25 HA#26
W9 B12
R200 R206 HD#24 H_D#_23 H_A#_26 HA#27
T1 B14
HD#25 H_D#_24 H_A#_27 HA#28
54.9_1%_0402 T8 H_D#_25 C12
24.9R1%_0402 HD#26 H_A#_28 HA#29
T4 H_D#_26 A14
HD#27 H_A#_29 HA#30 V_FSB_VTT
W7 H_D#_27 C14
HXSCOMP HD#28 H_A#_30 HA#31
U5 H_D#_28 D14
HD#29 H_A#_31
T9 H_D#_29 BI H_ADS# 3
HD#30 W6 as close as to R247
HD#31 H_D#_30 H_ADS#
T5 H_D#_31 E8 BI HASTB#[0..1] 3 GMCH J13 pin
HD#32 H_ADS# HASTB#0 100_1%_0402
AB7 H_D#_32 B9
HD#33 H_ADSTB#_0 HASTB#1
AA9 C13
HOST
V_FSB_VTT HD#34 H_D#_33 H_ADSTB#_1 HVREF
W4 H_D#_34 J13
HD#35 H_AVREF H_BNR#
W3 H_D#_35 C6 BI H_BNR# 3
HD#36 H_BNR# H_BPRI# C268 C275 R244
Y3 H_D#_36 F6 OUT H_BPRI# 3
HD#37 H_BPRI#
Y7 H_D#_37 C7 H_BR#0 BI H_BR#0 3
R209 HD#38 H_BREQ#0 200_1%_0402
C W5 B7 H_CPURST# OUT H_CPURST# 3
0.1u_0402 0.1u_0603-BOT C
HD#39 H_D#_38 H_CPURST# H_DBSY#
Y10 A7 BI H_DBSY# 3
221_1%_0402 HD#40 H_D#_39 H_DBSY# H_DEFER#
AB8 H_D#_40 C3 OUT H_DEFER# 3
HYRCOMP HD#41 H_DEFER# H_DPWR#
W2 J9 OUT H_DPWR# 3
HXSWING HD#42 H_D#_41 H_DPWR# H_DRDY#
AA4 H_D#_42 H8 BI H_DRDY# 3
HD#43 H_DRDY#
AA7 H_D#_43 K13
C254 R183 HD#44 H_DVREF Place C275 to bottom side.
AA2 H_D#_44 BI DBI#[0..3] 3
R208 HD#45 AA6 J7 DBI#0
0.1u_0402 24.9R1%_0402 HD#46 H_D#_45 H_DINV#0 DBI#1
2006.1.18
AA10 H_D#_46 W8
100_1%_0402 HD#47 H_DINV#1 DBI#2
Y8 H_D#_47 U3
HD#48 H_DINV#2 DBI#3
AA1 H_D#_48 AB10
HD#49 H_DINV#3
AB4
HD#50 H_D#_49
AC9
HD#51 H_D#_50 HDSTBN#0
AB11 K4
HD#52 H_D#_51 H_DSTBN#0 HDSTBN#1
AC11 T7 BI HDSTBN#[0..3] 3
HD#53 H_D#_52 H_DSTBN#1 HDSTBN#2
AB3 H_D#_53 Y5
V_FSB_VTT HD#54 H_DSTBN#2 HDSTBN#3
AC2 H_D#_54 AC4
HD#55 H_DSTBN#3
AD1
HD#56 H_D#_55 HDSTBP#0
AD9 H_D#_56 K3
R187 HD#57 H_DSTBP#_0 HDSTBP#1
AC1 T6 BI HDSTBP#[0..3] 3
V_FSB_VTT HD#58 H_D#_57 H_DSTBP#_1 HDSTBP#2
AD7 H_D#_58 AA5
221_1%_0402 HD#59 H_DSTBP#_2 HDSTBP#3
AC6 AC5
HD#60 H_D#_59 H_DSTBP#_3
AB5
HYSWING HD#61 H_D#_60 H_HIT#
AD10 H_D#_61 D3 BI H_HIT# 3
R188 HD#62 H_HIT# H_HITM#
AD4 D4 BI H_HITM# 3
HD#63 H_D#_62 H_HITM# H_LOCK#
54.9_1%_0402 AC8 H_D#_63 B3 IN H_LOCK# 3
R186 C238 H_LOCK#
HXRCOMP E1 BI
H_XRCOMP HREQ#[0..4] 3
100_1%_0402 0.1u_0402 HYSCOMP HXSCOMP E2 D8 HREQ#0
HXSWING H_XSCOMP H_REQ#_0 HREQ#1
E4 G8
H_XSWING H_REQ#_1 HREQ#2
B8
B H_REQ#_2 HREQ#3 B
F8
HYRCOMP H_REQ#_3 HREQ#4
Y1 A8
HYSCOMP H_YRCOMP H_REQ#_4
U1
HYSWING H_YSCOMP
0.5" max W1 H_YSWING OUT RS#[0..2] 3
B4 RS#0
length CK_H_MCH AG2
H_RS#_0
E6 RS#1
15 CK_H_MCH IN H_CLKIN H_RS#_1
IN CK_H_MCH# AG1 D6 RS#2
15 CK_H_MCH# H_CLKIN# H_RS#_2
E3 HCPUSLP#_GMCH R217 0R_0603 OUT
H_CPUSLP# H_SLP# 3
E7 H_TRDY# OUT
H_TRDY# H_TRDY# 3
945GT
No MSI PN
A A

Title
GMCH1- Host

Custom MS-9631 1.0

5 4 3 2 1
A B C D E
VCC3G_PCIE
R158 10R0402 OUT U11C
P_DDR1_A 20
R157 10R0402 OUT P_DDR2_A 20
R140 10R0402 OUT D32 D40 GRCOMP R234 24.9R1%_0603
U11B P_DDR1_B 20 L_BKLTCTL EXP_A_COMPI
R129 10R0402 OUT J30 D38
P_DDR2_B 20 L_BKLTEN EXP_A_COMPO
T32 AY35 OUT P_DDR0_A 20 H30 IN EXP_A_RXN_[0..15] 23,27
RSVD_1 SM_CK_0 L_CTLACLK
R32 AR1 P_DDR1_A1 H29 F34 EXP_A_RXN_0
RSVD_2 SM_CK_1 L_CTLB_DATA SDVO_TVCLKIN# / EXP_A_RXN_0
F3 AW7 OUT P_DDR0_B 20 G26 G38 EXP_A_RXN_1
RSVD_3 SM_CK_2 L_DDC_CLK SDVO_INT# / EXP_A_RXN_1
RSVD
F7 RSVD_4 AW40P_DDR1_B1 R155 10R0402 OUT N_DDR1_A 20 G25 H34 EXP_A_RXN_2
SM_CK_3 R156 10R0402 L_DDC_DATA SDVO_FLDSTALL# / EXP_A_RXN_2
AG11 RSVD_5 OUT N_DDR2_A 20 B38 J38 EXP_A_RXN_3
R141 10R0402 TP31 L_IBG EXP_A_RXN_3
AF11 AW35 C35 L34 EXP_A_RXN_4
DDR MUXING
RSVD_6 SM_CK#_0 OUT N_DDR0_A 20 OUT N_DDR1_B 20 L_VBG EXP_A_RXN_4
H7 AT1 N_DDR1_A1 R130 10R0402 OUT N_DDR2_B 20 F32 M38 EXP_A_RXN_5
RSVD_7 SM_CK#_1 R489 L_VDDEN EXP_A_RXN_5
J19 AY7 OUT N_DDR0_B 20 C33 N34 EXP_A_RXN_6
RSVD_8 SM_CK#_2 L_VREFH EXP_A_RXN_6
AY40 N_DDR1_B1 1.5KR0402 C32 P38 EXP_A_RXN_7
SM_CK#_3 L_VREFL EXP_A_RXN_7
4 R34 EXP_A_RXN_8 4
R224 EXP_A_RXN_8
A41 AU20 OUT SCKE_A0 20,21 A33 T38 EXP_A_RXN_9
RSVD_11 SM_CKE_0 LA_CLK# EXP_A_RXN_9
A35 RSVD_12 AT20 OUT SCKE_A1 20,21 A32 V34 EXP_A_RXN_10
SM_CKE_1 100KR0402 LA_CLK EXP_A_RXN_10
A34 RSVD_13 BA29 OUT SCKE_B0 20,21 E27 W38 EXP_A_RXN_11
SM_CKE_2 LB_CLK# EXP_A_RXN_11
D28 AY29 OUT SCKE_B1 20,21 E26 Y34 EXP_A_RXN_12
RSVD_14 SM_CKE_3 LB_CLK EXP_A_RXN_12
D27 AA38 EXP_A_RXN_13
RSVD_15 EXP_A_RXN_13
LVDS
AW13 OUT SCS_A#0 20,21 C37 AB34 EXP_A_RXN_14
R253 10KR0402 MCH_BSEL0 K16 SM_CS#_0 LA_DATA#_0 EXP_A_RXN_14
3,15 BSEL0 OUT CFG_0 AW12 OUT SCS_A#1 20,21 B35 AC38 EXP_A_RXN_15
R252 10KR0402 MCH_BSEL1 K18 SM_CS#_1 LA_DATA#_1 EXP_A_RXN_15
3,15 BSEL1 OUT AY21 OUT SCS_B#0 20,21 A37 IN EXP_A_RXP_[0..15] 23,27
R251 10KR0402 MCH_BSEL2 J18 CFG_1 SM_CS#_2 LA_DATA#_2
3,15 BSEL2 OUT AW21 OUT SCS_B#1 20,21 D34 EXP_A_RXP_0
CFG3 CFG_2 SM_CS#_3 SDVO_TVCLKIN / EXP_A_RXP_0
F18 F38 EXP_A_RXP_1
TP25 CFG4 CFG_3 TP14 SDVO_INT / EXP_A_RXP_1
E15 CFG_4 AL20 B37 G34 EXP_A_RXP_2
SM_OCDCOMP_0 LA_DATA_0 SDVO_FLDSTALL / EXP_A_RXP_2
PCI-EXPRESS GRAPHICS
TP28 CFG5 F15 AF10 TP15 VCC_DDR2 B34 H38 EXP_A_RXP_3
CFG6 CFG_5 SM_OCDCOMP_1 LA_DATA_1 EXP_A_RXP_3
E18 CFG_6 A36 J34 EXP_A_RXP_4
TP20 CFG7 LA_DATA_2 EXP_A_RXP_4
D19 CFG_7 BA13 OUT ODT_A0 20,21 L38 EXP_A_RXP_5
CFG8 SM_ODT_0 R162 1KR1%_0603 945GMDDR_VREF EXP_A_RXP_5
D16 CFG_8 BA12 OUT ODT_A1 20,21 M34 EXP_A_RXP_6
SM_ODT_1 EXP_A_RXP_6
CFG
TP30 CFG9 G16 AY20 OUT G30 N38 EXP_A_RXP_7
CFG_9 SM_ODT_2 ODT_B0 20,21 LB_DATA#_0 EXP_A_RXP_7
CFG10 E16 AU21 OUT VCC_DDR2 C171 C169 D30 P34 EXP_A_RXP_8
CFG_10 SM_ODT_3 ODT_B1 20,21 LB_DATA#_1 EXP_A_RXP_8
CFG11 D15 R161 0.1u_0603 0.1u_0603 F29 R38 EXP_A_RXP_9
TP27 CFG12 CFG_11 LB_DATA#_2 EXP_A_RXP_9
G15 CFG_12 AV9 M_RCOMPNR127 80.6R1%_0603 T34 EXP_A_RXP_10
TP21 CFG13 SM_RCOMP# EXP_A_RXP_10
K15 CFG_13 AT9 M_RCOMPP 1KR1%_0603 V38 EXP_A_RXP_11
TP29 CFG14 SM_RCOMP R128 80.6R1%_0603 EXP_A_RXP_11
C15 CFG_14 F30 W34 EXP_A_RXP_12
TP22 CFG15 LB_DATA_0 EXP_A_RXP_12
H16 CFG_15 AK1 945GMDDR_VREF D29 Y38 EXP_A_RXP_13
CFG16 SM_VREF_0 V_1P5_CORE LB_DATA_1 EXP_A_RXP_13
G18 CFG_16 AK41 F28 AA34 EXP_A_RXP_14
TP26 CFG17 SM_VREF_1 LB_DATA_2 EXP_A_RXP_14
H15 CFG_17 AB38 EXP_A_RXP_15
CFG18 EXP_A_RXP_15
J25 CFG_18 OUT EXP_A_TXN_[0..15] 23,27
CFG19 K27 A16 F36 EXP_A_TXN_0
CFG20 CFG_19 TV_DACA_OUT SDVOB_RED# / EXP_A_TXN_0
23 CFG20 OUT J26 CFG_20 AF33 IN CK_PE_100M_MCH# 15 C18 G40 EXP_A_TXN_1
G_CLKIN# TV_DACB_OUT SDVOB_GREEN# / EXP_A_TXN_1
AG33 IN CK_PE_100M_MCH 15 A19 H36 EXP_A_TXN_2
BM_BUSY# G_CLKIN TV_DACC_OUT SDVOB_BLUE# / EXP_A_TXN_2
13 BM_BUSY# OUT G28 PM_BMBUSY# A27 IN CK_96M_DREF# 15 J40 EXP_A_TXN_3
D_REFCLKIN# SDVOB_CLKN / EXP_A_TXN_3
CLK
PM
PM_EXTTS#0 F25 A26 IN J20 L36 EXP_A_TXN_4

PM_EXTTS#_0 D_REFCLKIN CK_96M_DREF 15 TV_IREF SDVOC_RED# / SDVOB_ALPHA# / EXP_A_TXN_4
TV
3 PM_EXTTS#1 H26 C40 B16 M40 EXP_A_TXN_5 3
PM_EXTTS#_1 D_REFSSCLKIN# R223 0R_0402 TV_IRTNA SDVOC_GREEN# / EXP_A_TXN_5
3,12 TRMTRIP# OUT G6 PM_THRMTRIP# D41 B18 N36 EXP_A_TXN_6
D_REFSSCLKIN R222 0R_0402 TV_IRTNB SDVOC_BLUE# / EXP_A_TXN_6
13,28 PWRGD IN AH33 PWROK B19 P40 EXP_A_TXN_7
TV_IRTNC SDVOC_CLKN / EXP_A_TXN_7
15,16,22,28 DEV_RST# IN AH34 V_1P5_CORE R36 EXP_A_TXN_8
RSTIN# EXP_A_TXN_8
T40 EXP_A_TXN_9
EXP_A_TXN_9
AE35 IN DMIRXN0 13 Without LVDS K30 V36 EXP_A_TXN_10
DMI_RXN_0 TV_DCONSEL0 EXP_A_TXN_10
MISC
23,27 SDVO_CTRL_CLK BI H28 SDVO_CTRLCLK AF39 IN DMIRXN1 13 J29 W40 EXP_A_TXN_11

DMI_RXN_1 TV_DCONSEL1 EXP_A_TXN_11
23,27 SDVO_CTRL_DATA BI H27 SDVO_CTRLDATA AG35 IN DMIRXN2 13 Y36 EXP_A_TXN_12
DMI_RXN_2 EXP_A_TXN_12
12 MCH_ICH_SYNC# BI K28 ICH_SYNC# AH39 IN DMIRXN3 13 AA40 EXP_A_TXN_13
DMI_RXN_3 EXP_A_TXN_13
H32 CLK_REQ# AB36 EXP_A_TXN_14
VGA_BLUE EXP_A_TXN_14
26 VGA_BLUE OUT E23 AC40 EXP_A_TXN_15
CRT_BLUE EXP_A_TXN_15
D1 NC0 AC35 IN DMIRXP0 13 D23 OUT EXP_A_TXP_[0..15] 23,27
DMI_RXP_0 VGA_GREEN CRT_BLUE#
C41 AE39 IN DMIRXP1 13 26 VGA_GREEN OUT C22 D36 EXP_A_TXP_0
NC1 DMI_RXP_1 CRT_GREEN SDVOB_RED / EXP_A_TXP_0
C1 AF35 IN DMIRXP2 13 B22 F40 EXP_A_TXP_1
NC2 DMI_RXP_2 VGA_RED CRT_GREEN# SDVOB_GREEN / EXP_A_TXP_1
BA41 AG39 IN DMIRXP3 13 26 VGA_RED OUT A21 G36 EXP_A_TXP_2
NC3 DMI_RXP_3 CRT_RED SDVOB_BLUE / EXP_A_TXP_2
BA40 NC4 B21 H40 EXP_A_TXP_3
CRT_RED# SDVOB_CLKP / EXP_A_TXP_3
BA39 NC5 J36 EXP_A_TXP_4
SDVOC_RED / SDVOB_ALPHA / EXP_A_TXP_4
DMI
VGA
BA3 AE37 OUT DMITXN0 13 L40 EXP_A_TXP_5
NC6 DMI_TXN_0 MCH_DDC_CLK SDVOC_GREEN / EXP_A_TXP_5
BA2 NC7 AF41 OUT DMITXN1 13 26 MCH_DDC_CLK BI C26 M36 EXP_A_TXP_6
DMI_TXN_1 CRT_DDC_CLK SDVOC_BLUE / EXP_A_TXP_6
NC
BA1 AG37 OUT BI MCH_DDC_DATA C25 N40 EXP_A_TXP_7

NC8 DMI_TXN_2 DMITXN2 13 26 MCH_DDC_DATA CRT_DDC_DATA SDVOC_CLKP / EXP_A_TXP_7
B41 AH41 OUT OUT R232 39R_0402 G23 P36 EXP_A_TXP_8
NC9 DMI_TXN_3 DMITXN3 13 26 HSYNC CRT_HSYNC EXP_A_TXP_8
B2 R488 255R1%_0603-BOT J22 R40 EXP_A_TXP_9
NC10 R233 39R_0402 CRT_IREF EXP_A_TXP_9
AY41 26 VSYNC OUT H23 T36 EXP_A_TXP_10
NC11 CRT_VSYNC EXP_A_TXP_10
AY1 NC12 AC37 OUT DMITXP0 13 V40 EXP_A_TXP_11
DMI_TXP_0 EXP_A_TXP_11
AW41 AE41 OUT DMITXP1 13 W36 EXP_A_TXP_12
NC13 DMI_TXP_1 EXP_A_TXP_12
AW1 NC14 AF37 OUT DMITXP2 13 Y40 EXP_A_TXP_13
DMI_TXP_2 EXP_A_TXP_13
A40 AG41 OUT DMITXP3 13 AA36 EXP_A_TXP_14
NC15 DMI_TXP_3 EXP_A_TXP_14
A4 NC16 AB40 EXP_A_TXP_15
EXP_A_TXP_15
A39
NC17 VCC3
A3
NC18 945GT
2 2
945GT
PM_EXTTS#0 R246 10K_0402
PM_EXTTS#1 R228 10K_0402
PM_EXTTS#1
13,31 DPRSLPVR
R227 0R_0402
NB strapping CFG[3:17] Internal Pull up CFG[18:20] Internal Pull down VCC3 VCC3 VCC3
R239
CFG5 CFG9 R242 2.2K_0402 CFG11 R250 X_2.2K_0402 CFG16 R240 X_2.2K_0402 CFG18 R231 2.2K_0402 CFG19 R229 X_2.2K_0402 CFG20 R230 X_2.2K_0402
X_2.2K_0402 CFG7 TP1

CFG10 R241 X_2.2K_0402
HIGH HIGH LOW LOW HIGH HIGH HIGH LOW LOW

CFG20 SDVO/PCIe concurrent
CFG5 DMI Width CFG7 CPU STRAP CFG9 PCIE CFG10 HOST PLL CFG11 PSB 4X CFG16 FSB Dynamic CFG19 DMI LANE LOW=Only SDVO or PCIE x 1 is
LOW=DMI x 2 LOW=REVERSED Graphics VCO SELECT CLK ENABLE ODT LOW=Dynamic ODT CFG18 VCC Select REVERSAL LOW=Normal
LOW=1.05V operational
HIGH=DMI x 4 HIGH=MOBILE CPU LOW=REVERSE LAN LOW=REVERSED LOW=4X ENABLE Disabled HIGH=LANES REVRSED
HIGH=1.5V HIGH=SDVO and PCIE x 1 are
1
HIGH=NORMAL HIGH=MOBILITY HIGH=8X HIGH=Dynamic ODT operating simultaneously via 1
Enabled the PEG port

Title
GMCH2-PCIE/DMI/CRT

Custom MS-9631 1.0

A B C D E
A B C D E
4 4
U11D
20 DATA_A[63:0]
DATA_A0 AJ35 AU12 U11E
SA_DQ0 SA_BS_0 SBS_A0 20,21 20 DATA_B[63:0]
DATA_A1 AJ34 AV14 DATA_B0 AK39 AT24
SA_DQ1 SA_BS_1 SBS_A1 20,21 SB_DQ0 SB_BS_0 SBS_B0 20,21
DATA_A2 AM31 BA20 DATA_B1 AJ37 AV23
SA_DQ2 SA_BS_2 SBS_A2 20,21 SB_DQ1 SB_BS_1 SBS_B1 20,21
DATA_A3 AM33 DATA_B2 AP39 AY28
SA_DQ3 SB_DQ2 SB_BS_2 SBS_B2 20,21
DATA_A4 AJ36 DATA_B3 AR41
DATA_A5 SA_DQ4 DATA_B4 SB_DQ3
AK35 SA_DQ5 AJ33 DQM_A0 20 AJ38
DATA_A6 SA_DM_0 DATA_B5 SB_DQ4
AJ32 SA_DQ6 SA_DM_1 AM35 DQM_A1 20 AK38 AK36 DQM_B0 20
DATA_A7 DATA_B6 SB_DQ5 SB_DM_0
AH31 SA_DQ7 AL26 DQM_A2 20 AN41 AR38 DQM_B1 20
DATA_A8 SA_DM_2 DATA_B7 SB_DQ6 SB_DM_1
AN35 SA_DQ8 AN22 DQM_A3 20 AP41 AT36 DQM_B2 20
AP33 SA_DQ9 AM14 DQM_A4 20 AT40 BA31 DQM_B3 20
AR31 SA_DQ10 AL9 DQM_A5 20 AV41 AL17 DQM_B4 20
AP31 SA_DQ11 AR3 DQM_A6 20 AU38 AH8 DQM_B5 20
AN38 SA_DQ12 AH4 DQM_A7 20 AV38 BA5 DQM_B6 20
AM36 SA_DQ13 AP38 AN4 DQM_B7 20
DATA_A14 DATA_B13 SB_DQ12 SB_DM_7
AM34 SA_DQ14 AK33 DQS_A0 20 AR40
DATA_A15 SA_DQS_0 DATA_B14 SB_DQ13
AN33 SA_DQ15 SA_DQS_1 AT33 DQS_A1 20 AW38 AM39 DQS_B0 20
DATA_A16 DATA_B15 SB_DQ14 SB_DQS_0
AK26 SA_DQ16 AN28 DQS_A2 20 AY38 AT39 DQS_B1 20
DATA_A17 SA_DQS_2 DATA_B16 SB_DQ15 SB_DQS_1
AL27 SA_DQ17 AM22 DQS_A3 20 BA38 AU35 DQS_B2 20
AM26 AN12 DQS_A4 20 AV36 AR29 DQS_B3 20
DDR SYSTEM MEMORY A

DATA_A19 SA_DQ18 SA_DQS_4 DATA_B18 SB_DQ17 SB_DQS_3
AN24 AN8 DQS_A5 20 AR36 AR16 DQS_B4 20
DDR SYSTEM MEMORY B

DATA_A20 SA_DQ19 SA_DQS_5 DATA_B19 SB_DQ18 SB_DQS_4
AK28 SA_DQ20 AP3 DQS_A6 20 AP36 AR10 DQS_B5 20
AL28 SA_DQ21 AG5 DQS_A7 20 BA36 AR7 DQS_B6 20
AM24 SA_DQ22 AK32 DQS_A#0 20 AU36 AN5 DQS_B7 20
DATA_A23 SA_DQS#_0 DATA_B22 SB_DQ21 SB_DQS_7
AP26 SA_DQ23 AU33 DQS_A#1 20 AP35 AM40 DQS_B#0 20
3 DATA_A24 SA_DQS#_1 DATA_B23 SB_DQ22 SB_DQS#_0 3
AP23 SA_DQ24 AN27 DQS_A#2 20 AP34 AU39 DQS_B#1 20
DATA_A25 SA_DQS#_2 DATA_B24 SB_DQ23 SB_DQS#_1
AL22 SA_DQ25 AM21 DQS_A#3 20 AY33 AT35 DQS_B#2 20
AP21 SA_DQ26 SA_DQS#_4 AM12 DQS_A#4 20 BA33 SB_DQ25 AP29 DQS_B#3 20
DATA_A27 DATA_B26 SB_DQS#_3
AN20 SA_DQ27 AL8 DQS_A#5 20 AT31 AP16 DQS_B#4 20
AL23 SA_DQ28 SA_DQS#_6 AN3 DQS_A#6 20 AU29 AT10 DQS_B#5 20
DATA_A29 DATA_B28 SB_DQ27 SB_DQS#_5
AP24 SA_DQ29 AH5 DQS_A#7 20 AU31 AT7 DQS_B#6 20
AP20 SA_DQ30 MAA_A[0..13] 20,21 AW31 AP5 DQS_B#7 20
DATA_A31 MAA_A0 DATA_B30 SB_DQ29 SB_DQS#_7
AT21 SA_DQ31 SA_MA_0 AY16 AV29 MAA_B[0..13] 20,21
DATA_A32 MAA_A1 DATA_B31 SB_DQ30 MAA_B0
AR12 SA_DQ32 AU14 AW29 AY23
DATA_A33 SA_MA_1 MAA_A2 DATA_B32 SB_DQ31 SB_MA_0 MAA_B1
AR14 SA_DQ33 AW16 AM19 AW24
AP13 SA_DQ34 BA16 AL19 AY24
AP12 SA_DQ35 BA17 AP14 AR28
AT13 SA_DQ36 AU16 AN14 AT27
AT12 SA_DQ37 AV17 AN17 AT28
AL14 AU17 AM16 AU27
DATA_A39 SA_DQ38 SA_MA_7 MAA_A8 DATA_B38 SB_DQ37 SB_MA_6 MAA_B7
AL12 SA_DQ39 AW17 AP15 AV28
AK9 SA_DQ40 AT16 AL15 AV27
AN7 SA_DQ41 AU13 AJ11 AW27
AK8 SA_DQ42 AT17 AH10 AV24
AK7 SA_DQ43 AV20 AJ9 BA27
AP9 SA_DQ44 SA_MA_13 AV12 AN10 SB_DQ43 AY27
DATA_A45 DATA_B44 SB_MA_12 MAA_B13
AN9 SA_DQ45 AK13 AR23
DATA_A46 DATA_B45 SB_DQ44 SB_MA_13
AT5 SA_DQ46 AH11
DATA_A47 DATA_B46 SB_DQ45
AL5 SA_DQ47 AK10
AY2 AJ8
AW2 SA_DQ49 AY13 CAS_A# 20,21 BA10
DATA_A50 SA_CAS# DATA_B49 SB_DQ48
AP1 SA_DQ50 AW14 RAS_A# 20,21 AW10
DATA_A51 SA_RAS# DATA_B50 SB_DQ49
AN2 SA_DQ51 AK23 TP11 BA4 AR24 CAS_B# 20,21
DATA_A52 SA_RCVEMIN# DATA_B51 SB_DQ50 SB_CAS#
AV2 SA_DQ52 AK24 TP13 AW4 AU23 RAS_B# 20,21
DATA_A53 SA_RCVENOUT# DATA_B52 SB_DQ51 SB_RAS#
AT3 SA_DQ53 AY14 WE_A# 20,21 AY10 AK16 TP12
DATA_A54 SA_WE# DATA_B53 SB_DQ52 SB_RCVENIN#
AN1 SA_DQ54 AY9 AK18 TP10
2 DATA_A55 DATA_B54 SB_DQ53 SB_RCVENOUT# 2
AL2 SA_DQ55 AW5 AR27 WE_B# 20,21
DATA_A56 DATA_B55 SB_DQ54 SB_WE#
AG7 AY5
AF9 SA_DQ57 AV4
AG4 SA_DQ58 AR5
AF6 SA_DQ59 AK4
AG9 SA_DQ60 AK3
AH6 SA_DQ61 AT4
AF4 SA_DQ62 AK5
AF8 SA_DQ63 AJ5
DATA_B63 SB_DQ62
AJ3
SB_DQ63
945GT 945GT
1 1

Title
GMCH3-MEM

Custom MS-9631 1.0

A B C D E
5 U11F
4 3 2 1
AA33 AU41
V_1P5_CORE VCC_0 VCC_SM_0 V_1P5_CORE
W33 AT41
VCC_1 VCC_SM_1 U11G
5500mA P33
VCC_2 VCC_SM_2
AM41
N33 AU40 C158 AD27 AE27 VSS_NCTF
VCC_3 VCC_SM_3 C162 VCC_NCTF0 VSS_NCTF0
L33 BA34 AC27 AE26
VCC_4 VCC_SM_4 0.47UF VCC_NCTF1 VSS_NCTF1
J33 AY34 AB27 AE25
VCC_5 VCC_SM_5 VCC_NCTF2 VSS_NCTF2
1
1
EC30 EC29 C281 C277 0.47UF
+
+
AA32 AW34 AA27 AE24
Y32 AV34 Y27 AE23
1000u_6.3V 1000u_6.3V 10UF/10V_0805 0.22UF/10V VCC_7 VCC_SM_7 VCC_NCTF4 VSS_NCTF4
W32 AU34 W27 AE22
2
2
V32 AT34 V27 AE21
P32 AR34 U27 AE20
N32 BA30 T27 AE19
M32 AY30 R27 AE18
D L32
J32
VCC_13
VCC_14
VCC_SM_13
VCC_SM_14
AW30
AV30
AD26
AC26
VCC_NCTF10
VCC_NCTF11
VSS_NCTF10
VSS_NCTF11
AC17
Y17
V_1P5_CORE
D
AA31 AU30 AB26 U17
W31 AT30 AA26
VCC_16 VCC_SM_16 VCC_NCTF13 VCCAUX_NCTF
V31 AR30 Y26 AG27
VCC_17 VCC_SM_17 VCC_NCTF14 VCCAUX_NCTF0
T31 AP30 W26 AF27
R31
VCC_19 VCC_SM_19
AN30 Remove C777 & C778 -> V26
VCC_NCTF16 VCCAUX_NCTF2
AG26
P31 AM30 U26 AF26
N31
VCC_20 VCC_SM_20
AM29
VCC_DDR2 to GND -1025 T26
AG25
M31 AL29 R26 AF25
AA30 AK29 AD25 AG24
Y30 AJ29 AC25 AF24
W30 AH29 AB25 AG23
V30 AJ28 AA25 AF23
U30 AH28 Y25 AG22
T30 AJ27 W25 AF22
R30 AH27 V25 AG21
P30 BA26 U25 AF21
N30 AY26 T25 AG20
M30 AW26 R25 AF20
L30 AV26 AD24 AG19
AA29 AU26 AC24 AF19
Y29 AT26 AB24 R19
W29 AR26 AA24 AG18
V29 AJ26 Y24 AF18
U29 AH26 W24 R18
R29 AJ25 V24 AG17
P29 AH25 U24 AF17
M29 AJ24 T24 AE17
L29 AH24 R24 AD17
AB28 BA23 AD23 AB17
C AA28
Y28
VCC_44 VCC_SM_44
AJ23
BA22 C140
V23
U23
AA17
W17 C
V28
U28
VCC_45
VCC_46
VCC_SM_45
VCC_SM_46
AY22
AW22 0.47UF
T23
R23
VCC_NCTF42
VCC_NCTF43 NCTF VCCAUX_NCTF28
VCCAUX_NCTF29
V17
T17
T28 AV22 AD22 R17
R28 AU22 V22 AG16
P28 AT22 U22 AF16
N28 AR22 T22 AE16
M28 AP22 R22 AD16
L28 AK22 AD21 AC16
P27 AJ22 V21 AB16
N27 AK21 U21 AA16
M27
L27
VCC_55
VCC_56
VCC VCC_SM_55
VCC_SM_56
AK20
BA19
T21
R21
VCC_NCTF52
VCC_NCTF53
VCCAUX_NCTF38
VCCAUX_NCTF39
Y16
W16
P26 AY19 AD20 V16
N26 AW19 V20 U16
L26 AV19 U20 T16
N25 AU19 T20 R16
M25 AT19 R20 AG15
L25 AR19 AD19 AF15
P24 AP19 V19 AE15
N24 AK19 U19 AD15
M24 AJ19 T19 AC15
AB23 AJ18 AD18 AB15
AA23 AJ17 AC18 AA15
Y23 AH17 AB18 Y15
P23 AJ16 AA18 W15
N23 AH16 Y18 V15
M23 BA15 W18 U15
L23 AY15 V18 T15
AC22 AW15 U18 R15
VCC_74 VCC_SM_74 C143 VCC_NCTF71 VCCAUX_NCTF57
AB22 AV15 T18
B Y22
W22
VCC_75
VCC_76
VCC_SM_75
VCC_SM_76
AU15
AT15 0.47UF
VCC_NCTF72
B
VCC_77 VCC_SM_77 945GT
P22 AR15
VCC_78 VCC_SM_78
N22 AJ15
VCC_79 VCC_SM_79
M22 AJ14
VCC_80 VCC_SM_80
L22 AJ13
VCC_81 VCC_SM_81
AC21 AH13
VCC_82 VCC_SM_82
AA21 AK12
VCC_83 VCC_SM_83
W21 AJ12
VCC_84 VCC_SM_84
N21 AH12
VCC_85 VCC_SM_85
M21 AG12
VCC_86 VCC_SM_86
L21 AK11
VCC_87 VCC_SM_87
AC20 BA8
VCC_88 VCC_SM_88
AB20 AY8
VCC_89 VCC_SM_89
Y20 AW8
VCC_90 VCC_SM_90
W20 AV8
VCC_91 VCC_SM_91
P20 AT8
VCC_92 VCC_SM_92
N20 AR8
VCC_93 VCC_SM_93
M20 AP8
VCC_94 VCC_SM_94
L20 BA6
VCC_95 VCC_SM_95
AB19 AY6
VCC_96 VCC_SM_96
AA19 AW6
VCC_97 VCC_SM_97
Y19 AV6
VCC_98 VCC_SM_98
N19 AT6
VCC_99 VCC_SM_99
M19 AR6
VCC_100 VCC_SM_100 VCC_DDR2
L19 AP6
VCC_101 VCC_SM_101
N18 AN6
VCC_102 VCC_SM_102
M18 AL6
VCC_103 VCC_SM_103
L18 AK6
VCC_104 VCC_SM_104
P17 AJ6
VCC_105 VCC_SM_105
N17 AV1
A M17
N16
VCC_106
VCC_107
VCC_SM_106
VCC_SM_107
AJ1
C142 C141
A
VCC_108 10UF/10V_0805 10UF/10V_0805
M16
VCC_109 C186 C150
L16
VCC_110
945GT 0.47UF 0.47UF
Place close to GMCH
Title
GMCH-POWER1

Custom MS-9631 1.0
5 4 3 2 1
A B C D E
VCC3G_PCIE
C189 U11H
C195 V_2P5_MCH
70mA H22 AC14
VCCSYNC VTT_0 V_FSB_VTT
0.1u_0402 0.1u_0402 AB14
VTT_1
C30 W14
C273 VCC_TXLVDS0 VTT_2
B30 V14
0.1u_0402 VCC_TXLVDS1 VTT_3
A30 T14
VCC3G_PCIE VCC_TXLVDS2 VTT_4
R14
VTT_5
AJ41 P14
VCC3G_PCIE L12 91N1.5_1210-LF VCC3G0 VTT_6
V_1P5_CORE AB41 N14
VCC3G1 VTT_7
Y41 M14
VCC3G2 VTT_8
1
V41 L14
EC14 VCC3G_PCIE VCC3G3 VTT_9
R41 AD13
C188 C180 220u_POS VCC3G4 VTT_10
N41 AC13
10U10V_0805 10U10V_0805 VCC3G5 VTT_11
4 L41 AB13 4
VCCA_3GPLL VCC3G6 VTT_12
2
AC33 AA13
VCCA_3GPLL VTT_13
V_2P5_MCH G41 VCCA_3GBG Y13
VTT_14
H41 W13
VSSA_3GBG VTT_15
V13
C264 VCCA_CRTDAC VTT_16
F21 U13
VCCA_3GPLL R176 L13 1U25m_0603 0.1u_0402 VCCA_CRTDAC0 VTT_17
V_1P5_CORE E21 T13
1_1%_0603 VCCA_CRTDAC1 VTT_18
G21 R13
VSSA_CRTDAC VTT_19
N13
C602 VCCA_DPLLA VTT_20
B26 M13
C199 VCCA_DPLLB VCCA_DPLLA VTT_21
C39 L13
0.1u_0603-BOT 10U10V_0805 VCCA_HPLL VCCA_DPLLB VTT_22
AF1 AB12
VCCA_HPLL VTT_23
AA12
VTT_24
A38 VCCA_LVDS Y12
VTT_25
B39 W12
VSSA_LVDS VTT_26
V12
VCCA_MPLL VTT_27
AF2 U12
VCCA_MPLL VTT_28
T12
VTT_29
V_1P5_CORE H20 R12
VCCA_TVBG VTT_30
G20 P12
VSSA_TVBG VTT_31
N12
VTT_32
E19 M12
VCCA_TVDACA0 VTT_33
F19 L12
VCCA_TVDACA1 VTT_34
C20 R11
VCCA_TVDACB0 VTT_35
D20 P11
VCCA_TVDACB1 VTT_36
E20 VCCA_TVDACC0 N11
VTT_37
F20 M11
VCCA_TVDACC1 VTT_38
R10
VTT_39
V_1P5_CORE AH1 P10
VCCD_HMPLL0 VTT_40
AH2 N10
VCCD_HMPLL1 VTT_41
M10
3 VTT_42 3
A28 P9
V_1P5_CORE VCCD_LVDS0 VTT_43
V_1P5_CORE B28 N9
VCCD_LVDS1 VTT_44
C28 VCCD_LVDS2 M9
C269 C611 VTT_45
R8
V_1P5_CORE VTT_46
D21 VCCD_TVDAC P8
VTT_47
0.1u_0402 N8
L19 10U100mA_0805 VCCA_DPLLA 10U10V_0805-BOT A23
B23
VCC_HV0
POWER VTT_48
VTT_49
M8
P7
VCC_HV1 VTT_50
1
B25 N7
C287 EC31 VCC_HV2 VTT_51
VCC3 M7
VTT_52
V_1P5_CORE H19 R6
0.1u_0402 470u2.5V_POS VCC_QTVDAC VTT_53
P6
VTT_54
2
AK31 M6
C270 C612 VCCAUX0 VTT_55
AF31 A6
0.1u_0402 10U10V_0805-BOT VCCAUX1 VTT_56
AE31 R5
L17 10U100mA_0805 VCCA_DPLLB VCCAUX2 VTT_57
AC31 P5
VCCAUX3 VTT_58
AL30 N5
VCCAUX4 VTT_59
1
AK30 M5
C272 EC28 VCCAUX5 VTT_60 C271
AJ30 P4
VCCAUX6 VTT_61
AH30 N4
0.1u_0402 470u2.5V_POS VCCAUX7 VTT_62 0.47UF
AG30 VCCAUX8 M4
VTT_63
2
AF30 R3
VCCAUX9 VTT_64
Modify TV Disable Circuit. AE30
VCCAUX10
P3
VTT_65
All TV power signals connect to 1.5V. AD30 VCCAUX11 N3
VTT_66
AC30 M3
L15 120L500m_350_0402 VCCA_HPLL 945GM Design Guide page 188. VCCAUX12 VTT_67
AG29 R2
VCCAUX13 VTT_68
2005.11.3 AF29
VCCAUX14 VTT_69
P2
C216 AE29 M2
C215 VCCAUX15 VTT_70
AD29 D2
VCCAUX16 VTT_71
22UF/6.3V_0805 AC29 AB1
0.1u_0402 VCCAUX17 VTT_72
AG28 VCCAUX18 R1
2 VTT_73 2
AF28 VCCAUX19 P1
VTT_74
AE28 N1
VCCAUX20 VTT_75
AH22 M1
L14 120L500m_350_0402 VCCA_MPLL VCCAUX21 VTT_76 C222
AJ21
VCCAUX22 C261
AH21
C202 VCCAUX23 0.47UF
AJ20
C204 VCCAUX24 0.22UF/10V
AH20
VCCAUX25
22UF/6.3V_0805 AH19
0.1u_0402 VCCAUX26
P19
VCCAUX27
P16
VCCAUX28
AH15
VCCAUX29
P15
VCCAUX30
AH14
VCCAUX31
AG14
VCCAUX32
AF14 VCCAUX33
V_FSB_VTT D12 AE14
R261 10R_0603 VCCAUX34
A C Y14
VCCAUX35
AF13 VCCAUX36
RAS40WS AE13
V_2P5_MCH L18 VCCA_CRTDAC VCCAUX37
BI VCCA_CRTDAC 26 AF12
180L1500m_90_0603 VCCAUX38
AE12
VCCAUX39
V_1P5_CORE AD12
VCCAUX40
C276 C274 945GT
0.022U16V_0402
0.1u_0402
1 1

Title
GMCH4 - Power 2

Custom MS-9631 1.0

A B C D E
A B C D E
U11I U11J
AC41 AK34 AT23 AP10
VSS_0 VSS_97 VSS_180 VSS_277
AA41 VSS_1 VSS_98 AG34 AN23 AL10
VSS_181 VSS_278
W41 VSS_2 VSS_99 AF34 AM23 AJ10
VSS_182 VSS_279
T41 VSS_3 VSS_100 AE34 AH23 AG10
VSS_183 VSS_280
P41 AC34 AC23 AC10
M41 C34 W23 W10
J41 AW33 K23 U10
4 F41 AV33 J23 BA9 4
AV40 AR33 F23 AW9
AP40 VSS_9 VSS_106 AE33 C23 AR9
VSS_189 VSS_286
AN40 VSS_10 VSS_107 AB33 AA22 AH9
VSS_190 VSS_287
AK40 VSS_11 VSS_108 Y33 K22 AB9
VSS_191 VSS_288
AJ40 V33 G22 Y9
AH40 T33 F22 R9
AG40 R33 E22 G9
AF40 M33 D22 E9
AE40 H33 A22 A9
B40 G33 BA21 AG8
AY39 VSS_18 VSS_115 F33 AV21 AD8
VSS_198 VSS_295
AW39 VSS_19 VSS_116 D33 AR21 AA8
VSS_199 VSS_296
AV39 VSS_20 VSS_117 B33 AN21 U8
VSS_200 VSS_297
AR39 AH32 AL21 K8
AN39 AG32 AB21 C8
AJ39 AF32 Y21 BA7
AC39 AE32 P21 AV7
AB39 VSS_25 VSS_122 AC32 K21 AP7
VSS_205 VSS_302
AA39 VSS_26 VSS_123 AB32 J21 AL7
VSS_206 VSS_303
Y39 G32 H21 AJ7
W39 B32 C21 AH7
V39 VSS_29 VSS_126 AY31 AW20 AF7
VSS_209 VSS_306
T39 VSS_30 VSS_127 AV31 AR20 AC7
VSS_210 VSS_307
R39 VSS_31 VSS_128 AN31 AM20 R7
VSS_211 VSS_308
P39 VSS_32 VSS_129 AJ31 AA20 G7
VSS_212 VSS_309
N39 AG31 K20 D7
M39 VSS_34 VSS_131 AB31 B20 AG6
VSS_214 VSS_311
L39 VSS_35 VSS_132 Y31 A20 AD6
VSS_215 VSS_312
J39 AB30 AN19 AB6
H39 VSS_37 VSS_134 E30 AC19 Y6
3 VSS_217 VSS_314 3
G39 AT29 W19 U6
F39 VSS_39 VSS_136 AN29 K19 N6
VSS_219 VSS_316
D39 VSS_40 VSS_137 AB29 G19 K6
VSS_220 VSS_317
AT38 T29 C19 H6
AM38 VSS_42 VSS_139 N29 AH18 B6
VSS_222 VSS_319
AH38 VSS_43 VSS_140 K29 P18 AV5
VSS_223 VSS_320
AG38 G29 H18 AF5
AF38 E29 D18 AD5
AE38
C38
VSS_45
VSS_46
VSS_47
VSS VSS_142
VSS_143
VSS_144
C29
B29
A18
AY17
VSS_225
VSS_226
VSS_322
VSS_323
AY4
AR4
VSS_227 VSS_324
AK37 VSS_48 VSS_145 A29 AR17 AP4
VSS_228 VSS_325
AH37 BA28 AP17 AL4
AB37
AA37
VSS_49
VSS_50
VSS_51
VSS_146
VSS_147
VSS_148
AW28
AU28
AM17
AK17
VSS_229
VSS_230 VSS VSS_326
VSS_327
AJ4
Y4
VSS_231 VSS_328
Y37 AP28 AV16 U4
W37 VSS_53 VSS_150 AM28 AN16 R4
VSS_233 VSS_330
V37 VSS_54 VSS_151 AD28 AL16 J4
VSS_234 VSS_331
T37 AC28 J16 F4
R37 W28 F16 C4
P37 J28 C16 AY3
N37 VSS_58 VSS_155 E28 AN15 AW3
VSS_238 VSS_335
M37 AP27 AM15 AV3
L37 AM27 AK15 AL3
J37 VSS_61 VSS_158 AK27 N15 AH3
VSS_241 VSS_338
H37 J27 M15 AG3
G37 VSS_63 VSS_160 G27 L15 AF3
VSS_243 VSS_340
F37 F27 B15 AD3
D37 C27 A15 AC3
AY36 B27 BA14 AA3
AW36 AN26 AT14 G3
AN36 VSS_68 VSS_165 M26 AK14 AT2
2 VSS_248 VSS_345 2
AH36 VSS_69 VSS_166 K26 AD14 AR2
VSS_249 VSS_346
AG36 F26 AA14 AP2
AF36 VSS_71 VSS_168 D26 U14 AK2
VSS_251 VSS_348
AE36 VSS_72 VSS_169 AK25 K14 AJ2
VSS_252 VSS_349
AC36 P25 H14 AD2
C36 K25 E14 AB2
B36 H25 AV13 Y2
BA35 E25 AR13 U2
AV35 D25 AN13 T2
AR35 VSS_78 VSS_175 A25 AM13 N2
VSS_258 VSS_355
AH35 VSS_79 VSS_176 BA24 AL13 J2
VSS_259 VSS_356
AB35 VSS_80 VSS_177 AU24 AG13 H2
VSS_260 VSS_357
AA35 AL24 P13 F2
Y35 AW23 F13 C2
W35 VSS_83 D13 AL1
VSS_263 VSS_360
V35 B13
VSS_84 VSS_264
T35 AY12
VSS_85 VSS_265
R35 VSS_86 AC12
VSS_266
P35 K12
VSS_87 VSS_267
N35 VSS_88 H12
VSS_268
M35 E12
VSS_89 VSS_269
L35 AD11
VSS_90 VSS_270
J35 AA11
VSS_91 VSS_271
H35 Y11
VSS_92 VSS_272
G35 VSS_93 J11
VSS_273
F35 VSS_94 D11
VSS_274
D35 B11
VSS_95 VSS_275
AN34 VSS_96 AV10
VSS_276
945GT
1
945GT 1

Title
GMCH5 - Strap / GND

Custom MS-9631 1.0

A B C D E
8 7 6 5 4 3 2 1
C553 15P50V_0603
32.768KHZ12.5P_D
R455 U23A
Y5 RTCX1 AB1 AA6
RTXC1 LAD0 BI LPC_AD0 15,16,22
10MR RTCX2 AB2 AB5
RTCX2 LAD1 BI LPC_AD1 15,16,22 U23B
AC4 BI LPC_AD2 15,16,22
LAD2
RTC
RTC_RST# AA3 Y6 BI AD0 E18 D7 PREQ#0 IN
RTCRST# LAD3 BI LPC_AD3 15,16,22 24,30 AD[31..0] AD0 REQ0# PREQ#0 24
C551 15P50V_0603 AD1 C18 E7 PGNT#0 OUT
AD1 GNT0# PGNT#0 24
R461 1MR0402 INTRUDER# Y5 AD2 PREQ#1
LPC
VBAT AC3 IN LPC_DRQ#0 16 A16 C16 IN PREQ#1 24
INTVRMEN W4 INTRUDER# LDRQ0# AD3 AD2 REQ1# PGNT#1
AA5 F18 D16
VBAT INTVRMEN LDRQ1#/GPIO23 AD4 E16
AD3
AD4
PCI GNT1#
REQ2#
C17 PREQ#2
OUT
IN
PGNT#1
PREQ#2
24
24
D W1 AB3 OUT AD5 A18 D17 PGNT#2 OUT D
EE_CS LFRAME# LPC_FRAME# 15,16,22 AD5 GNT2# PGNT#2 24
Y1 AD6 E17 E13 PREQ#3 IN
EE_SHCLK AD6 REQ3# PREQ#3 24,30
R457 Y2 AE22 IN AD7 A17 F13 PGNT#3 OUT
EE_DOUT A20GATE A20GATE 16 AD7 GNT3# PGNT#3 30
330KR_0603 W3 AH28 H_A20M# OUT AD8 A15 A13 PREQ#4 IN
EE_DIN A20M# H_A20M# 3 AD8 REQ4#/GPIO22 PREQ#4 24
AD9 C14 A14
AD10 AD9 GNT4#/GPIO48 PREQ#5
V3 AG27 E14 C8 IN PREQ#5 24
R458 LAN_CLK CPUSLP# TP32 AD11 AD10 GPIO1/REQ5#
D14 AD11 GPIO17/GNT5# D8
X_0R U3 AF24 OUT AD12 B12
LAN_RSTSYNC TP1/DPRSTP# H_DPRSTP# 3,31 AD12
AH25 OUT AD13 C13 B15 C_BE#0
TP2/DPSLP# H_DPSLP# 3 AD13 C/BE0# BI C_BE#[3..0] 24,30
U5 AD14 G15 C12 C_BE#1
LAN
LAN_RXD0 H_FERR# AD15 AD14 C/BE1# C_BE#2
V4 AG26 IN H_FERR# 3 G13 D12
LAN_RXD1 FERR# AD16 AD15 C/BE2# C_BE#3
T5
LAN_RXD2
AG24 OUT AD17
E12
C11
AD16 ICH7-M C/BE3#
C15
GPIO49/CPUPWRGD H_PWRGD 3 AD17
U7
LAN_TXD0
AD18 D11 AD18 PARTB IRDY# A7 BI IRDY# 24,30
CPU
V6 AG22 OUT AD19 A11 E10
LAN_TXD1 IGNNE# H_IGNNE# 3 AD19 PAR BI PAR 24,30
V7 AG21 OUT AD20 A10 B18 OUT
LAN_TXD2 INT3_3V# FWH_INIT 15 AD20 PCIRST# PCIRST_ICH7# 24,30
AF22 OUT AD21 F11 A12
INIT# H_INIT# 3 AD21 DEVSEL# BI DEVSEL# 24,30
R466 39R_0402 U1 AF25 AD22 F10 C9
AC-97/AZALIA
17 AC_BITCLK OUT ACZ_BCLK INTR OUT H_INTR 3 AD22 PERR# BI PERR# 24,30
OUT R463 39R_0402 R6 AD23 E9 E11
17 AC_SYNC ACZ_SYNC AD23 PLOCK# BI LOCK# 24
AG23 IN AD24 D9 B10
RCIN# KBRST# 16 AD24 SERR# BI SERR# 24
OUT R464 39R_0402 R5 AD25 B9 F15
17 AC_RST# ACZ_RST# AD25 STOP# BI STOP# 24,30
AH24 OUT AD26 A8 F14
NMI H_NMI 3 AD26 TRDY# BI TRDY# 24,30
IN T2 AF23 OUT AD27 A6 F16
17 AC_SDIN0 ACZ_SDIN0 SMI# ICH_H_SMI# 3 AD27 FRAME# BI FRAME# 24,30
T3 AD28 C7
ACZ_SDIN1 AD29 AD28
T1 AH22 OUT H_STPCLK# 3 B6 C26 OUT PLTRST# 28
ACZ_SDIN2 STPCLK# AD30 AD29 PLTRST#
E6 AD30 PCICLK A9 IN ICH_PCLK 15
17 AC_SDOUT OUT R465 39R_0402 T4 AF26 TRMTRIP# IN TRMTRIP# 3,7
Please R370 within 2" AD31 D6 B19 BI PCI_PME# 24
ACZ_SDOUT THERMTRIP# R370 24R0402 AD31 PME#
from ICH7M
SATALED# needs 13,19,26 SATALED# OUT AF18
SATALED#
3.3V external DD0
AB15 PDD0
PDD1
BI PDD[0..15] 29 Interrupt I/F
29 SATA_RX#2 IN AF3 AE14 24 PIRQ#A BI A3 G8 BI PIRQ#E 24
C pull high. SATA0RXN DD1 PDD2 PIRQA# GPIO2/PIRQE# C
29 SATA_RX2 IN AE3 AG13 24 PIRQ#B BI B4 F7 BI PIRQ#F 24,30
SATA0RXP DD2 PDD3 PIRQB# GPIO3/PIRQF#
29 SATA_TX#2 OUT AG2 AF13 24 PIRQ#C BI C5 F8 BI PIRQ#G 24
SATA0TXN DD3 PDD4 PIRQC# GPIO4/PIRQG#
29 SATA_TX2 OUT AH2 AD14 24 PIRQ#D BI B5 G7 BI PIRQ#H 24
SATA0TXP DD4 PDD5 PIRQD# GPIO5/PIRQH#
AC13
DD5 PDD6
AF7 AD12
SATA
29 SATA_RX#3 IN SATA2RXN DD6
AE7 AC12 PDD7
MISC
IDE
29 SATA_RX3 IN SATA2RXP DD7
OUT AG6 AE12 PDD8 AE5 AE9
29 SATA_TX#3 SATA2TXN DD8 RSVD[1] RSVD[6]
OUT AH6 AF12 PDD9 AD5 AG8
29 SATA_TX3 SATA2TXP DD9 RSVD[2] RSVD[7]
AB13 PDD10 AG4 AH8
DD10 PDD11 RSVD[3] RSVD[8]
15 CK_ICHSATA# IN AF1 AC14 AH4 F21
SATA_CLKN DD11 PDD12 RSVD[4] TP3 TP36
15 CK_ICHSATA IN AE1 AF14 AD9 AH20 BI MCH_ICH_SYNC# 7
SATA_CLKP DD12 PDD13 RSVD[5] MCH_SYNC#
AH13
SATA_BIAS < 500mil R436 DD13 PDD14 ICH7M-DH
AH10 AH14
SATA_BIAS SATARBIASN DD14 PDD15
5 mil trace width AG10 AC15
SATARBIASP DD15
20R1%0402 AH17
DA0 OUT PD_A0 29
29 PD_IOR# OUT AF15 AE17 OUT PD_A1 29
DIOR# DA1
29 PD_IOW# OUT
OUT
AH15
AF16
DIOW# ICH7-M DA2
AF17 OUT PD_A2 29
29 PD_DACK# DDACK#
29 IDE_IRQ IN AH16
IDEIRQ PARTA DCS1#
AE16 OUT PD_CS#1 29
29 PD_IORDY IN AG16 AD16 OUT PD_CS#3 29
IORDY DCS3#
29 PD_DREQ IN AE15
DDREQ
ICH7M-DH
VCC3_SB VBAT
B RN31 B
D23
KBRST# 1 2 VCC3
1
S-BAT54C_SOT23 A20GATE 3 4
CLR_CMOS1 IN GPIO38 5 6
13 GPIO38
3 R468 20K_1%_0603 J_RTCRST# IN GPIO39 7 8
3 13 GPIO39
RTC_RST#
2 8P4R-8.2KR
C549 C558 1
1U16V_0805 1U16V_0805
2
H1X3_black
R472
Please R319 within 2"
1K_0603
from ICH7M
V_FSB_VTT
BAT1 R361 56R_0402 TRMTRIP#
R375 56R_0402 H_FERR#
SATALED# R403 10KR0402

VCC3
A A

Title
ICH7M- CPU/IDE/Azalia

Custom MS-9631 1.0

8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
U23D
18 PCIE_RN1 IN F26 V26 IN DMITXN0 7

PERn1 DMI0RXN
18 PCIE_RP1 IN F25 V25 IN DMITXP0 7
U23C RN34 C433 0.1u_0402 PCIE_TN1_C E28 PERp1 DMI0RXP
18 PCIE_TN1 OUT U28 OUT DMIRXN0 7
SMBCLK_RESUME C22 C432 0.1u_0402 PCIE_TP1_C E27 PETn1 DMI0TXN
18,23,24 SMBCLK_RESUME BI AF19 1 2 18 PCIE_TP1 OUT U27 OUT DMIRXP0 7
SMBDATA_RESUME B22 SMBCLK GPIO21/SATA0GP PETp1 DMI0TXP
18,23,24 SMBDATA_RESUME BI SMBDATA GPIO19/SATA1GP AH18 3 4
Clocks SATA
LINK_ALERT# A26 AH19 5 6 H26 Y26
GPIO
D 19 PCIE_RN2 IN IN DMITXN1 7 D
LINKALERT# GPIO36/SATA2GP PERn2 DMI1RXN
SMB
IN SM_LINK0 B25 AE19 7 8 IN H25 Y25 IN
24 SM_LINK0 SMLINK0 GPIO37/STAT3GP 19 PCIE_RP2 PERp2 DMI1RXP DMITXP1 7
SM_LINK1 C423 0.1u_0402 PCIE_TN2_C G28
Direct Media
24 SM_LINK1 IN A25 SMLINK1 19 PCIE_TN2 OUT PETn2 DMI1TXN W28 OUT DMIRXN1 7
AC1 8P4R-100R OUT C424 0.1u_0402 PCIE_TP2_C G27 W27 OUT
CLK14 IN ICH_14M 15 19 PCIE_TP2 PETp2 DMI1TXP DMIRXP1 7
PCI-Express
Interface (
RI# A28 B2
RI# CLK48 IN USB_48 15
K26 AB26 IN DMITXN2 7
PERn3 DMI2RXN
17,26 SPKR OUT A19 SPKR SUSCLK C20 OUT SUSCLK 22 K25 PERp3 DMI2RXP AB25 IN DMITXP2 7
LPCPD# A27 J28 AA28 OUT
SUS_STAT# PETn3 DMI2TXN DMIRXN2 7
DMI )
15,26 FP_RST# IN A22 B24 OUT SLP_S3# 16,28,31 J27 AA27 OUT DMIRXP2 7
SYS_RST# SLP_S3# R376 X_0R_0603 PETp3 DMI2TXP
SLP_S4# D23 OUT SLP_S4# 28
IN BM_BUSY# AB18 F22 M26 AD25 IN
7 BM_BUSY# GPIO0/BM_BUSY# SLP_S5# PERn4 DMI3RXN DMITXN3 7
Power MGT
R368 0R_0603 M25 AD24 IN
PERp4 DMI3RXP DMITXP3 7
IN SMB_ALERT# B23 AA4 L28 AC28 OUT
18 SMB_ALERT# GPIO11/SMBALERT# PWROK IN PWRGD 7,28 PETn4 DMI3TXN DMIRXN3 7
L27 PETp4 DMI3TXP AC27 OUT DMIRXP3 7
AC20 AC22 PR1 0R_0402 <500mils
TP37 GPIO18/STPPCI# GPIO16/DPRSLPVR OUT DPRSLPVR 7,31
AF21 GPIO20/STPCPU# P26 AE28 IN CK_PE_100M_ICH# 15
TP34 BATTLOW# PERn5 DMI_CLKN
TP0/BATLOW# C21 P25 AE27 IN CK_PE_100M_ICH 15
PERp5 DMI_CLKP
A21 N28
EL_RSVD/GPIO26 PETn5
PWRBTN# C23 IN PWRBTN# 16 N27 PETp5 DMI_ZCOMP C25 DMI_ZCOMP R363 24.9R1%_0402
V_1P5_CORE
GPIO
26 EL_STATE0 OUT B21 EL_STATE0/GPIO27 DMI_IRCOMP D25 DMI_ZCOMP < 500mil
SYS
E23 C19 LAN_RST# T25
26 EL_STATE1 OUT EL_STATE1/GPIO28 LAN_RST# PERn6 5 mil trace width
T24 PERp6 USBP0N F1 BI USB0- 25
29 CPUFAN_GPIO OUT AG18 GPIO32/CLKRUN# RSMRST# Y4 RSMRST#
IN RSMRST# 18,28 LAN_RST# connect to R28 PETn6 USBP0P F2 BI USB0+ 25
PLTRST#. Follow Intel R27 PETp6 USBP1N G4 BI USB1- 25
AC19 E20 GPIO9 R406 0R_0402 LAN_RST# G3
29 SYSFAN_GPIO OUT GPIO33/AZ_DOCK_EN# GPIO9 schematic checklist USBP1P BI USB1+ 25
U2 GPIO34/AZ_DOCK_RST# GPIO10 A20 TP35 R2 SPI_CLK USBP2N H1 BI USB2- 25
F19 GPIO12 P6 H2
GPIO12 SPI_CS# USBP2P BI USB2+ 25
USB
18,23 WAKE# IN F20 WAKE# GPIO13 E19 IN SIO_PME# 16 P1 SPI_ARB USBP3N J4 BI USB3- 25
SERIRQ GPIO14
GPIO
AH21 R4 J3
SPI
16,22 SERIRQ BI SERIRQ GPIO14 USBP3P BI USB3+ 25
IN THERM# AF20 E22 P5 K1
15,31 THERM# THRM# GPIO15 OUT BIOS_WP# 15 SPI_MOSI USBP4N BI USB4- 25
R3 LAN_EN P2 K2
C GPIO24 OUT LAN_EN 18 SPI_MISO USBP4P BI USB4+ 25 C
31 VRM_GD IN AD22 D20 L4 BI USB5- 25
VRMPWRGD GPIO25 TP38 USBP5N
GPIO35/SATACLKREQ# AD21
TP33 GPIO24 default low USBP5P L5 BI USB5+ 25
AD20 GPIO38 IN D3 M1
GPIO38 OUT GPIO38 12 25 OC#1 OC0# USBP6N BI USB6- 25
SIO_OVT# GPIO39
16 SIO_OVT# IN
GPIO7
AC21 GPIO6 GPIO39 AE20 OUT GPIO39 12 C4
OC1# ICH7-M USBP6P
M2 BI USB6+ 25
IN SLPBTIN#
AC18
E21
GPIO7 ICH7-M 25 OC#2 IN D5
D4
OC2#
PARTD USBP7N N4
N3
BI USB7- 25
26 SLPBTIN# GPIO8 OC3# USBP7P BI USB7+ 25
PARTC 25 OC#3 IN E5 OC4#
C3 OC5# / GPIO29
ICH7M-DH IN A2 D2 USB_BIAS R448
25 OC#4 OC6# / GPIO30 USBRBIAS#
B3 OC7# / GPIO31 USBRBIAS D1
22.6R1%_0402
ICH7M-DH USB_BIAS < 500mil
GPIO[0:15] --> SMI 4 mil trace width
SM BUS ISOLATION
OUT SMBDATA_RESUME 18,23,24
Strapping & Pull-up Resistor (To: PCI,PCI-Express,ICH6)

+12V R462 1K_0603 Q43
RI# 2 1 VCC3_SB
(To:
LINK_ALERT# 4 3 SATALED# 2 1 N-2N7002_SOT23
SM_LINK0 RN27
12,19,26 SATALED# IN
SERIRQ
VCC3
R471
CLK,DIMM,MS-7,HW_Monitor)
6 5 4 3
SM_LINK1 8 7 8P4R-8.2KR THERM# 6 5 RN32 4.7K_0603 OUT SMBDATA_MAIN 15,16,19,20,28
SIO_OVT# 8 7 8P4R-8.2KR
B SMB_ALERT# B
2 1 28 SMB_PWROK IN
SIO_PME# 4 3 OUT SMBCLK_RESUME 18,23,24
SLPBTIN# 6 5 RN30 GPIO7 R410 10K_0402 C555
BATTLOW# 8 7 8P4R-8.2KR CPUFAN_GPIO R409 10K_0402 (To: PCI,PCI-Express,ICH6)
0.1u_0603
2 1 R476 1K_0603 Q46
GPIO9 4 3 (To: CLK,DIMM,MS-7,
GPIO12 6 5 RN33 N-2N7002_SOT23
GPIO14 8P4R-8.2KR
HW_Monitor)
8 7
OUT SMBCLK_MAIN 15,16,19,20,28
LPCPD# R360 X_10K SPKR R268 X_10K_0402
WAKE# R395 1KR0402 Reserved for No Reboot

4.7K_0603
BIOS_WP# R397 10K_0402 SMBCLK_MAIN R481
VCC3
SMBDATA_MAIN R469
4.7K_0603
DPRSLPVR R105 X_100KR0402
PWRGD R477 10K_0402 SMBCLK_RESUME R483 4.7K_0603
VCC3_SB
SMBDATA_RESUME R399 4.7K_0603
ADD VCC5_SB
A A
R475
4.7K_0402
RSMRST#
R470 MICRO-STAR INt'L CO. , LTD.

10K_0402 Title
ICH7M - GPIO,USB,PCIE

Custom MS-9631 1.0

8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
U23F
A4 VSS[0] VSS[98] P28
A23 R1
VSS[1] VSS[99]
5VREF Sequencing Circuit B1
B8
VSS[2] VSS[100]
R11
R12
U23E VSS[3] VSS[101]
B11 R13
VSS[4] VSS[102]
VCC AUX
5VREF G10 L11 B14 R14
V5REF[1] Vcc1_05[1] V_FSB_VTT VSS[5] VSS[103]
L12 B17 R15
Vcc1_05[2] VSS[6] VSS[104]
AD17 L14 B20 R16
V5REF[2] Vcc1_05[3] VSS[7] VSS[105]
1
D18 1N5817 R422 1K_0603 EC47 C429 C502
+
VCC3 VCC5 L16 B26 R17
5VREF_SUS Vcc1_05[4] VSS[8] VSS[106]
F6 L17 B28 R18
5VREF V5REF_Sus Vcc1_05[5] 1000u_6.3V 0.1UF_0402 1U10V_0603 VSS[9] VSS[107]
L18 C2 T6
C491 0.1u_0402 Vcc1_05[6] VSS[10] VSS[108]
2
D AA22 M11 C6 T12 D
Vcc1_5_B[1] Vcc1_05[7] VSS[11] VSS[109]
AA23 M18 C27 T13
CORE
Vcc1_5_B[2] Vcc1_05[8] VSS[12] VSS[110]
AB22 P11 D10 T14
D21 1N5817 R446 1K_0603 Vcc1_5_B[3] Vcc1_05[9] VSS[13] VSS[111]
VCC3_SB VCC5_SB AB23 P18 D13 T15
Vcc1_5_B[4] Vcc1_05[10] VSS[14] VSS[112]
AC23 T11 D18 T16
5VREF_SUS Vcc1_5_B[5] Vcc1_05[11] VSS[15] VSS[113]
AC24 T18 D21 T17
C544 0.1u_0402 Vcc1_5_B[6] Vcc1_05[12] VSS[16] VSS[114]
AC25 U11 D24 U4
Vcc1_5_B[7] Vcc1_05[13] Internal LAN power-off VSS[17] VSS[115]
AC26 U18 E1 U12
Vcc1_5_B[8] Vcc1_05[14] VSS[18] VSS[116]
AD26 V11 VCC3_SB in S3-S5. E2 U13
Vcc1_5_B[9] Vcc1_05[15] C535 VSS[19] VSS[117]
AD27 V12 E4 U14
Vcc1_5_B[10] Vcc1_05[16] Following Intel VSS[21] VSS[118]
AD28 V14 E8 U15
Vcc1_5_B[11] Vcc1_05[17] VSS[22] VSS[119]
D26 V16 0.1UF_0402 schematic checklist. E15 U16
Vcc1_5_B[12] Vcc1_05[18] VSS[23] VSS[120]
D27 V17 F3 U17
Vcc1_5_B[13] Vcc1_05[19] VSS[24] VSS[121]
D28 V18 F4 U24
Vcc1_5_B[14] Vcc1_05[20] VSS[25] VSS[122]
E24 VCC3 F5 U25
V_EXP_ICH Vcc1_5_B[15] C541 VSS[26] VSS[123]
E25 V5 F12 U26
V_1P5_CORE Vcc1_5_B[16] VccSus3_3/VccLAN3_3[1] VSS[27] VSS[124]
E26 V1 F27 V2
Vcc1_5_B[17] VccSus3_3/VccLAN3_3[2] VSS[28] VSS[125]
F23 W2 0.1UF_0402 F28 V13
L21 80L3_100_0805 Vcc1_5_B[18] VccSus3_3/VccLAN3_3[3] VSS[29] VSS[126]
F24 W7 G1 V15
Vcc1_5_B[19] VccSus3_3/VccLAN3_3[4] VSS[30] VSS[127]
G22 VCC3_SB G2 V24
Vcc1_5_B[20] C533 VSS[31] VSS[128]
G23 U6 G5 V27
Vcc1_5_B[21] Vcc3_3/VccHDA VSS[32] VSS[129]
1
EC48 C431 C436 C434

+
H22 G6 V28
Vcc1_5_B[22] VSS[33] VSS[130]
VCCA3GP
H23 R7 0.1UF_0402 G9 W6
1000u_6.3V Vcc1_5_B[23] VccSus3_3/VccSusHDA VSS[34] VSS[131]
0.1UF_0402 0.1UF_0402 0.1UF_0402 J22 G14 W24
Vcc1_5_B[24] VSS[35] VSS[132]
ICH7-M PART F
2
J23 AE23 V_FSB_VTT G18 W25

Near D28,T28,AD28 Vcc1_5_B[25] V_CPU_IO[1] C455 C442 C446 VSS[36] VSS[133]
K22 AE26 G21 W26
Vcc1_5_B[26] V_CPU_IO[2] VSS[37] VSS[134]
K23 AH26 G24 Y3
Vcc1_5_B[27] V_CPU_IO[3] 0.1UF_0402 4.7U10V_0805 VSS[38] VSS[135]
L22 G25 Y24
Vcc1_5_B[28] VSS[39] VSS[136]
L23 AA7 G26 Y27
Vcc1_5_B[29] Vcc3_3[3] VSS[40] VSS[137]
M22 AB12 H3 Y28
Vcc1_5_B[30] Vcc3_3[4] VSS[41] VSS[138]
M23 AB20 H4 AA1
C Vcc1_5_B[31] Vcc3_3[5] VSS[42] VSS[139] C
N22 AC16 VCC3 H5 AA24
Vcc1_5_B[32] Vcc3_3[6] C485 C529 C540 VSS[43] VSS[140]
N23 AD13 H24 AA25
IDE
VCC3 Vcc1_5_B[33] Vcc3_3[7] VSS[44] VSS[141]
P22 AD18 H27 AA26
Vcc1_5_B[34] Vcc3_3[8] 0.1UF_0402 0.1UF_0402 0.1UF_0402 VSS[45] VSS[142]
P23 AG12 H28 AB4
Vcc1_5_B[35] Vcc3_3[9] VSS[46] VSS[143]
R22 AG15 J1 AB6
Vcc1_5_B[36] Vcc3_3[10] VSS[47] VSS[144]
R23 AG19 J2 AB11
C430 Vcc1_5_B[37] Vcc3_3[11] VSS[48] VSS[145]
R24 J5 AB14
Vcc1_5_B[38] VSS[49] VSS[146]
0.1u_0402 R25 A5 J24 AB16
Vcc1_5_B[39] Vcc3_3[12] VSS[50] VSS[147]
R26 B13 VCC3 J25 AB19
Vcc1_5_B[40] Vcc3_3[13] C479 C445 C466 C482 VSS[51] VSS[148]
T22 B16 J26 AB21
Vcc1_5_B[41] Vcc3_3[14] VSS[52] VSS[149]
T23 B7 K24 AB24
Vcc1_5_B[42] Vcc3_3[15] 0.1UF_0402 0.1UF_0402 VSS[53] VSS[150]
T26 C10 K27 AB27
PCI
V_1P5_CORE Vcc1_5_B[43] Vcc3_3[16] VSS[54] VSS[151]
T27 D15 K28 AB28
L22 Vcc1_5_B[44] Vcc3_3[17] 0.1UF_0402 0.1UF_0402 VSS[55] VSS[152]
T28 F9 L13 AC2
R362 1R1% 1U500m_0805 Vcc1_5_B[45] Vcc3_3[18] VSS[56] VSS[153]
U22 G11 VBAT L15 AC5
Vcc1_5_B[46] Vcc3_3[19] C546 C526 VSS[57] VSS[154]
U23 G12 L24 AC9
C437 Vcc1_5_B[47] Vcc3_3[20] VSS[58] VSS[155]
V22 G16 L25 AC11
Vcc1_5_B[48] Vcc3_3[21] 0.1UF_0402 0.1UF_0402 VSS[59] VSS[156]
V23 L26 AD1
C426 Vcc1_5_B[49] VSS[60] VSS[157]
W22 W5 M3 AD3
0.01U25V_0402 Vcc1_5_B[50] VccRTC VSS[61] VSS[158]
W23 M4 AD4
10UF/10V_0805 Vcc1_5_B[51] VSS[62] VSS[159]
Y22 P7 VCC3_SB M5 AD7
Vcc1_5_B[52] VccSus3_3[1] C534 C458 C537 C538 VSS[63] VSS[160]
Y23 M12 AD8
Vcc1_5_B[53] VSS[64] VSS[161]
A24 M13 AD11
VccSus3_3[2] 0.1UF_0402 0.1UF_0402 0.1UF_0402 0.1UF_0402 VSS[65] VSS[162]
B27 C24 M14 AD15
Vcc3_3[1] VccSus3_3[3] VSS[66] VSS[163]
D19 M15 AD19
VccSus3_3[4] VSS[67] VSS[164]
AG28 D22 M16 AD23
V_1P5_CORE VccDMIPLL[1] VccSus3_3[5] VSS[68] VSS[165]
G19 M17 AE2
VccSus3_3[6] Near A5,B7,C10 VSS[69] VSS[166]
AB7 M24 AE4
Vcc1_5_A[1] VSS[70] VSS[167]
AC6 K3 M27 AE8
C516 Vcc1_5_A[2] VccSus3_3[7] VSS[71] VSS[168]
AC7 K4 M28 AE11
Vcc1_5_A[3] VccSus3_3[8] VSS[72] VSS[169]
ARX
AD6 K5 N1 AE13
B
near AH5 2.2U16V_0805 Vcc1_5_A[4] VccSus3_3[9] VSS[73] VSS[170] B
AE6 K6 N2 AE18
AF5 L1 N5 AE21
Be careful of SATAPLL Vcc1_5_A[6] VccSus3_3[11] VSS[75] VSS[172]
AF6 L2 N6 AE24
AG5 L3 N11 AE25
USB
AH5 L6 N12 AF2

V_1P5_CORE Vcc1_5_A[9] VccSus3_3[14] VSS[78] VSS[175]
L7 N13 AF4
L23 10U100mA_0805 VccSus3_3[15] VSS[79] VSS[176]
AD2 M6 N14 AF8
C542 VccSATAPLL VccSus3_3[16] VSS[80] VSS[177]
M7 N15 AF11
C528 VCC3 VccSus3_3[17] VSS[81] VSS[178]
AH11 N7 N16 AF27
C10U6.3X50805 0.1u_0402 Vcc3_3[2] VccSus3_3[18] VSS[82] VSS[179]
N17 VSS[83] VSS[180] AF28
AB10 AB17 V_1P5_CORE N18 AG1
Vcc1_5_A[10] Vcc1_5_A[19] C422 VSS[84] VSS[181]
AB9 AC17 N24 AG3
C500 Vcc1_5_A[11] Vcc1_5_A[20] C427 VSS[85] VSS[182]
AC10 N25 AG7
Vcc1_5_A[12] VSS[86] VSS[183]
ATX
0.1u_0402 AD10 T7 0.1UF_0402 N26 AG11

Vcc1_5_A[13] Vcc1_5_A[21] 1U10V_0603 VSS[87] VSS[184]
AE10 F17 P3 AG14
Vcc1_5_A[14] Vcc1_5_A[22] VSS[88] VSS[185]
V_1P5_CORE AF10 G17 P4 AG17
C512 Vcc1_5_A[15] Vcc1_5_A[23] VSS[89] VSS[186]
AF9 P12 AG20
Vcc1_5_A[16] VSS[90] VSS[187]
AG9 AB8 P13 AG25
1U10V_0603 Vcc1_5_A[17] Vcc1_5_A[24] VSS[91] VSS[188]
AH9 AC8 P14 AH1
near AH9 Vcc1_5_A[18] Vcc1_5_A[25] VSS[92] VSS[189]
P15 VSS[93] VSS[190] AH3
E3 K7 P16 AH7
VccSus3_3[19] VccSus1_05[1] VSS[94] VSS[191]
ICH7-M P17 VSS[95] VSS[192] AH12
C1 C28 P24 AH23
VCC3_SB VccUSBPLL PARTE VccSus1_05[2]
G20 P27
VSS[96] VSS[193]
AH27
C536 VccSus1_05[3] VSS[97] VSS[194]
AA2
0.1u_0402 VccSus1_05/VccLAN1_05[1]
A1 ICH7M-DH
Vcc1_5_A[26]
V_1P5_CORE Y7 H6
VccSus1_05/VccLAN1_05[2] Vcc1_5_A[27]
H7
C522 Vcc1_5_A[28]
J6
Vcc1_5_A[29]
0.1u_0402
USB CORE Vcc1_5_A[30]
J7
C523
V_1P5_CORE
A A
ICH7M-DH
0.1UF_0402
near A1

Title
ICH7M - Power

Custom MS-9631 1.0

8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
Clock Generator VTT Power Down Block Clock Generator - ICS954129 Trace length less than 0.5inchs
CK_H_CPU R342 49.9R1%_0402
U18 CK_H_CPU# R341 49.9R1%_0402
45 CPUCLK R327 33R_0402 CK_H_CPU OUT CK_H_MCH R340 49.9R1%_0402
CPU0 CK_H_CPU 3
FB3 80L3_100_0805 VCC3VB 43 44 CPUCLK# R326 33R_0402 CK_H_CPU# OUT CK_H_MCH# R339 49.9R1%_0402 FWH_PCLK C312 X_10P50V_0402
VCC3 VDDCPU CPU0# CK_H_CPU# 3
42 MCHCLK R325 33R_0402 CK_H_MCH OUT CK_PE_100M_ICH R346 49.9R1%_0402 PCI_CLK2 C396 X_10P50V_0402
CPU1 CK_H_MCH 6
C366 C363 41 MCHCLK# R324 33R_0402 CK_H_MCH# OUT CK_PE_100M_ICH# R345 49.9R1%_0402 PCI_CLK0 C321 X_10P50V_0402
CPU1# CK_H_MCH# 6
CB2 0.1u_0402 40 36 PCI_CLK1 C397 X_10P50V_0402
0.1u_0402 10U10V_0805 GND CPU2_ITP/PCIEX5 CK_PE_100M_LAN# R347 49.9R1%_0402 ICH_PCLK C302 X_10P50V_0402
35
CPU2_ITP#/PCIEX5# CK_PE_100M_LAN R348 49.9R1%_0402 1394_PCLK C320 X_10P50V_0402
28 17 CK_PE_SRC1 R297 33R_0402 CK_PE_100M_16PORT OUT CK_ICHSATA# R280 49.9R1%_0402 SIO_PCLK C311 10P50V_0402
VDDSRC PCIEX0 CK_PE_100M_16PORT 23
34 18 CK_PE_SRC1# R311 33R_0402 CK_PE_100M_16PORT# OUT CK_ICHSATA R281 49.9R1%_0402 USB_48 C309 10P50V_0402
VDDPCIE PCIEX0# CK_PE_100M_16PORT# 23
19 21 CK_PE_SRC2 R296 33R_0402 CK_SATA2 OUT CK_PE_100M_MCH R283 49.9R1%_0402
VDDPCIE PCIEX1 CK_SATA2 19
22 CK_PE_SRC2# R310 33R_0402 CK_SATA2# OUT CK_SATA2# 19
Connect to SATA2 CK_PE_100M_MCH# R282 49.9R1%_0402
PCIEX1# CK_PE_SRC3 R309 33R_0402 CK_PE_100M_MCH CK_PE_100M_16PORT R287 49.9R1%_0402
D 23 OUT CK_PE_100M_MCH 7 chip D
0.1u_0402 PCIEX2 CK_PE_SRC3# R308 33R_0402 CK_PE_100M_MCH# CK_PE_100M_16PORT# R286 49.9R1%_0402 ICH_14M C395 X_10P50V_0402
24 OUT CK_PE_100M_MCH# 7
PCIEX2# CK_PE_SRC4 R307 33R_0402 CK_ICHSATA SIO_48 C310 10P50V_0402
SRC 26 OUT CK_ICHSATA 12
C387 C389 C322 27 CK_PE_SRC4# R306 33R_0402 CK_ICHSATA# OUT
SRC# CK_ICHSATA# 12
31 CK_PE_SRC5 R334 33R_0402 CK_PE_100M_ICH OUT CK_SATA2 R285 49.9R1%_0402
PCIEX3 CK_PE_100M_ICH 13
0.1u_0402 20 30 CK_PE_SRC5# R333 33R_0402 CK_PE_100M_ICH# OUT CK_SATA2# R284 49.9R1%_0402
GND PCIEX3# CK_PE_100M_ICH# 13
25 33 CK_PE_SRC6 R336 33R_0402 CK_PE_100M_LAN OUT
GND PCIEX4 CK_PE_100M_LAN 18
29 32 CK_PE_SRC6# R335 33R_0402 CK_PE_100M_LAN# OUT
GND PCIEX4# CK_PE_100M_LAN# 18
0.1u_0402 CK_96M_DREF R289 49.9R1%_0402
FB2 80L3_100_0805 VCC3VA 37 PCI clock follow routing direction CK_96M_DREF# R288 49.9R1%_0402 EMC HF filter capacitors, ocated
l close to PLL
VCC3 VDDA
C323 14 CK_DOT96 R299 33R_0402 CK_96M_DREF OUT
DOT96 CK_96M_DREF 7
CB1 C386 15 CK_DOT96# R298 33R_0402 CK_96M_DREF# OUT
DOT96# CK_96M_DREF# 7
0.1u_0402 10U10V_0805 0.1u_0402 38
VSSA
CLK_FSA R302 33R_0402 SIO_PCLK
56 VDDPCI FSLA/PCICLK_F1 8
9 CLK_FSB R290 33R_0402 ICH_PCLK
OUT SIO_PCLK 16 Change C311 to POP for EMI 2005.5.16
FSLB/PCICLK_F2 OUT ICH_PCLK 12
C388 7 ITP_EN R303 15R_0402 FWH_PCLK
0.1u_0402 ITP_EN/PCICLK_F0 PCICLK2 R330 33R_0402 PCI_CLK2
1 54 OUT PCI_CLK2 24
GND PCI0 PCICLK1 R331 33R_0402 PCI_CLK1
~PCI1 55 OUT PCI_CLK1 24
5 2 PCICLK0 R305 33R_0402 PCI_CLK0 OUT
VDDPCI PCI2 PCI_CLK0 24
3 1394CLK R304 33R_0402 1394_PCLK OUT
PCICLK3 1394_PCLK 30
C390
0.1u_0402 4 6 R291 33R_0402 IN
GND *Turbo# THERM# 13,31
10
VDD48 USB48 R300 33R_0402
USB_48M 12 OUT USB_48 13
C319 11 R301 33R_0402 OUT
**SEL24_48#/24_48MHz SIO_48 16
0.1u_0402 13 GND
CLK_FSC R328 33R_0402 ICH_14M
CPU PCIEX PCI
48
REF0/FSLC 52 OUT ICH_14M 13 (FSLC,FSLB,FSLA) MHz MHz MHz
C C318 VDDREF PLL_XI C378 51P50V_0603 C
0.1u_0402 51
X1
50
Y1
( 0 , 0 , 0 ) 266.66 100.00 33.33
GND 14.318MHZ32P_D 1394CLK R292 33R_0402
X2 49
PLL_XO C372 51P50V_0603
OUT TPM_CLK 22 ( 0 , 0 , 1 ) 133.33 100.00 33.33
BI SMBDATA_MAIN 46 ( 0 , 1 , 0 ) 200.00 100.00 33.33
13,16,19,20,28 SMBDATA_MAIN SDATA
BI SMBCLK_MAIN 47 16 IN
13,16,19,20,28 SMBCLK_MAIN SCLK Vtt_PwrGd#/PD CLK_EN# 31
R344 X_2.2K_0402 ITP_EN R277 10K_0402
( 0 , 1 , 1 ) 166.66 100.00 33.33
VCC3
39 IREF R349 475_1%_0603 ( 1 , 0 , 0 ) 333.33 100.00 33.33
R329 33R_0402 IREF
13,26 FP_RST# IN 53 Reset#
ICS954129
Clock Gen pin16 connect to CLK_EN# 2005.5.9 ( 1 , 0 , 1 ) 100.00 100.00 33.33
* Slave Address = 0XD2 ( 1 , 1 , 0 ) 400.00 100.00 33.33
( 1 , 1 , 1 ) RESERVED
Firware Hub (FWH) FWH_WP FWH write protect
Close Locked R276
VCC3 VCC3 BIOS_WP1 FWH_WP# 1KR0402
BIOS1 1 BSEL0 CLK_FSA
R491
Open Unlocked X_YJ102 2 3,7 BSEL0 IN
1 VPP VCC 32
IN R490 100R 2 31 FWH_PCLK 10K R275
7,16,22,28 DEV_RST# RST# CLK
PRES3 3 30 PRES4 1KR0402
PRES2 FGPI3 FGPI4 BSEL1 CLK_FSB
4 29 3,7 BSEL1 IN
PRES1 FGPI2 IC(VIL) R396
5 FGPI1 GNDA 28
IN ATADET0 6 27 IN R343
29 ATADET0 FWH_WP# FGPI0 VCCA 13 BIOS_WP#
7 26 1KR0402
WP# GND 100R BSEL2 CLK_FSC
8 25
I
N
TBL# VCC 3,7 BSEL2 IN

9 24 FWH_INIT
ID3 INIT# FWH_INIT 12
B
10
11
ID2 FWH4 23
22
BI LPC_FRAME# 12,16,22 R396 change to POP 2005.3.21 B
FWH_ID0 ID1 RFU
12 21
ID0 RFU
12,16,22 LPC_AD0 BI 13 FWH0 RFU 20
12,16,22 LPC_AD1 BI 14
15
FWH1 RFU 19
18
Modify BSEL 0~2 to remove Jumper J4&J5 2005.5.16
12,16,22 LPC_AD2 BI FWH2 RFU VCC3 VCC5
16 GND FWH3 17 BI LPC_AD3 12,16,22
R390 SST49LF004A JLPC1
<Priority> FWH_PCLK R337
PCI_CK_33M_LPC_HDR 1 2
10K_0603 10R_0603 DEV_RST# 3 4
LPC_AD0 5 6 FWH_ID0
LPC_AD1 7 8
If you place the jumper very closed to FWH bios socket, LPC_AD2
Change to DEV_RST# 2005.3.21 LPC_AD3
9
11 12
please use the same clock with FWH. But if you can not LPC_FRAME# 13 14
place it so close, please use another clock to support it. JLPC1
FWH DECOUPLING CAPACITORS

VCC3 JLPC1 need to near BIOS
1
C383 C392 C382 C393

1U16V_0805 0.1u_0603 FWH Resistors
1U16V_0805 0.1u_0603
2
A
default is high A
RN24 8P4R-1KR
FWH_WP# 1 2 VCC3
Place Cap. as Close to FWH< 350 mil PRES1 3 4
PRES2 5 6
PRES3 7 8
PRES4 R338 1K_0603

FWH_INIT R404 X_8.2KR Title
VCC3 ICS954129 Gen & FWH

Custom MS-9631 1.0

8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
U2
30 1 CP5 X_COPPER
7,15,22,28 DEV_RST# LRESET# DRVDEN0
15 SIO_PCLK 21 3
PCICLK INDEX#
13,22 SERIRQ BI 23 4
SERIRQ MOA# CP6
12 LPC_DRQ#0 22 6
LDRQ# DSA#
29 8
12,15,22 LPC_FRAME# LFRAME# DIR# +12V R38 56KR1%
13 SIO_PME# 86 9
PME# STEP# VCC5 LPC_+12VIN X_COPPER
10
LPC_AD0 WD#
12,15,22 LPC_AD[0..3] BI 27 11 KBGND
LPC_AD1 LAD0 WE# R35 LPC_5VIN R46
26 13
LPC_AD2 LAD1 TRAK0# 22KR CP7
25 14
LPC_AD3 LAD2 WP# R37 10K_0603
24 15
LAD3 RDATA#
16
HEAD# 10K_0603 VTIN_GND FB1 X_0R X_COPPER
125 17
GP13/GPX2 DSKCHG#
D 123 2 KBGND D
GP15/GPY1 GP23/SCK CP1 X_COPPER
128
GP10/GPSA1
121 5 SIO_OVT# 13
GP17/GPSA2 OVT#/HM_SMI#
126
GP12/GPX1
124 42
GP14/GPY2 PD0
127 41
GP11/GPSB1 PD1
122 40
Change 1.0: 2005/09/15 GP16/GPSB2 PD2
PD3 39
Add R565; R564; R566. TMP_VREF 101 38
AUX_TMP VREF PD4
102 37
AUXTIN PD5
3 CPU_TMPA BI 103 36
SYS_TMP CPUTIN PD6
104 35
SYSTIN PD7
93 31
RSTOUT1# SLCT
94 32
RSTOUT0# PE
VCC_DDR2 2 1 95 33
R34 10KR0402-1 VIN4 BUSY
96 34
LPC_5VIN VIN3 ACK#
97 43
V_1P5_CORE VIN2 SLIN#
2 1 98 44
LPC_+12VIN R36 10KR0402-1 VIN1 INIT#
99 45
VIN0 ERR#
2 1 100 46
VCORE R39 10KR0402-1 CPUVCORE AFD# TMP_VREF
STB# 47
105
Need to Close the Pin CPUFANOUT0, AUXFANOUT VID5 R45
106 88
VID4 GP34/RSTOUT4# VCC3_SB 10K_1%_0603
are default PWM mode 107 69
VID3 GP36
108 87
CPUFANOUT0, CPUFANOUT1 VID2 GP35 SYS_TMP
109 70
VID1 GP55/SUSLED C614
support SmartFAN III 110
VID0 X_ 0.1uF J1
56
GP61/DCDA# 1
29 CPU_FAN 112 50
CPUFANIN0 GP66/DSRA# YJ102 2
29 CPUFAN_PWM
115
CPUFANOUT0 GP63/SINA
53 Fix EMI issue to near by C42
R52 0R_0402 119 51 RTSA# VTIN_GND
C R47 0R_0402 120
CPUFANIN1/GP21/MSI GP65/HEFRAS/RTSA#
54 SOUTA 11-17-2005 C
CPUFANOUT1/GP20/MSO GP62/PENKBC/SOUTA
113 49
SYSFANIN GP67/CTSA# DTRA#
116 52
R51 X_0R_0402 SYSFANOUT GP64/PENROM/DTRA#
111 57
29 AUX_FAN AUXFANIN0 GP60/RIA#
58
R48 X_0R_0402 AUXFANIN1/SO DCDB#
29 AUXFAN_PWM 7 84
AUXFANOUT GP41/DCDB# DSRB#
79
CHASSIS GP46/DSRB# SINB
76 82
R30 10R S2DA1 CASEOPEN# GP43/IRRX/SINB TMP_VREF TMP_VREF
13,15,19,20,28 SMBDATA_MAIN BI 89 80
R32 10R S2CK1 RSTOUT3#/GP33/SDA GP45/RTSB# SOUTB
13,15,19,20,28 SMBCLK_MAIN BI 90 83
RSTOUT2#/GP32/SCL GP42/IRTX/SOUTB CTSB#
91 78
GP31 GP47/CTSB# R40
92 81
GP30 GP44/DTRB# RIB#
64 85
GP37 GP40/RIB# 15KR1%0402
PWRBTN# 67 59
13 PWRBTN# PSOUT#/GP57 GA20M A20GATE 12 R44
68 60 CPU_TMPA
26 PWRBTIN PSIN/GP56 KBRST KBRST# 12 10K_1%_0603
PS_ON# 72 63 KBDAT#
26 PS_ON# OUT PSON#/GP53 GP26/KDAT KBCLK#
13,28,31 SLP_S3# 73
18
SUSB#/GP52 GP27/KCLK 62
66 MSDAT# AUX_TMP IR HEADER
15 SIO_48 IOCLK GP24/MDAT MSCLK# VCC5 C61
65
GP25/MCLK BEEP X_IRDA1
VCC3_SB 61 118
3VSB SI/BEEP RT1 2200P16V_0603
VBAT 74 1
VBAT
2
4
6
8
75 10K_1%_0805 3 4
GP51/RSMRST# RN1 VTIN_GND VCC5 SOUTB 5
VCC3 28 71 6 SINB
3VCC GP54/PWROK 8P4R-1KR VTIN_GND
12
C3 C50 3VCC IR
48 20
3VCC GND
1
3
5
7
0.1u_0402 0.1u_0402 WDTO# 77
GND
55
19 MSDAT#
change 1.0 : 2005/09/15 NOPOP
EN_VRM10/WDTO#/GP50 GP22/SCE#
114
AVCC AGND
117 change C61 to 2200P for
MSCLK# NOTE: LOCATE CLOSE
W83627EHG-H 786NR
B STATUS PANEL B
KBDAT#
VTIN_GND
CP2 X_COPPER KBCLK#
VCC3
C65
0.1u_0402
Change VBAT0 to VBAT 2005.3.21
LPC I/O STRAPPING RESISTOR Chasiss Intrusion

VCC5 VCC5 VCC5
VBAT RN2
48MHz R3 X_4.7KR0402 SOUTA SINB 1 2
VCC3 DCDB# 3 4
R26 4.7K_0603 SOUTB R8 4.7KR0402 R55 R65 DSRB# 5 6
VCC3 R5 4.7K_0603 R14 CTSB# 7 8
4E Disable KBC 1MR0402 4.7KR0402 X_4.7KR0402
OUT ALARM 26
JCI1 X_8P4R-4.7KR
C
R7 X_4.7KR RTSA# 1 CHASSIS OUT RIB# R29 X_4.7KR
1 CHASSIS 24
2 BEEP R54 B Q8
R4 4.7K_0603 DTRA# 2 4.7KR0402 2N3904S
X_H1X2_black fix IR issue
Disable SPI
E
R22 4.7K WDTO#
C
VCC3_SB R16 X_1K
R53 B Q7
X_4.7KR0402 X_2N3904S
A
0R_0402 R50 A
SYSFAN_PWR 29
E
WDTO# 0R_0402 R49
CPUFAN_PWR 29
Ver C: POP R53, Q7, R65, R55

VCC5
SOUTA L: Disable KBC H: Enable KBC VBAT
NOPOP R54
SOUTB L: 24MHZ H: 48MHZ C48 Ver G,H: POP R55, R54 MICRO-STAR INt'L CO. , LTD.
RTSA# L: CFAD=2E H: CFAD=4E 0.1u_0603 NOPOP R53,Q7,R65 Title
DTRA# L: Disable SPI H: Enable SPI C66 C19 LPC - W83627EHF
EN_VRM10 L: TTL Level L: VRM10 Level 0.1u_0603
C4 X_0.1u_0603 VTIN_GND Size Document Number Rev
3 THERMDC BI Custom MS-9631 1.0
X_0.1u_0603

8 7 6 5 4 3 2 1
SENSE_A C373 X_0.1u_0603
SENSE_B GNDF
R278 R272 R258 R257 R245

10K_1%_0603 39.2K_1%_0603 20K_1%_0603 10K_1%_0603
SW_G SW_A SW_B SW_C 5.1K1%_0603 C255 X_0.1u_0603
CEN_OUT C370 4.7U10V_0805 SW_D GNDF
BASS C371 4.7U10V_0805
SOT23
C369 4.7U10V_0805 SROUT_R C282 X_0.1u_0603
4.7K_0603 GNDF
C368 4.7U10V_0805 SROUT_L D10 R216
2 PORTE_R
R315 20K_1%_0603 3 4.7K_0603
R213 PORTE_L CP8
1
AVDD5 GNDF
GNDF
S-BAT54A_SOT23 X_COPPER
SPDIFO C358
SOT23
VCC3
AVDD5
0.1u_0603 D9
0.1u_0402 R197 4.7K_0603 PORTF_R
48
47
46
45
44
43
42
41
40
39
38
37
2
EC33 C364 U17 3
+ EC37 1 R198 4.7K_0603PORTF_L
JACKA_L
SPI/EAPD
JACKH_R/VROB2
JACKH_L/VROC2
JACKG_R/VROA2
JACKG_L/VROD2
AVSS2
AVDD2
JACKA_R
VROH
SPO
VROA
R312 LOUT_R
ELS10/16-B 10KR
100U/16V S-BAT54A_SOT23
Modify pin 2,3 to GPIO EC35
SOT23
1 36 LINE_OUT_R LOUT_L
R313 X_0R_0603 DVDDCORE JACKD_R LINE_OUT_L 4.7K_0603
2 35
R295 X_5.1KR1% GPIO0 JACKD_L SENSE_B 100U/16V D11 R265
3 34
GPIO1 SENSE B
4 33 2 ACMIC2_A ACMIC2
DVSS VROG R264 X_0R ACMIC2_A
12 AC_SDOUT 5 32 3
SDO VROD VROE R266 4.7K_0603 MIC_97
12 AC_BITCLK IN 6 31 1
R279 39R_0402 BCLK VROE VROF
12 AC_SDIN0 OUT 7 30
DVSS VROF
8 29
SDI VROC VROB R243 X_0R S-BAT54A_SOT23
9 28
DVDDCORE VROB
12 AC_SYNC 10 27
SYNC VREF
12 AC_RST# 11 26
RESET# AVSS1
12 25
C304 C303 C300 PCBEEP AVDD1 EC32 C308
C313 C291
JACKC_R
JACKE_R
JACKB_R
JACKF_R
JACKC_L
SENSE A
JACKE_L
JACKB_L
JACKF_L
22P50V_0603 22P50V_0603 10P50V_0603 0.1u_0603 C10U16EL 1U16V_0805
CD_C
CD_R
10P50V_0603
CD_L
GNDF
R271 47K_0603 C298 0.1u_0603 ALC880 SPDIF

13,26 SPKR
13
14
15
16
17
18
19
20
21
22
23
24
R270 C289 1U16V_0805 LINE_IN_R
R274 C294
X_0.1u_0603 X_5.1KR1% C288 1U16V_0805 LINE_IN_L
47K_0603 SENSE_A CP3 X_COPPER
1 2
C292 1U16V_0805 ACMIC2
PORTE_L EC27 SPDIFO 1 2 SPDIF
100U/16V C293 1U16V_0805 MIC_97 L20 X_301/6
1
PORTE_R EC26 RN22 JCD1
100U/16V C295 1U10V_0603 1 2 CD-R C305
CD-G 4 560P50V_0603
3 4
PORTF_L EC25 C296 1U10V_0603 3
2
5 6
100U/16V CD-L 2
7 8
PORTF_R EC24 C297 1U10V_0603 1
100U/16V 8P4R-47KR AUDIO-CDIN1X4
7
5
3
1
RN23
X_8P4R-47KR
+12V AVDD5 VCC5_SB GNDF
8
6
4
2
AUDIO CODE REGULATORS
D15 U19 D14
1N4148S YLT1087S-0.8A
1N5817 LINE_IN_R
3 2
VIN VOUT LINE_IN_L
ADJ
C381 + EC40 R318 + EC38 C365

100_1%_0603 X_0.1u_0603
X_10U/16V/S ELS10/16-B
0.1u_0603 LOUT_R
1
LOUT_L
GNDF GNDF
R317
C278 470P50V_0603
C286 470P50V_0603
C290 470P50V_0603
C280 470P50V_0603
C299 470P50V_0603
C301 470P50V_0603
300_1%_0603
ACMIC2
MIC_97
GNDF
PORT-E fix to ear-phone
BASS
CEN_OUT
J4 VCC5 SROUT_R
JAUD1 SROUT_L
PORTF_R 1 2 GNDF LINE_IN_R 1 2 SW_C
PORTF_L 3 4 LINE_IN_L 3 4 LOUT_L
PORTE_R 5 6 SW_F ACMIC2 5 6 LOUT_R FS3
SENSE_B 7 MIC_97 7 8 SW_D
PORTE_L SW_E SW_B 1.1A-microSMD110-S
9 10 9 10 SPDIF C377 C376 C375 C374
GNDF POLY SWITCH
11 12 GNDF 470P50V_0603 470P50V_0603 470P50V_0603 470P50V_0603
BH-2X5_cream white-2pitch 14
X_COPPER BASS 15 16 SW_A
CP9 CEN_OUT 17 18 SW_G
1
3
5
7
R221 R215 SROUT_R 19 20 SROUT_L C367

RN21 0.1u_0603
39.2K_1%_0603 20K_1%_0603
X_8P4R-47KR BH2X10_black-2pitch
GNDF
2
4
6
8
GNDF
Port/Func Signals Pin

LINE_IN_R Pin 1
LINE_IN_L Pin 3
Port_C SW_C Pin 2
ACMIC2 Pin 5
Port_B MIC_97 Pin 7
SW_B Pin 9
SOUT_L Pin 4
Port_D SOUT_R Pin 6
SW_D Pin 8
SROUT_L Pin 20
Port_A SROUT_R Pin 19
SW_A Pin 16
BASS Pin 15 MICRO-STAR INt'L CO. , LTD.
Port_G CEN_OUT Pin 17 Title
Audio - ALC880
SW_G Pin 18
SPDIF SPDIF Pin 10 Custom MS-9631 1.0
VCC5 Pin 14
8 7 6 5 4 3 2 1
VCC3_SB AVDD25_LAN AVDD25_LAN AVDD12_LAN

AVDD25_LAN VCC3_SB AVDD12_LAN
C230 C241 C226
0.01U25V_0402
0.1U16V_0402
0.1U16V_0402
C239 C174 C247 C173 C240 C210
C229
4.7U10V_0805
4.7U10V_0805
0.1U16V_0402
0.1U16V_0402
0.1U16V_0402
0.1U16V_0402
0.1U16V_0402
4.7U10V_0805
C170 C248 C257
M10
G12
G13
H11
H12
P12
A11
K13
A10
K10
K11
F12
L12
L10
J12
J10
J11
0.1U16V_0402
M2
M4
G3
G5
G6
U12
D9
N6
N8
H4
H5
N7
C4
C5
H6
H7
H8
A2
A3
A7
P2
B6
B1
B2
K3
K4
K5
K6
K7
K8
K9
F3
L5
L9
J4
J5
J6
J7
J8
J9
C10U6.3X50805
IREG25/NC
IREG25/VCC
VCC33/VCC
VCC33/NC
FUSEV/NC
VCC25/VCC
VCC25/NC
VCC25/VCCR
VCC25_OUT/NC
VCC12/NC
VCC12/VCC
VCC33/NC#F3
VCC33/NC#J4
VCC33/NC#M10
VCC33/VCC#N6
VCC33/VCC#N8
VCC33/VCC#P2
VCC33/VCC#P12
VCC25/NC#G3
VCC25/NC#H4
VCC25/VCCR#H5
VCC25/NC#J12
VCC25/VCC33
VCC25/VCC#K13
VCC25/NC#L12
VCC25/NC#M4
VCC25/NC#N7
VCC25_OUT/NC#B2
VCC12/NC#C4
VCC12/NC#C5
VCC12/NC#F12
VCC12/NC#G12
VCC12/VCC33
VCC12/VCC33#G6
VCC12/VCC33#H11
VCC12/NC#H12
VCC12/VCC33#H6
VCC12/VCC33#H7
VCC12/VCC33#H8
VCC12/VCC33#J10
VCC12/VCC33#J11
VCC12/VCC33#J6
VCC12/VCC33#J7
VCC12/VCC33#J8
VCC12/VCC33#J9
VCC12/VCC33#K10
VCC12/VCC33#K11
VCC12/VCC#K4
VCC12/VCC33#K5
VCC12/VCC33#K6
VCC12/VCC33#K7
VCC12/VCC33#K8
VCC12/VCC33#K9
VCC12/VCC33#L5
VCC12/VCC33#L9
VCC12/VCC33#L10
Close LAN
D OUT PCIE_RP1 C246 0.1u_0402 TXE_P D1 C13 TR_D0+ D

13 PCIE_RP1 PETP0/NC MDIP0/TDP
OUT PCIE_RN1 C245 0.1u_0402 TXE_N C1 C14 TR_D0- LED0# = Link 100# (0110)
13 PCIE_RN1 PETN0/NC MDIN0/TDN
IN F1 E13 TR_D1+
13 PCIE_TN1 PERN0/NC MDIP1/RDP LED1# = Link/ACT# (0100)
IN F2 E14 TR_D1-
13 PCIE_TP1 PERP0/NC MDIN1/RDN
F13 TR_D2+ LED2# = Link 1000#
MDIP2/NC TR_D2-
F14
MDIN2/NC TR_D3+ (0111)
15 CK_PE_100M_LAN IN G1 H13
PECLKP/NC MDIP3/NC TR_D3-
15 CK_PE_100M_LAN# IN G2 H14
PECLKN/NC MDIN3/NC
OUT PCI_E_RST# P10
13,23 WAKE# PEWAKE#/NC LED_LINK10/100
19,23,27,28 PCI_E_RST# IN P7 B11
PERST#/NC LED0#/SPDLED LED_ACT
C11
LED1#/ACTLED LED_LINK1000 VCC3_SB
13,23,24 SMBDATA_RESUME BI M11 A12
SMB_DATA/NC LED2#/LINKLED
13,23,24 SMBCLK_RESUME BI P11
ASF_PGD SMB_CLK/NC 25MCLK
13 SMB_ALERT# BI N11 SMB_ALRT#--ASF_PGD/NC K14
R226 0R_0402 XTAL1 XTALO_LAN R203
J14
For iAMT SPI_LAN_SI R178 47R0402 A9 XTAL2
NVM_SI/NC X_3.3KR0402
SPI_LAN_SO B9 B5
SPI_LAN_CS# NVM_SO/NC EN25_REG/NC LAN_CTRL_25 R202 3.3KR0402
B10 A4
SPI_LAN_SK R175 47R0402 C9 NVM_CS#/NC CTRL_25/NC LAN_CTRL_12
NVM_SK/NC P3
CTRL_12/NC
B4
II
NN
NVM_REQ/NC
L7 LAN_EN 13
DEV_OFF#/ADV10
15
A5 P5 RSMRST# 13,28
R201 3.3KR0402 NVM_PROT/NC LAN_PWRGOOD/NC JLAN1
D3 NVM_SHRD/NC C6 VCC3_SB
R204 X_3.3KR0402 AUX_PRESENT/NC R196 3.3KR0402 LAN_LED_14_In 14 YELLOW
LEFT
A6
R180 3.3KR0402 NVM_TYPE/NC LED_ACT_In
B12 13
HS_DACP/TOUT AVDD25_LAN R184 0R_0402 POWER
P4 JTDI/NC B13 5
HS_DACN/RBIAS100 TR_D0+ TD1+
P6 B14 1
JTDO/NC PHY_TSTPT/RBIAS10 TR_D0- TD1-
N4 JTMS/NC A13 2
TEST_EN C225 TR_D1+ TD2+
N5 JTCK/NC D12 3
VCC3 PHY_REF/ISOL_T1 R172 TR_D1- TD2-
D10 4
NC/ISOL_TEX R160 TR_D2+ TD3+
L3 THRMDP/NC D14 7
C ASF_PGD NC/ISOL_TEK 0.1u_0402 TR_D2- TD3- C
L2 8
R225 X_3.3KR0402 THRMDN/NC 4.99KR1%0402 3.3KR0402 TR_D3+ TD4+
M14 9
NC/LAN_TXD0 TR_D3- TD4-
A8 SDP0/NC L13 10
NC/LAN_TXD1
B8
SDP1/NC CLK_VIEW/LAN_TXD2
L14 6 GND
C8 P13 LED_LINK10/100_In 11
SDP2/NC NC/LAN_RXD0
RIGHT
For ASF C7 SDP3/NC N13 LED_LINK1000_In 12 GREEN ORG
NC/LAN_RXD1
M12
NC/LAN_RXD2 CONN-RJ45_LEDX2_black-1
C3 M13
16
DOCK_IND/NC NC/LAN_RSTSYNC
N10 ALT_CLK125/NC N14
NC/LAN_CLK
H1 D11
TESTPT_0/NC NC
H2 J13
TESTPT_1/NC NC#J13
H3 L8
TESTPT_2/NC NC#L8
J1 M5
TESTPT_3/NC NC#M5
J2 M7
TESTPT_4/NC NC#M7
J3 M9
VCC3_SB TESTPT_5/NC NC#M9 Change 1.0:
K1 TESTPT_6/NC N9
NC#N9
L1 P14 Add RN62; RN63; J11
TESTPT_7/NC NC#P14 RN20
M1 TESTPT_8/NC
M3 B7 LED_LINK10/100 1 2 LED_LINK10/100_In
TESTPT_9/NC NC/VSS LED_LINK1000_1 LED_LINK1000_In
N2 TESTPT_10/NC E1 3 4
XTALO_LAN R185 NC/VCC LED_ACT LED_ACT_In
P1 K12 5 6
TESTPT_11/NC NC/VSS#K12 LAN_LED_14 LAN_LED_14_In
X_3.3KR0402 N3 L11 7 8
25MCLK R153 X_1M_0402 TESTPT_12/NC NC/VSS#L11
M8 TESTPT_13/NC L6
NC/VSS#L6 X_8P4R-0R0402
P9 M6
X1 25MHZ18P_D-1 TESTPT_14/NC NC/VSS#M6 RN19
E3 L4
VSS/NC#G4
VSS/NC#C2
VSS/NC#D2
TESTPT_15/NC NC/VCC#L4
1 2 A14 E11 1 2 LED_LINK10/100_Out
VSS#G10
VSS#G11
VSS#G14
VSS#C10
VSS#C12
VSS#D13
VSS#H10
VSS#N12
VSS#E10
VSS#F10
VSS#F11
TESTPT_16/NC NC/VCCT
VSS#G7
VSS#G8
VSS#G9
VSS#D4
VSS#D5
VSS#D6
VSS#D7
VSS#D8
VSS#H9
VSS#N1
4 LED_ACT_Out
VSS#E2
VSS#E4
VSS#E5
VSS#E6
VSS#E7
VSS#E8
VSS#E9
VSS#K2
VSS#P8
VSS/NC
VSS#F4
VSS#F5
VSS#F6
VSS#F7
VSS#F8
VSS#F9
E12 3
NC/VCCT#E12
5 6 LAN_LED_14_Out
VSS
22P50V_0402 22P50V_0402 7 8 LED_LINK1000_Out

C161 C149
B B
G10
G11
G14
C10
C12
D13
H10
N12
8P4R-0R0402
E10
F10
F11
(82573E-LF)
G4
G7
G8
G9
C2
D2
D4
D5
D6
D7
D8
H9
N1
A1
B3
E2
E4
E5
E6
E7
E8
E9
K2
P8
F4
F5
F6
F7
F8
F9
J3
LAN_LED_14_Out 1 2 LED_LINK1000_Out
4
LED_ACT_Out 5 6 LED_LINK10/100_Out
VCC3_SB LAN LED H2X3(3)_black
VCC3_SB VCC3_SB
VCC3_SB R181 330R_0402 LAN_LED_14
VCC3_SB
Reserved for External Regulator
R193 C244
Q24 AVDD25_LAN LED_LINK1000 R179 330R_0402 LED_LINK1000_1
3.3KR0402
0.1U16V_0402
(298mA)
R207 P-BCP69_SOT223
U13 C262 C250 C258
4
SPI_LAN_CS# 1 8 3.3KR0402 3 2 R219
CE# VDD
4.7U10V_0805
0.1U16V_0402
0.1U16V_0402
SPI_LAN_SO SPI_LAN_SO1 C164 0.1u_0402
R189 47R0402
2
3
SO HOLD#
7
6 SPI_LAN_SK 1R0805
Modify LAN LED 2005.3.17 TR_D0+ R171 49.9R1%_0402
WP# SCK SPI_LAN_SI C260 C251 C267 C263 TR_D0- R170 49.9R1%_0402
4 5
VSS SI C165 0.1u_0402
1
0.1U16V_0402
0.1U16V_0402
C22U6.3X1206
C10U6.3X50805
SST25LF040A-33-4C-S2AE-RH R212 C266 LED_ACT C217 1000P50V_0402 TR_D1+ R167 49.9R1%_0402

TR_D1- R166 49.9R1%_0402
U14 10KR0402
C10U6.3X50805
LAN_LED_14 C208 1000P50V_0402 C166 0.1u_0402
SPI_LAN_CS# 1 8 R210 4.7K_0402 LAN_CTRL_25 TR_D2+ R165 49.9R1%_0402
SPI_LAN_SO1 CS VCC LED_LINK1000 C221 1000P50V_0402 TR_D2- R164 49.9R1%_0402
2 SO HOLD 7
3 6 SPI_LAN_SK C167 0.1u_0402
WP SCK SPI_LAN_SI LED_LINK10/100 C228 1000P50V_0402 TR_D3+ R169 49.9R1%_0402
4 GND SI 5
TR_D3- R168 49.9R1%_0402
X_AT25010AN-10SU-2.7 Q20
A
VCC3_SB (523mA) A
P-BCP69_SOT223 AVDD12_LAN Place these components near 82573E
R199 4 C211 C184 C185
Co-layout with SIP 3 2 R191
0.1U16V_0402
0.1U16V_0402
EEPROM and SIP flash

4.7U10V_0805
1R2010 1R0805
C243 C252 C259 C253
1

0.1U16V_0402
0.1U16V_0402
C22U6.3X1206
C10U6.3X50805
C10U6.3X50805
C242
Title
LAN - Intel 82537E
R194 4.7K_0402 LAN_CTRL_12
Custom MS-9631 1.0

8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
R451 1KR S2DA

VCC3
R450 1KR S2CK
VCC3
U26
(sil3132-0.2)
20 18 F_SATARP0
15 CK_SATA2 IN RefClk+ Rx0+ F_SATARN0
IN 21 17
15 CK_SATA2# RefClk- Rx0- F_SATATP0
13
Tx0+ F_SATATN0
D
IN 25 14 D
13 PCIE_TP2 PRx+ Tx0-
IN 26
13 PCIE_TN2 PRx- F_SATARP1
4
C582 0.1u_0603 PSTXDP Rx1+ F_SATARN1
OUT C581 30 5
13 PCIE_RP2 0.1u_0603 PSTXDN PTx+ Rx1- F_SATATP1
OUT 29 9
13 PCIE_RN2 PTx- Tx1+ F_SATATN1
8
Tx1-
18,23,27,28 PCI_E_RST# IN 34
R444 X_10R S2DA PERst_N SATALED#
BI 82 36 OUT SATALED# 12,13,26
13,15,16,20,28 SMBDATA_MAIN R443 X_10R S2CK I2C_SDA LED1
BI 83 37
13,15,16,20,28 SMBCLK_MAIN R452 4.7KR I2C_SCLK LED0
80
TRSTN
81
C550 C27P50N Scan_Mode
87 79
Xtal_I/ClkI TDO
78
TDI
77
TCK
76
Y4 R449 TMS
25MHZ18P_D-1 10MR 74
FL_CS_N
73
FL_Wr_N
72
FL_Rd_N
71
C545 C27P50N FL_A18
86 70
Xtal_O FL_A17
69
FL_A16
VSATA1.8 2 68
VddsPLL FL_A15
23 65
VddPRxPLL FL_A14
33 64
VddPTxPLL FL_A13
VSATA1.8 7 63
VddsTx FL_A12
10 62
VddsTx FL_A11
12 61
VddsTx FL_A10
15 59
VddsTx FL_A09
VSATA1.8 3 58
VddsRx FL_A08
19 57
C VddsRx FL_A07 C
27 56
VddPRx FL_A06
VSATA1.8 32 55
VddPTx FL_A05
VSATA1.8 38 53
VddD FL_A04
54 52
VddD FL_A03
75 51
VddD FL_A02
VCC3 44 50
VddO FL_A01
67 49
VddO FL_A00
VSATA1.8 85 47
VddX FL_D7
1 46
C548 0.1u_0603 VsssPLL FL_D6
6 45
C552 1U10V_0603 VssRx FL_D5
11 43
C557 0.1u_0603 VssTx FL_D4
16 42
C560 1U10V_0603 VssRx FL_D3
22 41
C569 0.1u_0603 VssRef FL_D2
24 40
C584 0.1u_0603 VssA FL_D1
28 39
C577 1U10V_0603 VssA FL_D0
31 89
C583 0.1u_0603 VssA EGnd
35 88
C579 1U10V_0603 VssD VssX
48 84
C580 X_0.1u_0603 VssD VssD
60 66
C559 0.1u_0603 VssD VssD
C543 0.1u_0603
C530 0.1u_0603
C554 0.1u_0603
C531 0.1u_0603
SATA1 SATA2
1 GND 1 GND
B F_SATATP0 C572 0.01U25V_0402 F_SATATP0_C F_SATATP1 C567 0.01U25V_0402 F_SATATP1_C B
2 HT+ 2 HT+
F_SATATN0 C576 0.01U25V_0402 F_SATATN0_C 3 F_SATATN1 C561 0.01U25V_0402 F_SATATN1_C 3
HT- HT-
4 GND 4 GND
F_SATARN0 C588 0.01U25V_0402 F_SATARN0_C 5 F_SATARN1 C563 0.01U25V_0402 F_SATARN1_C 5
F_SATARP0 C591 0.01U25V_0402 F_SATARP0_C HR- F_SATARP1 C562 0.01U25V_0402 F_SATARP1_C HR-
6 6
HR+ HR+
7 7
GND GND
CONN-SATA_white CONN-SATA_white
A A

Title
Silimage 3132

Custom MS-9631 1.0

8 7 6 5 4 3 2 1
VCC_DDR2 VCC3
VCC_DDR2 VCC3
102
191
194
181
175
170
197
172
187
184
178
189
238
161
162
167
168
DIMM1
55
18
19
68
51
56
62
72
75
78
53
59
64
69
67
42
43
48
49
8 DATA_B[0..63]
102
191
194
181
175
170
197
172
187
184
178
189
238
161
162
167
168
DIMM2
55
18
19
68
51
56
62
72
75
78
53
59
64
69
67
42
43
48
49
RC0
RC1
VDD0
VDD1
VDD2
VDD3
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ7
VDDQ8
VDDQ9
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
NC
NC
VDDSPD
NC/TEST
8 DATA_A[0..63]
DATA_B0 3
DATA_B1 DQ0
4 7
RC0
RC1
VDD0
VDD1
VDD2
VDD3
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ7
VDDQ8
VDDQ9
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
NC
NC
VDDSPD
NC/TEST
DQ1 DQS0 BI DQS_B0 8
DATA_A0 3 DATA_B2 9 6
DQ0 DQ2 DQS0# BI DQS_B#0 8
DATA_A5 4 7 DATA_B3 10 16
DQ1 DQS0 DQS_A0 8 DQ3 DQS1 BI DQS_B1 8
DATA_A2 9 6 DATA_B4 122 15
DQ2 DQS0# DQS_A#0 8 DQ4 DQS1# BI DQS_B#1 8
DATA_A3 10 16 DATA_B5 123 28
DATA_A1 122 15 DATA_B6 128 27
DATA_A4 123 28 DATA_B7 129 37
DATA_A6 128 27 DATA_B8 12 36
DATA_A7 129 37 DATA_B9 13 84
DATA_A12 12 36 DATA_B14 21 83
DATA_A8 13 84 DATA_B15 22 93
DATA_A10 21 83 DATA_B13 131 92
DATA_A11 22 93 DATA_B12 132 105
DATA_A14 131 92 DATA_B10 140 104
DATA_A13 132 105 DATA_B11 141 114
DATA_A9 140 104 DATA_B17 24 113
DATA_A15 141 114 DATA_B20 25 46
DQ15 DQS7 DQS_A7 8 DQ17 DQS8
DATA_A17 24 113 DATA_B19 30 45
DQ16 DQS7# DQS_A#7 8 DQ18 DQS8# MAA_B[0..13] 8,21
DATA_A21 25 46 DATA_B23 31
DATA_A23 DQ17 DQS8 DATA_B16 DQ19 MAA_B0
30 45 MAA_A[0..13] 8,21 143 188
DATA_A19 DQ18 DQS8# DATA_B21 DQ20 A0 MAA_B1
31 144 183
DATA_A16 DQ19 MAA_A0 DATA_B18 DQ21 A1 MAA_B2
143 188 149 63
DATA_A20 DQ20 A0 MAA_A1 DATA_B22 DQ22 A2 MAA_B3
144 183 150 182
149 63 33 61
150 182 34 60
33 61 39 180
34 60 40 58
39 180 152 179
40 58 153 177
152 179 158 70
DATA_A29 DQ28 A8 MAA_A9 DATA_B30 DQ30 A10_AP MAA_B11
153 177 159 57
158 70 80 176
DATA_A30 DQ30 A10_AP MAA_A11 DATA_B36 DQ32 A12 MAA_B13
159 57 81 196
DATA_A33 DQ31 A11 MAA_A12 DATA_B34 DQ33 A13
80 176 86 174
DATA_A34 DQ32 A12 MAA_A13 DATA_B35 DQ34 A14
81 196 87 173
DATA_A38 DQ33 A13 DATA_B33 DQ35 A15
86 174 199
DATA_A39 DQ34 A14 DATA_B32 DQ36
87 173 200 54 SBS_B2 BI SBS_B2 8,21
DATA_A36 DQ35 A15 DATA_B38 DQ37 A16/BA2
199 205 190 SBS_B1 BI SBS_B1 8,21
DATA_A37 DQ36 DQ38 BA1
200 54 SBS_A2 BI SBS_A2 8,21
DATA_B39 206 71 SBS_B0 BI SBS_B0 8,21
DATA_A32 DQ37 A16/BA2 DQ39 BA0
205 190 SBS_A1 BI SBS_A1 8,21
DATA_B45 89
DATA_A35 DQ38 BA1 DQ40
206 71 SBS_A0 BI SBS_A0 8,21
DATA_B41 90 73 WE_B# BI WE_B# 8,21
DATA_A45 DQ39 BA0 DATA_B42 DQ41 WE#
89 95 74 CAS_B# BI CAS_B# 8,21
DATA_A41 DQ40 DQ42 CAS#
90 73 WE_A# BI WE_A# 8,21
DATA_B47 96 192 RAS_B# BI RAS_B# 8,21
DATA_A42 DQ41 WE# DQ43 RAS#
95 74 CAS_A# BI CAS_A# 8,21
DATA_B44 208
DATA_A47 DQ42 CAS# DQ44
96 192 RAS_A# BI RAS_A# 8,21
DATA_B40 209 125 BI DQM_B0 8
DATA_A44 DQ43 RAS# DATA_B43 DQ45 DM0/DQS9
208 214 126
DATA_A40 DQ44 DATA_B46 DQ46 NC/DQS9#
209 125 BI DQM_A0 8 215 134 BI DQM_B1 8
DATA_A46 DQ45 DM0/DQS9 DATA_B53 DQ47 DM1/DQS10
214 126 98 135
DATA_A43 DQ46 NC/DQS9# DATA_B49 DQ48 NC/DQS10#
215 134 BI DQM_A1 8 99 146 BI DQM_B2 8
98 135 107 147
99 146 BI DQM_A2 8 108 155 BI DQM_B3 8
107 147 217 156
108 155 BI DQM_A3 8 218 202 BI DQM_B4 8
217 156 226 203
218 202 BI DQM_A4 8 227 211 BI DQM_B5 8
226 203 110 212
227 211 BI DQM_A5 8 111 223 BI DQM_B6 8
110 212 116 224
111 223 BI DQM_A6 8 117 232 BI DQM_B7 8
116 224 229 233
117 232 BI DQM_A7 8 230 164
229 233 235 165
230 164 236
DATA_A58 DQ61 DM8/DQS17 DQ63 ODT_B0
235 165 195 BI ODT_B0 7,21
DATA_A62 DQ62 NC/DQS17# ODT0 ODT_B1
236 2 77 BI ODT_B1 7,21
DQ63 ODT_A0 VSS ODT1
195 BI ODT_A0 7,21 5
ODT0 ODT_A1 VSS
2 77 BI ODT_A1 7,21 8 52 SCKE_B0 BI SCKE_B0 7,21
VSS ODT1 VSS CKE0
5 11 171 SCKE_B1 BI SCKE_B1 7,21
VSS VSS CKE1
8 52 SCKE_A0 BI SCKE_A0 7,21 14
VSS CKE0 VSS
11 171 SCKE_A1 BI SCKE_A1 7,21 17 193 SCS_B#0 BI SCS_B#0 7,21
VSS CKE1 VSS CS0#
14 20 76 SCS_B#1 BI SCS_B#1 7,21
VSS VSS CS1#
17 193 SCS_A#0 BI SCS_A#0 7,21 23
VSS CS0# VSS
20 76 SCS_A#1 BI SCS_A#1 7,21 26 185 P_DDR2_B
BI P_DDR2_B 7
VSS CS1# VSS CK0(DU) N_DDR2_B
23 29 186 BI N_DDR2_B 7
VSS P_DDR2_A VSS CK0#(DU) P_DDR1_B
26 185 BI P_DDR2_A 7 32 137 BI P_DDR1_B 7
VSS CK0(DU) N_DDR2_A VSS CK1(CK0) N_DDR1_B
29 186 BI N_DDR2_A 7 35 138 BI N_DDR1_B 7
VSS CK0#(DU) P_DDR0_A VSS CK1#(CK0#) P_DDR0_B
32 137 BI P_DDR0_A 7 38 220 BI P_DDR0_B 7
VSS CK1(CK0) N_DDR0_A VSS CK2(DU) N_DDR0_B
35 138 BI N_DDR0_A 7 41 221 BI N_DDR0_B 7
VSS CK1#(CK0#) P_DDR1_A VSS CK2#(DU)
38 220 BI P_DDR1_A 7 44
VSS CK2(DU) N_DDR1_A VSS
41 221 BI N_DDR1_A 7 47 120 SMBCLK_MAIN
VSS CK2#(DU) VSS SCL
44 50 119 SMBDATA_MAIN
VSS VSS SDA
47 120 SMBCLK_MAIN 65
VSS SCL VSS
50 119 SMBDATA_MAIN 66 1 DIMM_VREF_B
VSS SDA VSS VREF
65 79
VSS DIMM_VREF_A VSS VCC3
66 1 82
VSS VREF VSS C45
79 85 239
VSS VSS SA0
82 88 240
VSS C68 VSS SA1 0.1u_0603
85 239 91 101
VSS SA0 VSS SA2 PLACE CLOSE TO DIMM PIN
88 240 94
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS SA1 0.1u_0603 VSS
91 101 97
VSS SA2 PLACE CLOSE TO DIMM PIN VSS
94 ADDRESS: 001
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS _DDRII-240_Green 0xA4
100
103
106
109
112
115
118
121
124
127
130
133
136
139
142
145
148
151
154
157
160
163
166
169
198
201
204
207
210
213
216
219
222
225
228
231
234
237
97
VSS
ADDRESS: 000
_DDRII-240_Green 0xA0
100
103
106
109
112
115
118
121
124
127
130
133
136
139
142
145
148
151
154
157
160
163
166
169
198
201
204
207
210
213
216
219
222
225
228
231
234
237
DDR2 DIMM2-CH B
DDR2 DIMM1-CH A
SMBCLK_MAIN VCC_DDR2
BI SMBCLK_MAIN 13,15,16,19,28
SMBDATA_MAIN R17 1K_1%_0603 DIMM_VREF_B
BI SMBDATA_MAIN 13,15,16,19,28
VCC_DDR2
R58 1K_1%_0603 DIMM_VREF_A
R18
R57 1K_1%_0603
1K_1%_0603 Title
DDR2 DIMM1 &2

Custom MS-9631 1.0

VTT_DDR VTT_DDR
CHANNEL A V_SM_VTT DECOULPING CAPS
CHANNEL B V_SM_VTT DECOULPING CAPS RN10 1 2 8P4R-56R RN6 1 2 8P4R-56R
VTT_DDR 3 4 3 4
VTT_DDR SCKE_A0 5 6 SCKE_B0 5 6
C29 SCKE_A1 7 8 SCKE_B1 7 8
0.1u_0603 C35
C28 4.7U35V_1206 SBS_A2 RN4 1 2 8P4R-56R MAA_B4 RN3 1 2 8P4R-56R
0.1u_0603 C21 MAA_A12 3 4 MAA_B3 3 4
X_4.7U35V_1206 MAA_A11 5 6 MAA_B2 5 6
MAA_A7 7 8 MAA_B1 7 8
VTT_DDR MAA_A9 RN5 1 2 8P4R-56R MAA_B9 RN8 1 2 8P4R-56R
VTT_DDR MAA_A5 3 4 MAA_B5 3 4
C38 C37 MAA_A8 5 6 MAA_B8 5 6
4.7U35V_1206 0.1u_0603 MAA_A6 7 8 MAA_B6 7 8
C22 C26
X_4.7U35V_1206 0.1u_0603 MAA_A4 RN9 1 2 8P4R-56R SBS_B2 RN7 1 2 8P4R-56R
C31 MAA_A3 3 4 MAA_B7 3 4
0.1u_0603 MAA_A2 5 6 MAA_B11 5 6
C27 MAA_A1 7 8 MAA_B12 7 8
0.1u_0603
C30 MAA_A0 RN11 1 2 8P4R-56R SBS_A0 RN12 1 2 8P4R-56R
0.1u_0603 SBS_A1 3 4 MAA_B10 3 4
C23 MAA_A10 5 6 SBS_B1 5 6
0.1u_0603 MAA_B0 7 8 SBS_B0 7 8
VTT_DDR
SCS_B#1 RN15 1 2 8P4R-56R WE_B# RN13 1 2 8P4R-56R
C25 ODT_B1 8,20 WE_B# RAS_B#
3 4 8,20 RAS_B# 3 4
0.1u_0603 VTT_DDR WE_A# 5 6 CAS_B# 5 6
8,20 WE_A# 8,20 CAS_B#
C33 C43 ODT_A0 7 8 SCS_B#0 7 8
0.1u_0603 0.1u_0603
C32 C34 CAS_A# RN16 1 2 8P4R-56R ODT_B0 RN14 1 2 8P4R-56R
8,20 CAS_A#
0.1u_0603 0.1u_0603 MAA_A13 3 4 RAS_A# 3 4
8,20 RAS_A#
C24 ODT_A1 5 6 MAA_B13 5 6
0.1u_0603 SCS_A#1 7 8 SCS_A#0 7 8
C44
0.1u_0603
8,20 MAA_A[0..13]
8,20 MAA_B[0..13]
8,20 SBS_A[0..2]
8,20 SBS_B[0..2]
7,20 SCS_A#[0..1]
7,20 SCS_B#[0..1]
7,20 SCKE_A[0..1]
7,20 SCKE_B[0..1]
7,20 ODT_A[0..1]
7,20 ODT_B[0..1]
VCC_DDR2
7,20 ODT_A[0..1]
C75 1U10V_0603
VCC_DDR2
C69 1U10V_0603
+ EC9
1000U/6.3V
C99
1U10V_0603 EC8
C70 CD1800U6.3EL20-2
1U10V_0603 1+ 2
C39
1U10V_0603
VCC3 C42
1U10V_0603
PU1 C71
1U10V_0603
C92
3 2 V_2P5_MCH
IN OUT 1U10V_0603
GND
PC2
PC1 VCC_DDR2
1U10V_0603 1UF VCC_DDR2
APL5301_SOT23
1
C56 EC2
1U10V_0603 CD1800U6.3EL20-2
C419 1+ 2
1U10V_0603
C41
1U10V_0603
C55
1U10V_0603
C77
1U10V_0603
C60
1U10V_0603
C74
1U10V_0603
C57
1U10V_0603

Title
DDR2 Terminator

Custom MS-9631 1.0

5 4 3 2 1
D VCC3
D
C547 C519 C525 C520
0.1U16V_0402 0.01U25V_0402
0.1U16V_0402 0.01U25V_0402
TPM Module
VCC3
C R460 C
VCC3 U25 4.7K_0402
26 6 VCC3
12,15,16 LPC_AD0 IN LAD0 GPIO
12,15,16 LPC_AD1 IN 23 LAD1
20 19 VCC3_SB
12,15,16 LPC_AD2 IN LAD2 VDD
R456 17 24
12,15,16 LPC_AD3 IN LAD3 VDD#24
12,15,16 LPC_FRAME# IN 22 LFRAME# VDD#10 10 Pin 10 - VDD or NC?
4.7K_0402 15P50V_0603 C486
16 5 XTALO_TPM
7,15,16,28 DEV_RST# LRESET# VSB
28 Y3 R417
LPCPD#
15 CLKRUN# GND 18
R453 33R_0402 27 25 32.768KHZ12.5P_D 10MR
13,16 SERIRQ IN SERIRQ GND#25
11 XTALI_TPM
GND#11 R413 X_0R_0402
15 TPM_CLK IN 21 LCLK GND#4 4
15P50V_0603 C497
BADDR 9 14 XTALO_TPM
TESTBI/BADD XTALO XTALI_TPM
8 TESTI XTALI/32KIN 13 IN SUSCLK 13
TPM_PP 7 R414 0R_0402
PP
R440 R447 2 12
GPIO2 NC
1 NC#1 NC#3 3
4.7K_0402 4.7K_0402
B R454 SLB9635TT1.2-RH
VCC3
B
4.7K_0402
VCC3
R442
4.7K_0402
BADDR
R441 4.7K_0402
VCC3
Address: PIN 9 pull up to Vcc3 = 4Eh/4Fh
Address: PIN 9 pull down to GND = 2Eh/2Fh
R438
X_4.7K_0603
TPM_PP
R439 4.7K_0402
A A
Title
TPM

B MS-9631 1.0
5 4 3 2 1
Lane Reverse
+12V PCI-E1
Trace width > 100 mils B1 A1

12V PRSNT1#
B2 A2 +12V
12V 12V
B3 A3
12V 12V
B4 A4
SMBCLK_RESUME GND GND
13,18,24 SMBCLK_RESUME BI B5 A5
SMBDATA_RESUME SMCLK JTAG2
13,18,24 SMBDATA_RESUME BI B6 A6
SMDAT JTAG3
B7 A7
VCC3 GND JTAG4
B8 A8
3.3V JTAG5
B9 A9 VCC3
VCC3_SB JTAG1 3.3V
B10 A10
I
N
WAKE# 3.3VAUX 3.3V PCI_E_RST#
13,18 WAKE# OUT B11 A11 PCI_E_RST# 18,19,27,28
WAKE# PWRGD
7,27 EXP_A_TXP_[0..15] IN B12 A12

RSVD GND CK_PE_100M_16PORT
7,27 EXP_A_TXN_[0..15] IN B13 A13 IN CK_PE_100M_16PORT 15
EXP_A_TXP_15 C325 0.1u_0402 EXP_A_TXP_15_C GND REFCLK+ CK_PE_100M_16PORT#
B14 A14 IN CK_PE_100M_16PORT# 15
EXP_A_TXN_15 C324 0.1u_0402 EXP_A_TXN_15_C HSOP0 REFCLK-
B15 A15 OUT EXP_A_RXP_[0..15] 7,27
HSON0 GND EXP_A_RXP_15
B16 A16 OUT EXP_A_RXN_[0..15] 7,27
SDVO_CTRL_CLK GND HSIP0 EXP_A_RXN_15
7,27 SDVO_CTRL_CLK BI B17 A17
PRSNT2# HSIN0
B18 A18
GND GND
EXP_A_TXP_14 C327 0.1u_0402 EXP_A_TXP_14_C B19 A19

EXP_A_TXN_14 C326 0.1u_0402 EXP_A_TXN_14_C HSOP1 RSVD
B20 A20
B21 A21
GND HSIP1 EXP_A_RXN_14
B22 A22
EXP_A_TXP_13 C329 0.1u_0402 EXP_A_TXP_13_C GND HSIN1
B23 A23
EXP_A_TXN_13 C328 0.1u_0402 EXP_A_TXN_13_C HSOP2 GND
B24 A24
B25 A25
B26 A26
B27 A27
B28 A28
B29 A29
B30 A30
SDVO_CTRL_DATA RSVD HSIN3
7,27 SDVO_CTRL_DATA BI B31 A31
PRSNT2# GND
B32 A32
GND RSVD
II
NN
EXP_A_TXP_11_1 C331 0.1u_0402 EXP_A_TXP_11_C B33 A33

27 EXP_A_TXP_11_1 HSOP4 RSVD
EXP_A_TXN_11_1 C330 0.1u_0402 EXP_A_TXN_11_C B34 A34
27 EXP_A_TXN_11_1 HSON4 GND
B35 A35 EXP_A_RXP_11
B36 A36
II
NN
EXP_A_TXP_10_1 C333 0.1u_0402 EXP_A_TXP_10_C GND HSIN4

27 EXP_A_TXP_10_1 B37 A37
EXP_A_TXN_10_1 C332 0.1u_0402 EXP_A_TXN_10_C HSOP5 GND
27 EXP_A_TXN_10_1 B38 A38
HSON5 GND EXP_A_RXP_10_1
B39 A39 OUT EXP_A_RXP_10_1 27
GND HSIP5 EXP_A_RXN_10_1
B40 A40
II
NN
GND HSIN5 OUT EXP_A_RXN_10_1 27

EXP_A_TXP_9_1 C335 0.1u_0402 EXP_A_TXP_9_C B41 A41
27 EXP_A_TXP_9_1 HSOP6 GND
EXP_A_TXN_9_1 C334 0.1u_0402 EXP_A_TXN_9_C B42 A42
27 EXP_A_TXN_9_1 HSON6 GND
B43 A43 EXP_A_RXP_9
B44 A44
II
NN
EXP_A_TXP_8_1 C337 0.1u_0402 EXP_A_TXP_8_C GND HSIN6

27 EXP_A_TXP_8_1 B45 A45
EXP_A_TXN_8_1 C336 0.1u_0402 EXP_A_TXN_8_C HSOP7 GND
27 EXP_A_TXN_8_1 B46 A46
B47 A47
CFG20 GND HSIP7 EXP_A_RXN_8
7 CFG20 IN B48 A48
PRSNT2# HSIN7
B49 A49
GND GND VCC3
EXP_A_TXP_7 C339 0.1u_0402 EXP_A_TXP_7_C B50 A50 C418 X_0.1u_0603

EXP_A_TXN_7 C338 0.1u_0402 EXP_A_TXN_7_C HSOP8 RSVD
B51 A51
HSON8 GND EXP_A_RXP_7 C488 X_0.1u_0603
B52 A52
B53 A53
J_SDVO EXP_A_TXP_6 C341 0.1u_0402 EXP_A_TXP_6_C GND HSIN8
B54 A54
B55 A55
1 B56 A56
SDVOC_DET# OUT B57 A57
2 EXP_A_TXP_5 C343 0.1u_0402 EXP_A_TXP_5_C GND HSIN9
3 B58 A58
B59 A59
HSON10 GND EXP_A_RXP_5 +12V
B60 A60
H1X3_black GND HSIP10 EXP_A_RXN_5
B61 A61
EXP_A_TXP_4 C345 0.1u_0402 EXP_A_TXP_4_C GND HSIN10 C517
B62 A62
EXP_A_TXN_4 C344 0.1u_0402 EXP_A_TXN_4_C HSOP11 GND X_0.1u_0603
B63 A63
J_SDVO HSON11 GND EXP_A_RXP_4 C515
B64 A64
GND HSIP11 EXP_A_RXN_4 X_0.1u_0603
1-2 : PCI-Ex16 Graphic Card B65 A65
B66 A66
2-3 : DVI (Default) EXP_A_TXN_3 C346 0.1u_0402 EXP_A_TXN_3_C HSOP12 GND
B67 A67
B68 A68
B69 A69
B70 A70
B71 A71
B72 A72
B73 A73
B74 A74
B75 A75
B76 A76
B77 A77
B78 A78
B79 A79
B80 A80
B81 A81
PRSNT2# HSIN15
B82 A82
RSVD GND
SLOT-PCI164P_black
+12V
VCC3 VCC3 VCC3_SB

+
C409 C359 EC43 EC34

X_0.1u_0603
C361 C380 C384 X_0.1u_0603 470U/16V 470U/16V
X_0.1u_0603
X_0.1u_0603 X_0.1u_0603

Title
PCI Express 16 Port

MS-9631 1.0

VCC3 Mini PCI SOCKET VCC3 AD[31..0]
12,30 AD[31..0] BI PCI SLOT 1 (PCI VER: 2.2 COMPLY)
MINIPCI1
1 2 BI C_BE#[3..0]
TIP RING 12,30 C_BE#[3..0] -12V
3 4 PCI1 +12V VCC3
8PMJ-3 8PMJ-1
5 6
8PMJ-6 8PMJ-2 PTRST#
7 8 B1 A1
8PMJ-7 8PMJ-4 PTCK -12V TRST#
9 10 B2 A2
TP3 8PMJ-8 8PMJ-5 TP5 TCK +12V PTMS
11 12 B3 A3
TP2 Led1_GrnP LED2_YELP TP4 Change PGNT#2 to PCI1.B10 because GND TMS PTDI
13 14 B4 A4
Led_GrnN LED2_YELN TDO TDI
15 16 PGNT#2 is straping pin. PRSNT#2 B5 A5
Add INTB# PIRQ#G CHSGND REV#16 VCC5 +5V +5V PIRQ#B
17 18 VCC5 B6 A6
INTB# 5V#18 PIRQ#H is GND on PCI card PIRQ#C +5V INTA# PIRQ#D
2006.1.18 19 20 B7 A7
3.3V#19 INTA# PIRQ#A INTB# INTC#
21
REV_1 REV#22
22 2006.1.18 B8
INTD# +5V
A8 VCC5
23 24 VCC3_SB B9 A9 IN CHASSIS 16
GND#23 3.3VAUX#24 PGNT#2 R495 0R0402 PRSNT#1 RESERVED
15 PCI_CLK0 IN 25 26 IN PCIRST_ICH7# 12,30 12 PGNT#2 IN B10 A10
CLK RST# R496 X_0R0402 RESERVED +5V(I/O) PREQ#2
27 28 B11 A11 OUT PREQ#2 12
PREQ#0 GND#27 3.3V#28 VCC3 PRSNT#2 RESERVED
12 PREQ#0 OUT 29 30 IN PGNT#0 12 B12 A12
REQ# GNT# GND GND
31 32 B13 A13
AD31 3.3V GND#32 GND GND
33 34 OUT PCI_PME# 12 15 PCI_CLK2 IN B14 A14 VCC3_SB
AD29 AD31 PME# RESERVED RESERVED
35 36 B15 A15 IN PCIRST_ICH7# 12,30
AD29 REV#36 AD30 GND RST#
37 38 15 PCI_CLK1 IN B16 A16
AD27 GND#37 AD30 CLK +5V(I/O)
39 40 B17 A17 IN PGNT#1 12
AD25 AD27 3.3V#40 AD28 PREQ#1 GND GNT#
41 42 12 PREQ#1 OUT B18 A18
AD25 AD28 AD26 REQ# GND PCI_PME#
43 44 B19 A19 OUT PCI_PME# 12
C_BE#3 REV#43 AD26 AD24 AD31 +5V(I/O) RESERVED AD30
45 46 B20 A20
AD23 C/BE3# AD24 R418 330R_0603 AD18 AD29 AD31 AD30
47 48 B21 A21
AD23 IDSEL AD29 +3.3V AD28
49 50 B22 A22
AD21 GND#49 GND#50 AD22 AD27 GND AD28 AD26
51 52 B23 A23
AD19 AD21 AD22 AD20 AD25 AD27 AD26
53 54 B24 A24
AD19 AD20 PAR AD25 GND AD24
55 56 BI PAR 12,30 B25 A25
AD17 GND#55 PAR AD18 C_BE#3 +3.3V AD24 ID2 R386 AD17
57 58 B26 A26
C_BE#2 AD17 AD18 AD16 AD23 C/BE#3 IDSEL 330R_0603
59 60 B27 A27
C/BE2# AD16 AD23 +3.3 AD22
12,30 IRDY# BI 61 62 B28 A28
IRDY# GND#62 FRAME# AD21 GND AD22 AD20 VCC5
63 64 BI FRAME# 12,30 B29 A29
3.3V#63 FRAME# TRDY# AD19 AD21 AD20
65 66 BI TRDY# 12,30 B30 A30
CLKRUN# TRDY# AD19 GND AD18 RN28
12 SERR# OUT 67 68 BI STOP# 12,30 B31 A31
SERR# STOP# AD17 +3.3V AD18 AD16 PTRST#
69 70 B32 A32 7 8
GND#69 3.3V#70 DEVSEL# C_BE#2 AD17 AD16 PTMS
12,30 PERR# BI 71 72 BI DEVSEL# 12,30 B33 A33 5 6
C_BE#1 PERR# DEVSEL# C/BE#2 +3.3V FRAME# PTCK
73 74 B34 A34 BI FRAME# 12,30 3 4
AD14 C/BE1# GND#74 AD15 IRDY# GND FRAME# PTDI
75 76 12,30 IRDY# BI B35 A35 1 2
AD14 AD15 AD13 IRDY# GND TRDY#
77 78 B36 A36 BI TRDY# 12,30
AD12 GND#77 AD13 AD11 DEVSEL# +3.3V TRDY# 8.2K-8P4R
79 80 12,30 DEVSEL# BI B37 A37
AD10 AD12 AD11 DEVSEL# GND STOP#
81 82 B38 A38 BI STOP# 12,30
AD10 GND#82 AD9 LOCK# GND STOP#
83 84 12 LOCK# BI B39 A39
AD8 GND#83 AD09 C_BE#0 PERR# LOCK# +3.3V SDONE
85 86 12,30 PERR# BI B40 A40
AD7 AD08 C/BE0# PERR# SDONE SBO#
87 88 B41 A41
AD07 3.3V#88 AD6 SERR# +3.3V SBO#
89 90 12 SERR# OUT B42 A42
AD5 3.3V#89 AD06 AD4 SERR# GND PAR
91 92 B43 A43 BI PAR 12,30
AD05 AD04 AD2 C_BE#1 +3.3V PAR AD15
93 94 B44 A44
AD3 REV#93 AD02 AD0 AD14 C/BE#1 AD15
95 96 B45 A45
AD03 AD00 AD14 +3.3V AD13
VCC5 97 98 B46 A46
5V#97 REV_WIP#98 AD12 GND AD13 AD11
B47 A47
AD10 AD12 AD11
B48 A48
AD1 AD10 GND AD9
99 100 B49 A49
AD01 REV_WIP#100 GND AD9
101 102
GND#101 GND#102
103 104
AC_SYNC M66EN AD8 C_BE#0
105 106 B52 A52
AC_SDATA_IN AC_SDATA_OUT AD7 AD8 C/BE#0
107 108 B53 A53
AC_BIT_CLK AC_CODEC_ID0# AD7 +3.3V AD6
109 110 B54 A54
AC_CODE_ID1# AC_RESET# AD5 +3.3V AD6 AD4
111 112 B55 A55
MOD_AUDIO_MON REV#112 AD3 AD5 AD4
113 114 B56 A56
AUDIO_GND#113 GND#114 AD3 GND AD2
115 116 B57 A57
SYS_AUDIO_OUT SYS_AUDIO_IN AD1 GND AD2 AD0
117 118 B58 A58
SYS_AUDIO_OGND SYS_AUDIO_IGND AD1 AD0
119 120 B59 A59
AUDIO_GND#119 AUDIO_GND#120 TP6 4.7K_0603 R497 PCI_ACK64# +5V(I/O) +5V(I/O) PCI_REQ64# R352 4.7K_0603
121 122 VCC5 B60 A60 VCC5
REV#121 MPCIACT# ACK64# REQ64#
123 124 VCC3_SB B61 A61
VCC5VA 3.3VAUX#124 Add PCI_ACK64# pull high +5V +5V
B62 A62
+5V +5V
127 128 2006.1.18
GND#127 GND#128
_
_SLOT-MINIPCI_III_white
IDSEL = AD17
IDSEL = AD18
MASTER = PREQ#1
MASTER = PREQ#0
PIRQ#B
PIRQ#H
PCI PULL-UP / DOWN RESISTORS PCI SLOT DECOUPLING CAPACITORS

PREQ#2 2 1 PIRQ#A 8 7 VCC5
12 PREQ#2 BI VCC5 12 PIRQ#A BI VCC3 VCC3_SB
PREQ#0 4 3 PIRQ#C 6 5 VCC3 -12V
12 PREQ#0 BI 12 PIRQ#C BI
BI PREQ#3 6 5 RN35 BI PIRQ#D 4 3 RN29
12,30 PREQ#3 12 PIRQ#D
BI PREQ#1 8 7 8P4R-2.7KR BI PIRQ#B 2 1 8P4R-8.2KR + EC50 C461 + EC44
12 PREQ#1 12 PIRQ#B
8 7 C415 1000u-6.3V X_0.1u_0603 1000u-6.3V
BI PREQ#4 2 1 BI PIRQ#F 6 5 X_0.1u_0603 C489 C408 C360
12 PREQ#4 12,30 PIRQ#F
4 3 BI PIRQ#E 4 3 RN37 C405 X_0.1u_0603 X_0.1u_0603 X_0.1u_0603
12 PIRQ#E
6 5 RN36 BI PIRQ#G 2 1 8P4R-8.2KR X_0.1u_0603 C532 C498
12 PIRQ#G
BI PREQ#5 8 7 8P4R-2.7KR C459 X_0.1u_0603 X_0.1u_0603
12 PREQ#5
BI PIRQ#H R445 8.2KR_0603 X_0.1u_0603 C410
12 PIRQ#H
C499 X_0.1u_0603
X_0.1u_0603 C417
SERR# 8 7 VCC5 C524 X_0.1u_0603
12 SERR# BI
PERR# 6 5 X_0.1u_0603 C490
12,30 PERR# BI
LOCK# 4 3 RN26 SDONE R354 X_0R BI X_0.1u_0603
12 LOCK# BI SM_LINK0 13
STOP# 2 1 8P4R-2.7KR SBO# R356 X_0R BI
12,30 STOP# BI SM_LINK1 13
C407
X_0.1u_0603
DEVSEL# 8 7 VCC5 R353 0R_0603 SMBCLK_RESUME BI C83
12,30 DEVSEL# BI SMBCLK_RESUME 13,18,23
TRDY# 6 5 R355 0R_0603 SMBDATA_RESUME BI 0.1u_0603
12,30 TRDY# BI RN25 SMBDATA_RESUME 13,18,23
IRDY# 4 3
12,30 IRDY# BI
FRAME# 2 1 8P4R-2.7KR
12,30 FRAME# BI
Add C83 for EMC 2005.5.9
C404 X_0.1u_0603
VCC5 VCC3 MICRO-STAR INt'L CO. , LTD.
Title
PCI Slot & Mini PCI

Custom MS-9631 1.0

POWER CIRCUIT FOR USB PORT 0,1,2,3 (REAR) POWER CIRCUIT FOR USB PORT 4,5,6,7 (FRONT)
SVCC1
FS2 FS6
1 2 SVCC1 1 2 SVCC4
5VDUAL2 5VDUAL1
2.6A-MINISMDC260-S R138 2.6A-MINISMDC260-S R487
+
4.7K_0603 C130 EC13 4.7K_0603 C585 EC56
0.1u_0603 1000U/6.3V OC#4 0.1u_0603 1000U/6.3V
13 OC#1 13 OC#4
R139 C573 R484
5.6K_0603 C144 5.6K_0603
0.1u_0603 NEAR USB CONNECTOR 0.1u_0603
REAR PANEL USB CONNECTOR FOR USB PORT 0,1

FRONT PANEL USB CONNECTOR FOR USB PORT 6,7
USB Interface
SVCC4
Diff. Trace width 7.5 mils & 7.5 mils space.
Diff. & other space 20 mils. Modify footprint for USB chock 2005.3.22
5
Length matching: < 150 mils U27
L25 SBD6- SBD7+
Ttrace length 0" to 17" Modify footprint for USB chock 2005.3.22 6 4
8 1 SBD6- SBD6+ 1 3 SBD7-

13 USB6- SBD6+
13 USB6+ 7 2
6 3 SBD7-
SVCC1 L7 13 USB7- SBD7+ ESD-IP4220
2
13 USB7+ 5 4
8 1 SBD1- X_CMC-L02-9007020-C71 NEAR USB CONNECTOR

13 USB1-
5
U7 7 2 SBD1+ RN40
USB1+ USB0- 13 USB1+ SBD0-
6 4 6 3 1 2
13 USB0- SBD0+ SVCC4
13 USB0+ 5 4 3 4
USB1- 1 3 USB0+ 5 6
X_CMC-L02-9007020-C71 7 8 C565
RN18 C470P16X0402
ESD-IP4220 8P4R-0R F_USB1
2
1 2
3 4 1 2
5 6 SBD7- 3 4 SBD6-
7 8 SBD7+ 5 6 SBD6+
NEAR USB CONNECTOR 7 8
8P4R-0R 10 OC#4
D2x5-1:9-BK
REAR PANEL USB CONNECTOR FOR USB PORT 2,3 FRONT PANEL USB CONNECTOR FOR USB PORT 4,5
Modify footprint for USB chock 2005.10.24

Change 1.0: 2005/09/15
Change 1.0: 2005/09/15 Add FS7; R556; R557; C758 ; EC47 SVCC3
Add FS7; R556; R557; C758 ; EC47
FS5
5
FS1
5VDUAL1 1 2 SVCC3 U28
5VDUAL2 1 2 SVCC2 SBD4- 6 4 SBD5+
2.6A-MINISMDC260-S R482
+
2.6A-MINISMDC260-S R104 4.7K_0603 C578 EC55 SBD4+ SBD5-
+
1 3
4.7K_0603 C119 EC10 OC#3 0.1u_0603 1000U/6.3V
13 OC#3
OC#2 0.1u_0603 1000U/6.3V
13 OC#2
R478 ESD-IP4220
2
R106 5.6K_0603
5.6K_0603
L5
SVCC2 SBD2-
13 USB2-
8
7
1
2 SBD2+ Modify footprint for USB chock 2005.3.22
13 USB2+ SBD3-
6 3
13 USB3-
5
U5 5 4 SBD3+
USB2- USB3- 13 USB3+ L24
6 4
X_CMC-L02-9007020-C71
USB2+ 1 3 USB3+ RN17 8 1 SBD4- SVCC3
13 USB4- SBD4+
1 2 13 USB4+ 7 2
NEAR USB CONNECTOR 3 4 6 3 SBD5- C564
ESD-IP4220 13 USB5- SBD5+ C470P16X0402
2
5 6 13 USB5+ 5 4
7 8 F_USB2
X_CMC-L02-9007020-C71 1 2
8P4R-0R RN39 SBD5- 3 4 SBD4-
1 2 SBD5+ 5 6 SBD4+
3 4 7 8
5 6 10 OC#3
7 8
D2x5-1:9-BK
SVCC1 SVCC2 8P4R-0R
C138 C114
C470P16X0402 C470P16X0402 USB Interface
F_USB4 F_USB3
Diff. Trace width 7.5 mils & 7.5 mils space. NEAR USB CONNECTOR
1 2 1 2
SBD1- 3 4 SBD0- SBD2- 3 4 SBD3- Diff. & other space 20 mils.
SBD1+ 5 6 SBD0+ SBD2+ 5 6 SBD3+ Length matching: < 150 mils
7 8 7 8 Ttrace length 0" to 17"
10 OC#1 10 OC#2
D2x5-1:9-BK D2x5-1:9-BK

Title
USB Connector

Custom MS-9631 1.0

ATX Connector
Changed HDD+ from VCC5 to VCC3
ATX1
because ICH7 SATALED# need to
Intel Front Panel J5
13 1 VCC5_SB SLPBTIN# OUT
VCC3 3.3V 3.3V VCC3 pull high to VCC3. 2005.11.8 1 SLPBTIN# 13
SLPSW-
JFP1 2
-12V 14 2
-12V 3.3V C11 C12 SLP_Button C514
VCC5_SB C10 15 3 0.1u_0603 0.1u_0603 HDDLED 1 2 PWR_LED 1U16V_0805
GND GND VCC3 HDD+ PLED IN PWR_LED 28
0.1u_0603 R459 200R_0603
PS_ON# 16 4 HDDLED# 3 4 SUS_LED IN R467
P_ON 5V VCC5 HDD- SLED SUS_LED 28
R11 1K_0603 R10 0R_0603
R12 X_4.7K VCC3_SB R480 4.7K_0603 PWRSW+ 1K_0603
VCC5_SB 17 5 5 6
GND GND C8 RESET- PWSW+
IN S D 18 6 0.1u_0603 VCC5 OUT 7 8 PWRBTIN OUT

16 PS_ON# GND 5V 13,15 FP_RST# RESET+ PWSW- PWRBTIN 16
C9
Q5 X_1000P10V 19 7 R9 9
GND GND NC
G
10K_0603 C566 R473
C13 X_0.1u_0603 20 8 OUT R485 0.1u_0603 10K_0603 C556
-5V POK PWR_OK 28
X_N-2N7002_SOT23 X_0R MSIFP_CON5x2 1U16V_0805
21 9 C6
28 AGP_PTECT IN 5V 5VSB VCC5_SB
0.1u_0603 28 MS5_RST# OUT
VCC5 22 10 +12V
5V +12V
C7 23 11 C15
Change footprint to JFP1 2005.3.28
0.1u_0603 5V +12V 0.1u_0603 C17
24 12 0.1u_0603
GND DET VCC3
29 IDEACTP# IN D20
Engery Lake LED
1
BAT54A 2X12 POWER

PWR-2X12 M VCC5
3 HDDLED# VCC3_SB
VCC3_SB
U24A
14
R432
14
12,13,19 SATALED# IN U3A
2
300R
1 IN 1 2
VSYNC_5V 13 EL_STATE0
3
2
RN38 8P4R-100R IN LVC07A_SOIC14 J6
VCC5 7 VSYNC 1
7
16 ALARM IN 1 2 ACT08DR_SOIC14
R86 VCC3_SB 2 YJ102
7
3 4
D22 1N4148S 1 U24B
14
5 6
SPK1 2 X_10KR
7 8
BZ1 Close to JFP1
C
BUZZER VCC5 3 4
R474 Q44 13 EL_STATE1 IN
13,17 SPKR IN B
N-MMBT3904_SOT23 R433 300R
2.2K_0603 200mA C527 LVC07A_SOIC14 VCC3_SB
E
0.1u_0603
7
14
U3D
13
11 HSYNC_5V
12
7 HSYNC IN
ACT08DR_SOIC14
VCC3
Video Connector
R74 For EMI
7
PLACE CLOSE TO MCH
X_10KR
To prevent Grantsdale VSYNC and HSYNC signal level issue
C439 C412 C457 C465 C539 C118 C518 C106 C474 C575
D2
BI 2 1 1PS226_SOT23 0.1u_0402 X_0.1u_0402 X_0.1u_0402 X_0.1u_0402 X_0.1u_0402
10 VCCA_CRTDAC
C67
0.1u_0603 D3 X_0.1u_0402 X_0.1u_0402 X_0.1u_0402 X_0.1u_0402 X_0.1u_0402
3
2 1 1PS226_SOT23
VCC5
For EMI
3
PLACE CLOSE TO MCH, D4 PLACE CLOSE TO VGA CONNECTOR

1PS226_SOT23 C112 C456 C86 C487 C79 C111 C113 C14 C80 C151
WITHIN 750 MIL OF
2 1
PIN 0.1u_0402 X_0.1u_0402 0.1u_0402 0.1u_0402 0.1u_0402
VGA_RED L1 0.082U300m_0603 CON_R

3
7 VGA_RED IN OUT CON_R 27

X_0.1u_0402 0.1u_0402
IN VGA_GREEN L2 0.082U300m_0603 CON_G OUT CON_DDCDA 22R_0603 R60 5VDDCDA X_0.1u_0402 X_0.1u_0402 X_0.1u_0402
7 VGA_GREEN CON_G 27
IN VGA_BLUE L3 0.082U300m_0603 CON_B OUT

7 VGA_BLUE CON_B 27
R41 R42 C63 C64
R43 C62 C53
1
C52 CON_DDCCL 22R_0603 R59 5VDDCCL

R256 R255 R254 150_1%_0402 C54 For EMI
7
C33P50N0402 C33P50N0402
150R1%0402-1 150R1%0402-1 150_1%_0402
150_1%_0402 22P50V_0402 C33P50N0402 CN1A CN1D VCC5 VCC5_SB
2
22P50V_0402 8P4C-22P 8P4C-22P
8
150R1%0402-1 22P50V_0402 C1
C589
VCC5 VCC5 0.1u_0402
X_0.1u_0402
KBGND
2
VCC3 3 D6 3 D5
VCC3 VCC5 1PS226_SOT23 1PS226_SOT23
1
VSYNC_5V R62 39R_0402 CON_VSYNC OUT CON_VSYNC 27

R64 R63
2.7K_0603 8.2K_0603 HSYNC_5V R61 39R_0402 CON_HSYNC
G
OUT CON_HSYNC 27
S D 5VDDCCL OUT
7 MCH_DDC_CLK 5VDDCCL 27
5
3
Q9 N-2N7002_SOT23
CN1C CN1B
8P4C-22P 8P4C-22P
6
4
VCC3
VCC3 VCC5
R90 R96 MICRO-STAR INt'L CO. , LTD.

2.7K_0603 8.2K_0603 Title
G
ATX Connector & Front Panel

S D 5VDDCDA OUT
7 MCH_DDC_DATA 5VDDCDA 27 Size Document Number Rev
Q11 N-2N7002_SOT23 Custom MS-9631 1.0

1 2 3 4 5
SDVOC_RED C192 0.1u_0402 SDVOC_RED_1 TDC2 TDC1

SDVOC_RED# C187 0.1u_0402 SDVOC_RED_1#
SDVOC_GREEN C200 0.1u_0402 SDVOC_GREEN_1 VCC3 R23 R24
SDVOC_GREEN# C196 0.1u_0402 SDVOC_GREEN_1# X_0R X_0R
SDVOC_BLUE C209 0.1u_0402 SDVOC_BLUE_1 TDC2# TDC1#
SDVOC_BLUE# C203 0.1u_0402 SDVOC_BLUE_1# R2
SDVOC_CLK C220 0.1u_0402 SDVOC_CLK_1 R1 1K
SDVOC_CLK# C213 0.1u_0402 SDVOC_CLK_1# 1K TDC0 TLC
HPDET
R25 R21
Q2 X_0R X_0R
TDC0# TLC#
R6 N-MMBT3904_SOT23
L9
V_2P5_MCH Bead 80/3A_0805 LINK0_HTPLG HPDET_0 Q1 FOR EMI
A
VCC3 N-MMBT3904_SOT23 A
3
C152 C163 C155 C156 10K
10U10V_0805 0.1uF 0.1uF 0.1uF 1 2
D1
1PS226_SOT23
L8
V_2P5_MCH Bead 80/3A_0805
49
48
47
46
45
44
43
42
41
40
39
38
37
C135 C147 C136 U8
10U10V_0805 0.1uF 0.1uF
Thermal_GND
AVDD
SDVOB_CLK+
AGND
SDVOB_B+
AVDD
SDVOB_G+
AGND
SDVOB_R+
SDVOB_CLK-
SDVOB_B-
SDVOB_G-
SDVOB_R-
V_2P5_MCH
V_2P5_MCH
R147 R144
5.6K 5.6K
R148
10K 1 36
AVDD_PLL AVDD
18,19,23,28 PCI_E_RST# 2 35
RESET* SDVOB_STAFF-
3 34
SDVO_CTRL_CLK_DVI AS SDVOB_STAFF+ SDVO_INT_1# C153 0.1u_0402 SDVO_INT#
4 33
R151 SDVO_CTRL_DATA_DVI SPC SDVOB_INT- SDVO_INT_1 C148 0.1u_0402 SDVO_INT
5 32
X_100k SPD SDVOB_INT+
6 31
AGND_PLL AGND
7 30
SD_PROM DGND DGND HPDET
8 29
SC_PROM SD_PROM HPDET
9 28
SD_DDC SC_PROM DVDD
When using the INTEL driver 10
SD_DDC ATPG
27 Combined Analog and Digital DVI-I Connector
for the Ch7307,AS pin must SC_DDC 11 26
SC_DDC SCEN VSWING
12 25
be pulled HIGH DVDD VSWING JDVI1
DVI-I
TDC0*
TDC1*
TDC2*
TGND
TGND
TVDD
TVDD
R142
TDC0
TDC1
TDC2
R137 _CONN-D-SUB30P-2.38pitch
TLC*
TLC
L10 10K
Bead 80/3A_0805 1.2k/1%
VCC3 13 TDC2# 1
14
15
16
17
18
19
20
21
22
23
24
L6 TDC2 TMDS DATA2-
C160 C159
CH7307 Bead 80/3A_0805 VCC3
2
TMDS DATA2+
10U10V_0805 0.1uF TVDD
FROM 945GT
B C133 C134 C132 16 LINK0_HTPLG B
TDC2 0.1uF 0.1uF 10U10V_0805 HOT PLUG DET.
4
TDC2# TMDS DATA4-
5
TMDS_DATA4+ DDC_CLK_C
6
VCC5 TDC1 C5b
DDC CLK DDC_DATA_C
7
TDC1# DDC DATA
C2 C4
TDC0 TDC1# 9
TMDS DATA1-
2
TDC0# TDC1 10 C5a

TMDS DATA1+ C1 C3
R116 R115 8 VGA_VSYNC
U6 TLC Analog Vertical Sync IN CON_VSYNC 26
1 8 5.6K 5.6K TLC# 8 16 24 C4 VGA_HSYNC
A0 VCC Analog Horizontal Sync IN CON_HSYNC 26
2 7
A1 WP SC_PROM
1
3 6 12
A2 SCL SD_PROM TMDS DATA3-
4 5 13 C1 IN CON_R 26
VSS SDA TMDS DATA3+ Analog Red
AS pin setting : VSATA1.8 C2
X_1K Analog Green IN CON_G 26
X_24C16
R121 Pull HIGH = Device Address Byte C3
R122 TDC0# Analog Blue IN CON_B 26
70h(Write),71h(Read) 17
X_0R C131 TDC0 TMDS DATA0-
18
X_0.1uF TMDS DAT0+
Pull LOW = Device Address Byte Analog Ground1
C5
13
18
20
30
40
42
72h(Write),73h(Read) C6
U10 Analog Ground2
5
8
WP: PULL HIGH -Write Protect Enable VCC5
VDD#5
VDD#8
VDD#13
VDD#18
VDD#20
VDD#30
VDD#40
VDD#42
PULL LOW -Normal Operation 0B1
38 OUT EXP_A_TXP_8_1 23 20
TMDS DATA5-
1 9 17
37 OUT EXP_A_TXN_8_1 23 21 14
1B1 TMDS DATA5+ +5V POWER
2 36 15 F1 C49
7 EXP_A_TXP_8 IN A0 2B1 OUT EXP_A_TXP_9_1 23 GROUND (+5V) F-MINISMDC110 0.1uF
IN 3 35 OUT EXP_A_TXN_9_1 23
7 EXP_A_TXN_8 A1 3B1
+12V VSATA1.8 6 34 SDVOC_CLK TLC 23
7 EXP_A_TXP_9 IN A2 0B2 SDVOC_CLK# TLC# TMDS CLOCK+
IN 7 33 24 22
C613 7 EXP_A_TXN_9 A3 1B2 TMDS CLOCK- CLOCK SHLD
3
X_ 0.1uF SDVOC_BLUE DATA 2/4 SHLD
32 11
R321 2B2 SDVOC_BLUE# DATA 1/3 SHLD
31 19
3B2 DATA 0/5 SHLD
Fix EMI issue to near by U6 4.7KR0402 SDVOC_DET# IN 9
SEL
C 11-17-2005 GND 4B1
29
28
OUT EXP_A_TXP_10_1 23 MEC1
MEC1
MEC2
C
5B1 OUT EXP_A_TXN_10_1 23 MEC2
SDVOC_DET#
11 27
7 EXP_A_TXP_10 IN A4 6B1 OUT EXP_A_TXP_11_1 23
12 26
7 EXP_A_TXN_10 IN A5 7B1 OUT EXP_A_TXN_11_1 23
15 25 SDVOC_GREEN
7 EXP_A_TXP_11 IN A6 4B2 SDVOC_GREEN#
IN 16 24
7 EXP_A_TXN_11 A7 5B2
GND#10
GND#14
GND#17
GND#19
GND#21
GND#39
GND#41
23 SDVOC_RED
GND#1
GND#4
6B2 SDVOC_RED#
22
7B2
SDVO_CTRL_DATA
43
For SDVO strapping SDVOC_DET#

10
14
17
19
21
39
41
43
SDVO_DET# HIGH DVI

1
4
HIGH - onboard DVI VSATA1.8

LOW - PCI-E slot LOW PCI-E
PI2PCIE412-CZHE_TQFN42-LF
13
18
20
30
40
42
U29
5
8
VCC5
VDD#5
VDD#8
VDD#13
VDD#18
VDD#20
VDD#30
VDD#40
VDD#42
38 IN EXP_A_RXP_10_1 23
0B1
37 IN EXP_A_RXN_10_1 23
1B1
7 EXP_A_RXP_10 OUT 2 36
A0 2B1
2
3 35 R493 0R_0402
7 EXP_A_RXN_10 OUT A1 3B1 R494 0R_0402 R31 R33
6 34 SDVO_INT C47
7,23 SDVO_CTRL_DATA A2 0B2
7 33 SDVO_INT# X_10K X_10K X_C150P50N
7,23 SDVO_CTRL_CLK A3 1B2
SDVO_CTRL_DATA_DVI
1
32
2B2 SDVO_CTRL_CLK_DVI SD_DDC DDC_DATA_C
31
3B2 SC_DDC R20 0R DDC_CLK_C
IN 9
SDVOC_DET# SEL R19 0R
GND 4B1
29
28
D 5B1 D
11 27
26 5VDDCDA IN R28 0R
A4 6B1 26 5VDDCCL IN R27 0R
12 26
A5 7B1
15 25
A6 4B2
16 24
A7 5B2
GND#10
GND#14
GND#17
GND#19
GND#21
GND#39
GND#41
23
GND#1
GND#4
6B2
22
7B2
43
MICRO-START INT'L CO.,LTD.

10
14
17
19
21
39
41
43
Title
1
4
CH7307 & DVI CONNECTOR

C MS-9631
PI2PCIE412-CZHE_TQFN42-LF 1.0
1 2 3 4 5
3VSB MODE SELECT VDIMM LINEAR OR PWM SELECT PCI-Express POWER
ACPI Controller
3VSB MODE 3VDLDEC# VDIMM MODE EXTRAM
SINGLE MOSFET PULL HIGH LINEAR REGULATOR PULL LOW
DUAL MOSFET PULL LOW PWM REGULATOR PULL HIGH
VID_GD#
VID_GD# 31
SLP_S3# R408 2.7K_0603 Q41

VCC5_SB C279 PL2 EC41
N-MMBT3904_SOT23 1+ 2
VCC5
X_0.1u_0603 80L6_30_0805
R260 +12V C406 1000U/6.3V
R479 R486 1.02KR1% D13 EC42
VCC5 R263 R267 C315 0.1u_0603 1+ 2
V_FSB_VTT R437 2.7K_0603 Q40 49.9K1%_0603 R293 S-1N5817_DO214AC
5
6
7
8
9
330R_0603 330R_0603 1.2V_REF X_0.22U16Y_0603 1000U/6.3V
R400 C513 N-MMBT3904_SOT23 X_33R1% U16 X_0R
R249 C314 0.22U16V_0603 PQ2
Connect to GND 2005.3.16 1U10V_0603
7
6
ISET BOOT
8
9
4
AO4410 V_1P5_CORE
330R_0603 X_20P50V_0603 R262 18K_1%_0603 VREF_IN H_DRV
5 10
C477 4.02KR1% C283 2200P16V_0603 4 FB PGND R294 10K_0603 PL1
26 PWR_LED 11
COMP ISEN
1
2
3
3 12
Q48 C285 X_0.01U16V_0603 SS L_DRV CH-0.5U30A_S
2 13
R416 4.7K_0603 3VDLDEC# SLP_S3# SLP_S4# 13 GND VDD
26 SUS_LED 1 PWROK VDDA 14
1
PLTRST# SLP_S3# 13,16,31 EC23 EC45
+
IN PLTRST# 12
5
6
7
8
9
N-MMBT3904_SOT23 C284 MS-6+_SOP14
HD_RST# 29
R398 10R_0603 R269 C316 2.2U16V_0805 1000U/6.3V 1000U/6.3V
DEV_RST# 7,15,16,22
R394 10R_0603 0.1u_0603 PQ1
2
PCI_E_RST# 18,19,23,27 4
PWR_OK Q45 C464 C355 C307 2.2U16V_0805 AO4410
R423 4.7K_0603 EXTRAM 200R_0603 CLOSE TO CHIP
X_20P50V_0603 X_20P50V_0603 R273 R314
VCC5_SB N-MMBT3904_SOT23 R415 R411 VCC5 10R_0805
1
2
3
OUT RSMRST# 13,18 2.2K_0805
C469 VCC3
1K_0603 1K_0603 C354
R388 PWRGD 0.1u_0603 VCC5_SB VCC5 1000P16V
R427 EC49 1000U/6.3V
4.7K_06031K_0603 4.7K_0603 1+ 2
R383 Q35 VCC3 VCC5_SB U22
48
47
46
45
44
43
42
41
40
39
38
37
N-MMBT3904_SOT23 MS7-C C449 1U10V_0603
Q39 PLED1/EXTRAM
AGND
PLED0/3VDLDEC#
S5#
S3#
PCI_RST#
HDD_RST#
DEV_RST#
SLOT_RST#
VCC3
PCIRST_BUF#
RSMRST#
R428 R429
R430 R426 1K_0603 1K_0603 9VSB CHARGE PUMP VOLTAGE
N-MMBT3904_SOT23
1K_0603 4.7K_0603
OUTPUT
R424 33R_0402 C453 1U16V_0805
13,15,16,19,20 SMBCLK_MAIN
BI
BI R425 33R_0402
1
2
SCL CHARPMP 36
35
5V DUAL Power
13,15,16,19,20 SMBDATA_MAIN SDA C2
3 34 C454 1U16V_0805
26 MS5_RST# IN PWRGD FP_RST# C1 C574 VCC5_SB VCC5 VCC3
7,13 PWRGD 4 CHIP_PWGD 5VSB 33
5 32 1.2V_REF
SMB_PWROK CPU_PWGD VLR1_DRV C450 1000P50V_0603 2200P16V_0603 Q47
13 SMB_PWROK 6 POK1 VLR2_SEN 31
1
PWR_OK 5V_DRVL 5VDUAL1
+
26 PWR_OK 7 30 4 5
PWROK 5VUSB_DRV 5V_DRVH
OUT 8 29 3 6
26 AGP_PTECT PSOUT# 5V_DRV EC6 EC39
X7R 9
DDRTYPE VLR2_DRV
28 2 7
C495 0.22U16V_0603
SVRAM_DRV/DMSB
2
10 27 VCC3 1 8
SS VLR2_SEN C570 CD1000U6.3EL15 CD1000U6.3EL15
11 26 FRONT
RAM_HDRV/DMV
GND GND C451 NN-P07D03LV_SO8

DDR AND DDR II VOLT SELECT VCC5 12 25
D
VCC5 VAGP_DRV N-AP40N03H/J_TO252 X_2200P16V_060 3 C568
RAM_HSEN
VAGP_SEN
3VSB_DRV
C496 X_1000P50V_060 3
RAM_DRV
DDRTYPE VDIMM
RAM_SEN
VID_DRV
VID_SEN
Q37 VCC5 X_0.1u_0603

VIDGD#
PULL LOW 2.5V 0.1u_0603 VSATA1.8 VCC5 VCC3

5VSB
3VSB
G
R435
PULL HIGH 1.8V
Change to 1K ohm VCC5_SB
2005.3.16
1
THIS PIN IS OPEN DRAIN OUTPUT
+
13
14
15
16
17
18
19
20
21
22
23
24
R434 100R1% Q12
1
R382 5VDUAL2 EC57 EC58
+
4 5
AGP_VREF EC54
2
3 6
220R1% 2 7 CD1000U6.3EL15 CD1000U6.3EL15
1000u_6.3V
2
1 8
RAMDRV
RAM_SBDRV
Wide Trace
1K_0603 C441 REAR

C462 NN-P07D03LV_SO8
1U16V_0805
1000P50V_0603 VCC5
R412 Close to MS6+
VCC5_SB
3.3R_0603 C478 C362
1U10V_0603 X_2200P16V_060 3 Q27

3VSB_DRV 4 5 VCC5_SB
Wide Trace 3 6
5V_DRVH
DDR VTT Power 1+ EC36
2
1
7
8 VCC3_SB
VCC3
VCC3_SB VCC3 VCC3 NN-P07D03LV_SO8
VCC_DDR2 CD470U10EL11.5
2
1.2V_REF
S
S
2
4
Q49 Add dual MOSFET for thermal issue. +12V V_1P5_CORE

G RAMDRV G R248
2006.1.18 V_FSB_VTT
1 Q6 Q3 1.5K_1%
8
C36 N-AP40N03H/J_TO252
D
VCC_DDR2 N-APM2054N_SOT89 N-AP40N03H/J_TO252 3 Q23
+
D
X_1000P50V_060 3 N-P50N03LD_TO252
3
1 G
VCC3_SB R259 2
1
U1 EC1 - U15A EC22

+
D
N-AP40N03H/J_TO252
S
W83310DS_SOIC8 10K_1% NS-LM358MX/SOIC8 1+ 2
VTT_DDR N-AP40N03H/J_TO252
R13
4
8 1
VREF2 VIN Q4 1000u_6.3V
2
1000U/6.3V
7 2 1K_1%_0603 RAMDRV2 G RAMDRV2 G VCC_DDR2
ENABLE GND2
6 3 Q50
VCTRL VREF1
S
5 4
BOOT_SEL VOUT
GND9
C20 R15
1
EC4 EC5
+

1
0.1u_0603 1K_1%_0603 EC3

+
1000U/6.3V 1000U/6.3V Title

C46 1000U/6.3V MS7 - ACPI Controller
9
Change R200,201 to 10K ohm 2005.5.9

2
0.1u_0603 Size Document Number Rev

Custom MS-9631 1.0

ATA 33/66/100 IDE Connectors
SATA3
PDD[0..15] 1
BI PDD[0..15] 12 GND
C506 0.01U_0402 SATA_TX2_C 2
12 SATA_TX2 IN HT+
IDE1 C511 0.01U_0402 SATA_TX#2_C 3
12 SATA_TX#2 IN HT-
CONN-IDE(20)V_blue 4
R177 33R_0402HDRST#P C504 0.01U_0402 SATA_RX#2_C GND
28 HD_RST# OUT 1 2 12 SATA_RX#2 OUT 5 HR-
PDD7 3 4 PDD8 C509 0.01U_0402 SATA_RX2_C 6
12 SATA_RX2 OUT HR+
PDD6 5 6 PDD9 7
PDD5 PDD10 GND
7 8
PDD4 9 10 PDD11 CONN-SATA_white
PDD3 11 12 PDD12
PDD2 13 14 PDD13
PDD1 15 16 PDD14
PDD0 17 18 PDD15
19
21 22 SATA4
12 PD_DREQ OUT
12 PD_IOW# IN 23 24 1 GND
25 26 C510 0.01U_0402 SATA_TX3_C 2
12 PD_IOR# IN 12 SATA_TX3 IN HT+
27 28 C505 0.01U_0402 SATA_TX#3_C 3
12 PD_IORDY OUT 12 SATA_TX#3 IN HT-
12 PD_DACK# IN 29 30 4 GND
31 32 C508 0.01U_0402 SATA_RX#3_C 5
12 IDE_IRQ OUT 12 SATA_RX#3 OUT HR-
33 34 OUT C503 0.01U_0402 SATA_RX3_C 6
12 PD_A1 IN ATADET0 15 12 SATA_RX3 OUT HR+
12 PD_A0 IN 35 36 IN PD_A2 12 7 GND
12 PD_CS#1 IN 37 38 IN PD_CS#3 12
39 40 CONN-SATA_white
26 IDEACTP# OUT
R56 R83 R89 C94 R72

10K_0603 4.7K_0603 15K_0603
Change to footprint SATA_ATA13 2005.3.28
8.2KR_0603 X_4700P50V_0603
VCC5 VCC3
FAN CONTROL
CPU FAN SYSTEM FAN
+12V
+12V
1N4148_SOD123
1N4148_SOD123 D16
R125
D7 R373 4.7KR R365 27KR
AUX_FAN 16
4.7KR
R124
CPU_FAN 16
For Push-Pull control signal (ver:C) R366
27KR
Solder R145,Q15,D8,R146 10KR
R123 Remove R126
+12V For Open-Drain control signal (Ver:H) +12V
CPUFAN1 10KR SYSFAN1
Solder R126,D8,R146
4 4
3
Remove R145,Q15 3
VCC5 VCC3
2 2 VCC5
1 1
1
1
EC12 C124 EC46 C428
+
+
0.1u_0603 R146 R145 0.1u_0603
(BH1X4B_white ) D8 CD100U16EL7 (BH1X4B_white ) D17
CD100U16EL7 1K_0603 X_2.2K_0402 R389
2
2
B
VCC3 R143 1N4148_SOD123 Q15 VCC3 R377 1K_0603 1N4148_SOD123
C E CPUFAN_PWM 16 AUXFAN_PWM 16
R174 X_2N3904S R384
200R_0603 200R_0603
R126 0R_0402
D
D
X_1MR0402 X_N_2N7002_SOT23 X_1MR0402 X_N_2N7002_SOT23
R173 X_0R_0402 G Q18 R379 X_0R_0402 G Q34
13 CPUFAN_GPIO IN 13 SYSFAN_GPIO IN
S
S
Default High C172 Q19 R163 Default High C447 Q28 R316
5
6
7
8
5
6
7
8
X_0R0805 X_0R0805
10U10V_0805 +12V 10U10V_0805

+12V
2
2
VCC3_SB R149 R323
N-SI4410DY-T1-E3_SOIC8-RH N-SI4410DY-T1-E3_SOIC8-RH
4
3
2
1
4
3
2
1
10KR0402-1 VCC3_SB 10KR0402-1
1
1
U24D U24F
14
14
For Disable FAN
R407 X_0R_0402 R405 X_0R_0402
9 8 For Disable FAN 13 12
LVC07A_SOIC14 1. Disable FAN power for 0rpm. LVC07A_SOIC14

7
Enable FAN after CPUFAN_PWR 7

VCC3 GPIO setup and delay 2S. VCC3
VCC3 VCC3
2. Set FAN at lowest rpm (0%
VCC3_SB R420 duty) after FAN power enable VCC3_SB R401
R419 and delay about 2S. R402
U24E
14
14
X_1MR0402 U24C 1KR0402 X_1MR0402 1KR0402
D
D
N_2N7002_SOT23 N_2N7002_SOT23
5 6 G Q38 11 10 G Q36
16 CPUFAN_PWR IN 16 SYSFAN_PWR IN
Default High Default High
S
S
C483 LVC07A_SOIC14 C501 C475 LVC07A_SOIC14
C471 Title
7
X_C10U16Y1206 X_C10U16Y1206 X_C10U16Y1206 FAN & IDE Connectors

X_C10U16Y1206
FAN 0rpm delay circuit Size Document Number Rev
Custom MS-9631 1.0
FAN 0rpm delay circuit
1 2 3 4 5 6 7 8
Part Value Selection: P3VA TPBIAS0
FRONT 1394 PORT
Add for EMI C438
E: With IEEE-1394 option VIA_XOUT C399 10P50V_0603 R374 R378
2005.2.14
2
6.34K_1%_0603 54.9_1%_0603 54.9_1%_0603 1U10V_0603
X: No Stuff C317 X_0.1u_0603 R359 Y2
24.576MHZ TPA0+ J1394_1
47P50V_0603 VIA_XIN C400 10P50V_0603 TPA0- TPA0+ TPA0-
C420 R371 R367 TPB0+ 1 2
1
TPB0- TPB0+ 3 4 TPB0-
12,24 PIRQ#F OUT 5 6 1394_VCC0
12,24 PCIRST_ICH7# IN 4.99K_1%_0603 54.9_1%_0603 7 8
15 1394_PCLK IN (T/S/S=5/7.5/20) KEY
9 10 CB3
A IEEE-1394 12 PGNT#3
12,24 PREQ#3
IN
OUT 1394_VCC0
C425 R372 YJ205
N31-2051551-H06
1000P16V
A
TPBIAS1
TPBIAS0
270P50V_0603 54.9_1%_0603
TPA1+
TPB1+
TPA0+
TPB0+
TPA1-
TPB1-
TPA0-
TPB0-
REG_OUT
BJT_CTL
IDSEL = AD25
REG_FB
R357 Place close to pin 81 +12V
AD27
AD28
AD29
AD30
AD31
11K_0603
MASTER = PREQ#3 (Less then 500 mils)
PIRQ#F VCC3 1.5A_miniSMDM150/24 FS4
102
101
100
U21 R358
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
A
1K_1%_0603
D19
XTPA2M
XTPB2M
XTPA1M
XTPB1M
XTPA0M
XTPB0M
XREXT
PCICLK
XTPA2P
XTPB2P
XTPA1P
XTPB1P
XTPA0P
XTPB0P
NC
VDD1
AD27
AD28
AD29
AD30
AD31
REQ#
GNT#
VSS1
PCIRST#
INTA#
VDDATX2
VDDARX2
XTPBIAS2
GNDATX2
GNDARX2
XTPBIAS1
VDDATX1
VDDARX1
XTPBIAS0
GNDATX1
GNDARX1
VDDARX0
TPBIAS1
BRS340-S
VCC3 C463
C
R391 R393 J1394_2
P3VA 54.9_1%_0603 54.9_1%_0603 1U10V_0603 TPA1+ TPA1-
1 2
103 64
AD26 VSS2 GNDARX0 TPB1+ 3 4 TPB1-
104 AD26 XCPS 63 5 6
AD25 105 62 TPA1+ 1394_VCC0
AD24 AD25 VDDATX0 VIA_XOUT TPA1- 7 8
106 61 KEY
C_BE#3 AD24 XO VIA_XIN 9 10 CB4
107 CBE3# XI 60
AD25 R421 100R_0603 108 59 R385 R381 TPB1+ YJ205 1000P16V
AD23 IDSEL GNDATX0 TPB1-
109 58 N31-2051551-H06
AD22 AD23 PHYRESET
110 57
AD22 LINKON/TSIJMP 4.99K_1%_0603 54.9_1%_0603 TPA1-
111
VSS3 LREQ/TSOJMP
56 (T/S/S=5/7.5/20)
AD21 112 55 C414 TPB1-
AD21 CTL1/PC1JMP C448 R387
113 VDD2 CTL0/PC0JMP 54
0.1u_0603 Place close to pin 74
B 1394_VDD 114
115
VDDC1
VSSC1
D7/PC2JMP
D6/CMCJMP
53
52
(Less then 500 mils) B
AD20 116 51 VCC3 270P50V_060354.9_1%_0603
AD19 AD20 D5
117 AD19 50
AD18 PGND2
118 49
AD17 AD18 PVDD2 1394_VDD
119 AD17 D4 48
AD16 120 47 R351 For 24C02
AD16 D3
121 VSS4 D2 46
C_BE#2 122 45
CBE2# D1 2.7K_0603
BI 123 44
12,24 FRAME# FRAME# D0 VCC3
12,24 IRDY# BI 124 IRDY# MODE0 43
125 42 VCC3 VCC3 R392
VDD3 MODE1 R364 BJT_CTL X_4.7K
12,24 TRDY# BI 126 41
TRDY# PGND1 PWRDET X_4.7K
BI 127 40
12,24 DEVSEL# DEVSEL# SCLK
BI 128 39
12,24 STOP# STOP# PVDD1 R369
0R_0603
SCL/EECK
SDA/EEDI
LPS/CMC
RAMVDD
RAMVSS
VDDC2
PERR#
VSSC2
CBE1#
CBE0#
EEDO
EECS
PME#
VDD4
VDD5
VDD6
VSS5
VSS6
VSS7
VSS8
VSS9
AD15
AD14
AD13
AD12
AD11
AD10
PAR
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
C435
0.1u_0603
VIA-VT6307/6308P
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
VCC3
1
2
3
4
5
6
7
8
9
BI AD[31..0]
VIA_EECK
12,24 AD[31..0]
VIA_EEDI
PWRDET
BI C_BE#[3..0]
C_BE#1
C_BE#0
12,24 C_BE#[3..0]
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
Q42
3
REG_OUT 1
C 12,24 PERR#
12,24 PAR
BI
BI 1394_VDD
X_P-BCP69_SOT223 R431 C
0R_0603
2
4
1394_VDD
R380 X_2.7K REG_FB

VCC3
For save
1394_VDD
EEPROM
1394 chip VCC/PWRDET BJT_CTL VDD Power
0.1u_0603 0.1u_0603 Enable(R392)
C401 + VCC3 VT6307 R369 Remove R431
C460 C468 C440 EC52
0.1u_0603 0.1u_0603 10U/16V VCC3 P3VA VT6308P R364 On Q42
FB4
C413 C403
0.1u_0603 0.1u_0603 Power Pin
1394-EEPROM 24C02
P3VA VCC3 Pin VT6307 VT6308P
L-FS_60-25%_0805 U20
3
A2 84 NC BJT_CTL
0.1u_0603 0.1u_0603 2 A1
+ R332 R350 1
A0 GND
4 87 NC REG_FB
C472 C411 C444 C421 EC51 2.7K_0603 2.7K_0603
0.1u_0603 0.1u_0603 10U/16V 88 NC REG_OUT
7
WP
VIA_EEDI 5 8 35 VCC PWRDET
D SDA VCC VCC3
D
VIA_EECK 6
SCL 39 PVD VCC
VCC3
NEAR EACH POWER PIN (8 PCS) 24C01 49 PVD VDD
24 VCC VDD
0.1u_0603 0.1u_0603 0.1u_0603 0.1u_0603
+
114 VCC VDD Title

C443 C467 C470 C473 C492 C493 C484 C402 EC53 X_470U/10V
1394 Controller
0.1u_0603 0.1u_0603 0.1u_0603 0.1u_0603 33 VCC VDD
Custom MS-9631 1.0
1 2 3 4 5 6 7 8
5 4 3 2 1
+VIN +12VIN
L4 CH-2.2U14A_S-LF
VCC3 +12V VCC5 VCC3 VCC5
R103 R101 R91
1
4.7R 4.7R 4.7R C103 C125 C84
EC7 EC11
1U16V_0805 330u/16V 330u/16V C10U16Y1206 1U16V_0805
2
C115
2
D C108 C116 C592 D
R87 0.1u_0402
D
10K_0402 0.1u_0402 0.1u_0402 4.7U10V_0805-BOT Q14 Q17
20
22
48
G G
2
U4 ISL6262CR
R114 IPD09N03 IPD09N03
VIN
VDD
3V3
S
31 10KR0402-1 0.7~1.708V/41A
PVCC C122 L11
13 VRM_GD 1 PGOOD
VID0 R113 2.2R 0.1uF/X7R
1
37 36
C
VID0 BOOT1 VCORE
C330U2.5POS-1
VID1 38 0.22uH
VID1
1
C330U2.5POS-1
VID[0..6] VID2 PD2
+
4 VID[0..6] 39 VID2 UGATE1 35
VID3 40 R159 EC19 EC15 S-RB551V-30
D
VID4 VID3 Q13 Q16 R152 R119
41 34
C
VID5 VID4 PHASE1 PD1 2.2/0805 0R-BOT 0R-BOT
2
42 VID5 LGATE1 32 G G
A
VID6 43 VID6 IPD06N03 PH1
PGND1 33
S
R195 0R_0420 2 1N5817
3 PSI# PSI#
C330U2.5POS-1
IMVP_VREN R80 0R_0402 3 24 R110 X_10K VO1 IPD06N03 VO1
PGD_IN ISEN1
1
C330U2.5POS-1
A
R107 0R_0402 C127 C183
+
13,16,28 SLP_S3# 44 VR_ON
R100 499R1%0402 45 PH1 R111 1000P50V_0805 EC20 EC16
7,13 DPRSLPVR DPRSLPVR
46 10KR1% C121 0.22U 0.1u_0402
3,12 H_DPRSTP# DPRSTP#
R95 0R_0402
2
15 CLK_EN# 47 CLK_EN#
26 R112 2.2R C129 0.22uF/X7R +VIN
R84 X_1K_0402 R102 X_0.01U_0402 BOOT2
VCC3
C97 R82 2.7KR1% 9 27
VW UGATE2
1
R98 1K_0402 C93
V_FSB_VTT
C330U2.5POS-1
X_1K_0402 C5600P50X 28 C107 EC18
PHASE2
1
C330U2.5POS-1
C88 X_1500u/16V
+
C 30 C
D
C47P50N C89 LGATE2 Q26 Q21 1U16V_0805 EC21 EC17
2
R67
2
10 COMP PGND2 29 G G
2
20K_1% C3300P50X
2
23 R108 X_10K VO2 R120 IPD09N03 IPD09N03
ISEN2
S
C126 10KR0402-1
R78 11 PH2 R109 L16
1.8KR1% FB 10KR1% 0.22U X_0.1u_0402
1
X_1.8KR1% R66 C120 0.22uH
C87 C47P50N
R77 X_2K_1% 12 19 R182
C
FB2 VSUM Q22 Q25 PD3 R118 R117
13 2.61K1% RT3 3.65K1% G G 2.2/0805 0-BOT 0-BOT
VDIFF R88 R97 PH1
1 2
14 10KRT-LF-2 IPD06N03 1N5817 PH2
4 VCCSENSE_2 VSEN
S
X_0.01U_0402 3.65K1%
A
C100 R92 R99 PH2 IPD06N03 C205
15 11KR1% 1000P50V_0805
4 VSSSENSE_2 RTN
VCC3
X_0.01U_0402 0.01U25V_0402 C110 C0.047U16X
C102 C98 25 NC C109 0.33uF RT2 :
R81
R76 8 VO1 Panasonic
10K_0402 OCSET R68 15KR0402 ERT-J1VR103J
5 1R1% Close to Phase
13,15 THERM# VR_TT# C90
6 NTC 1 Inductor
B 7 1000P_0402 R85 B
SOFT
GND_PAD
RT2 4 18 VO2 VO2

RBIAS VO
2
DROOP
470KRT0402-LF-1 C91 1R1%

GND
DFB
+12VIN
0.01U25V_0402 R71 0.22UF/10V
C96 C95
1
49
21
16
17
147KR1%
R70 0.015U_0402 R94 R93 R79
5.6K_0603
3.9K1%_0402 1.58KR1% VCC5_SB
2KR1% IMVP_VREN R75 1K_0603
C105
180P R69
Q10
R73 1K_0603 1K_0603
BOTTOM PAD IN VID_GD# 28
Panasonic CONNECT TO N-MMBT3904_SOT23
ERT-J0EV474J GND THROUGH 6
Throttling temp. VIAS J2 X_COPPER
105 degree C
Close to Phase 1 JPW1
Inductor +12VIN 3 12V GND 1
A A
C81 4 2
X_10000P50V_0603 12V GND
PWR-2X2M

Title
CPU Power

Custom MS-9631 1.0

5 4 3 2 1
1
ICH6
GPIO Alt Func Pin I/O/NC Power PU SMI Tol Default Rickles Signal Name FWH Note: FWH GPs should only be used for static options,
GPIO[0] BM_BUSY# AB18 I VCC3p3 N Y 3.3 N/A BM_BUSY# do not put dynamic nets on these
GPIO[1] PCIREQ[5]# C8 I V5REF Y N 5 N/A PREQ#5 GPIO Pin# Power Tol Signal Name
GPIO[2] PIRQE# G8 I V5REF Y N 5 N/A PIRQ#E FPGI[0] 6 Main 3.3 ATADET0
GPIO[3] PIRQF# F7 I V5REF Y N 5 N/A PIRQ#F FPGI[1] 5 Main 3.3 pull-down
GPIO[4] PIRQG# F8 I V5REF Y N 5 N/A PIRQ#G FPGI[2] 4 Main 3.3 pull-down
GPIO[5] PIRQH# G7 I V5REF Y N 5 N/A PIRQ#H FPGI[3] 3 Main 3.3 pull-down
GPIO[6] unmuxed AC21 I Vcc3p3 Y Y 3.3 N/A SIO_OVT# FPGI[4] 30 Main 3.3 pull-down
GPIO[7] unmuxed AC18 I Vcc3p3 Y N 3.3 N/A NC
GPIO[8] unmuxed E21 I VccSus3p3 Y Y 3.3 N/A SLPBTIN#
GPIO[9]
GPIO[10]
unmuxed
unmuxed
E20
A20
I
I
VccSus3p3
VccSus3p3
Y
Y
N 3.3
N 3.3
N/A
N/A
NC
NC
PCI Config.
DEVICE MCP1 INT Pin REQ#/GNT# IDSEL CLOCK
GPIO[11] SMBALERT# B23 I VccSus3p3 Y Y 3.3 N/A SMB_ALERT#
Mini - PCI PIRQH PCI_REQ#0 AD18 PCICLK0
GPIO[12] unmuxed F19 I VccSus3p3 Y N 3.3 N/A NC
PCI_GNT#0
GPIO[13] unmuxed E19 I VccSus3p3 Y Y 3.3 N/A SIO_PME#
GPIO[14] NC R4 I VccSus3p3 Y Y 3.3 NC
GPIO[15] NC E22 O VccSus3p3 N N 3.3 1 BIOS_WP#
PCI Slot 1 PIRQB PCI_REQ#1 AD17 PCICLK1
GPIO[16] DPRSLPVR AC22 O Vcc3p3 N N 3.3 1 DPRSLPVR
PIRQC PCI_GNT#1
GPIO[17] PCIGNT[5]# D8 O Vcc3p3 N N 3.3 1 NC
PIRQD
GPIO[18] STPPCI# AC20 O Vcc3p3 N N 3.3 1 NC
PIRQA
GPIO[19] SATA1GP AH18 I Vcc3p3 D N 3.3 1 NC
Riser Card PCI_REQ#2 PCICLK2
GPIO[20] STPCPU# AF21 O Vcc3p3 N N 3.3 O NC
(PCI Slot 1) PCI_GNT#2
GPIO[21] SATA0GP AF19 I Vcc3p3 N N 3.3 0 NC
GPIO[22] REQ4# A13 I Vcc3p3 N N 3.3 0 REQ4#
GPIO[23] LDRQ1# AA5 O Vcc3p3 N N 3.3 NC
1394 PIRQF PCI_REQ#3 AD25 1394_PCLK
GPIO[24] NC B3 O VccSus3p3 Y N 3.3 1 LAN_EN#
PCI_GNT#3
GPIO[25] NC D20 O VccSus3p3 N N 3.3 N/A NC
GPIO[26] EL_RSVD A21 O VccSus3p3 N N 3.3 0 NC
GPIO[27] EL_STAT0 B21 O VccSus3p3 N N 3.3 0 EL_STAT0
GPIO[28] EL_STAT1 E23 O VccSus3p3 N N 3.3 0 EL_STAT1
GPIO[29] OC#5 C3 I VccsUS3p3 Y N 3.3 OC#5 DDRII DIMM Config.
GPIO[30] OC#6 A2 I VccsUS3p3 Y N 3.3 OC#6
DEVICE ADDRESS CLOCK
GPIO[31] OC#7 B3 I VccsUS3p3 Y N 3.3 OC#7
DIMM 2 (000) P_DDR0_A/N_DDR0_A
GPIO[32] CLKRUN# AG18 O Vcc3p3 N N 3.3 1 CPUFAN_GPIO
P_DDR1_A/N_DDR1_A
GPIO[33] AZ_DOCK_EN# AC19 O Vcc3p3 N N 3.3 1 SYSFAN_GPIO
P_DDR2_A/N_DDR2_A
GPIO[34] AZ_DOCK_RST# U2 O Vcc3p3 N N 3.3 0 NC
DIMM 1 (001) P_DDR0_B/N_DDR0_B
GPIO[35] SATACLKREQ# AD21 O Vcc3p3 N N 3.3 0 NC
P_DDR1_B/N_DDR1_B
GPIO[36] SATA2GP AH19 I Vcc3p3 N N 3.3 0 NC
P_DDR2_B/N_DDR2_B
A
GPIO[37] SATA3GP AE19 I Vcc3p3 N N 3.3 0 NC A
GPIO[38] unmuxed AD20 I Vcc3p3 Y N 3.3 1 NC

GPIO[39] unmuxed AE20 I Vcc3p3 Y N 3.3 1 NC
GPIO[48] GNT4# A14 O Vcc3p3 N N 3.3 1 NC
GPIO[49] H_PWRGD AG24 OD V_FSB_VTT Y N 3.3 1 H_PWRGD
Note: All inputs are sticky. The status bit remains set as long as the input was asserted for two clocks.
GPI's are sampled on PCI clocks in S0/S1. GPIs are sampled on RTC clocks in S3/S4/S5.
JUMPER SETTING
RTCRST (1-2)CLEAR (2-3)NORMAL
PCI Reset
DEVICE Device
PLTRST# MS-7
(ICH6)
PCIRST_ICH6# PCI Slot1
(ICH6) Mini- PCI
1394 Controller
PCI_E_RST# LAN Controller
(MS-7)
SATAII Controller
PCI-E X16 Slot
HD_RST#
IDE1
(MS-7)
DEV_RST# 915GM(GMCH)
(MS-7) Clock Gen
Firmware Hub
Super IO
Title
General Purpose Spec & JUMPER SETTING

Custom MS-9631 1.0

1
MANUAL PART VCC5
14
U3B
Add CPU RM 2005.5.9 4
VCC3 6
U22_1 VCC_DDR2 VCC_DDR2 X_0.1u_0603 5
PCB1 CPU_RM X_0.1u_0603 X_0.1u_0603 C18
XX1
XX2
XX3
XX4
C82 C40 ACT08DR_SOIC14
+12V
CPU BIOS1_1
7
BAT1_1
VCC_DDR2
VCC_DDR2
RM X_0.1u_0603
8
+ C73 X_0.1u_0603 VCC5
PLCC32-SMT C72 5
X_CPU_RM +
14
7
ICH7_Heatsink MS-9631-0A,Green VCC_DDR2 6 U3C
CP4 X_0.1u_0603 - U15B 10
C59 VCC3 NS-LM358MX/SOIC8
Change to from U19_X to U22_X 2005.3.16 X_0.1u_0603
8
4
9
U10_X1 X_COPPER C58
KBGND VCC_DDR2 ACT08DR_SOIC14
MCH X_0.1u_0603
7
X5 X1 C76
X6 X2 VCC5
X7 X3
U10_2
D1x3-BK
U10_3
D1x3-BK
U22_3
D1x3-BK
X8 Heatsink X4 VCC_DDR2 C379
0.1u_0603
VCC5 VCC3 X_0.1u_0603

945GT_heatsink X_0.1u_0603 C78 VCC5
C476 0.1u_0603
C117
VCC_DDR2
X_0.1u_0603 VCC5
U22_2
C128 0.1u_0603
D1x3-BK
FOR EMI C101
Change to from U11_X to U10_X 2005.3.16 Add Caps for EMI 2005.5.16
VCC3_SB
VCC3 VCC3 X_0.1u_0603
C2 Optical Fiducial Marks
C154 X_0.1u_0603 C157 X_0.1u_0603 VCC3_SB
VCC3_SB
VCC3 VCC3 C249 X_0.1u_0603
C571 X_0.1u_0603 FM12 FM1 FM16 FM3 FM8 FM15 FM14 FM17 FM6
C85 X_0.1u_0603 C256 X_0.1u_0603
VCC3_SB
VCC3 VCC3 VCC3
C452 X_0.1u_0603
C398 X_0.1u_0603 C394 X_0.1u_0603 C494 X_0.1u_0603 FM11 FM7 FM5 FM4 FM9 FM10 FM13 FM2
VCC3_SB
VCC3 C590 X_0.1u_0603
C480 X_0.1u_0603 VCC3_SB

+12V MH9
C416 X_0.1u_0603 Mounting Holes 1 5
VCC5_SB C391 X_0.1u_0603 2 6
(NPTH)
MH7 MH6 3 7 MH1
C481 X_0.1u_0603 +12V 1 5 1 5 1 5
2 (NPTH) 6 2 (NPTH) 6 2 (NPTH) 6
VCC5_SB C16 0.1u_0603
4
9
8
Add C42 for EMC 2005.5.9 3 7 3 7 3 7
C5 X_0.1u_0603 VCC5_SB +12V
4
9
8
4
9
8
4
9
8
VCC5_SB C104 X_0.1u_0603 C123 X_0.1u_0603
C521 X_0.1u_0603 VCC5_SB +12V KBGND

MH8 MH3 MH2 MH10
VCC5_SB C586 X_0.1u_0603 C51 X_0.1u_0603 1 5 1 5 1 5 1 5
2 (NPTH)
6 2 (NPTH)
6 2 (NPTH)
6 2 (NPTH)
6
C507 X_0.1u_0603 VCC5_SB +12V 3 7 3 7 3 7 3 7
VCC5_SB C587 X_0.1u_0603 C265 X_0.1u_0603
4
9
8
4
9
8
4
9
8
4
9
8
C306 X_0.1u_0603 +12V
C385 X_0.1u_0603
MH5
Layer1 / 5mil / 55ohm Layer4 / 4mil / 55ohm Layer6 / 5mil / 55ohm 1 5
X_J2
2 6
X_J1 X_J3 (NPTH)
3 7
SIM2
SIM1 SIM3
4
9
8
X_PIN1*2
X_PIN1*2 X_PIN1*2
MH4
1 5
2 (NPTH) 6
VCC3_SB 3 7
C615
4
9
8
X_ 0.1uF
Fix EMI issue to near by C306

11-17-2005

Title
Manual Part

Custom MS-9631 1.0

1 2 3 4 5 6 7 8 9 10
DDR DIMM & TERMINATOR
A Yonah/Merom ISL6262 A
Yonah-2M : 36A 0.9V VTT_DDR - 1.2A
0.7625V - 1.325V Core - 44A
Merom : 44A VCORE IMVP-6
0.7625-1.325V 44A
1.8V VCC_DDR (S0,S1) - 9.4A
1.05V FSB Vtt - 2 A 2-Phase Switch
1.8V VCC_DDR (S3) - 400mA
W83310DS
945GT GMCH TDP: 14 - 16W VTT_DDR
B 0.9V Linear 1.5A PCI Express x16 slot B
1.05V FSB Vtt - 800mA
+12V - 5.5 A
MS7 Regulator
1.8V DDR2 I/O - 3.2A +3.3Vaux (wake) - 375mA
V_FSB_VTT +3.3Vaux (no wake) - 20mA
*2.5V DAC - 70mA 1.05V Linear 5.0A
2.5V HV - 2mA VCC_DDR2 +3.3V - 3.0A
C 1.8V 20A C
1.5V Core (Integrated) - 5.5A
1.8V Linear
1.5V Core (Discrete) - 1.5A PCI slot x2
*1.5V PCI Express - 1.5A V_2P5_MCH
2.5V Linear 100mA +3.3Vaux (wake) - 375mA
+3.3Vaux (no wake) - 20mA
ICH7M-DH VCC3_SB
3.3V Linear 1.5A +3.3V - 7.6A
1.05V VTT - 0.86A
D D
5VDUAL1,2 +5V - 5.0A
1.5V Core - 1.78A
5V Linear 4A
*1.5V PCI Express - 560mA
+12V - 0.5A
1.5V SATA - 50mA
1.5V DMI - 50mA MS6+ Regulator
+3.3V VccSus - 52mA
V_1P5_CORE USB
RTC (G3) - 5uA 1.5V Switch 20A
E Linear (S3) 425mA +5V (S0,S1) - 4.0A E
5VRef - 6mA +5V (S3) - 20mA
5VrefSus - 10mA
+3.3V - 330mA SATA II

+1.8V
F FWH F
+3.3V (S0,S1) - 107mA TPM

+3.3V - 12mA
+12V +5V +3.3V +5VSB

G 3V G
Battery
ATX POWER

H Title
Power Map
H
Custom MS-9631 1.0
1 2 3 4 5 6 7 8 9 10
8 7 6 5 4 3 2 1
MS-9631 CLOCK BLOCK DIAGRAM
CPU
DDRA_CLK_P/N pair
D 3
D
DDR II DIMM # A1
DDR II DIMM # A2
CK_H_CPU_P/N (533/667MHz)
HOST PAIR
MCH
CK_H_MCH_P/N (533/667MHz)
HOST PAIR
DDRB_CLK_P/N pair
3
CK_96M_DREF
DOT_96
(96MHz)
32.768KHZ
Crystal
C USB (48MHz)
USB_48
C
ICH_PCLK ICH7M-DH
PCI 33MHz
ICH_14M
REF0 14MHz
SIO_48
DOT_48
14.318MHZ
SIO_PCLK SIO
Crystal
PCI 33MHz
PCI_CLK1/PCI_CLK2
PCI 33MHz PCI 32/33 ( SLOT 1/Riser )
PCI_CLK0
PCI 33MHz Mini-PCI
FWH_PCLK
PCI 33MHz FWH
B B
1394_PCLK
PCI 33MHz 1394 VT6307
CK_PE_100M_16PORT
SRC 100MHz PAIR PCI EXPRESS X16 SLOT # 1
CK_SATA2
SRC 100MHz PAIR
SATA II
CK_PE_100M_LAN
SRC 100MHz PAIR GIGA LAN
CK_ICHSATA
SRC 100MHz PAIR
CH_PE_100M_ICH
SRC 100MHz PAIR
CK_PE_100M_MCH
SRC 100MHz PAIR
TPM_PCLK
PCI 33MHz TPM
A A

Title
<Title>

Custom MS-9631 1.0
8 7 6 5 4 3 2 1
1 2
VCC3(8)
3
V_2P5_MCH(9)
4 5 6 7 8 9 10
H_ADS#(17)
A +12V +5V +3.3V +5VSB A
PWR_OK(9)
H_CPURST#(16)
V_GMCH_CORE(12) Yonah
ATX POWER
945GT V_FSB_VTT(12) Merom
PS_ON#(6)
V_1P5_CORE(11)
PWRGD(13)
DEV_RST#(15)
VCC3(8)
B P3VA 1394 B
VCC5(8) Controller
VCC5(8) V_CORE(9)
ISL6262 PCIRST_ICH6#(14)
VCC12(8)
VCC_5SB(2)
PCIRST_ICH6#(14)
DMI(18)
VCC3(8)
C
V_1P5_CORE(11) VCC3_SB(3) PCI/Mini-PCI C
Slot
VRM_GD(13)
1.2V_REF(10)
After VCC_SB 5ms
RSMRST#(4) VCC5(8)
VCC_5SB(2) VCC3_SB(3)
D ICH7M-DH VCC_3SB(3)
MS-7 PCI_E_RST#(15) LAN1 MS-6+ D
VCC_DDR2(10)
PWRGD(13)
PLTRST#(14) 5VDUAL2(10) 5VDUAL1(10)

PWRBTNIN(6)
E USB E
VBAT(1)
VCC5(8)
PS_ON#(7)
VCC3_SB(3)
PCI-E X16
VCC_5SB(2)
Super IO DEV_RST#(15)
PCI_E_RST#(15) Slot
F 3V
VBAT(1) F
Battery For CASEOPEN# function DEV_RST#(15)
VCC3(8) VCC3(8) FWH
PWRBTNIN(5)
VCC3(8) DEV_RST#(15)
G Clock Gen G
VCC12(8)
FP
VCC_DDR2(10)
VTT_DDR(11)
DDR2
H
CPU/SYSTEM FAN H
Title
Power Sequen ce
LPC_BUS(19) Size Document Number Rev

A2 MS-9631 1.0
1 2 3 4 5 6 7 8 9 10
5 4 3 2 1
D D
VCC3
Clock - Gen SATA II DDR2 HW Monitor
ICS954129 SIL 3132 DIMM1&2 MS7 Winbond
W83627EHF
SMB_Main
C C
SMB_PWROK (MS7)
VCC3_SB
ICH7M-DH PCI-E X16 PCI Slot1
SMB_Resume
B B
A A

Title
<Title>

CustomMS-9631 1.0

5 4 3 2 1

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1

POWER SEQUENCE/SMBUS MAP 36 MS-7 & MS-6 + Size

Document Number Rev

Date: Monday, February 13, 2006 Sheet 1 of 37

IDE Primary IEEE-1394

AC97 SATA 2 SATA II 1~2

MICRO-STAR INt'L CO. , LTD.

Size Document Number Rev

Date: Monday, February 13, 2006 Sheet 2 of 37

HA#18 U5 HD#20 L25 AB21 HD#52

C HA#22 Y5 AC4 H_BPM#3 HD#24 P25 AF23 HD#56 C

THERMDA Don't need CAP. (Design Guide P.90)

RSVD[01] BSEL[0] PWRGOOD H_SLP#

BSEL[2] BSEL[1] BSEL[0] BCLK

MICRO-STAR INt'L CO. , LTD.

Size Document Number Rev

Date: Monday, February 13, 2006 Sheet 3 of 37

VSS32 VSS113 VCC[24] VCC[91]

MICRO-STAR INt'L CO. , LTD.

Size Document Number Rev

Date: Monday, February 13, 2006 Sheet 4 of 37

C233 C178 C177

MICRO-STAR INt'L CO. , LTD.

Size Document Number Rev

Date: Monday, February 13, 2006 Sheet 5 of 37

3 HD#[0..63] BI U11A BI HA#[3..31] 3

MICRO-STAR INt'L CO. , LTD.

Size Document Number Rev

Date: Monday, February 13, 2006 Sheet 6 of 37

PM_EXTTS#0 F25 A26 IN J20 L36 EXP_A_TXN_4

23,27 SDVO_CTRL_CLK BI H28 SDVO_CTRLCLK AF39 IN DMIRXN1 13 J29 W40 EXP_A_TXN_11

BA1 AG37 OUT BI MCH_DDC_DATA C25 N40 EXP_A_TXP_7

PM_EXTTS#1 R228 10K_0402

X_2.2K_0402 CFG7 TP1

HIGH HIGH LOW LOW HIGH HIGH HIGH LOW LOW

MICRO-STAR INt'L CO. , LTD.

Size Document Number Rev

Date: Monday, February 13, 2006 Sheet 7 of 37

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY B

MICRO-STAR INt'L CO. , LTD.

Size Document Number Rev

Date: Monday, February 13, 2006 Sheet 8 of 37

Size Document Number Rev

Date: Monday, February 13, 2006 Sheet 9 of 37

MICRO-STAR INt'L CO. , LTD.

Size Document Number Rev

Date: Monday, February 13, 2006 Sheet 10 of 37

MICRO-STAR INt'L CO. , LTD.

Size Document Number Rev

Date: Monday, February 13, 2006 Sheet 11 of 37

SATALED# R403 10KR0402

MICRO-STAR INt'L CO. , LTD.

Size Document Number Rev

Date: Monday, February 13, 2006 Sheet 12 of 37

18 PCIE_RN1 IN F26 V26 IN DMITXN0 7

OUT SMBDATA_RESUME 18,23,24

Strapping & Pull-up Resistor (To: PCI,PCI-Express,ICH6)

WAKE# R395 1KR0402 Reserved for No Reboot