Op-Amp Practical Applications: Design, Simulation and Implementation - 2019 Week 0 Assignment Solution
Op-Amp Practical Applications: Design, Simulation and Implementation - 2019 Week 0 Assignment Solution
Op-Amp Practical Applications: Design, Simulation and Implementation - 2019 Week 0 Assignment Solution
a. 3 mA
b. 8 mA
c. 10 mA
d. 2 mA
Solution I1 I3
2. Find the equivalent resistance Req in ohms for the circuit given
a. 250
b. 50
c. 100
d. 150
Solution
To find out Req follow the sequence
Since the three resistances are in series, the Req = 50+100+100 = 250
3. Consider the circuit shown in figure below. Assume the diode is Ideal, calculate the
voltage across the R1 resistor
a. 0V
b. 3V
c. 3.33 V
d. 1V
Solution
Let the diode D1 ON, Thus the diode is in short circuit as shown below
VR2 = 3.33 V
a. – 6.08 V
b. 0.2 V
c. 1.2 V
d. 6.08 V
Solution
Given VBE = 12 V
Since, VBE > VBEactive, the transistor will be ON
Apply KVL in base emitter loop
12 – 100 k * IB – 0.7 = 0
IB = 0.113 mA
Ic = β*IB = 80 * 0.113 m = 9.04 mA
And
VCE = 12 – 9.04*2 = - 6.08 V
Hence, the transistor is in saturation region and VCE = 0.2 V
5. An ideal op-amp has ________
a. Infinite input resistance
b. Infinite differential voltage gain
c. Zero output resistance
d. All the above
6. An inverting op-amp has an open-loop voltage gain and closed-loop voltage gain of
100,000 and 30 respectively. If an op-amp with an open-loop voltage gain of 300,000
is substituted in the arrangement, the closed-loop gain …….
a. Drops to 15
b. Doubles
c. Increases by 15 %
d. Remains at 30
Solution
Let OLVG = Open loop voltage gain = 1 *105 (Given)
CLVG = Closed loop voltage gain = 30
WKT,
𝐴𝑜𝑝𝑒𝑛
𝐴𝐶𝑙𝑜𝑠𝑒𝑑 =
1 + 𝐴𝑜𝑝𝑒𝑛 ∗ 𝑓𝑒𝑒𝑑𝑏𝑎𝑐𝑘 𝑓𝑎𝑐𝑡𝑜𝑟
Since, Aopen* feedback factor >> 1, then
𝐴𝑜𝑝𝑒𝑛 1
𝐴𝐶𝑙𝑜𝑠𝑒𝑑 = =
𝐴𝑜𝑝𝑒𝑛 ∗ 𝑓𝑒𝑒𝑑𝑏𝑎𝑐𝑘 𝑓𝑎𝑐𝑡𝑜𝑟 𝑓𝑒𝑒𝑑𝑏𝑎𝑐𝑘 𝑓𝑎𝑐𝑡𝑜𝑟
Hence, closed loop gain does not depend on the change in the open loop gain. Thus,
the closed loop gain Remains at 30
b.
c.
d.
Solution:
Since, gain is 25 and among all the options, option B is having a negative
feedback. Hence, op-amp can operate in linear region.
For an inverting amplifier,
Vo/Vs = -R2/R1 = - 50 k/2k = - 25
Therefore, the gain is 25
8. In continuation to the above question, what is the phase of the output
a. Will have same phase
b. A Phase shift of 90o
c. A phase shift of 180o
d. None of the above
Solution:
Vo = - 25 Vs
The input and output have a relation of 180o
9. A differential amplifier shown below has a differential gain of 100 and a CMRR of 40
dB. If V1 = 0.6 V and V2 = 0.4 V calculate the output voltage
a. 20.5 V
b. 20 V
c. 10.25 V
d. 15 V
Solution:
WKT, the output voltage of an op-amp is Vo = Ad Vd + Ac Vc
Given Ad = 100; CMRR = 40 dB
And CMRR = Ad/Ac => 20 log (Ad/Ac) = 40
After solving,
Ac = 1
Vd = V1 – V2 = 0.6 -0.4 = 0.2 V
Vc = (V1 + V2)/2 = 0.5 V
Therefore, Vo = 100 * 0.2 + 1 * 0.5 = 20.5 V
11. What is the max output voltage that can be observed on the practical op-amp, if an op-
amp is supplied with a voltage of ± 15 V?
a. < 15 V
b. > 15 V
c. Does not depend on the supply voltage
d. None of the above
Solution:
Given that, the op-amp is powered with a voltage of ± 15 V. The maximum output
voltage that can be observed is < 15 V
12. Consider a differential amplifier circuit as shown in the figure, where the input voltage
is given to the V1 terminal and V2 terminal is open circuit. Then the gain of this circuit
will be similar to which of the following
Solution:
When V2 terminal is open circuited, i.e., V2 = 0
Therefore, the circuit represents as an Inverting amplifier
13. When will the potential difference between the input terminals of an op-amp is treated
nearly to zero?
a. If the two supply voltages are balanced
b. If the output voltage is not saturated
c. If the op-amp is used in a circuit having negative feedback
d. If there is a DC bias path between each of the terminals and the circuit ground
Solution:
Let OLG = open loop gain
CLG = closed loop Gain
BW = Bandwidth
Gain bandwidth product = CLG * BW
500 * 100 k = (OLG/ (1+OLG* β)) * BW = (500/ (1+5)) * BW
Therefore, BW = 100 k*6 = 600 kHz
15. 0.01 V and 0.011 V are given as common mode input to an op-amp. What optimum
CMRR would you prefer
a. 100 dB
b. 10 dB
c. 2 dB
d. 0 dB
Solution
0.01 V and 0.011 V are inputs to the op-amp
Since the input signals are very small and the difference is 1 mV, we require a
large CMRR value to detect this change in input signals
From the options, 100 dB is the large CMRR value
16. Find an appropriate circuit for the given characteristic curve shown below.
Note: All diodes are ideal
a)
b)
c)
d)
Solution:
From the given Figure,
If the input voltage Vin < 1 V, the circuit should consume current linearly by a factor of ‘1
k’, Hence for 1 V, the required current to flow in the system is 1 mA.
By calculating, we can get the required resistance R1 as
R1 = V/I = 1/1 mA = 1 kΩ.
For input voltage > 1 V and < 3 V (i.e. 1 V > Vin > 3 V), the circuit should draw the current
linearly by a factor of:
3−1 2
= 𝑘
(4 − 1) 𝑚𝐴 3
For Vin > 1V Diode D1 will be Forward Biased (FB) and D2 will be Reverse Biased (RB),
Hence D1 act as short-circuit (SC) and D2 as open circuit (OC).
Therefore, R1 and R2 resistors are in parallel. The equivalent resistance should be ‘2/3 k’
𝑅1 ∗ 𝑅2
𝑅𝑒𝑞1 =
𝑅1 + 𝑅2
2 1𝑘 ∗ 𝑅2
𝑘=
3 1𝑘 + 𝑅2
After solving, R2 = 2 k
For 3 V > Vin > 4 V, the circuit should draw the current linearly by a factor of:
4−3 1
= 𝑘
(7 − 4) 𝑚𝐴 3
For Vin > 3V Diode D1 will be Forward Biased (FB) and D2 is also Forward Biased (FB),
Hence D1 and D2 act as short-circuit (SC).
Therefore, R1, R2 and R3 resistors are in parallel. The equivalent resistance should be ‘1/3
k’
𝑅𝑒𝑞 ∗ 𝑅3
𝑅𝑒𝑞2 =
𝑅𝑒𝑞 + 𝑅3
2
1 𝑘 ∗ 𝑅3
𝑘= 3
3 2
3 𝑘 + 𝑅3
After solving, R3 = (2/3) k
17. Design the circuit shown below with a suitable resistance values to obtain the
characteristics curve as shown.
Note: Consider all the diodes are ideal.
a) R0 = R1 = R2 = 1 kΩ; V1 = 1 V; V2 = 1.5 V
b) R0 = R1 = R2 = 1 kΩ; V1 = 2 V; V2 = 4.5 V
c) R0 = 1 kΩ; R1 = 2 kΩ; R2 = 1/3 kΩ; V1 = 2 V; V2 = 4.5 V
d) R0 = 1 kΩ; R1 = 1 kΩ; R2 = 1/3 kΩ; V1 = 1 V; V2 = 1.5 V
Ans: d) R0 = 1 kΩ; R1 = 1 kΩ; R2 = 1/3 kΩ; V1 = 1 V; V2 = 1.5 V
Solution:
From the characteristics curve shown it is clear that,
For input voltage Vin < 2 V, the circuit should provide a linearly output. The slope of the
curve till Vin = 2 V can be calculated as
1−0
= 0.5
2−0
This can be achieved with Ro = R1 (let say 1 kΩ)
For input voltage 2 V < Vin < 4.5 V, the circuit should have a different slope. The slope of
the circuit is
𝑉𝑜 1.5−1 0.5
𝑉𝑖𝑛
= (4.5−2) = 2.5 = 0.2
For V0 > 1V, the diode D1 should be in Forward Biased (FB) (since slope of the
characteristic curve is different) and D2 should be in Reverse Biased (RB), Hence V1 = 1 V.
Therefore, R1 || R2 and series with R0. The equivalent resistance should be ‘0.2’
1𝑘 ∗ 𝑅2 1𝑘 ∗ 𝑅2
0.2 = 1𝑘 + 𝑅2 = 1𝑘 + 𝑅2
1𝑘 ∗ 𝑅2 1𝑘 ∗ 𝑅2
𝑅𝑜 + 1𝑘 + 𝑅2 1𝑘 + 1𝑘 + 𝑅2
After solving, R2 = 1/3 k
18. For the circuit shown in figure 17, if input Vin < -3 V then the output voltage is ___________?
a. 0V
b. – 1.5 V
c. –1V
d. –3V
Ans: b) – 1.5 V
19. What are conditions of D1 and D2 when the input Vin < -3 V for the circuit shown in Figure 17?
e. D1 = Open-Circuited and D2 = Open-circuited
f. D1 = Short-Circuited and D2 = Short-circuited
g. D1 = Open-Circuited and D2 = Short-circuited
h. D1 = Short-Circuited and D2 = Open-circuited
20. What are conditions of D1 and D2 when the input Vin > 4.5 V for the circuit shown in Figure 20?
a. D1 = Open-Circuited and D2 = Open-circuited
b. D1 = Short-Circuited and D2 = Short-circuited
c. D1 = Open-Circuited and D2 = Short-circuited
d. D1 = Short-Circuited and D2 = Open-circuited
a) Peak detector
b) Clamper
c) Clipper
d) Rectifier
22. Consider the circuit shown in figure below, if the input Vin is a sinusoidal signal then the output
voltage measured across the diode D5 acts as a _____________?
Note: All diodes are ideal
a) Peak detector
b) Clamper
c) Clipper
d) Rectifier
Ans: b) Clamper
23. Consider the circuit shown below, if the input Vin is a sinusoidal signal then the output voltage
across C2 is ______________?
Note: All diodes are ideal.
a) – 2 Vp
b) 2 Vp
c) Vp
d) - Vp
Ans: a) – 2 Vp