International Conference on Communication and Signal Processing, April 6-8, 2016, India

Boost Converter based MLI Topology using H-

Bridge for device control application with
reduced device count
T.Suresh Kumar, S.Kalaivani , Priyadharsini

Abstract—multilevel inverters are used in several The multilevel inverter MLI structure is introduced
applications such as renewable sources, industrial drives, as an alternative for high power and medium voltage
laminators, blowers, fans, and conveyors based power situations using power semiconductor switches along
generation. The proposed multilevel inverter with boost with several lower voltage DC levels. The power
converter plays a major role to minimize power demand
conversion is performed by generating a staircase
and scarcity also provides desired Peak voltage. It
synthesizes the desired ac output waveform from dc voltage waveform. The multiple input DC levels can
sources. This project focuses on reducing the device count use capacitors, batteries and renewable energy voltage
of the multilevel inverter and improves the quality of sources to achieve high power conversion [8].High
output voltage waveform. Two level reduced switching voltage at the output is achieved by controlling power
topology has been implemented with only four switches. switches so that the multiple input DC levels are
The proposed topologies also reduce initial cost, aggregated.
complexity and provide even power distribution in The multilevel Inverter approach for DC to
comparison with existing topologies. Simulation work is AC conversion offers many advantages such as
done using the PSPICE software and experimental result
has been evaluated.
i. The output staircase waveform not shows harmonic
Index Terms—Multilevel inverter topology (MLI), Boost profile problem and reduces the dv/dt stresses. Thus,
Converter (BC), Carrier redistribution (CR) fundamental the filter requirements can be greatly brought down (or
switching frequency operation, source configuration. even eliminated).It reduces electromagnetic
compatibility problems.
I. INTRODUCTION ii. The semiconductor devices are having less voltage
stress as compared to the overall operating voltage.
In the modern set-up of electric power generation, Thus, it helps to obtain a high voltage waveform with
transmission, distribution and utilization use a key comparatively low voltage rated switches.
technology called DC to AC power conversion and iii. Many multilevel topologies offer the possibility to
device named as inverter.Power electronic inverters are obtain a given voltage level with multiple switching
used for various industrial drives applications and also combinations. These redundant states can be utilized to
used in flexible AC transmission systems and DC program a fault tolerant operation.
power source utilization (such as electricity obtained iv. MLIs can consume input current with low
from batteries, solar panels or fuel cells), variable distortion.
compensators, air conditioning. At present, inverters v. Renewable energy sources such as photovoltaic,
are implemented necessarily for many implementations wind, and fuel cells can be easily interfaced to a
such as motor controlling and power systems [1], [2]. multilevel converter system and can be controlled for
The role of power inverters is also envisioned and equal load sharing amongst the input sources.
recognized in the important area such as smart grids The most commonly used topologies to generate a
and renewable energy sources based power generation high voltage waveform using low voltage devices are
[3]. the series, cascaded H-bridge design, flying capacitor
inverter system and diode clamped inverter
T.Suresh Kumar is with the Electronics and Communication
Engineering Department, Sathyabama University, Chennai, India
system[4],[9]. Another multilevel design uses parallel
(e-mail: [email protected]). connected inverter phases via inter-phase reactors. In
this design, the semiconductors obstruct the entire dc
S.Kalaivani is with the Electronics and Communication Engineering voltage, but allow the load current. Several
Department, Rajalakshmi Institute of Technology, Chennai, India (e-
mail: [email protected]).
combinational designs have also emerged from
cascading of the fundamental topologies. These designs
Priyadharsini is with the Electronics and Communication Engineering can produce higher power quality for a given number of
Department, Sathyabama University, Chennai, India (e-mail: semiconductor devices. H-bridge four-level inverter
[email protected]).
configuration is the type of multi level inverter
configuration. The limitation of this configuration is the
increase in the number of power devices and the circuit
complexity, which consequences complex control

978-1-5090-0396-9/16/$31.00 ©2016 IEEE

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schemes, increase in the cost and decrease in the and and back to the lower source. The output voltage is
reliability of the converter. 230Vdc and the current pass consists of; S3, S4, load,
We propose boost converter based multi level S7 and return to the lower supply. During negative half
topology with the two level inverter H-bridge cycle, S4 and S7 are replaced by S6 and S5
configuration to reduce the semiconductor switch and respectively.
circuit complexity. This configuration is having less Free-Wheeling Mode Free-wheeling modes occur when
number of switches and gate driver circuits for one of the main switches is turned-off. But the load
switching operation and generating the output current continues its pass due to load inductance. This
waveform at all DC levels. is obtained with the help of the anti-parallel diodes of
The rest of the paper is arranged as follows: Section the switches, and the load circuit which is disconnected
II illustrate cascade H-bridge inverter model. Section from the source terminals. In this mode, the positive
III elucidates proposed model. Finally conclusions are half cycle current pass comprises; S4, load, and D1 or
drawn in Section IV. S7, load, and D4, while in the negative half cycle the
current pass includes S5, load, and D3 or S6, load, and
II. CASCADE H-BRIDGE MULTILEVEL D2.
INVERTER Regenerating Mode In this mode, the source will get
back part of the energy stored in the load inductance.
Cascade H-Bridge Multilevel Inverter (CMLI) is one During the positive half cycle, load current is negative
of the most important topologies in the family of and during positive half cycle, the output voltage is
multilevel inverters [10]. It is implemented to produce a zero. The positive current pass consists of; load, D1,
desired AC voltage from several levels of DC voltages. S4, the lower source, and D4, while the negative
All DC levels are considered as ideal sources since all current pass comprises; load, D2, S6, the lower source,
of them are either batteries, solar cells, etc. [11], [12]. and D3.
This topology requires minimum number of
components as compared with diode-clamped and TABLE I
flying capacitors type multilevel inverters. It does not SWITCHING SCHEME FOR 4 LEVEL 7 SWITCH TOPOLOGY
require specially designed transformer [12]. Cascaded
4-level inverter has a H-bridge inverter unit with Output
individual DC source and it is connected in series or
cascade as shown in Fig.1. Each H-bridge can produce Voltage S1 S2 S3 S4 S5 S6 S7
four different voltage levels: + 3Vdc/2, Vdc, + 2Vdc, 230V 0 0 1 1 0 0 1
0Vdc, and – 3Vdc/2,-Vdc,-2Vdc to get AC output from 153V 0 1 0 1 0 0 1
DC source side by different combinations of the 76V 1 0 0 1 0 0 1
switches.
0V 0 0 0 0 0 0 0
-76V 1 0 0 0 1 1 0
153V 0 1 0 0 1 1 0
-230V 0 0 1 0 1 1 0

It can be observed from table I that the dc bus

voltage is being split into four levels. The output
voltage has four states which are: 3Vdc/2,Vdc,+
2Vdc,0 switches S3 and S4,S7 need to be turned on; for
3Vdc/2 switches S2and S4,S7 need to be turned on; an
d for the Vdc level, S1 and S4,S7 need to be turn on for
the + 2Vdc level. All switches are off; and for the 0Vdc
level. Switches S3 and S5,S6 need to be turned on; for -
Fig. 1. Schematic of cascaded 4-level inverter 3Vdc/2 switches S2 and S5,S6 are turned on; and for
the -Vdc level, S1 and S5,S6‟ need to be turn on for the
The circuit configuration of the existing 4-level - 2Vdc level. All switches are off for the 0 Vdc level.
inverter is shown in Fig.1. It has four main switches in Switching pattern of four levels Inverter topology is
H-bridge configuration S4-S7, and three auxiliary shown in Fig.2. For different DC voltage levels 3Vdc/2,
switches S1-S3. Multilevel inverters are a) Powering Vdc, + 2Vdc, 0 Vdc.
Mode, b) Free-Wheeling Mode, c) Regenerating Mode.
Powering Mode Inverter will undergo to this mode
when both the load current and voltage have the same
polarity. During positive half cycle, the output voltage
is 76Vdc and the current pass consists of; S1, S4, load,
S7 and return to the lower supply. If the output voltage
is 153Vdc, current pass consists of; S2, S4, load, S7

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 produced by LC circuit in H-bridge. The LC circuit will
produce AC voltage from DC voltage waveform.
Charging mode This mode exists when switches SW1
and SW2 are turned ON. During this condition, AC
source is connected to auto transformer. It produces
60V AC signal as output which is given to battery
through H-Bridge inverter.

TABLE II
SWITCHING OPERATION OF MLI

Switching Operation
Mode of
Operation SW1 SW2
Power OFF ON
Inverter ON OFF
Fig. 2. Switching pattern of four Level Inverter topology
Charging ON ON
III. PROPOSED TOPOLOGY

The proposed two level inverter using boost TABLE III

SWITCHING SCHEME FOR 2 LEVEL 4 SWITCH TOPOLOGY
converter is implemented to reduce the overall number
of switching devices in conventional multilevel inverter DC
topologies. The circuit of the new two-level four switch Input S1 S2 S3 S4
inverter is shown in Fig.3
VDC ON OFF OFF ON
0 OFF OFF OFF OFF
-VDC OFF ON ON OFF

It is observed from the table II and table III; the

output voltage has two DC level Vdc and 0Vdc. During
+ Vdc, switches S1 and S4, need to be turned on. When
0Vdc level is applied, all switches are turned off.
The Pulse width waveform is used in two level
inverter for switching purpose. A two-level Inverter
creates two different voltages for the load. It provides
two different DC level output + Vdc/2 and – Vdc/2 for
an input of Vdc. As we increase the voltage level, the
waveform becomes smoother. The complexity of
controller unit and number of components increases
along with the increased levels.
a) H-bridge Multi level Inverter circuit
Fig. 3. Schematic of H-bridge two level inverter

The proposed topology can be enlarged to any

required number of levels like other conventional
multilevel inverter topologies. The modes of operation
will be illustrated for two-level inverter. These modes
are powering mode, Inverter mode and charging mode.
Powering mode Inverter will undergo to this mode
when both the load current and voltage have the same
polarity. Under this mode the load is directly supplied
from AC voltage.
Inverter mode In this mode, switch SW1 is turned on
and directly connected to DC voltage source. This DC
voltage is supplied to load through H-bridge boost
converter when AC supply is not available. At this
condition, load gets supply by induction effect Fig. 4. H-bridge multi level inverter circuit

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 H-Bridge multilevel inverter has four main switches achieved by combining the desired modulating signal
as S1, S2, S3, and S4. Carrier redistribution (CR) waveform with a high-frequency triangular carrier
technique is used to generate smooth output waveform. wave as depicted schematically in Fig.5 and Fig.6.
PWM input is given to the four MOSFET switches.
The output of 200 KHz is generated as PWM waveform b) Boost Converter
from the modulation of sine wave of 50Hz and triangle In boost converter battery can charge by using AC
carrier waveform of 3.3 KHz. The PWM waveform is voltage 325RMS. Autotransformer do both step up and
converted back to AC signal of 325V RMS by LC step down operation. During charging mode, it acts as a
Circuit. step down transformer. A supply of 325 V is given as
the input to transformer to produce secondary voltage
TABLE IV of 60V. Battery should store minimum of 100V DC
PROPOSED MODEL SPECIFICATION voltage in order to produce required AC voltage during
Parameters Mosfet@IRF4468 inverting mode of operation.
FET Type N-Channel-depletion During inverting mode of operation, two MOSFETs
Drain to source voltage 100V are switched off and another two MOSFETs are
Drain current 195A switched on.
Vgs (th) 4V
Power 520W
Cost 7.33$

Fig. 7. Boost converter

The MOSFET S1 & S4 is supplied with 60V when

switches are turned on. Both MOSFETs are closed and
Switch S5 is turned on, inductor L1 stores the energy
and produce induced voltage. The sum of induced
voltage and secondary voltage (total 120V RMS) is
given to the battery for charging.
Fig. 5. Input PWM Wave for Multilevel Inverter

Fig. 6. Output Wave for Multilevel Inverter

The switches in the voltage source inverter Fig.4 can

be turned on and off as required. In the simplest Fig. 8. Pulsated DC output waveform
approach, the top switch S1 is turned on and off only
once in each cycle, a square wave waveform results.
However, if turned on several times in a cycle can
reduce harmonic profile. The desired output voltage is

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 TABLE V [6] J.Napoles, A.J.Watson, J.J.Padilla,J. I.Leon, L.G. Franquelo,
COMPARISON OF RESULTS P.W.Wheeler and M.A.Aguirre,”Selective Harmonic Mitigation
Technique for Cascaded H-Bridge Converters with Non-Equal
DC Link Voltages”, IEEE Transactions on power
Cascade electronics,pp1-9,2012.
Bridge Boost [7] John N.Chiasson, Leon M.Tolbert, Keith J.McKenzieand Zhong
Topology MLI Converter MLI Du, “A Unified Approach to Solving the Harmonic Elimination
Equations in Multilevel Converters”,IEEE Transactions on
Switches 7 4 power electronics, vol. 19, no. 2, pp478-500,2004.
Level 4 2 [8] A.Maheswari,S.Mahendran,Dr.Gnanambal,“Implementation of
Dc Source 3 1 Fundamental Frequency Switching Scheme on Multi –Level
Cascaded HBridge Inverter Fed Three Phase Induction Motor
Voltage 325V @ 3 325V @ single Drive” Wulfenia journal,Klangfurt, Austria,Vol 19, No. 8,
Level achieve source source pp10-24,2012.
Input Voltage 230V 100V [9] Jose Rodriguez, Jin-Sheng Lai and Fang Zheng, “Multilevel
Inverters: A survey of topologies, Control applications,” IEEE
Mosfet Cost 51.31$ 29.32$
transactions on Industrial Electronics, Vol.49, No. 4, pp. 724-
Battery cost 300$ 60$ 738,August 2002.
[10] H.S.Patel and R.G.Hoft,“Generalized Techniques of Harmonic
It can be observed from table IV that the boost Elimination and Voltage Control in Thyristor Inverters:Part I–
Harmonic Elimination”,IEEE Trans.Ind. Appl.,3,1973,pp. 310-
converter based MLI topology uses four switches with 317.
single DC source. It can produce 325 V AC output [11] J.N.Chiasson, L.M.Tolbert, K.J.Mckenzie and Z.Du, “Control
waveform using 100 V DC voltages whereas in four of a Multilevel Converter Using Resultant Theory”,
levels MLI uses seven switches and three DC sources IEEE Transactions Control System Theory, Vol. 11,No.3, 2003,
pp. 345-354.
to produce the same output. [12] J.Sun and I. Grotstollen, “Pulsewidth Modulation Basedon
Real-Time Solution of Algebraic Harmonic Elimination
IV. CONCLUSION Equations”,Proceedings20thInt. Conf. Ind. Electron.Contr.
Instrum. IECON, 1994, pp.79-84.
A new topology of multilevel inverters has been [13] X.Yuan and I.Barbi, “Fundamentals of a New Diode
Clamping multilevel Inverter”, IEEE Transactions Power
presented and built in PSPICE-Simulink. The merit of Electron., Vol. 15, No.4, 2000,pp. 711-718.
this topology is reduced number of switching
components compared to conventional type of
inverters. Two level reduced switching topology has
been implemented with only four switches. The
proposed topologies also reduce initial cost, complexity
and provide even power distribution in comparison
with existing topologies. The modes of operation and
switching strategy of the proposed topology are
implemented. A PWM algorithm is applied with the
help of pulse generator and based on the theory of
resultant has been applied for harmonic elimination of
the proposed topology.

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