Tps 65160
Tps 65160
Tps 65160
www.ti.com
FEATURES
APPLICATIONS
DESCRIPTION
The TPS65160 offers a compact power supply solution to provide all four voltages required by thin-film transistor
(TFT) LCD panel. With its high current capabilities, the device is ideal for large screen monitor panels and LCD
TV applications.
TYPICAL APPLICATION
L1
10 H
D1
SL22
TPS65160
C4
22 pF
VIN
12 V
C1
2*22 F
VGL
5 V/50 mA
C3
1 F
C16
1 F
D2
C6
0.47 F
16
9
11
13
24
6
D3
C7
470 F
8
12
20
21
22
R3
620 k
7
28
25
R4
150 k
C8
220 nF
C9
22 nF
SUP
FREQ
VINB
VINB
AVIN
EN1
EN2
DRN
FBN
REF
PGND
PGND
SS
DLY1
C10
10 nF
SW
SW
FB
OS
GND
GD
4
5
1
C15
470 nF
3
23
27
10
DRP
14
FBP
17
Boot
18
SWB
19
NC
15
FBB
2
COMP
DLY2 26
C11
10 nF
VS
15 V/1.5 A
R1
680 k
C2
3* 22 F
R2
56 k
D4
VGH
23 V/50 mA
D5
GD
C5
0.47 F
R5
1 M
Cb
100 nF
C17
22 nF
C13
0.47 F
R6
56 k
VLOGIC
L2
15 H
D6
SL22
3.3 V/1.5 A
R7
2 k
C14
10 nF
C12
2*22 F
R8
1.2 k
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
TPS65160, TPS65160A
www.ti.com
SLVS566B MARCH 2005 REVISED JULY 2005
DESCRIPTION (CONTINUED)
The device can be powered directly from a 12-V input voltage generating the bias voltages VGH and VGL, as
well as the source voltage VS and logic voltage for the LCD panels. The device consists of a boost converter to
provide the source voltage VS and a step-down converter to provide the logic voltage for the system. A positive
and a negative charge-pump driver provide adjustable regulated output voltages VGL and VGH to bias the TFT.
Both boost and step-down converters, as well as the charge-pump driver, operate with a fixed switching
frequency of 500 kHz or 750 kHz, selectable by the FREQ pin. The TPS65160 includes adjustable power-on
sequencing. The device includes safety features like overvoltage protection of the boost converter and
short-circuit protection of the buck converter, as well as thermal shutdown. Additionally, the device incorporates a
gate drive signal to control an isolation MOSFET switch in series with VS or VGH. See the application circuits at
the end of this data sheet.
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated
circuits be handled with appropriate precautions. Failure to observe proper handling and installation
procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision
integrated circuits may be more susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
ORDERING INFORMATION
TA
UVLO
(typ)
40C to 85C
(1)
(2)
Overvoltage protection
Vs (typ)
(1)
ORDERING
PACKAGE (2)
PACKAGE
MARKING
6V
23 V
TPS65160PWP
TSSOP28 (PWP)
TPS65160
8V
19.5 V
TPS65160APWP
TSSOP28 (PWP)
TPS65160A
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
Web site at www.ti.com.
The PWP package is available taped and reeled. Add R-suffix to the device type (TPS65160PWPR) to order the device taped and
reeled. The TPS65160PWPR package has quantities of 2000 devices per reel. Without suffix, the TPS65160PWP is shipped in tubes
with 50 devices per tube.
SUP (2)
0.3 V to 16.5 V
0.3 V to 15 V
(2)
25 V
20 V
GD (2)
25 V
TA
40C to 150C
Tstg
65C to 150C
Temperature (soldering, 10 s)
(1)
(2)
260C
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to network ground terminal.
DISSIPATION RATINGS
(1)
PACKAGE
RTHJA
TA 25C
POWER RATING
TA = 70C
POWER RATING
TA = 85C
POWER RATING
28-Pin TSSOP
3.57 W
1.96 W
1.42 W
See Texas Instruments application report SLMA002 regarding thermal characteristics of the PowerPAD package.
TPS65160, TPS65160A
www.ti.com
SLVS566B MARCH 2005 REVISED JULY 2005
NOM
MAX
TPS65160
TPS65160A
VSUP
converter (1)
CO
V
V
2x22
10
VLOGIC
17.5
15
CIN
UNIT
20
15
1.8
5.0
3x22
2x22
V
F
TA
40
85
TJ
40
125
(1)
ELECTRICAL CHARACTERISTICS
VIN = 12 V, SUP = VIN, EN1 = EN2 = VIN, VS = 15 V, VLOGIC = 3.3 V, TA = 40C to 85C, typical values are at TA = 25C
(unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SUPPLY CURRENT
VIN
TPS65160
TPS65160A
ISUP
14
14
VGH = 2 x VS,
Boost converter not
switching
0.2
0.2
0.5
VGH = 2 x VS,
Buck converter not
switching
0.1
0.1
0.1
VGH = 2 x VS
0.2
mA
6.4
8.8
1.213
1.223
IQIN
ISD
8
9.2
VUVLO
VREF
Reference voltage
TPS65160
VIN falling
TPS65160A
VIN falling
Thermal shutdown
1.203
Temperature rising
mA
155
VIL
VIH
VIL
II
2.0
V
0.8
1.7
V
V
0.4
0.01
0.1
3.3
4.8
6.2
3.3
4.8
6.2
12
IDLY2
ISS
SS charge current
VTHRESHOLD = 1.213 V
TPS65160, TPS65160A
www.ti.com
SLVS566B MARCH 2005 REVISED JULY 2005
TEST CONDITIONS
MIN
TYP
MAX
FREQ = high
600
750
900
FREQ = low
400
500
600
UNIT
INTERNAL OSCILLATOR
fOSC
Oscillator frequency
kHz
VFB
IFB
rDS(ON)
TPS65160
TPS65160A
1.136
20
17.5
1.146
1.156
10
100
nA
ISW = 500 mA
100
185
ISW = 200 mA
10
16
3.5
4.2
10
A
V
IMAX
ILIM
Ileak
Vovp
Overvoltage protection
2.8
VSW = 15 V
TPS65160
VOUT rising
22
23
24.5
TPS65160A
VOUT rising
18
19.5
20.5
Line regulation
Load regulation
0.0008
%/V
0.03
%/A
VFB rising
VOL
I(sink) = 500 A
VGD = 20 V
Vs-12%
Vs-8%
Vs-4%
0.3
0.05
1.213
1.231
10
100
nA
175
300
2.6
3.3
10
VFBB
IFBB
rDS(ON)
ILIM
Ileak
VSW = 0 V
Line regulation
Load regulation
(1)
1.8
1.195
ISW = 500 mA
2
0.0018
%/V
0.037
%/A
The GD signal is latched low when the main boost converter output VS is within regulation. The GD signal is reset when the input
voltage or enable of the boost converter is cycled low.
TPS65160, TPS65160A
www.ti.com
SLVS566B MARCH 2005 REVISED JULY 2005
TEST CONDITIONS
MIN
TYP
MAX
UNIT
36
36
mV
10
100
nA
VFBN
IFBN
rDS(ON)
VDropN
(2)
IOUT = 20 mA
4.4
IDRN = 50 mA,
VFBN = VFBNnominal 5%
130
190
270
420
1.213
1.238
10
100
nA
mV
IFBP
rDS(ON)
VDropP
IOUT = 20 mA
1.1
IDRP = 50 mA,
VFBP = VFBPnominal 5%
400
680
850
1600
mV
The maximum charge-pump output current is typically half the drive current of the internal current source or current sink.
FB
28
SS
COMP
27
GD
OS
26
DLY2
SW
25
DLY1
SW
24
REF
PGND
23
GND
PGND
22
AVIN
SUP
21
VINB
EN2
20
VINB
DRP
10
19
NC
DRN
11
18
SWB
FREQ
12
17
BOOT
FBN
13
16
EN1
FBP
14
15
FBB
(2)
1.187
TPS65160, TPS65160A
www.ti.com
SLVS566B MARCH 2005 REVISED JULY 2005
TERMINAL FUNCTIONS
TERMINAL
NAME
NO.
I/O
DESCRIPTION
SUP
This is the supply pin of the positive and negative charge-pump driver and can be connected to the input or output
of the TPS65160 main boost converter. Because the SUP pin is rated to a maximum voltage of 15 V, it needs to
be connected to the input of the TPS65160 for an output voltage greater than 15 V.
FREQ
12
Frequency adjust pin. This pin allows setting the switching frequency with a logic level to 500 kHz = low and
750 kHz = high.
AVIN
22
Analog input voltage of the device. This is the input for the analog circuits of the device and should be bypassed
with a 1-F ceramic capacitor for good filtering.
VINB
20, 21
EN1
16
This is the enable pin of the buck converter and negative charge pump. When this pin is pulled high, the buck
converter starts up, and after a delay time set by DLY1, the negative charge pump comes up. This pin must be
terminated and not be left floating. A logic high enables the device and a logic low shuts down the device.
EN2
The boost converter starts only with EN1 = high, after the step-down converter is enabled. EN2 is the enable pin
of the boost converter and positive charge pump. When this pin is pulled high, the boost converter and positive
charge pump starts up after the buck converter is within regulation and a delay time set by DLY2 has passed by.
This pin must be terminated and not be left floating. A logic high enables the device and a logic low shuts down
the device.
DRN
11
FBN
13
REF
24
PGND
6, 7
SS
28
This pin allows setting the soft-start time for the main boost converter VS. Typically a 22-nF capacitor needs to be
connected to this pin to set the soft-start time.
DLY1
25
Connecting a capacitor from this pin to GND allows the setting of the delay time between VLOGIC (step-down
converter output high) to VGL during start-up.
DLY2
26
Connecting a capacitor from this pin to GND allows the setting of the delay time between VLOGIC (step-down
converter output high) to VS Boost converter and positive charge-pump VGH during start-up.
COMP
FBB
15
SWB
18
NC
19
BOOT
17
FBP
DRP
GD
27
This is the gate drive pin which can be used to control an external MOSFET switch to provide input to output
isolation of VS or VGH. See the circuit diagrams at the end of this data sheet. GD is an open-drain output and is
latched low as soon as the boost converter is within 8% of its nominal regulated output voltage. GD goes high
impedance when the EN2 input voltage is cycled low.
GND
23
Analog ground
OS
Output sense pin. The OS pin is connected to the internal rectifier switch and overvoltage protection comparator.
This pin needs to be connected to the output of the boost converter and cannot be connected to any other voltage
rail. Connect a 470-nF capacitor from OS pin to GND to avoid noise coupling into this pin. The PCB trace of the
OS pin needs to be wide because it conducts high current.
FB
SW
4, 5
PowerPAD
Power ground
This is the compensation pin for the main boost converter. A small capacitor and, if required, a resistor is
connected to this pin.
Not connected
I
N-channel MOSFET gate drive voltage for the buck converter. Connect a capacitor from the switch node SWB to
this pin.
14
10
TPS65160, TPS65160A
www.ti.com
SLVS566B MARCH 2005 REVISED JULY 2005
TYPICAL CHARACTERISTICS
TABLE OF GRAPHS
FIGURE
MAIN BOOST CONVERTER (Vs)
rDS(ON)
CSS = 22 nF
rDS(ON)
10
Soft start
11
12
SYSTEM PERFORMANCE
fosc
Oscillation frequency
13
Power-up sequencing
14
Power-up sequencing
15
BOOST CONVERTER
rDS(ON) - N-CHANNEL SWITCH
vs
TEMPERATURE
100
0.16
90
0.14
rDS(on) N-Channel Switch
80
Efficiency %
70
60
50
40
30
VI = 12 V,
VO = 15 V,
L = 10 H
20
0.5
1
1.5
IO Output Current A
Figure 1.
0.12
0.1
0.08
0.06
0.04
0.02
10
0
0
VI = 8 V,
VI = 12 V,
VI = 14 V
0
40 20
20
40
60
80
TA Temperature C
Figure 2.
TPS65160, TPS65160A
www.ti.com
SLVS566B MARCH 2005 REVISED JULY 2005
SOFT-START
BOOST CONVERTER
VI = 12 V,
VO = 15 V/ 1.2 A,
C(SS) = 22 nF
VSW
10 V/div
VO
50 mV/div
VS
5 V/div
I(Inductor)
1 A/div
II
1 A/div
1 s/div
2 ms/div
Figure 3.
Figure 4.
VI = 12 V, VS = 15 V,
CO = 3*22 F,
C(comp) = 22 nF,
L = 6.8 H,
FREQ= High
VI = 3.3 V,
VO = 10 V/10 mA
VSW
10 V/div
VS
200 mV/div
VO
50 mV/div
I(Inductor)
1 A/div
IL
500 mA/div
1 s/div
Figure 5.
100 s/div
Figure 6.
TPS65160, TPS65160A
www.ti.com
SLVS566B MARCH 2005 REVISED JULY 2005
STEP-DOWN CONVERTER
rDS(ON) - N-CHANNEL SWITCH
vs
TEMPERATURE
90
0.25
VI = 8 V,
VI = 12 V,
VI = 14 V
r
DS(on) N-Channel Switch
80
70
Efficiency %
60
50
40
30
20
VI = 12 V,
VO = 3.3 V,
L = 15 H
10
0
0.5
1
1.5
IO Output Current A
0.2
0.15
0.1
0.05
0
40 20
20
40
60
80
TA Temperature C
Figure 7.
Figure 8.
STEP-DOWN CONVERTER
PWM OPERATION
CONTINUOUS MODE
STEP-DOWN CONVERTER
PWM OPERATION
DISCONTINUOUS MODE
VI = 12 V,
VO = 3.3 V/45 mA
VSW
5 V/div
VSW
5 V/div
VO
20 mV/div
VO
20 mV/div
VI = 12 V,
VO = 3.3 V/1.5 A
I(Inductor)
1 A/div
I(Inductor)
100 mA/div
500 ns/div
500 ns/div
Figure 9.
Figure 10.
TPS65160, TPS65160A
www.ti.com
SLVS566B MARCH 2005 REVISED JULY 2005
SOFT-START
STEP-DOWN CONVERTER
VI = 12 V,
VO = 3.3 V/1.2 A
VO1
100 mV/div
VI = 12 V, V(logic) = 3.3 V,
CO = 2*22 F, FREQ = High
VO
1 V/div
IO
270 mA to 1.3 A
I(Inductor)
1 A/div
50 s/div
200 s/div
Figure 11.
Figure 12.
SWITCHING FREQUENCY
vs
TEMPERATURE
POWER-UP SEQUENCING
EN2 CONNECTED TO VIN
740
735
VI = 8 V,
VI = 12 V,
VI = 14 V
730
V Logic
2 V/div
725
VGL
5 V/div
720
715
710
VS
5 V/div
705
VGH
10 V/div
700
695
50
50
100
TA Temperature C
Figure 13.
10
150
2 ms/div
Figure 14.
TPS65160, TPS65160A
www.ti.com
SLVS566B MARCH 2005 REVISED JULY 2005
POWER-UP SEQUENCING
EN2 ENABLED SEPARATELY
V Logic
2 V/div
VS
5 V/div
VGH
5 V/div
EN2
2 V/div
1 ms/div
Figure 15.
11
TPS65160, TPS65160A
www.ti.com
SLVS566B MARCH 2005 REVISED JULY 2005
BLOCK DIAGRAM
AVIN
SW
SW
Q2
Clock
DLY1
SS
Bias
Vref=1.213 V
Thermal
Shutdown
Sequencing
GND
FREQ
500 kHz/
750 kHz
Oscillator
Current Limit
and
Soft Start
DLY2
AVIN
OS
OS
IDLY
Overvoltage
Comparator
SS
Vref
Control Logic
SS
AVIN
Vref
D
S
COMP
PGND
Q1
PGND
GM Amplifier
Comparator
Sawtooth
Generator
FB
VFB
1.154 V
Positive
Charge Pump
OS
SUP
SUP
I DRVP
GM Amplifier
Low Gain
VFB
1.154
Current
Control
Soft Start
Vref
1.2 13 V
DRVP
Q3
VINB
Negative
Charge Pump
FBP
Step-Down
Converter
Current
Control
Soft Start
DRVN
N
Regulator
8V
BOOT
I DRVN
Q3
SUP
VINB
SWB
Control Logic
FBN
NC
Current Limit
Vref
1.2 13 V
Ref
IDLY
DLY1
DLY1
Vref
Compensation
and
Soft Start
Clock/2
IDLY
GD
0.9 V
Vref
Logic
Sawtooth
Generator
Clock
0.6 V
Reference
Output
Clock
Vref
1.2 13 V
EN1
12
Clock/4
DLY2
DLY2
FBB
Error Amplifier
Vref
EN2
VREF
TPS65160, TPS65160A
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SLVS566B MARCH 2005 REVISED JULY 2005
DETAILED DESCRIPTION
Boost Converter
The main boost converter operates in pulse-width modulation (PWM) and at a fixed switching frequency of
500 kHz or 750 kHz set by the FREQ pin. The converter uses an unique fast response, voltage-mode controller
scheme with input voltage feedforward. This achieves excellent line and load regulation (0.03%-A load regulation
typical) and allows the use of small external components. To add higher flexibility to the selection of external
component values, the device uses external loop compensation. Although the boost converter looks like a
nonsynchronous boost converter topology operating in discontinuous conduction mode at light load, the
TPS65160 maintains continuous conduction even at light-load currents. This is achieved with a novel architecture
using an external Schottky diode with an integrated MOSFET in parallel connected between SW and OS. See
the Functional Block Diagram. The intention of this MOSFET is to allow the current to go negative that occurs at
light-load conditions. For this purpose, a small integrated P-Channel MOSFET with typically 10- rds(on) is
sufficient. When the inductor current is positive, the external Schottky diode with the lower forward voltage
conducts the current. This causes the converter to operate with a fixed frequency in continuous conduction mode
over the entire load current range. This avoids the ringing on the switch pin as seen with standard
nonsynchronous boost converter and allows a simpler compensation for the boost converter.
Thermal Shutdown
A thermal shutdown is implemented to prevent damage caused by excessive heat and power dissipation.
Typically, the thermal shutdown threshold is 155C.
Step-Down Converter
The nonsynchronous step-down converter operates at a fixed switching frequency using a fast response voltage
mode topology with input voltage feedforward. This topology allows simple internal compensation, and it is
designed to operate with ceramic output capacitors. The converter drives an internal 2.6-A N-channel MOSFET
switch. The MOSFET driver is referenced to the switch pin SWB. The N-channel MOSFET requires a gate drive
voltage higher than the switch pin to turn the N-Channel MOSFET on. This is accomplished by a bootstrap gate
drive circuit running of the step-down converter switch pin. When the switch pin SWB is at ground, the bootstrap
capacitor is charged to 8 V. This way, the N-channel gate drive voltage is typically around 8 V.
13
TPS65160, TPS65160A
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SLVS566B MARCH 2005 REVISED JULY 2005
I DRVP
Current
Control
Soft Start
DRP
Cfly
VG
VGH
23 V/50 mA
Q3
R5
FBP
R6
14
C13
0.47 F
TPS65160, TPS65160A
www.ti.com
SLVS566B MARCH 2005 REVISED JULY 2005
V out 1.213 1 R5
R6
R5 R6
Vout
V
FB
1
R6
V out
1
1.213
EN2
EN1
DLY2
VGH
V s, VGH
Vs
Vin
Vin
Vo4
Fall Time Depends on Load
Current and Feedback Resistor
VGL
DLY1
GD
TPS65160, TPS65160A
www.ti.com
SLVS566B MARCH 2005 REVISED JULY 2005
EN2
EN1
DLY2
VGH
Vs
VGH ,Vs
Vin
Vin
Vo4
DLY1
VGL
GD
Undervoltage Lockout
To avoid misoperation of the device at low input voltages, an undervoltage lockout is included which shuts down
the device at voltages lower than 6 V.
16
TPS65160, TPS65160A
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SLVS566B MARCH 2005 REVISED JULY 2005
VOLTAGE RATING
COMPONENT SUPPLIER
COMMENTS
22 F/1210
16 V
CIN (VINB)
1 F/1206
16 V
CIN (AVIN)
D 1
Vin
Vout
Vin
2. Maximum output current: I
avg (1 D) lsw Vout 2.8 A with lsw minimum switch current of the TPS65160 (2.8 A).
I
Vin D out
swpeak
2 s L 1 D
With
Isw = converter switch current (minimum switch current limit = 2.8 A)
fs = converter switching frequency (typical 500 kHz/750 kHz)
L = Selected inductor value
= Estimated converter efficiency (use the number from the efficiency curves or 0.8 as an estimation)
The peak switch current is the steady-state peak switch current that the integrated switch, inductor, and external
Schottky diode must be able to handle. The calculation must be done for the minimum input voltage where the
peak switch current is highest.
DIMENSIONS in mm
Isat/DCR
22 H
Coilcraft MSS1038-103NX
COMPONENT SUPPLIER
2.9 A/73 m
22 H
Coilcraft DO3316-103
3.8 A/38 m
10 H
Sumida CDRH8D43-100
4.0 A/29 m
10 H
Sumida CDH74-100
2.75 A/43 m
10 H
Coilcraft MSS1038-103NX
4.4 A/35 m
6.8 H
2.5 A/44 m
17
TPS65160, TPS65160A
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SLVS566B MARCH 2005 REVISED JULY 2005
VOLTAGE RATING
22 F/1812
16 V
COMPONENT SUPPLIER
Taiyo Yuden EMK432BJ226MM
Vr
3A
20 V
2A
20 V
2A
20 V
Vforward
RJA
SIZE
COMPONENT SUPPLIER
0.36 at 3 A
46C/W
SMC
0.44 V at 3 A
75C/W
SMB
0.5 at 2 A
75C/W
SMB
Setting the Output Voltage and Selecting the Feedforward Capacitor (Boost Converter)
The output voltage is set by the external resistor divider and is calculated as:
V out 1.146 V 1 R1
R2
Across the upper resistor, a bypass capacitor is required to achieve a good load transients response and to have
a stable converter loop. Together with R1, the bypass capacitor Cff sets a zero in the control loop. Depending on
the inductor value, the zero frequency needs to be set. For a 6.8-H or 10-H inductor, fz = 10 kHz and for a
22-H inductor, fz = 7 kHz.
1
1
C
2 z R1
2 10 kHz R1
A value coming closest to the calculated value should be used.
18
TPS65160, TPS65160A
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SLVS566B MARCH 2005 REVISED JULY 2005
z
1
2 Cc Rc
Lower input voltages require a higher gain and therefore a lower compensation capacitor value.
V out 1.213 V 1 R1
R2
1
1
9.9 nF 10 nF
2 8 kHz R1
2 8 kHz 2k
COMPONENT SUPPLIER
15 H
Sumida CDRH8D28-150
15 H
Coilcraft MSS1038-153NX
15 H
Wuerth 7447789115
DIMENSIONS in mm
Isat/DCR
1.9 A/53 m
3.6 A/50 m
1.75 A/100 m
19
TPS65160, TPS65160A
www.ti.com
SLVS566B MARCH 2005 REVISED JULY 2005
Vr
3A
20 V
2A
20 V
2A
1.5 A
Vforward
RJA
SIZE
COMPONENT SUPPLIER
0.36 V at 3 A
46C/W
SMC
0.44 V at 2 A
75C/W
SMB
20 V
0.5 V at 2 A
75C/W
SMB
20 V
0.445 V at 1.0 A
88C/W
SMA
VOLTAGE RATING
22 F/0805
6.3 V
COMPONENT SUPPLIER
Taiyo Yuden JMK212BJ226MG
Layout Consideration
The PCB layout is an important step in the power supply design. An incorrect layout could cause converter
instability, load regulation problems, noise, and EMI issues. Especially with a switching dc-dc converter at high
load currents, too-thin PCB traces can cause significant voltage spikes. Good grounding becomes important as
well. If possible, a common ground plane to minimize ground shifts between analog (GND) and power ground
(PGND) is recommended. Additionally, the following PCB design layout guidelines are recommended for the
TPS65160:
1. Separate the power supply traces for AVIN and VINB, and use separate bypass capacitors.
2. Use a short and wide trace to connect the OS pin to the output of the boost converter.
3. To minimize noise coupling into the OS pin, use a 470-pF bypass capacitor to GND.
4. Use short traces for the charge-pump drive pins (DRN, DRP) of VGH and VGL because these traces carry
switching waveforms.
5. Place the flying capacitors as close as possible to the DRP and DRN pin, avoiding a high voltage spike at
these pins.
6. Place the Schottky diodes as close as possible to the IC, respective to the flying capacitors connected to the
DRP and DRN.
7. Route the feedback network of the negative charge pump away from the drive pin traces (DRN) of the
negative charge pump. This avoids parasitic coupling into the feedback network of the negative charge pump
giving good output voltage accuracy and load ragulation. To do this, use the FREQ pin and trace to isolate
DRN from FBN.
20
TPS65160, TPS65160A
www.ti.com
SLVS566B MARCH 2005 REVISED JULY 2005
APPLICATION INFORMATION
C1
2*22 F
VGL
5 V/50 mA
C16
1 F
8
12
20
21
22
C6
0.47 F
D2
D3
AVIN
EN1
EN2
DRN
FBN
REF
PGND
PGND
28
SS
25
DLY1
R4
150 k
C8
220 nF
16
9
11
13
24
6
7
SUP
FREQ
VINB
VINB
C9
22 nF
C10
10 nF
4
SW
5
SW
1
FB
3
OS
23
GND
27
GD
DRP 10
14
FBP
17
Boot
18
SWB
19
NC
15
FBB
2
COMP
26
DLY2
C11
10 nF
Vs
15 V/1.5 A
C4
22 pF
TPS65160
C3
1 F
R3
620 k
C7
470 F
D1
SL22
L1
10 H
Vin
12 V
R1
680 k
C15
470 nF
C2
3*22 F
R2
56 k
D4
GD
C5
D5
0.47 F
VGH
26 V/50 mA
R5
909 k
Cb
100 nF
C17
22 nF
C13
0.47 F
R6
44.2 k
Vlogic
3.3 V/1.5 A
L2
15 H
D6
SL22
R7
2 k
C14
10 nF
C12
2*22 F
R8
1.2 k
Figure 19. Positive-Charge Pump Doubler Running From the Output VS (SUP = VS)
Required When Higher VGH Voltages Are Needed.
21
TPS65160, TPS65160A
www.ti.com
SLVS566B MARCH 2005 REVISED JULY 2005
C1
2*22 F
VGL
5 V/50 mA
C3
1 F
C16
1 F
C6
0.47 F
D2
D3
C7
470 F
R3
620 k
R4
150 k
C8
220 nF
D1
SL22
L1
10 H
Vin
12 V
C9
22 nF
TPS65160
8
12
20
21
22
16
9
11
13
24
6
7
28
25
SUP
FREQ
VINB
VINB
AVIN
EN1
EN2
DRN
FBN
REF
PGND
PGND
SS
DLY1
C10
10 nF
SW
SW
FB
OS
GND
GD
DRP
FBP
Boot
SWB
NC
FBB
COMP
DLY2
C11
10 nF
4
5
1
3
23
27
10
14
17
18
19
15
2
26
SI2343
C2
3*22 F
R1
680 k
C4
22 pF
C15
470 nF
GD
C5
R2
56 k
0.47 F
C18
220 nF
D4
D5
GD
VGH
23 V/50 mA
C13
0.47 F
R6
56 k
Cb
100 nF
L2
15 H
D6
SL22
R7
2 k
Vlogic
3.3 V/1.5 A
C14
10 nF
R8
1.2 k
22
C19
1 F
R10
100 k
R5
1 M
C17
22 nF
R9
510 k
Vs
15 V/1.5 A
C12
2*22 F
TPS65160, TPS65160A
www.ti.com
SLVS566B MARCH 2005 REVISED JULY 2005
C1
2*22 F
C3
1 F
C16
1 F
VGL
5 V/50 mA
C6
0.47 F
D2
D3
C7
470 F
R3
620 k
R4
150 k
C8
220 nF
D1
SL22
L1
6.9 H
Vin
12 V 10%
C9
22 nF
C4
22 pF
TPS65160
8
SUP
12
FREQ
20
VINB
21
VINB
22
AVIN
16
EN1
9
EN2
11
DRN
13
FBN
24
6 REF
PGND
7
PGND
28
25 SS
DLY1
C10
10 nF
SW
SW
FB
OS
GND
GD
DRP
FBP
Boot
SWB
NC
FBB
COMP
DLY2
C11
10 nF
4
5
1
3
23
27
10
14
17
18
Vs
13.5 V/2 A
R1
820 k
C15
470 nF
C2
3*22 F
R2
75 k
D4
GD
C5
VGH
23 V/50 mA
D5
0.47 F
R5
1 M
19
15
2
26
C13
0.47 F
R6
76 k
Cb
100 nF
C17
22 nF
Vlogic
3.3 V/1.5 A
L2
15 H
D6
SL22
R7
2 k
C14
10 nF
C12
2*22 F
R8
1.2 k
23
26-Jun-2006
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
TPS65160APWP
ACTIVE
HTSSOP
PWP
28
50
CU NIPDAU
Level-2-260C-1 YEAR
TPS65160APWPG4
ACTIVE
HTSSOP
PWP
28
50
CU NIPDAU
Level-2-260C-1 YEAR
TPS65160APWPR
ACTIVE
HTSSOP
PWP
28
CU NIPDAU
Level-2-260C-1 YEAR
TPS65160APWPRG4
ACTIVE
HTSSOP
PWP
28
CU NIPDAU
Level-2-260C-1 YEAR
TPS65160PWP
ACTIVE
HTSSOP
PWP
28
50
CU NIPDAU
Level-2-260C-1 YEAR
TPS65160PWPG4
ACTIVE
HTSSOP
PWP
28
50
CU NIPDAU
Level-2-260C-1 YEAR
TPS65160PWPR
ACTIVE
HTSSOP
PWP
28
CU NIPDAU
Level-2-260C-1 YEAR
TPS65160PWPRG4
ACTIVE
HTSSOP
PWP
28
CU NIPDAU
Level-2-260C-1 YEAR
Lead/Ball Finish
(1)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
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incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
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to Customer on an annual basis.
Addendum-Page 1
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