Symbolic Circuit Modeling and Simulation Using A Sparse Matrix: An Introduction
Symbolic Circuit Modeling and Simulation Using A Sparse Matrix: An Introduction
Symbolic Circuit Modeling and Simulation Using A Sparse Matrix: An Introduction
I. I NTRODUCTION
R1
10
+
5V
Fig. 1.
R2
20
Fig. 2.
A circuit digraph.
n0
1 0 1
n1 1
1
0
(1)
Aa =
n2
0 1 1
b1
b2
b3
Because the voltage potential at the ground node is always
zero, a reduced incidence matrix A, in which the ground node
row has been deleted, is ultimately no less informative. The
reduced incidence matrix for the sample circuit is:
1 1 0
A=
0 1 1
The dimensions of A are (n 1) b where n is the number
of nodes and b is the number of branches.
E. Kirchhoffss Current Law
Kirchhoffss Current Law states that the algebraic sum of
currents leaving any node is zero.
For the sample circuit, KCL involves all three branch
currents i1 , i2 , i3 and applies to all three interconnection nodes
n0 , n1 , n2 resulting in the following equations:
i1 i3 = 0
i1 + i2 = 0
i2 + i3 = 0
These equations can
incidence matrix and
follows:
1
1
0
(2)
v1 = 5
v2 10 i2 = 0
v3 20 i3 = 0
Ai = 0
1 0 0 v1
0
0
0
5
i1
0 1 0 v2 + 0 10
0 i2 = 0
0 0 1 v3
0
0
20 i3
0
In general the characteristic equations for all linear resistive
components can be combined and written in the form
Mv + Ni = us
v1 = e1 0
v2 = e1 e2
v3 = e2 0
These equations can be rewritten in matrix form using the
transpose of the circuits reduced incidence matrix as follows:
1 0
v1
v2 = 1 1 e1
e2
v3
0 1
0
0
AT 1
0
M
(3)
(5)
(6)
(7)
0
0 0 0
0
0 0 0
1 0 1 0
1 1 0 1
0 1 0 0
0
0 1 0
0
0 0 1
0
0 0 0
0
0
0
0
1
0
0
1
1
0
0
0
0
0
0
0
1
0
1
1
0
0
0
0
0
0
0
0
10
0
0
20
e1
e2
v1
v2
v3
i1
i2
i3
0
0
0
0
0
5
0
0
5
e1
e2 10/3
v1 5
v2 5/3
v3 10/3
i1 1/6
i2 1/6
i3
1/6
1) Circuit design example: Is the single independent voltage source shown in Figure 3 a valid circuit design?
1
1V
V1 1 0 1
Fig. 3.
0
0 0 0 0 1
e1
0
1
0
0
1
0 0 0 0 0 1
e2 0
1 0 1 0 0 0
v1 0
0
0
1 1 0 1 0 0
0
0
v2 = 0
0 1 0 0 1 0
v3 0
0
0
0 1 0 0 0
0
0
i1 V1
0
0 i2 0
0 0 1 0 0 R1
0
0 0 0 1 0
0
0
R2
i3
Symbolic Gaussian elimination yields the solution:
e1
V1
e2 V1 R2 /(R1 + R2 )
v1
V1
v2 V1 R1 /(R1 + R2 )
v3 V1 R2 /(R1 + R2 )
i1 V1 /(R1 + R2 )
i2 V1 /(R1 + R2 )
V1 /(R1 + R2 )
i3
Note the richness of this solution in that it effectively includes
both the series resistor formula and the voltage divider equation:
Rtotal
e2
=
=
(v1 /i1 ) = R1 + R2
V1 R2 /(R1 + R2 )
0 0 1 0
1 0 0 V1
1 1 0 0 = 0 1 0 V1
0 1 0 V1
0 0 1 0
Which means that the solution is:
e1
V1
v1 = V1
i1
0
All of the circuits characteristics are well-defined, therefore
this circuit design is valid.
2) Circuit design example: Is the single independent current source shown in Figure 4 a valid circuit?
1
1A
I1 0 1 1
Fig. 4.
1 1 0 0
0 0 1 0
1 1 0
0 = 0 0 0 0
0 0 1 I1
0 0 1 0
This means that there are an infinite number of solutions as
long as the following conditions are met:
0
e1 + v1
=
i1
0
The circuits characteristics are not uniquely determined, therefore this circuit design is not valid.
3) Circuit design example: Is the single resistor as shown
in Figure 5 a valid circuit?
1
R1
10
1
0
Fig. 5.
R1 1 0 10
0
1
0 0
1
1 1
0
0 = 0
0 1 R1 0
0
0 0
1 0
0 1
0
0
0
e1
0
v1 = 0
i1
0
R1
10
R2
10
3
1
Fig. 6.
R1 1 2 10
R2 3 0 10
2
0
Symbolic Gaussian
1
0
0
0
0
1
0 1
0
0
0
0
1
0
0 R1
1
0
0
0
1
0
0
0
R2
0
0
0
0
0
0
0
1 0 0 0 0 0 0
0 1 0 0 0 0 0
0 0 1 0 0 0 0
0 0 0 1 0 0 0
0 0 0 0 1 0 0
0 0 0 0 0 1 0
0 0 0 0 0 0 0
e1 e2
e3
v1
v2
i1
i2
0
0
0
0
0
0
I1
1A
R1
10
2
1
I1 0 1 1
I2 1 2 1
R1 2 0 10
0
0 0 0 0 1 1
0
0
0
0 0 0 0 0 1
1
0
0
1
0
0
0
0
0
0
1 1 0 1 0 0
0
0
0
0 1 0 0 1 0
0
0
0
0
0
0
0
1
0
0
I
1
0
0 0 0 0 0
1
0
I2
0
0 0 0 1 0
0 R1 0
but after a number of elementary row operations the augmented matrix contains the row
0 0 0 0 0 0 0 0 I1 I2
We start with
0
0
0
0
1A
1
Fig. 7.
I2
Gaussian elimination
1 0 1 0 0 0 0 0
0
0 1 0 0 0 0 0 0 R1 I1
0 0 1 1 0 0 0 0 R1 I1
0 0 0 0 1 0 0 0 R1 I1
0 0 0 0 0 1 0 0
I1
0 0 0 0 0 0 1 0
I
1
0 0 0 0 0 0 0 1
I1
0 0 0 0 0 0 0 0
0
The circuits characteristics are still not uniquely determined
as any one of e 1 , v1 , or v2 could be a free variable, the other
two then being determined by:
0
e1 + v1
=
v1 + v2
R1 I1
Therefore there are no conditions under which this circuit
design is valid.
III. C ONCLUSION .
A sparse matrix circuit model can be easily constructed
from first principles and used with both numerical as well as
symbolic component values. The utility of the model has been
demonstrated in a number of ways. Carefully selected circuit
simulations can yield fundamental circuit theorems. Symbolic
Gaussian elimination applied to the model can be used to
check circuits for design validity.
ACKNOWLEDGMENT
This work was supported by a University Fellowship from
Manukau Institute of Technology and by the Department of
Mathematics at the University of Auckland.
R EFERENCES
[1] L. O. Chua, C. A. Desoer, and E. S. Kuh, Linear and Nonlinear Circuits.
New York: McGraw-Hill, 1987.
[2] J. Vlach and K. Singhal, Computer Methods for Circuit Analysis and
Design. New York: Van Nostrand Reinhold, 1983.
[3] G. Hachtel, R. Braytoni, and F. Gustavson, The sparse tableau approach
to network analysis and design, IEEE Transactions on Circuits Theory,
vol. CT-18, pp. 101113, January 1971.
[4] U. of California, spice3f5.tar.gz, July 1993, spice program source code
and documentation.
c
2004
J. Rugis
email: [email protected]