11AK37 Chassis: General Information
11AK37 Chassis: General Information
11AK37 Chassis: General Information
General Information
Used by Models
Toshiba
28 N23 B/D, 28 N33 FZ, 28 W23 B,
28 W27 B, 28 W33 B, 28 W37 B
Bush
GTV 69 W5, WS 7675.
DO NOT CHANGE ANY MODULE UNLESS
THE SET IS SWITCHED OFF
The mains supply part of the switch mode
power supplys transformer is live.
Use an isolating transformer.
The receiver complies with the safety requirements.
SAFETY PRECAUTIONS:
The service of this TV set must be carried out
by qualified persons only. Components marked
with the warning symbol on the circuit diagram
are critical for safety and must only be
replaced with an identical component.
- Power resistor and fused resistors must be
mounted in an identical manner to the
original component.
TV set switched off:
Make short-circuit between HV-CRT clip and
CRT ground layer.
Short C809 before changing IC800 and IC801
or other components in primary side of the
SMPS part.
Measurements:
Voltage readings and oscilloscope traces are
measured under the following conditions:
Antenna signals level is 60dB at the color bar
pattern from the TV pattern generator. (100%
white, 75% color saturation)
Brightness, contrast, and color are adjusted for
normal picture performance.
Mains supply, 220VAC, 50Hz.
SCART 2 PINING
1 Audio right output: 0.5Vrms / 1K
2 Audio right input: 0.5Vrms / 10K
3 Audio left output: 0.5Vrms / 1K
4 Ground AF
5 Ground Blue
6 Audio left input: 0.5Vrms / 10K
7 Blue input
8 AV switching input: 0-12VDC /10K
9 Ground Green
10 11 12 13 Ground Red
14 Ground Blanking
15 16 17 Ground CVBS output
18 Ground CVBS input
19 CVBS output: 1Vpp / 75ohm
20 CVBS input: 1Vpp / 75ohm
21 Ground
1. INTRODUCTION
11AK37 is a 110 chassis capable of driving 25,
28, 29, 33 4:3 and 28, 32 16:9 tubes at the
appropriate currents. The chassis is capable of
operating in PAL, SECAM and NTSC standards
and multiple transmission standards as B/G, D/K,
I/I, and L/L. standards. The sound system is
capable of giving 12 watts RMS output into a load
of 8 ohms. One page, 7 page SIMPLETEXT,
TOPTEXT, FASTTEXT and US Closed Caption is
also provided. The chassis is equipped with a
double-deck 42 pin scart connector for AV input/
output, front-AV input, one back-AV output, one
SVHS, one headphone and one subwoofer.
2. SMALL SIGNAL PART WITH STV2248:
STV2248 video processor is essential for realizing
all small signal functions for a color TV receiver.
SCART 1 PINING
1 Audio right output: 0.5Vrms / 1K
2 Audio right input: 0.5Vrms / 10K
3 Audio left output: 0.5Vrms / 1K
4 Ground AF
5 Ground Blue
6 Audio left input: 0.5Vrms / 10K
7 Blue input: 0.7Vpp / 75ohm
8 AV switching input: 0-12VDC /10K
9 Ground Green
10 11 Green input: 0.7Vpp / 75ohm
12 13 Ground Red
14 Ground Blanking
15 Red input: 0.7Vpp / 75ohm
16 Blanking input: 0-0.4VDC, 1-3VDC / 75 Ohm
17 Ground CVBS output
18 Ground CVBS input
19 CVBS output: 1Vpp / 75ohm
20 CVBS input: 1Vpp / 75ohm
21 Ground
OFF-AIR CHANNELS
CHANNELS
FREQUENCY
RANGE (MHz)
Low Band E2 to C
48.25 to 82.25 (1)
Mid Band E5 to E12
175.25 to 224.25
High Band E21 to E69
471.25 to 855.25 (2)
CABLE CHANNELS
CHANNELS
FREQUENCY
RANGE (MHz)
S01 to S08
69.25 to 154.25
S09 to S38
161.25 to 439.25
S39 to S41
447.25 to 463.25
Typical
5dB
5dB
6dB
Max.
9dB
9dB
9dB
Gain
Min.
All channels :
38dB
Gain Taper (of-air channels):
Typical
44dB
Max.
52dB
8dB
Typ.
6dB
6dB
6dB
Max.
9dB
10dB
11dB
Gain
Min.
All Channels
38dB
Gain Taper
(off-air channels)
Typ. Max.
44dB 50dB
8dB
11AK37 Chassis
10. SERIAL ACCESS CMOS 8K EEPROM
24C08
The 24C08 is a 8Kbit electrically erasable
programmable memory (EEPROM), organized
as 4 blocks of 256*08 bits. The memory is
compatible with the I2C standard, two wire
serial interface which uses a bi-directional data
bus and serial clock.
11. CLASS AB STEREO HEADPHONE
DRIVER TDA1308
The TDA1308 is an integrated class AB stereo
headphone driver contained in a DIP8 plastic
package.
12. CLASS AB MONO SUBWOOFER
DRIVER TDA7261
The TDA7261 is a class AB dual Audio power
amplifier, specially designed for high quality
sound applications in mono TV chassis. It is
supplied by 12VDC.
13. SAW FILTERS
Saw filter type: Model:
G1975M: PAL B/G MONO
K2966M: PAL SECAM B/G/D/K/I MONO
J1981:
PAL-I MONO
K2958M: PAL-SECAM B/G-D/K (38) MONO
K2962M: PAL-SECAM B/G/D/K/I/L/L MONO
L9653M: SECAM L/L AM MONO (AUDIO IF)
G3967M: PAL-SECAM B/G STEREO
(VIDEO IF)
G9353M: PAL-SECAM B/G STEREO
(AUDIO IF)
K3958M: PAL-SECAM B/G/D/K/I/L/L
STEREO (VIDEO IF)
K9356M: PAL-SECAM B/G/D/K/I STEREO
(AUDIO IF)
K9656M: PAL-SECAM B/G/D/K/I/L/L
STEREO (AUDIO IF)
K3958M: PAL I NICAM (VIDEO IF)
K9356M: PAL I NICAM (AUDIO IF)
M1962M: PAL M/N NTSC M MONO
M3953M: PAL M/N NTSC M STEREO
(VIDEO IF)
M9370M: PAL M/N NTSC M STEREO
(AUDIO IF)
IC DESCRIPTIONS AND INTERNAL
BLOCK DIAGRAM
ST92195
STV224X
TUNER (UV1315, UV1316, UV1336)
TDA7269A
STV9306
STV5112
MC44608
MSP 34XXG
24C08
TDA1308
SAW FILTERS
G1975M, K2966M, K2962M, L9653M,
G3962M, G9353M, K3958M, K9356M,
K9656M, K6263K, K9652M,M1962M,
M3953M, M9370M.
ST92195
The ST92195 is a member of the ST9+ family
of micro-controllers, completely developed and
produced by SGS-THOMSON Microelectronics
using a proprietary n-well HCMOS process.
The nucleus of the ST92195 is the advanced
Core, which includes the Central Processing
Unit (CPU), the ALU, the Register File and the
interrupt controller. The Core has independent
memory and register buses to add to the
efficiency of the code. A set of on-chip
peripherals form a complete system for TV set
and VCR applications:
Voltage Synthesis
VPS/WSS Slicer
Teletext Slicer
Pin 3
0V
0V
+5V
Pin 4
0V
+5V
0V
Pin 5
+5V
0V
0V
PINNING
1
- VS
2
Output1
3
+ VS
4
Output2
5
Mute
6
- VS
7
In+(2)
8
In-(2)
9
Gnd
10 In-(1)
11 In+(1)
STV9306
General description:
The STV9306 is a fully I2C controlled vertical
deflection IC designed for use in 110, 4/3 or 16/9
CRT applications. It integrates both the vertical
deflection and E/W correction circuitries necessary in design of a 110 chassis.
FEATURES
FULLY I2C CONTROLLED
DMOS POWER HALF-BRIDGE AMPLIFIER
DC COUPLED OPERATION
INTERNAL FLYBACK GENERATOR (UP TO
60V)
SELF ADAPTED SAWTOOTH (50/60Hz)
100Hz OPERATION
VERTICAL LINEARITY, AMPLITUDE AND
CENTERING ADJUSTMENTS
HORIZONTAL WIDTH, PINCUSHION, TRAPEZOID AND CORNER ADJUSTMENTS
BREATHING CORRECTION
PINNING
1. SCL
2. CRAMP
3. SDA
4. CHOLD
5. SYNC
6. VS
7. FLYBACK
8. GND
9. OUT
10. VOPS
11. EWOUT
12. SENS2
13. EWFB
14. SENS1
15. BREATHING
STV5112
General Description:
The STV5112 includes three video amplifiers
designed with a high voltage bipolar/CMOS/
DMOS technology (BCD). It drives directly the
three cathodes and is protected against
flashovers. Thanks to its three cathode current
outputs, the STV5112 can be used with both
parallel and sequential sampling applications.
Bandwidth: 8MHz TYPICAL
Supply Voltage: 220V typical
Rise and fall time: 50ns typical
CRT cathode current outputs for parallel or
sequential cut-off or drive adjustment
Flashover protection
Power dissipation: 3.6W
PINNING: PIN VALUE
1. BLUE INPUT
2. VCC LOW VOLTAGE
3. GREEN INPUT
4. RED INPUT
5. VDD HIGH VOLTAGE
6. RED CATHODE CURRENT
7. RED OUTPUT
8. GROUND
9. RED FEEDBACK
10. GREEN OUTPUT
11. GREEN CATHODE CURRENT
12. GREEN FEEDBACK
13. BLUE OUTPUT
14. BLUE CATHODE
15. BLUE FEEDBACK
MC44608
General description:
The MC44608 is a high performance voltagemode controller designed for offline converters. This high voltage circuit that integrates the
startup current source and the oscillator
capacitor, requires few external components
while offering a high flexibility and
reliability.The device also features a very high
efficiency standby management consisting of
an effective Pulsed Mode operation. This
technique enables the reduction of the stand
by power consumption to approximately 1W
while delivering 300mW in a 150W SMPS.
General Features
Flexibility
Duty cycle control
On chip oscillator switching frequency 40, or
75kHz
Secondary control with few external
components
11AK37 Chassis
Protections
Maximum duty cycle limitation
Cycle by cycle current limitation
Demagnetization (Zero current detection)
protection
Over VCC protection against open loop
Programmable low inertia over voltage
protection against open loop
Internal thermal protection
Green Line Controller
Pulsed mode techniques for a very high
efficiency low power mode
Lossless startup
Low dV/dT for low EMI radiations
PINNING: PIN VALUE
1. Demagnetization: Zero cross detection
voltage: 50-mV typ.
2. I Sense: Over current protection voltage 1V
typ.
3. Control Input: Min: 7.5V Max.: 18V
4. Ground: Iout 2Ap-p during scan 1.2Ap-p
during flyback
5. Driver: Output resistor 8.5 Ohm sink 15
Ohm source typ.
6. Supply voltage: Max:16V (Operating range
6.6V-13V)
7. No connection
8. Line Voltage: Min:50V Max:500V
MSP 34XXG
General description:
The MSP 34xxG family of single-chip Multistandard Sound Processors covers the sound
processing of all analog TV standards
worldwide, as well as the NICAM digital sound
standards.
The full TV sound processing, starting with
analog sound IF signal-in, down to processed
analog AF-out, is performed on a single chip.
Two-carrier FM systems according to the
German or Korean terrestrial specs or the
satellite specs can be processed with the MSP
34x0G. Digital demodulation and decoding of
NICAM-coded TV stereo sound, is done only
by the MSP 3410G. The MSP 34x0G offers a
powerful feature to calculate the carrier field
strength, which can be used for automatic
standard detection (terrestrial) and search
algorithms (satellite).
The MSP 3411G has all functions of the
MSP34x0G with the addition of a virtual
surround sound feature. Surround sound can
be reproduced to a certain extent with two
loudspeakers. The MSP3411G includes our
virtualizer algorithm 3D-PANORAMA which
has been approved by the Dolby Laboratories
for compliance with the Virtual Dolby Surround technology. In addition, the MSP 34x1G
includes our PANORAMA algorithm. The
MSP34x1G has built-in automatic functions:
The IC is able to detect the actual sound
standard automatically (Automatic Standard
Detection). Furthermore, pilot levels and
identification signals can be evaluated
internally with subsequent switching between
mono/ stereo/bilingual; no I2C interaction is
necessary (Automatic Sound Selection).
General Features
Two selectable analog inputs (TV and SAT-IF
sources)
Automatic Gain Control (AGC) for analog IF
input. Input range: 0.103 V pp
Integrated A/D converter for sound-IF inputs
All demodulation and filtering is performed
on chip and is individually programmable
Easy realization of all digital NICAM
standards (B/G, D/K, I & L) with MSP
3410G.
FM demodulation of all terrestrial standards
(incl. identification decoding)
FM demodulation of all satellite standards
Analog Section
Four selectable analog pairs of audio base-band
inputs (= four SCART inputs) input level: =<2 V
RMS , input impedance: >=25 kW
One analog mono input (i.e. AM sound): input
level: =<2 V RMS , input impedance: >=15 kW
Two high-quality A/D converters, S/N-Ratio:
>=85 dB
20 Hz to 20 kHz bandwidth for SCART-toSCART copy facilities
PINNING
1. N.C.
2. + VS
3. Output
4. Mute/Stby
5. - VS
6. In
7. GND
8. N.C.
24CO8
General description:
The 24C16 is a 8Kbit electrically erasable
programmable memory (EEPROM), organized as
4 blocks of 256*08 bits. The memory operates
with a power supply value as low as 2.5V.
Features:
Minimum 1 million ERASE/WRITE cycles with
over 10 years data retention
Single supply voltage:4.5 to 5.5V
Two wire serial interface, fully I2C-bus compatible
Byte and Multi-byte write (up to 8 bytes)
Page write (up to 16 bytes)
Byte, random and sequential read modes
Self timed programming cycle
PINNING: PIN VALUE
1. Write protect enable: 0V
2. Not connected: 0V
3. Chip enable input: 0V
4. Ground: 0V
5. Serial data address input/output: Input LOW
voltage: Min: -0.3V, Max : 0.3*Vcc : Input HIGH
voltage: Min : 0.7*Vcc, Max: Vcc+1
6. Serial clock: Input LOW voltage: Min : -0.3V,
Max: 0.3*Vcc : Input HIGH voltage: Min:
0.7*Vcc, Max : Vcc+1
7. Multibyte/Page write mode: Input LOW
voltage: Min: -0.3V, Max: 0.5V : Input HIGH
voltage: Min: Vcc-0.5, Max: Vcc+1
8. Supply voltage: Min: 2.5V, Max: 5.5V
TDA1308
Features:
Wide temperature range
Excellent power supply ripple rejection
Low power consumption
Short-circuit resistant
High performance
high signal-to-noise ratio
low distortion
PINNING
1. Input
2. Input-ground
3. Chip carrier-ground
4. Output
5. Output
K9656M, L9653M
PINNING
1. Input
2. Switching Input
3. Chip carrier-ground
4. Output
5. Output
AK37/TITANIUM Languages Groups
GROUP 1 - WEST
ENGLISH
FRENCH
SWEDISH
CZECH
GERMAN
PORTUGUESE
ITALIAN
RUMANIAN
GROUP 2 WEST / EAST
POLISH
FRENCH
SWEDISH
CZECH
GERMAN
SERBIAN
ITALIAN
RUMANIAN
GROUP 3 WEST / TURKEY
ENGLISH
FRENCH
SWEDISH
TURKISH
GERMAN
PORTUGUESE
ITALIAN
RUMANIAN
GROUP 4 EAST / CYRILLIC
ENGLISH
CYRILLIC
SWEDISH
CZECH
GERMAN
SERBIAN
LETTISH
RUMANIAN
GROUP 5 - ARABIC
ENGLISH
FRENCH
SWEDISH
TURKISH
GERMAN
HEBREW
ITALIAN
ARABIC
Using Remote Control Buttons
RED: Is used to switch AVL to ON or OFF mode
on service menu.
GREEN: Is used to enter the geometry menu.
YELLOW: Is used to prepare the system for
screen adjustments.
BLUE: Is used for automatic IF and AGC
adjustments.
TTX Update: Is used to change the picture mode.
CIRCUIT DESCIRIPTION
POWER SUPPLY
The ZX series of receivers incorporate a Motorola switch mode power supply using a MC 44608-regulator controller IC.
The circuit provides power to the receiver in both standby and normal operation modes.
START UP
The switch on the mains supply is fed through the mains filter network TR801, the surge limiter resistor R831, the bridge
rectifier D891, and reservoir capacitor C809 producing approx. 320 volts D.C to feed the switching MOSFET Q801 via
the primary winding of TR802 pins 6 and 8.
Start up resistor R801 feeds from a 500V coming from the mains through the adder diode D809 to pin 8 of IC800, the IC
uses 9mA current source and connects it internally to VCC at pin6 allowing a rapid charge enough for start up.
Then IC800 responds with the oscillator starting to oscillate at a 40khz frequency fixed by the IC manufacturer.
The IC then produces, pulse width modulation pulses, at this frequency on pin 5 to drive the base of the switching
FET Q801, that will then switch current on and off through the primary of TR802, which will in turn provides voltages in the
secondary windings. The secondary winding voltages being proportional to the length of time that Q801 is turned on in
each cycle. The voltage produced between pins 4 and 3 of TR802 is rectified by D804 developing approx. 12 volts on C810,
which takes over from the start up resistor to supply pin 8 of IC800.
The Demag pin at pin1 offers 3 different functions: Zero voltage crossing detection (50mV), 24mA current detection and
120mA current detection. The 24mA level is used to detect the secondary reconfiguration status and the 120mA level to
detect an Over Voltage status called Quick OVP. The VCC at pin6 operates between 6,6V and 13V in normal operation,
when this voltage exceeds 15V then the IC output is disabled.
VOLTAGE REGULATION
After initial start up the secondary voltages of TR802 are established. These voltages then need to be regulated to the
required levels. In a switch mode power supply such as this, it is the ON time of the switching FET Q801 that determines
the output voltages produced. To provide regulation of the supply there is a feedback loop via an adjustable zener IC818
and an OPTO- coupler connected to pin3 of IC800. The reference voltage of IC818 is set to 2,5V to supply a B+ voltage of
150V. Any fluctuation at this pin will cause IC800 to compensate it either by increasing or decreasing the voltage at the
secondary outputs.
VOLTAGE PROTECTION
The MC44608 offers two OVP functions:
1- A fixed function that detects when V CC is higher than 15.4V
2- A programmable function that uses the demag pin. The current flowing into the demag pin is mirrored and compared
to the reference current Iovp (120mA). -Thus this OVP is quicker than normal number one as it directly sense the change
in current rather than waiting for a specific voltage value, and is called QOVP. In both cases, once an OVP condition is
detected, the output is latched off until a new circuit STARTUP.
3- A software controlled function acts on pin52 of IC501. This pin monitors feedback from both 8V and 5V via D512, then
compares these to a reference value Vref pre-set by the hardware through resistors R545, R546, R548. In normal mode
operation 1.2V < Vref < 2.2V. Any voltage outside this window will cause the micro controller to force the TV to stand by
mode by lowering the standby port. Refer to standby mode.
CURRENT PROTECTION
To monitor the current drawn by the receiver the source of Q801 is returned to the bridge rectifier through low value
resistors R807 and R834. All the current drawn by the receiver will flow through that parallel resistors each time Q801
conducts, this will produce a voltage across the resistors proportional to the current drawn by the receiver.
This voltage is fed to pin 2 of IC800 via R806.When the receiver is working normally the voltage across R807 and R834
is only a fraction of a volt and is not large enough to have any effect on IC800. Under fault conditions, if the receiver draws
excessive current the voltage across these resistors will rise. This voltage is monitored by the current sense input pin2.
This Current Sense pin senses the voltage developed on the series resistor R806 inserted in the source of the power
MOSFET. When I sense reaches 1V, the Driver output (pin 5) is disabled. This is known as the Over Current Protection
function. A 200mA current source is flowing out of the pin 3 during the startup phase and during the switching phase in
case of the Pulsed Mode of operation. A resistor can be inserted between the sense resistor and the pin 3; thus a
programmable peak current detection can be performed during the SMPS standby mode.
SAFETY PRECAUTIONS
Remember that all the primary side components of the power supply shown to the left of TR8O2 on the diagram are live
to earth. It is recommended that a mains isolation transformer is used when servicing the receiver.
Many of the components in the power supply are safety critical. (R831,R809) are surge-limiting resistors, limiting the surge
through the degauss coils when the reservoir capacitor is empty. These are marked with an exclamation mark in a triangle
on the circuit diagram. These components MUST be replaced only with parts of identical value and safety characteristics.
For reliability, it is recommended that only genuine parts are used for service replacements. Always check the main supply
voltage feeding the line output stage after replacing parts in the power supply or line output circuit. The correct voltage is
important for safety and reliability, the correct voltage should be 150 V 2 V.
When servicing note that the reservoir capacitor C809 can remain charged to high voltage for some time after the a.c.
supply is removed. This can result in a shock hazard or damage to components whilst working on the receiver.
Do not try to test Q801 base emitter junction if C809 is charged, your meter will turn on the transistor which will
discharge the capacitor resulting in a collector emitter short circuit. Do not discharge C809 quickly with a screwdriver etc.
The very high current produced can damage the internal connections of the capacitor causing failure at a later date.
Remember when checking voltages to use a return path on the same side of TR802 for the Voltmeter earth to obtain the
correct readings.
STANDBY OPERATION
As mentioned earlier the Startup Management of MC44608 is as follows:
The Vi pin 8 of IC800 is directly connected to the HV DC rail Vin. This high voltage current source is internally connected
to the VCC pin and thus issued to charge the VCC capacitor. The VCC capacitor charge period corresponds to the
Startup phase. When the VCC voltage reaches 13V, the high voltage 9mA current source is disabled and the device
starts working. The device enters into the switching phase.
To help increase the application safety against high voltage spike on pin8 a small wattage 1k_series resistor is inserted
between the Vin rail and pin 8. After this start-up the IC can distinguish between the different modes of operation using
the following technique:
MODE TRANSITION
The LW latch is the memory of the working status at the end of every switching sequence. Two different cases must be
considered for the logic at the termination of the SWITCHING PHASE:
1. No Over Current was observed
2. An Over Current was observed
These two cases correspond to the two signals NOC in case of No Over Current and OC in case of Over Current.
The effective working status at the end of the ON time memorized in LW corresponds to Q=1 for no over current, and
Q=0 for over current.
To enter the standby mode secondary side is reconfigured using D889 loop, this starts with the microprocessor s pin
47 becomes high; as the standby port becomes high Q503 conducts and Q802 becomes off then D889 conducts and the
high voltage output value becomes lower than the NORMAL mode regulated value. The shunt regulator IC818 is fully OFF.
In the SMPS standby mode all the SMPS outputs are lowered except for the low voltage output that supply the wakeup
circuit located at the isolated side of the power supply. In that mode the secondary regulation is performed by the
Zener diode (D801) connected in parallel to the TL431. The secondary reconfiguration status can be detected on the
SMPS primary side by measuring the voltage level at pin4 of TR802.
In the SMPS standby mode the 3 distinct phases are:
The SWITCHING PHASE: Similar to the Overload mode. The current sense clamping level is reduced. When VCC
crosses the current sense section, the C.S. clamping level depends on the power to be delivered to the load during the
SMPS standby mode. Every switching sequence ON/OFF is terminated by an OC as long as the secondary Zener diode
voltage has not been reached. When the Zener voltage is reached the ON cycle is terminated by a true PWM action.
The proper SWITCHING PHASE termination must correspond to a NOC condition. The LW latch stores this NOC status.
The LATCHED OFF PHASE: The MODE latch is set.
The STARTUP PHASE is similar to the Overload Mode. The MODE latch remains in its set status (Q=1).
The SWITCHING PHASE: The Standby signal is validated and the 200uA is sourced out of the Current Sense pin 2.
SMPS SWITCH OFF
When the mains is switched OFF, so long as the electrolytic bulk capacitor provides energy to the SMPS the controller
remains in the switching phase. Then the peak current reaches its maximum peak value, the switching frequency decreases
and all the secondary voltages are reduced. The VCC voltage is also reduced. When VCC is less than 6,5V, the SMPS
stops working.
MICROPROCESSOR IC501
IC 501 controls all the functions of the receiver operated by the remote control and the front panel customer controls.
It produces the on screen graphics, operates tuning, customers controls and engineering controls, and also incorporates
all of the Teletext functions. It also controls the video processor, the audio processor, and the tuner. The circuits just
mentioned are controlled via the IC bus. Also IC501 controls the video source switching, vertical position adjustment and
the vertical linearity adjustment via its ports.
An external 8K EEprom is used by the micro. The EEprom comes fully programmed. The main clock oscillator is
4.0 MHz crystal X501 on pins 50 and 51. Reset is provided on pin 2 via Q504. On switching on pin 2 becomes high and
the controller gets reset which stays valid till a low signal comes on that pin.
CONTROLS
Command information from the infra red remote controller is fed through the sensor to pin 1 of the microprocessor.
Operation of the customer front panel keys is detected by pin 8 that is an ADC (analogue to digital converter). Pressing a
switch will connect the 5V to the ground through a particular resistor that determines the value of the voltage on pin8 at
that instant. This obtained value is comprehended by the micro and the corresponding operation is performed. Refer to the
following table:
Button
Theoretical voltage
P+
P-
1.5V
2.0V
V+
V-
3.0V
4.0V
Menu
1.0V
IC501automatically switches from TV mode to AV1, AV2 by detecting the signal from pin29 or pin8 at the scart connector,
through its 56, 55 pins. The picture mode is determined according to the following table:
Direct voltage
0 to 2.0 V
2.0 to 7.0 V
7.0 to 12 V
Voltage Incrementing
0 to 4.5 V
4.5 to 9.5
9.5 to 12
Picture mode
TV mode
16:9 Mode
4:3 Mode
TUNING
All the tuning functions are carried by the microprocessor IC501. Three tuning modes are available for this chassis,
VST tuning, PLL tuning, and frequency tuning. In all of these both manual and automatic modes are possible. If Auto
Tuning Mode is selected the receiver tunes Band 1, Band2, and UHF, putting into memory the channel, signal strength
(signals amplitude for VST and video indent for PLL), and tuning data of each TV station found. The memories are then
stored automatically to put the channels into frequency order from lowest frequency to the highest one. In APS
(Auto-Programming-System) TV sets the channels are stored according to the standard tables provided for each country.
In VST mode IC501 generates the tuning control voltage as pulse width modulation output at pin54. This pulse operates
a voltage switch Q502 converting the 0 to 5V pulse into a 0 to 33V pulses that are then integrated and smoothed by
R550/553/ 567 and C548/535/238 to give a steady DC voltage of value between 0 to 33V for tuning control on pin 2 of the
tuner. IC501 also controls the band switching of the tuner by pins 12/13/14 via Q505, Q506 and Q507 for the different
bands UHF, Band1, and Band2.
In both PLL and frequency tuning modes the tuning process is controlled by IC501 via the IC BUS. In PLL mode a
table for all the channels available is set according to the standards and the micro controller uses these values to set the
central frequency of the required channel. This mode is quicker that VST mode.
Frequency tuning is a new feature to this chassis; it takes the advantages of both VST and PLL tuning. As in PLL mode
the tuning process is controlled via IC bus, however the channels are not predefined in the software by a table on the
con trary these are scanned as in VST but here the frequency changes and not the voltage. In frequency tuning the micro
generates IC signals to account for a 1MHz frequency increment on the tuner and then scan all the frequency either
manually or automatically. This method is faster than the VST and more precise than PLL tunings.
Automatic fine tuning (AFT) correction voltage is done internally inside IC403 and fed to the microprocessor via IC BUS.
This is used by the software to modify the mark space output at pin 54 producing the tuning voltage. The AFT voltage is
also used in tuning mode to identify the presence of a signal whilst tuning. This is used in auto tuning mode to determine
the optimum frequency setting for the channel. Tuner AGC voltage from pin 8 of IC403 is taken directly to the tuner.
VOLUME CONTROL
A pulse width modulation output is developed inside the processor and is fed to the audio processor in stereo sets and
to the video processor in mono sets via the IC BUS to control the volume. The physical control on the front panel works
in the same way.
TELETEXT
The microprocessor IC501 performs all of the teletext functions internally. The Composite Blanking video and Sync
signal (CBVS) is input to pin 33 of the micro from pin 29 of IC403. When text is selected the text graphics are output as
R.G.B signals on pins 15/16/17 of the micro and fed to pins 34/35/36 of IC403. At the same time pin 18 of the micro goes
high taking pin 37 of IC403 high, blanking the picture and selecting text R.G.B. input.
Note. mixed mode is available and fast text with 8-page memory.
A.V SWITCHING
A.V. input can be selected from the remote control or by applying 6 to12 volts from pin 8 of the scart connector,
This takes pin 55/56 of the micro high (5 volts). When external A.V input is requested pin 55 or Pin 56 of the micro goes
high. This is then transmitted via the IC bus to IC403, selecting external signals from the scart connector.
SERVICE MODE
The AK37 chassis incorporates an electronic service mode operated by the micro. Full details are given on pages 20 to
25 of the service manual. The mode is entered by a combination of button presses (4-7-2-5), whilst the Main menu is on
the screen. You can select any adjustment and change it.
A list of adjustments is available such as OSD position, IF central frequency adjustment, AGC, vertical linearity, size,
position, horizontal position, R.G.B gains, APR, tuner settings for PLL tuners, and five options for the TV set features
configurations.
EEPROM INITIALIZATION
If the EPROM IC500 is replaced it will come fully programmed and therefore it is not necessary to initialise the new
device. In some circumstances the EPROM may become corrupted in use i.e. static discharge or lightning strike.
If this happens, it is advised that the EPROM is replaced.
OFF AIR SIGNAL PATH
TUNER
A UV1315 voltage controlled tuner is used on the AK37 chassis, operating from a 5volt supply, line (pin6). A 0 to 33 volt
rail is used for tuning (pin 2), controlled by the microprocessor IC501. The AFT pin on the tuner is not used, instead the
Automatic Fine Tuning is achieved by modifying the tuning control line. This is done by software in IC501. The gain of the
tuner can be altered by the AGC control voltage fed in to pin1.
The tuner produces a balanced output on pins 10,11. Neither side is connected to earth. This is fed via a surface wave
filter Z402 to the IF input of IC403 (pins 6 and 7).
IC403 incorporate the IF amplification, AFT, AGC, video and sound detectors as well as AV switching. The IC requires
both 5 and 8 V tuned circuit for these functions, L401, L402, L403, and L406.
VIDEO PATH
The detected video signal is output from pin 13 of IC403, to sound traps Z403/404. The video is taken from the other side
via the appropriate filter to pin 18 of IC403. (1.2 p to p) Video to the scart connectors is taken after R473 to Pin 40 of the
scart connector. The CVBS_TXT output pin 29 output is fed to IC501 pin 34 (for teletext). The video signal is sometimes
labelled CVBS on the circuit diagram. This stands for Composite Video Blanking & Sync.
The composite signal is input pin 13 (Video input) of IC403. This IC carries out all of the luma/Chroma processing
internally and also provides the customer control functions of brightness, contrast, sharpness and saturation. IC403 is IC
bus controlled and incorporates auto greyscale circuitry and internal luma/chroma delay lines. The resulting R.G.B drive is
output on pins 30,31 and 32. The R.G.B passes via connector PL405 to the CRT base PCB. Here the R.G.B signal is
amplified by IC900 to provide drive for the cathodes of the CRT. IC900 produces a feedback signal which is fed to IC403
(pin 33) for blanking and auto grayscale correction.
SOUND PATH
The demodulated mono sound is taken from pin 55 of IC403 directly to the sound output stage IC301 Pin 7. The output
signal from IC301 is Volume controlled achieved within IC403 using the IC bus line from IC501. To limit the volume at the
specified out put the A_out pin 55 is fed to IC301 through a voltage divider R455 and R454. Muting of the output stage is
provided from Pin 46 of IC501 to pin5 IC301.
In the stereo model the IF from pins 10 & 11 of the tuner passes through Z401 and the output signal goes through pins
1&2 of IC403. The output QSS signal from IC403 is taken from pin 11 and sent to audio processor IC700. The left channel
is output on pin 29 and the right channel output is on pin 28.Then this outputs are fed directly to IC301.
IC403 handles also the AM modulated signals in L/L systems at pins 1&2.
AV INPUT SIGNAL PATH
Video and Sound
IC403 has three CVBS inputs at pins 18,20 and 22.The composite video signal of AV1 is taken from pin 41 of the scart
connector to pin20 of IC403. The mono sound signal is taken from pins 23 and 27 of the scart sockets to the switching
transistors Q101. The transistor switch the audio depending on the source, and is then fed to pin14 of lC403. The CVBS
coming from AV2 or AV3 is taken from pin20 of scart connector, from the JK101 for BAV or FAV, from the JK102 for SVHS.
Then these signals are switched by transistors Q141; Q142 depending on the source by the microprocessors pins 5,6,7.
The resultant signal is given to pin 22 of IC403.
Scart two supports also SVHS signals and then the chroma comes from pin 15 of connector PL101 directly to pin 23 of
IC403, whilst the luma uses the same path as the CVBS of AV2.
When AV input is selected pin 5,6,7 of the microprocessor IC50 I is taken high, this switches the IC403 to external input
mode via IC BUS. This connects the video inputs on pins 20 or 22 to IC403 and the audio input on pin 14 to the audio out
on pin 55 (via the internal volume control circuit) The signal paths are then as for off air.
The chassis can detect the video signals on scart 1 and 2 using pin 8 switching voltages at pins 56 and 55 of IC501.
R.G.B
The R.G.B signals from pins 28,32 and 36 of the scart connector (PL101) are fed to the R.G.B input pins (25,26,27) of
IC403. R.G.B operation can be enabled by either taking pin 37 of the scart connector high, this high is fed to Pin 28 of
IC403, or via the lC bus the microprocessor sets IC403 to forced R.G.B mode in which the video processor generates its
own fast blank signal. This puts the IC into external R.G.B mode and selects the inputs on pins 25,26 and 27, overriding
the video input on pin 20/22.
Note: When using R.G.B input the contrast, brightness and colour controls will still operate.
LINE CIRCUIT
Line and frame drive are generated by IC403. The sync pulses are separated from the incoming video signal at pins
18/20/22 and used to control the internal circuitry of the IC. Line drive is produced by counting down the external
4.43 MHz crystal at pin 40 to15.625 kHz locked to the incoming sync. This drive is output on pin 48 and feeds directly
to the line drive transistor Q600. Note. that the output of IC403 Pin 48 is an open-collector and requires a pull up resistor,
if the pin is open circuited for test no waveform will be seen. Q600 collector feeds the line output transistor Q601.
The line output stage is conventional with a transformer containing a split diode winding for EHT generation;
fifth harmonic tuning is achieved by capacitor C618/619.
FIELD OUTPUT VERTICAL SHIFT
A fly-back pulse is taken from pin 1 of the FBT transformer. This is required by IC403 (Pin 49) for burst / sync gating,
and RGB line blanking. The ver_sync signal is output from the pin47 and fed to pin41 of IC501. The H_sync pulse is taken
from pin 1 of the FBT and fed to the micro at pin 40.These two signals are required by the micro for graphics timing and
also for text.
IC403 generates a vertical pulse signal V_OUT that is fed to IC601 (the vertical stage IC). IC601 is supplied by a 26V
DC via diode D616 and a 13V DC via diode D613 .It generates its own ramp signal and based on the V_OUT signal and
produces the vertical deflection signals that are fed to connector PL602. Horizontal adjustments (Horizontal amplitude,
pincushion, corner correction) are controlled by EW_OUT at pin 11.This output drives the transistor Q602.
B.C.L CIRCUIT (BEAM CURRENT LIMITER)
Beam current limiting is employed to protect the circuitry in the receiver, the CRT and to prevent excessive X-Ray
radiation in fault conditions. The current drawn by the CRT is monitored by the current drawn through the winding of the
fly-back transformer that produces the EHT for the CRT anode. The end of the winding (Pin 10) is returned to IC403 pin 46,
the beam current drawn by the CRT passes through Q601 and develops a voltage on the collector proportional to the
current (V=IxR). The voltage on the collector will vary depending on the beam current being drawn reducing the brightness
and contrast of the picture. If the voltage is sufficiently negative (indicating very high excess beam current) the output will
be reduced, reducing the picture brightness and contrast.
In order to enter service menu, first enter the main menu and then press the digits 4, 7, 2 and 5 respectively.
To select adjust parameters, use or buttons. To change the selected parameter, use < or > buttons.
Selected parameter will be highlighted.
Entire service menu parameters of AK37 CHASSIS are listed below. For some of parameters the default values are
given on the same table.
REGISTER PARAMETER
NOTE
OSD
IF1
IF Coarse Adjust
IF2
IF Fine Adjust
IF3
IF4
AGC
VLIN
Vertical Linearity
VS1A
VS1B
VP1
HP1
VS2A
VS2B
VP2
HP2
RGBH
VSOF
VPOF
HSOF
HPOF
HTOF
WR
WG
WB
BR
BG
APR
APR Threshold
FMP1
STEREO ONLY
NIP1
STEREO ONLY
SCP1
STEREO ONLY
FMP2
STEREO ONLY
NIP2
STEREO ONLY
SCP2
STEREO ONLY
S1V
SCART1 Volume
STEREO ONLY
S2V
SCART2 Volume
STEREO ONLY
F1H
F1L
F2H
F2L
BS1
BS2
BS3
CB
OP1
OP2
OP3
OP4
OP5
TX1
GEOM
In order to enter the geometry menu, press the green button on the remote control :
REGISTER
PARAMETER
NOTE
VSIZ
Vertical Size
VPOS
Vertical Position
VSCO
Vertical S Correction.
VCCO
Vertical C Correction.
HSIZ
Horizontal Size
HPOS
Horizontal Position.
HPCO
HCCO
HTCO
VZSZ
DADI9D86UPS
6B8DI9D86UPS
IPI@
),*85(
OPTION SETTINGS
Select concerned OPTION from service menu. To change a bit on selected option press the same number from
remote controller. So this bit will be changed from 1 to 0 or from 0 to 1. If any option is selected on service menu you
will see an indicator row shows you the bit numbers.
PQ
QrvurhyPv
IPU @
7 DU&
7 DU%
IPUVT@9
9vyh 6W"hA6W
qrshyhyr
A6W76WDIryrpvv
9vyh 6W"h76W
7 DU$
UihpxUWqrh sruryh6Wvu6Wxr
Uihpxsv6Wqrhsruryh 6W
7 DU#
TWCTvh hvyhiyrv6Wxrrh
vs6W!vryrprq
TWCTvIPUh h vyhiyrv6Wxrrh
7 DU"
SB7vh h vyhiyrv6Wxrrh
vs6W
vryrprq
SB7vIPUhhvyhi yrv6Wxrrh
7 DU!
6W"vhhvyh iyrv6Wxrrh
6W"vIP Uhhvyhiyrv6Wxrrh
7 DU
6W!vhhvyh iyrv6Wxrrh
6W!vIP Uhhvyhiyrv6Wxrrh
7 DU
6W
6W
vhhvyh iyrv6Wxrrh
vIP Uhhvyhiyrv6Wxrrh
PQ!SrprvThqhqPv
IPU@
7DU&
"ixrihqWQW
qrshyhyr
#$ixrihqWWQQHr
7DU%
GGvhhvyhiyr
GGvhhvyhiyr
7DU$
Dvhhvyhiyr
Dvhhvyhiyr
7DU#
9Fvhhvyhiyr
9Fvhhvyhiyr
7DU"
7Bvhhvyhiyr
7Bvhhvyhiyr
7DU!
"9Q6IPS6H6vvviyr
9PG7`WDSUV6Gvvviyr
7DU
ATrphGGQ@YUHPIPDIQVUvhhvyhiyr
DrqrqyhvvhhvyhiyrsT@86HGGQ
7DU
Grpvhhqivhhvyhiyr
yrpvhhqivhhvyhiyr
qrshyhyr
PQ"WvqrPv
IPU@
7DU&
Yhy8svthv
7DU%
YhyQ6G##"
!YhyQ6GIUT8##""$'
YhyQ6GT@8IUT8##"
!YhyQ6GT@8IUT8##""$'
7DU$
@hiyr7yrihpxurvthyv6Wqr
qrshyhyr
iyhxihpxurvthyv6Wqr
7DU#
XuvrDrvvPI
qrshyhyr
XuvrDrvvPAA
7DU"
7yr7hpxtqurvthyvUWqr
9vhiyr7yr7hpxtqvUWqr
7DU!
TrvhhrihpxtqsPT9
qrshyhyr
TyvqHrihpxtqsPT9
7DU
7yhpxTrpuvPI
qrshyhyr
7yhpxTrpuvPAA
7DU
6QSv PI
qrshyhyr
6QSv PAA
PQ#UWArhr
IPU@
7DU&
CrhqurvhhvyhiyrsTU@S@Pqry
Crhqurvhhvyhiyr
7DU%
6hivpQrvhvhhvyhiyrvryhthtrs69@Ahqyhr
6hivpQrvhvhhvyhiyrvryhthtr
7DU$
Crirvhhvyhiyrvryhthtrs69@Ahqyhr
Crirvhhvyhiyrvryhthtr
7DU#
CryHqrphirhpvhrq
CryHqrphirhpvhrq
7DU"
ITvthyUvrvrhiyrq
"vpqhqvpussurvthy
ITvthyUvrvqvhiyrq
7DU!
ArrpihrqrhpusQGGr
8uhryhiyrihrqrhpusQGGr
rhvtsWTUr
7DU
"ihqvtWCA WCA"VCA
qrshyhyr
ihqvtyVCA
7DU
@h!rpiyhxvtsWTU
qrshyhyr
rhiyhxvt
PQ$8uhryUhiyr
IPU@
7DU&
@h $rpiyhxvtrsWTU
qrshyhyr
rhiyhxvt
7DU%
Qthrvrv6VUPTUPS@rvvviyr
qrshyhyr
Qthrvrv6VUPTUPS@rvvvviyr
7DU$
Apriupuhryrrphvrphvrrqvhiyr
9rshyhyrhsrrr
7DU#
ArpuPT8uhryUhiyrvhhvyhiyr
urGGvhhvyhiyr
ArpuPT8uhryUhiyrvhhvyhiyr
7DU"
Arpu8uhryUhiyrvhhvyhiyr
urGGvhhvyhiyr
Arpu8uhryUhiyrvhhvyhiyr
7DU!
@tyhq8uhryUhiyrvhhvyhiyr
urDDvhhvyhiyr
@tyhq8uhryUhiyrvhhvyhiyr
7DU
@h@r8uhryUhiyrvhhvyhiyr
ur7Bvhhvyhiyr
@h@r8uhryUhiyrvhhvyhiyr
7DU
Xr@r8uhryUhiyrvhhvyhiyr
Xr@r8uhryUhiyrvhhvyhiyr
ur9Fvhhvyhiyr
UY
U ryrrPv
IPU @
7 DU&
7 DU%
S@T@SW@9ir
7 DU$
$#"UryrrGhthtrB
7 DU#
B
7 DU"
@tyvuArpuTrqvu8rpuBrhQtrrDhyvrShvh
qrshyh yr
X r
B!X r@h
QyvuArpuTrqvu8rpuBrhTrivhDhyvrShvh
B"X rU xvu
@tyvuArpuTrqvuU x vuBrhQtrrDhyvrShvh
B#@h8 vyyvp
@tyvu8vy yvpTrqvu8rpuBrhTrivhGrvuShvh
B$6hivp
@tyvuArpuTrqvuU x vuBrhCrirDhyvr6hivp
7 DU!
7 DU
@QSPHH%6
7 DU
9rvprrryrpv
qrshyhyr
SPHC$Q
SPHG@TTC$Q
@QSPHH%S
SPHH%S
PT9@QSPHH%S
SPHH%Q
Srhq6BhvUh iyrsurqrvp rs@@QSP H
B@PH
Br
rPv
IPU@
7DU&
7DU%
IPUVT@9
TWCThqvvvA6W76Wv
TWCTv6W!
7DU$
6F"&hqwrhyrhrhyvqqrshys6F"&
6F"hqwrhyrhrhyvq
7DU#
aqrvhhvyhiyr
aqrvhhvyhiyr
7DU"
Tivyrqrvhhvyhiyr
Tivyrqrvhhvyhiyr
7DU!
8vrhqrvhhvyhiyr
8vrhqrvhhvyhiyr
7DU
#)(qrvhhvyhiyr
#)(qrvhhvyhiyr
7DU
%)(irvrq
#)"irvrq
qrshyhyr
qrshyhyr
% 3
8 0
6 $
'
"
6
9
U
Q
H
6
Q
C
$
'
7
3
8 0
$ $
$
$
'
7
D
P
I
P
H
% 3
* 0
5 $
9
7
6
&
9
7
6
7
6
H
W
I
2
(
'
,
9
5
2
6
6
(
&
2
5
3
5
(
/
2/
52
&5
, 7
01
2
&
9
6
Q
`
@
F
)
,
5 3
( 0
9 $
S
P
T
I
@
T
S
D
9
7
6
W
$
U
7
A
(
9
,
5
'
)
'
8
%
T
U
D
V
8
S
D
P 8
@
9 B
D
I
W D
C
8
U
D
X
T
9
V
9
V
6
W
!
T
Q
H
T
W
!
/
$
7
1
2
=
,
5
2
+
W
V
"
$
"
9 `
7
I G
V
P
P
9
T
G
P 6
@ V
S U
@ S
D
U
W
T
B B
Y
# #
"
"
Q Q
T T
H H
S
@
I
V
U
U
T
W
G
G
Q
5
(2
&&
, 7
9(
51
(1
62
&
W
'
6 +96
9$% 9$
)
7 5$&6
7
W
$
7 5$&6
W
$
'
8
%
H #
#
Notes
OSD
IF1
IF Coarse Adjust
IF2
IF Fine Adjust
IF3
IF4
AGC
VLIN
Vertical Linearity
VS1A
VS1B
VP1
HP1
VS2A
VS2B
VP2
HP2
RGBH
VSOF
VPOF
HSOF
HPOF
HTOF
WR
WG
WB
BR
BG
APR
APR Threshold
FMP1
NIP1
STEREO ONLY
SCP1
STEREO ONLY
FMP2
STEREO ONLY
STEREO ONLY
NIP2
STEREO ONLY
SCP2
STEREO ONLY
S1V
SCART1 Volume
STEREO ONLY
S2V
SCART2 Volume
STEREO ONLY
F1H
F1L
F2H
F2L
BS1
BS2
BS3
CB
Control Byte
OP1
OP2
OP3
OP4
OP5
TX1
OPTION LIST
OP1 Peripheral Options
7
NOT USED
1, Display
AV-3as
F-AV
0, Display
AV-3as
B-AV
1, Turn back TV mode after the last AV (with AV key)
0, Turn back first AV mode after the last AV
1, SVHS is available in AV key stream
0, SVHS is NOT available in AV key stream
1, RGB is available in AV key stream
0, RGB is NOT available in AV key stream
1, AV-3 is available in AV key stream
0, AV-3 is NOT available in AV key stream
6
5
4
3
2
1
1,
0,
0 1,
0,
AV-2
AV-2
AV-1
AV-1
is
is
is
is
1,
0,
1,
0,
1,
0,
1,
0,
1,
0,
1,
0,
6
5
4
3
2
1
1,
0,
0 1,
0,
Xtal Configuration
00, 1 Xtal PAL 4.43
01, 2 Xtal PAL/NTSC 4.43/3.58
10, 1 Xtal PAL/SEC/NTSC 4.43
11, 2 Xtal PAL/SEC/NTSC 4.43/3.58
5
1, Enable Blue back when no signal in AV modes
0, No blue back in AV modes
4
1, White Insertion is ON
0, White Insertion is OFF
3
1, Blue Background when no signal
0, Disable Blue Background
2
1, Semi-transparent background for menu
0, Solid Menu background for menu
1
1, Black Stretch is ON
0, Black Stretch is OFF
0 1, APR is ON
0, APR is OFF
OP4 TV Features
7
1,
0,
1,
0,
1,
0,
6
5
4
3
2
1
Extra 150 msec blanking more for VST (if OP4.b0 = 1, to SECAM color problem)
no-extra blanking
1,
0,
1,
0,
1,
0,
1,
0,
6
5 4 3
NOT USED
1, SVHS audio input in FAV/BAV in
0, SVHS in AV2
6
5
1,
0,
4
1,
0,
3
1,
0,
2
1,
0,
1
1,
0,
0 1,
0,
TUNER SETTINGS
VHF1-VHF3
VHF3-UHF
Frq. (Mhz)
Frq. (Mhz)
F1H
F2H
F2L
BS1
156,25 MHz
441,25 MHz
00001100
00110010
00011110
00000010
00000001
Thomson CTT5020
114,25 MHz
401,25 MHz
00001001
10010010
00011011
10000010
00000011
Samsung TECC2949PG28B
170,25 MHz
465,25 MHz
00001101
00010010
00011111
10000010
00000001
Samsung TECC2949PG35B
170,25 MHz
449,25 MHz
00001101
00010010
00011110
10000010
00000001
Alps TEDE9X226A
142,25 MHz
425,25 MHz
00001011
01010010
00011101
00000010
00000001
Alps TEDE9-004A
149,25 MHz
424,25 MHz
00001011
11000010
00011100
11110010
00000001
Explanations
F1H
F1L
F2H
F2L
BS1
BS2
BS3
CB
41
1
,2
7
&
(
/
)
(
'
11AK37-5
11AK37-6
11AK37-7
11AK37-8
11AK37-9