Scribd Logo
Upload

Welcome to Scribd!

  • 75 views

    PIC16F627A/628A/648A: 4.0 Memory Organization

    Uploaded by

    Andrés Gilberto Catalán Hernández
    PIC16F627A / 628A has a 13-bit program counter capable of addressing an 8K x 14 program memory space. The data memory is partitioned into four banks, which contain the general purpose registers and the Special Function Registers (SFR's) addresses F0h-FFh, 170h-17Fh and 1F0h-1FFh are implemented as common RAM and mapped back to addresses 70h-7Fh.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd

    PIC16F627A/628A/648A: 4.0 Memory Organization

    Uploaded by

    Andrés Gilberto Catalán Hernández
    75 views2 pages
    PIC16F627A / 628A has a 13-bit program counter capable of addressing an 8K x 14 program memory space. The data memory is partitioned into four banks, which contain the general purpose registers and the Special Function Registers (SFR's) addresses F0h-FFh, 170h-17Fh and 1F0h-1FFh are implemented as common RAM and mapped back to addresses 70h-7Fh.

    Original Title

    4

    Copyright

    © © All Rights Reserved

    Available Formats

    PDF, TXT or read online from Scribd

    Did you find this document useful?

    Is this content inappropriate?

    PIC16F627A / 628A has a 13-bit program counter capable of addressing an 8K x 14 program memory space. The data memory is partitioned into four banks, which contain the general purpose registers and the Special Function Registers (SFR's) addresses F0h-FFh, 170h-17Fh and 1F0h-1FFh are implemented as common RAM and mapped back to addresses 70h-7Fh.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    75 views2 pages

    PIC16F627A/628A/648A: 4.0 Memory Organization

    Uploaded by

    Andrés Gilberto Catalán Hernández
    PIC16F627A / 628A has a 13-bit program counter capable of addressing an 8K x 14 program memory space. The data memory is partitioned into four banks, which contain the general purpose registers and the Special Function Registers (SFR's) addresses F0h-FFh, 170h-17Fh and 1F0h-1FFh are implemented as common RAM and mapped back to addresses 70h-7Fh.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 2

    2002 Microchip Technology Inc.

    Preliminary DS40044A-page 15
    PIC16F627A/628A/648A
    4.0 MEMORY ORGANIZATION
    4.1 Program Memory Organization
    The PIC16F627A/628A/648A has a 13-bit program
    counter capable of addressing an 8K x 14 program
    memory space. Only the first 1K x 14 (0000h - 03FFh)
    for the PIC16F627A, 2K x 14 (0000h - 07FFh) for the
    PIC16F628A and 4K x 14 (0000h - 0FFFh) for the
    PIC16F648A are physically implemented. Accessing a
    location above these boundaries will cause a wrap-
    around within the first 1K x 14 space (PIC16F627A), 2K
    x 14 space (PIC16F628A) or 4K x 14 space
    (PIC16F648A). The RESET vector is at 0000h and the
    interrupt vector is at 0004h (Figure 4-1).
    FIGURE 4-1: PROGRAM MEMORY MAP
    AND STACK
    4.2 Data Memory Organization
    The data memory (Figure 4-2 and Figure 4-3) is
    partitioned into four banks, which contain the general
    purpose registers and the Special Function Registers
    (SFR). The SFRs are located in the first 32 locations of
    each Bank. There are general purpose registers imple-
    mented as static RAM in each Bank. Table 4-1 lists the
    general purpose register available in each of the four
    banks.
    TABLE 4-1: GENERAL PURPOSE STATIC
    RAM REGISTERS
    Addresses F0h-FFh, 170h-17Fh and 1F0h-1FFh are
    implemented as common RAM and mapped back to
    addresses 70h-7Fh.
    Table 4-2 lists how to access the four banks of registers
    via the STATUS Register bits RP1 and RP0.
    TABLE 4-2: ACCESS TO BANKS OF
    REGISTERS
    4.2.1 GENERAL PURPOSE REGISTER
    FILE
    The register file is organized as 224 x 8 in the
    PIC16F627A/628A and 256 x 8 in the PIC16F648A.
    Each is accessed either directly or indirectly through
    the File Select Register (FSR), See Section 4.4.
    PC<12:0>
    13
    000h
    0004
    0005
    03FFh
    1FFFh
    Stack Level 1
    Stack Level 8
    RESET Vector
    Interrupt Vector
    On-chip Program
    Memory
    CALL, RETURN
    RETFIE, RETLW
    Stack Level 2
    07FFh

    PIC16F627A,
    PIC16F628A and
    PIC16F648A
    On-chip Program
    Memory
    PIC16F628A and
    PIC16F648A
    On-chip Program
    Memory
    PIC16F648A only
    0FFFh
    PIC16F627A/628A PIC16F648A
    Bank0 20-7Fh 20-7Fh
    Bank1 A0h-FF A0h-FF
    Bank2 120h-14Fh, 170h-17Fh 120h-17Fh
    Bank3 1F0h-1FFh 1F0h-1FFh
    RP1 RP0
    Bank0 0 0
    Bank1 0 1
    Bank2 1 0
    Bank3 1 1
    PIC16F627A/628A/648A
    DS40044A-page 16 Preliminary 2002 Microchip Technology Inc.
    FIGURE 4-2: DATA MEMORY MAP OF THE PIC16F627A AND PIC16F628A
    Indirect addr.
    (1)
    TMR0
    PCL
    STATUS
    FSR
    PORTA
    PORTB
    PCLATH
    INTCON
    PIR1
    TMR1L
    TMR1H
    T1CON
    TMR2
    T2CON
    CCPR1L
    CCPR1H
    CCP1CON
    OPTION
    PCL
    STATUS
    FSR
    TRISA
    TRISB
    PCLATH
    INTCON
    PIE1
    PCON
    PR2
    00h
    01h
    02h
    03h
    04h
    05h
    06h
    07h
    08h
    09h
    0Ah
    0Bh
    0Ch
    0Dh
    0Eh
    0Fh
    10h
    11h
    12h
    13h
    14h
    15h
    16h
    17h
    18h
    19h
    1Ah
    1Bh
    1Fh
    80h
    81h
    82h
    83h
    84h
    85h
    86h
    87h
    88h
    89h
    8Ah
    8Bh
    8Ch
    8Dh
    8Eh
    8Fh
    90h
    91h
    92h
    93h
    94h
    95h
    96h
    97h
    98h
    99h
    9Ah
    9Bh
    9Ch
    9Dh
    9Eh
    9Fh
    20h
    A0h
    7Fh FFh
    Bank 0 Bank 1
    Unimplemented data memory locations, read as '0'.
    Note 1: Not a physical register.
    File
    Address
    Indirect addr.
    (1)
    Indirect addr.
    (1)
    PCL
    STATUS
    FSR
    PCLATH
    INTCON
    PCL
    STATUS
    FSR
    PCLATH
    INTCON
    100h
    101h
    102h
    103h
    104h
    105h
    106h
    107h
    108h
    109h
    10Ah
    10Bh
    10Ch
    10Dh
    10Eh
    10Fh
    180h
    181h
    182h
    183h
    184h
    185h
    186h
    187h
    188h
    189h
    18Ah
    18Bh
    18Ch
    18Dh
    18Eh
    18Fh
    17Fh 1FFh
    Bank 2 Bank 3
    Indirect addr.
    (1)
    TMR0 OPTION
    RCSTA
    TXREG
    RCREG
    CMCON
    TXSTA
    SPBRG
    VRCON
    General
    Purpose
    Register
    1EFh
    1F0h
    accesses
    70h - 7Fh
    EFh
    F0h
    accesses
    70h-7Fh
    16Fh
    170h
    accesses
    70h-7Fh
    80 Bytes
    EEDATA
    EEADR
    EECON1
    EECON2
    (1)
    General
    Purpose
    Register
    80 Bytes
    General
    Purpose
    Register
    48 Bytes
    11Fh
    120h
    14Fh
    150h
    6Fh
    70h
    16 Bytes
    PORTB TRISB
    1Ch
    1Dh
    1Eh

    You might also like