Paolo Fabio Zaino’s Post

IBM Breakthrough Brings Fiber Optic Speed to AI Computing Chips By 8,000% Scientists at IBM Research have made a breakthrough in developing a new technology that could revolutionize the way computers communicate with each other. Led by the Chiplet and Advanced Packaging team, they have created a system called co-packaged optics, which enables much denser connections between optical fibers and silicon chips. This innovation can potentially increase bandwidth by as much as 8,000% and reduce production costs. #quantum #quantumcomputing #technology https://lnkd.in/eeGCCXPx

IBM gave the world a present yesterday in the form of a co-packed optical module that's poised to bring a seismic shift in efficiency to data centers and hyperscalers focused on high-compute workloads, like training AI models. Scientists at IBM Research announced a series of breakthroughs in chip assembly and packaging that promises to bring optical link connections right down to the device (chip) level. Their approach increases the number of optical fibers that can be connected at the edge of a chip using the world’s first polymer optical waveguide. Tests show that switching from conventional electrical interconnects to co-packaged optics can dramatically speed up model training, reduce energy costs for training AI models, and dramatically increase efficiency, which bodes well for operators who are facing rising pressure from customers looking to train models in the trillions of parameters. 🤯 Now, there are companies other than IBM working on similar solutions. However, this announcement reinforces the importance and URGENCY of solutions needed to usher the compute and networking sectors of the semiconductor into the "Age of AI" Whether you believe in Santa (or you're too old for that 😉), IBM has just delivered the gift that will keep on giving all year long, and this makes me extremely excited to see the photonics landscape grow and evolve in 2025. #semiconductorindustry #photonics #artificialintelligence

Fast efficient processors are the key to making AI a more practical solution for many problems and applications.

A quick look behind the scenes of AIU Spyre testing. The coolest thing is the ability to measure power utilization, of an AI model running on Spyre, on a per layer basis... this enables our compiler team to quickly see the results of their optimization work so they can consider performance, power, accuracy and other key metrics in efforts to enable the best overall efficiency for a specific workload. Great video JohnDavid Lancaster !!!

#AI #chips are called AI accelerators or computing cards, which are modules specifically designed to accelerate a large number of computing tasks in AI applications (other non-computing tasks are still handled by the CPU). In addition to AI acceleration chips represented by GPU, FPGA, and ASIC (based on traditional chip architecture, AI calculation acceleration for certain types of specific algorithms or scenarios), there are also more cutting-edge research, such as brain-inspired chips and reconfigurable general AI. Chips, etc. (but there is still a long way to go before large-scale commercialization). AI chips represented by GPU, FPGA, and ASIC are currently technology routes that can be commercialized on a large scale and are the main battlefield for AI chips. This type of AI chip is mainly discussed in the following article. 1. Classify AI chips from two dimensions Dimension 1: Deployment location (cloud, terminal) There are two locations where AI chips are deployed: cloud and terminal. Therefore, depending on the deployment location, AI chips can be divided into: cloud AI chips and end AI chips. Dimension 2: Undertake tasks (training, reasoning) The implementation of AI includes two links: training and reasoning. Therefore, according to different tasks, AI chips can be divided into: training chips used to build neural network models, and inference chips that use neural network models to perform inference predictions. #electronics #electric #chip #supplychain #purchasing #oemsupplier #oemfactory #emsmanufacturer #pcbassembly #icchips

How AI is Reshaping Chip Design 4 Key Collaborations Driving the Future The semiconductor industry is transforming as AI demands drive innovation in chip design. Key collaborations are shaping this evolution: LG and Tenstorrent are enhancing AI chip development for smarter appliances; Egis, Alcor Micro, and Arm are accelerating chip production with Neoverse CSS; OpenAI is creating custom chips with Broadcom and TSMC to handle massive computational needs; and Sondrel is advancing high-performance computing with cutting-edge designs for data centers. Neoverse Compute Subsystems (CSS) is Arm's pre-validated platform of scalable building blocks for designing high-performance, customizable, and energy-efficient processors tailored to AI, HPC, and cloud computing needs. These efforts highlight a shift toward more scalable, efficient AI hardware, which has profound implications for IT professionals, businesses, and end-users. My Take AI's role in shaping hardware is as transformative as its influence on software. The partnerships outlined in this article emphasize the critical need for businesses to innovate and invest in AI-driven hardware solutions to remain competitive in an increasingly AI-first world. #AI #Semiconductors #ChipDesign #Innovation #HighPerformanceComputing #AIHardware #TechNews #ITProfessionals Link to article: https://lnkd.in/eecQG5iN Credit: Hardware Busters, EDN Get Ahead with the Latest Tech Insights! Explore my blog: https://lnkd.in/eWESid86

#AI #chips are called AI accelerators or computing cards, which are modules specifically designed to accelerate a large number of computing tasks in AI applications (other non-computing tasks are still handled by the CPU). In addition to AI acceleration chips represented by GPU, FPGA, and ASIC (based on traditional chip architecture, AI calculation acceleration for certain types of specific algorithms or scenarios), there are also more cutting-edge research, such as brain-inspired chips and reconfigurable general AI. Chips, etc. (but there is still a long way to go before large-scale commercialization). AI chips represented by GPU, FPGA, and ASIC are currently technology routes that can be commercialized on a large scale and are the main battlefield for AI chips. This type of AI chip is mainly discussed in the following article. 1. Classify AI chips from two dimensions Dimension 1: Deployment location (cloud, terminal) There are two locations where AI chips are deployed: cloud and terminal. Therefore, depending on the deployment location, AI chips can be divided into: cloud AI chips and end AI chips. Dimension 2: Undertake tasks (training, reasoning) The implementation of AI includes two links: training and reasoning. Therefore, according to different tasks, AI chips can be divided into: training chips used to build neural network models, and inference chips that use neural network models to perform inference predictions. #electronics #electric #chip #supplychain #purchasing #oemsupplier #oemfactory #emsmanufacturer #pcbassembly #icchips

"Celestial AI Inc., a startup that develops optical technology for linking together processors and memory modules, has secured $175 million in new funding. The announcement of the Series C round today comes shortly after the company’s disclosure that it has multiple hyperscale and semiconductor industry customers. Two major semiconductor suppliers, Samsung Electronics Co. Ltd. and AMD Inc., participated in Celestial AI’s new round. They were joined by more than a half-dozen other backers, including US Innovative Technology Fund, which led the investment." ... "Current AI processors’ limited memory capacity stems from space constraints. Because of various technical considerations, chipmakers can only place HBM3 [High Bandwidth Memory] modules immediately next to a processor at a distance of a few millimeters. That means there’s relatively little space available for RAM, which limits the amount of memory capacity a chip can provide. Celestial AI’s Photonic Fabric solves the challenge by allowing HBM3 modules to be placed at a greater distance from processors. Data travels to and from those modules in the form of light. According to Celestial AI, its hardware can work with not only HBM3 but also HBM4, an upcoming iteration of the memory technology that is expected to deliver a significant performance increase."

Anyone who is an 80's baby, and has noticed their computer going extra slow when running AI tool or two on their computer, will think they are Back to the Future. Cerebras, in nVIDIA's new AI supercomputer chip and the biggest in the world. With 2.6 TRILLION transistors, providing 850,000 cores optimized for tensor computing. Each wafer/chip has 40GB of high-speed static RAM spread throughout the chip with a bandwidth of (hold on to your hat) 20 Petabytes per second. The interconnect providing the communications infrastructure to that wafer has (still holding your hat?) 220 Petabytes per second. My Monday article will be all about security, risk frameworks, and AI chips. AI architecture and processing have a significant impact on data security, audit processes, and hardware performance. I have often talked about the importance of Data, security, and audit in AI for Human Resources but, I am now looking into the impact of AI architecture and processing as well as the hardware requirements for businesses. Our current hardware cannot truly deliver the best AI performance, even if we advance in innovating the architectural innovation of AI processors. What should CIOS need to consider to support the existing HR technology strategy? #ai #innovation #hrtechnology #technology

IBM Breakthrough Brings Fiber Optic Speed to AI Computing Chips By 8,000% Scientists at IBM Research have made a breakthrough in developing a new technology that could revolutionize the way computers communicate with each other. Led by the Chiplet and Advanced Packaging team, they have created a system called co-packaged optics, which enables much denser connections between optical fibers and silicon chips. This innovation can potentially increase bandwidth by as much as 8,000% and reduce production costs. #quantum #quantumcomputing #technology https://lnkd.in/eeGCCXPx