#Intel Vs. #Samsung Vs. #TSMC #Foundry competition heats up in three dimensions and with novel technologies as planar scaling benefits diminish 💡 The three leading-edge #foundries — Intel, Samsung, and TSMC — have started filling in some key pieces in their roadmaps, adding aggressive delivery dates for future generations of #chip #technology and setting the stage for significant improvements in performance with faster delivery time for custom designs. Unlike in the past, when a single industry roadmap dictated how to get to the next process node, the three largest #foundries increasingly are forging their own paths. They all are heading in the same general direction with 3D #transistors and packages, a slew of enabling and expansive technologies, and much larger and more diverse ecosystems. But some key differences are emerging in their methodologies, architectures, and third-party enablement. Roadmaps for all three show that transistor scaling will continue at least into the 18/16/14 angstrom range, with a possible move from #nanosheets and forksheet FETs, followed by complementary FETs (CFETs) at some point in the future. The key drivers are #AI / #ML and the explosion of #data that needs to be processed, and in most cases these will involve arrays of processing elements, usually with high levels of redundancy and homogeneity, in order to achieve higher yields. A big thank you again to Ed Sperling and Semiconductor Engineering for the full article with more background and insights via the link below 💡🙏👇 https://lnkd.in/eWbsgkMs #semiconductorindustry #semiconductormanufacturing #tech #it #chips #innovation #semiconductors #taiwan #southkorea #usa #japan #ai #iot #automotivetechnology #adas #datacenter #computer #it #germany
Ed Sperling
4mo
Marco, thanks for sharing
Very informative
Good one to read and enjoy!
Jian Zhang, PhD
4mo
Interesting!
Raghuraman R
4mo
Afaik, 'chiplet' integration has not been a smooth take-off and imo, IDM looks pragmatic. Undue focus/emphasis on < 5nm has taken the eyes, if not radar, off the 'BoW' (as the article mentions, it is exactly nothing but bunch of wires) - not withstanding the other issues in micro bump, power (de)scaling issues🤔 #hvm may have to wait (longer). Those who want to announce/hop-in early, better empty out their pockets first (for a higher #nre) 🤐
Jeff Morrison
3mo
Here's a post that takes a very comprehensive look at Intel problems with Process Maturity on 7nm/Intel 4 and Intel 3. https://www.linkedin.com/posts/jeff-morrison-16313b41_this-is-an-example-demonstrating-one-half-activity-7221389595668627456-tkAg?utm_source=share&utm_medium=member_desktop
Director at Silent Mode Startup
4moIntel forgot to add TSMC for all their advanced nodes on their roadmap.