clang  3.8.0
CodeGen/TargetInfo.cpp
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1 //===---- TargetInfo.cpp - Encapsulate target details -----------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // These classes wrap the information about a call or function
11 // definition used to handle ABI compliancy.
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #include "TargetInfo.h"
16 #include "ABIInfo.h"
17 #include "CGCXXABI.h"
18 #include "CGValue.h"
19 #include "CodeGenFunction.h"
20 #include "clang/AST/RecordLayout.h"
23 #include "llvm/ADT/StringExtras.h"
24 #include "llvm/ADT/Triple.h"
25 #include "llvm/IR/DataLayout.h"
26 #include "llvm/IR/Type.h"
27 #include "llvm/Support/raw_ostream.h"
28 #include <algorithm> // std::sort
29 
30 using namespace clang;
31 using namespace CodeGen;
32 
34  llvm::Value *Array,
36  unsigned FirstIndex,
37  unsigned LastIndex) {
38  // Alternatively, we could emit this as a loop in the source.
39  for (unsigned I = FirstIndex; I <= LastIndex; ++I) {
40  llvm::Value *Cell =
41  Builder.CreateConstInBoundsGEP1_32(Builder.getInt8Ty(), Array, I);
42  Builder.CreateAlignedStore(Value, Cell, CharUnits::One());
43  }
44 }
45 
49 }
50 
52 ABIInfo::getNaturalAlignIndirect(QualType Ty, bool ByRef, bool Realign,
53  llvm::Type *Padding) const {
54  return ABIArgInfo::getIndirect(getContext().getTypeAlignInChars(Ty),
55  ByRef, Realign, Padding);
56 }
57 
60  return ABIArgInfo::getIndirectInReg(getContext().getTypeAlignInChars(Ty),
61  /*ByRef*/ false, Realign);
62 }
63 
65  QualType Ty) const {
66  return Address::invalid();
67 }
68 
70 
72  CGCXXABI &CXXABI) {
73  const CXXRecordDecl *RD = dyn_cast<CXXRecordDecl>(RT->getDecl());
74  if (!RD)
75  return CGCXXABI::RAA_Default;
76  return CXXABI.getRecordArgABI(RD);
77 }
78 
80  CGCXXABI &CXXABI) {
81  const RecordType *RT = T->getAs<RecordType>();
82  if (!RT)
83  return CGCXXABI::RAA_Default;
84  return getRecordArgABI(RT, CXXABI);
85 }
86 
87 /// Pass transparent unions as if they were the type of the first element. Sema
88 /// should ensure that all elements of the union have the same "machine type".
90  if (const RecordType *UT = Ty->getAsUnionType()) {
91  const RecordDecl *UD = UT->getDecl();
92  if (UD->hasAttr<TransparentUnionAttr>()) {
93  assert(!UD->field_empty() && "sema created an empty transparent union");
94  return UD->field_begin()->getType();
95  }
96  }
97  return Ty;
98 }
99 
101  return CGT.getCXXABI();
102 }
103 
105  return CGT.getContext();
106 }
107 
108 llvm::LLVMContext &ABIInfo::getVMContext() const {
109  return CGT.getLLVMContext();
110 }
111 
112 const llvm::DataLayout &ABIInfo::getDataLayout() const {
113  return CGT.getDataLayout();
114 }
115 
117  return CGT.getTarget();
118 }
119 
121  return false;
122 }
123 
125  uint64_t Members) const {
126  return false;
127 }
128 
130  return false;
131 }
132 
133 void ABIArgInfo::dump() const {
134  raw_ostream &OS = llvm::errs();
135  OS << "(ABIArgInfo Kind=";
136  switch (TheKind) {
137  case Direct:
138  OS << "Direct Type=";
139  if (llvm::Type *Ty = getCoerceToType())
140  Ty->print(OS);
141  else
142  OS << "null";
143  break;
144  case Extend:
145  OS << "Extend";
146  break;
147  case Ignore:
148  OS << "Ignore";
149  break;
150  case InAlloca:
151  OS << "InAlloca Offset=" << getInAllocaFieldIndex();
152  break;
153  case Indirect:
154  OS << "Indirect Align=" << getIndirectAlign().getQuantity()
155  << " ByVal=" << getIndirectByVal()
156  << " Realign=" << getIndirectRealign();
157  break;
158  case Expand:
159  OS << "Expand";
160  break;
161  }
162  OS << ")\n";
163 }
164 
165 // Dynamically round a pointer up to a multiple of the given alignment.
167  llvm::Value *Ptr,
168  CharUnits Align) {
169  llvm::Value *PtrAsInt = Ptr;
170  // OverflowArgArea = (OverflowArgArea + Align - 1) & -Align;
171  PtrAsInt = CGF.Builder.CreatePtrToInt(PtrAsInt, CGF.IntPtrTy);
172  PtrAsInt = CGF.Builder.CreateAdd(PtrAsInt,
173  llvm::ConstantInt::get(CGF.IntPtrTy, Align.getQuantity() - 1));
174  PtrAsInt = CGF.Builder.CreateAnd(PtrAsInt,
175  llvm::ConstantInt::get(CGF.IntPtrTy, -Align.getQuantity()));
176  PtrAsInt = CGF.Builder.CreateIntToPtr(PtrAsInt,
177  Ptr->getType(),
178  Ptr->getName() + ".aligned");
179  return PtrAsInt;
180 }
181 
182 /// Emit va_arg for a platform using the common void* representation,
183 /// where arguments are simply emitted in an array of slots on the stack.
184 ///
185 /// This version implements the core direct-value passing rules.
186 ///
187 /// \param SlotSize - The size and alignment of a stack slot.
188 /// Each argument will be allocated to a multiple of this number of
189 /// slots, and all the slots will be aligned to this value.
190 /// \param AllowHigherAlign - The slot alignment is not a cap;
191 /// an argument type with an alignment greater than the slot size
192 /// will be emitted on a higher-alignment address, potentially
193 /// leaving one or more empty slots behind as padding. If this
194 /// is false, the returned address might be less-aligned than
195 /// DirectAlign.
197  Address VAListAddr,
198  llvm::Type *DirectTy,
199  CharUnits DirectSize,
200  CharUnits DirectAlign,
201  CharUnits SlotSize,
202  bool AllowHigherAlign) {
203  // Cast the element type to i8* if necessary. Some platforms define
204  // va_list as a struct containing an i8* instead of just an i8*.
205  if (VAListAddr.getElementType() != CGF.Int8PtrTy)
206  VAListAddr = CGF.Builder.CreateElementBitCast(VAListAddr, CGF.Int8PtrTy);
207 
208  llvm::Value *Ptr = CGF.Builder.CreateLoad(VAListAddr, "argp.cur");
209 
210  // If the CC aligns values higher than the slot size, do so if needed.
211  Address Addr = Address::invalid();
212  if (AllowHigherAlign && DirectAlign > SlotSize) {
213  Addr = Address(emitRoundPointerUpToAlignment(CGF, Ptr, DirectAlign),
214  DirectAlign);
215  } else {
216  Addr = Address(Ptr, SlotSize);
217  }
218 
219  // Advance the pointer past the argument, then store that back.
220  CharUnits FullDirectSize = DirectSize.RoundUpToAlignment(SlotSize);
221  llvm::Value *NextPtr =
222  CGF.Builder.CreateConstInBoundsByteGEP(Addr.getPointer(), FullDirectSize,
223  "argp.next");
224  CGF.Builder.CreateStore(NextPtr, VAListAddr);
225 
226  // If the argument is smaller than a slot, and this is a big-endian
227  // target, the argument will be right-adjusted in its slot.
228  if (DirectSize < SlotSize && CGF.CGM.getDataLayout().isBigEndian()) {
229  Addr = CGF.Builder.CreateConstInBoundsByteGEP(Addr, SlotSize - DirectSize);
230  }
231 
232  Addr = CGF.Builder.CreateElementBitCast(Addr, DirectTy);
233  return Addr;
234 }
235 
236 /// Emit va_arg for a platform using the common void* representation,
237 /// where arguments are simply emitted in an array of slots on the stack.
238 ///
239 /// \param IsIndirect - Values of this type are passed indirectly.
240 /// \param ValueInfo - The size and alignment of this type, generally
241 /// computed with getContext().getTypeInfoInChars(ValueTy).
242 /// \param SlotSizeAndAlign - The size and alignment of a stack slot.
243 /// Each argument will be allocated to a multiple of this number of
244 /// slots, and all the slots will be aligned to this value.
245 /// \param AllowHigherAlign - The slot alignment is not a cap;
246 /// an argument type with an alignment greater than the slot size
247 /// will be emitted on a higher-alignment address, potentially
248 /// leaving one or more empty slots behind as padding.
250  QualType ValueTy, bool IsIndirect,
251  std::pair<CharUnits, CharUnits> ValueInfo,
252  CharUnits SlotSizeAndAlign,
253  bool AllowHigherAlign) {
254  // The size and alignment of the value that was passed directly.
255  CharUnits DirectSize, DirectAlign;
256  if (IsIndirect) {
257  DirectSize = CGF.getPointerSize();
258  DirectAlign = CGF.getPointerAlign();
259  } else {
260  DirectSize = ValueInfo.first;
261  DirectAlign = ValueInfo.second;
262  }
263 
264  // Cast the address we've calculated to the right type.
265  llvm::Type *DirectTy = CGF.ConvertTypeForMem(ValueTy);
266  if (IsIndirect)
267  DirectTy = DirectTy->getPointerTo(0);
268 
269  Address Addr = emitVoidPtrDirectVAArg(CGF, VAListAddr, DirectTy,
270  DirectSize, DirectAlign,
271  SlotSizeAndAlign,
272  AllowHigherAlign);
273 
274  if (IsIndirect) {
275  Addr = Address(CGF.Builder.CreateLoad(Addr), ValueInfo.second);
276  }
277 
278  return Addr;
279 
280 }
281 
283  Address Addr1, llvm::BasicBlock *Block1,
284  Address Addr2, llvm::BasicBlock *Block2,
285  const llvm::Twine &Name = "") {
286  assert(Addr1.getType() == Addr2.getType());
287  llvm::PHINode *PHI = CGF.Builder.CreatePHI(Addr1.getType(), 2, Name);
288  PHI->addIncoming(Addr1.getPointer(), Block1);
289  PHI->addIncoming(Addr2.getPointer(), Block2);
290  CharUnits Align = std::min(Addr1.getAlignment(), Addr2.getAlignment());
291  return Address(PHI, Align);
292 }
293 
295 
296 // If someone can figure out a general rule for this, that would be great.
297 // It's probably just doomed to be platform-dependent, though.
299  // Verified for:
300  // x86-64 FreeBSD, Linux, Darwin
301  // x86-32 FreeBSD, Linux, Darwin
302  // PowerPC Linux, Darwin
303  // ARM Darwin (*not* EABI)
304  // AArch64 Linux
305  return 32;
306 }
307 
309  const FunctionNoProtoType *fnType) const {
310  // The following conventions are known to require this to be false:
311  // x86_stdcall
312  // MIPS
313  // For everything else, we just prefer false unless we opt out.
314  return false;
315 }
316 
317 void
319  llvm::SmallString<24> &Opt) const {
320  // This assumes the user is passing a library name like "rt" instead of a
321  // filename like "librt.a/so", and that they don't care whether it's static or
322  // dynamic.
323  Opt = "-l";
324  Opt += Lib;
325 }
326 
327 static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays);
328 
329 /// isEmptyField - Return true iff a the field is "empty", that is it
330 /// is an unnamed bit-field or an (array of) empty record(s).
331 static bool isEmptyField(ASTContext &Context, const FieldDecl *FD,
332  bool AllowArrays) {
333  if (FD->isUnnamedBitfield())
334  return true;
335 
336  QualType FT = FD->getType();
337 
338  // Constant arrays of empty records count as empty, strip them off.
339  // Constant arrays of zero length always count as empty.
340  if (AllowArrays)
341  while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) {
342  if (AT->getSize() == 0)
343  return true;
344  FT = AT->getElementType();
345  }
346 
347  const RecordType *RT = FT->getAs<RecordType>();
348  if (!RT)
349  return false;
350 
351  // C++ record fields are never empty, at least in the Itanium ABI.
352  //
353  // FIXME: We should use a predicate for whether this behavior is true in the
354  // current ABI.
355  if (isa<CXXRecordDecl>(RT->getDecl()))
356  return false;
357 
358  return isEmptyRecord(Context, FT, AllowArrays);
359 }
360 
361 /// isEmptyRecord - Return true iff a structure contains only empty
362 /// fields. Note that a structure with a flexible array member is not
363 /// considered empty.
364 static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays) {
365  const RecordType *RT = T->getAs<RecordType>();
366  if (!RT)
367  return 0;
368  const RecordDecl *RD = RT->getDecl();
369  if (RD->hasFlexibleArrayMember())
370  return false;
371 
372  // If this is a C++ record, check the bases first.
373  if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD))
374  for (const auto &I : CXXRD->bases())
375  if (!isEmptyRecord(Context, I.getType(), true))
376  return false;
377 
378  for (const auto *I : RD->fields())
379  if (!isEmptyField(Context, I, AllowArrays))
380  return false;
381  return true;
382 }
383 
384 /// isSingleElementStruct - Determine if a structure is a "single
385 /// element struct", i.e. it has exactly one non-empty field or
386 /// exactly one field which is itself a single element
387 /// struct. Structures with flexible array members are never
388 /// considered single element structs.
389 ///
390 /// \return The field declaration for the single non-empty field, if
391 /// it exists.
393  const RecordType *RT = T->getAs<RecordType>();
394  if (!RT)
395  return nullptr;
396 
397  const RecordDecl *RD = RT->getDecl();
398  if (RD->hasFlexibleArrayMember())
399  return nullptr;
400 
401  const Type *Found = nullptr;
402 
403  // If this is a C++ record, check the bases first.
404  if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) {
405  for (const auto &I : CXXRD->bases()) {
406  // Ignore empty records.
407  if (isEmptyRecord(Context, I.getType(), true))
408  continue;
409 
410  // If we already found an element then this isn't a single-element struct.
411  if (Found)
412  return nullptr;
413 
414  // If this is non-empty and not a single element struct, the composite
415  // cannot be a single element struct.
416  Found = isSingleElementStruct(I.getType(), Context);
417  if (!Found)
418  return nullptr;
419  }
420  }
421 
422  // Check for single element.
423  for (const auto *FD : RD->fields()) {
424  QualType FT = FD->getType();
425 
426  // Ignore empty fields.
427  if (isEmptyField(Context, FD, true))
428  continue;
429 
430  // If we already found an element then this isn't a single-element
431  // struct.
432  if (Found)
433  return nullptr;
434 
435  // Treat single element arrays as the element.
436  while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) {
437  if (AT->getSize().getZExtValue() != 1)
438  break;
439  FT = AT->getElementType();
440  }
441 
442  if (!isAggregateTypeForABI(FT)) {
443  Found = FT.getTypePtr();
444  } else {
445  Found = isSingleElementStruct(FT, Context);
446  if (!Found)
447  return nullptr;
448  }
449  }
450 
451  // We don't consider a struct a single-element struct if it has
452  // padding beyond the element type.
453  if (Found && Context.getTypeSize(Found) != Context.getTypeSize(T))
454  return nullptr;
455 
456  return Found;
457 }
458 
460  // Treat complex types as the element type.
461  if (const ComplexType *CTy = Ty->getAs<ComplexType>())
462  Ty = CTy->getElementType();
463 
464  // Check for a type which we know has a simple scalar argument-passing
465  // convention without any padding. (We're specifically looking for 32
466  // and 64-bit integer and integer-equivalents, float, and double.)
467  if (!Ty->getAs<BuiltinType>() && !Ty->hasPointerRepresentation() &&
468  !Ty->isEnumeralType() && !Ty->isBlockPointerType())
469  return false;
470 
471  uint64_t Size = Context.getTypeSize(Ty);
472  return Size == 32 || Size == 64;
473 }
474 
475 /// canExpandIndirectArgument - Test whether an argument type which is to be
476 /// passed indirectly (on the stack) would have the equivalent layout if it was
477 /// expanded into separate arguments. If so, we prefer to do the latter to avoid
478 /// inhibiting optimizations.
479 ///
480 // FIXME: This predicate is missing many cases, currently it just follows
481 // llvm-gcc (checks that all fields are 32-bit or 64-bit primitive types). We
482 // should probably make this smarter, or better yet make the LLVM backend
483 // capable of handling it.
485  // We can only expand structure types.
486  const RecordType *RT = Ty->getAs<RecordType>();
487  if (!RT)
488  return false;
489 
490  // We can only expand (C) structures.
491  //
492  // FIXME: This needs to be generalized to handle classes as well.
493  const RecordDecl *RD = RT->getDecl();
494  if (!RD->isStruct())
495  return false;
496 
497  // We try to expand CLike CXXRecordDecl.
498  if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) {
499  if (!CXXRD->isCLike())
500  return false;
501  }
502 
503  uint64_t Size = 0;
504 
505  for (const auto *FD : RD->fields()) {
506  if (!is32Or64BitBasicType(FD->getType(), Context))
507  return false;
508 
509  // FIXME: Reject bit-fields wholesale; there are two problems, we don't know
510  // how to expand them yet, and the predicate for telling if a bitfield still
511  // counts as "basic" is more complicated than what we were doing previously.
512  if (FD->isBitField())
513  return false;
514 
515  Size += Context.getTypeSize(FD->getType());
516  }
517 
518  // Make sure there are not any holes in the struct.
519  if (Size != Context.getTypeSize(Ty))
520  return false;
521 
522  return true;
523 }
524 
525 namespace {
526 /// DefaultABIInfo - The default implementation for ABI specific
527 /// details. This implementation provides information which results in
528 /// self-consistent and sensible LLVM IR generation, but does not
529 /// conform to any particular ABI.
530 class DefaultABIInfo : public ABIInfo {
531 public:
532  DefaultABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {}
533 
534  ABIArgInfo classifyReturnType(QualType RetTy) const;
535  ABIArgInfo classifyArgumentType(QualType RetTy) const;
536 
537  void computeInfo(CGFunctionInfo &FI) const override {
538  if (!getCXXABI().classifyReturnType(FI))
539  FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
540  for (auto &I : FI.arguments())
541  I.info = classifyArgumentType(I.type);
542  }
543 
544  Address EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
545  QualType Ty) const override;
546 };
547 
548 class DefaultTargetCodeGenInfo : public TargetCodeGenInfo {
549 public:
550  DefaultTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT)
551  : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {}
552 };
553 
554 Address DefaultABIInfo::EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
555  QualType Ty) const {
556  return Address::invalid();
557 }
558 
559 ABIArgInfo DefaultABIInfo::classifyArgumentType(QualType Ty) const {
561 
562  if (isAggregateTypeForABI(Ty)) {
563  // Records with non-trivial destructors/copy-constructors should not be
564  // passed by value.
565  if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI()))
566  return getNaturalAlignIndirect(Ty, RAA == CGCXXABI::RAA_DirectInMemory);
567 
568  return getNaturalAlignIndirect(Ty);
569  }
570 
571  // Treat an enum type as its underlying type.
572  if (const EnumType *EnumTy = Ty->getAs<EnumType>())
573  Ty = EnumTy->getDecl()->getIntegerType();
574 
575  return (Ty->isPromotableIntegerType() ?
576  ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
577 }
578 
579 ABIArgInfo DefaultABIInfo::classifyReturnType(QualType RetTy) const {
580  if (RetTy->isVoidType())
581  return ABIArgInfo::getIgnore();
582 
583  if (isAggregateTypeForABI(RetTy))
584  return getNaturalAlignIndirect(RetTy);
585 
586  // Treat an enum type as its underlying type.
587  if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
588  RetTy = EnumTy->getDecl()->getIntegerType();
589 
590  return (RetTy->isPromotableIntegerType() ?
591  ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
592 }
593 
594 //===----------------------------------------------------------------------===//
595 // WebAssembly ABI Implementation
596 //
597 // This is a very simple ABI that relies a lot on DefaultABIInfo.
598 //===----------------------------------------------------------------------===//
599 
600 class WebAssemblyABIInfo final : public DefaultABIInfo {
601 public:
602  explicit WebAssemblyABIInfo(CodeGen::CodeGenTypes &CGT)
603  : DefaultABIInfo(CGT) {}
604 
605 private:
606  ABIArgInfo classifyReturnType(QualType RetTy) const;
607  ABIArgInfo classifyArgumentType(QualType Ty) const;
608 
609  // DefaultABIInfo's classifyReturnType and classifyArgumentType are
610  // non-virtual, but computeInfo is virtual, so we overload that.
611  void computeInfo(CGFunctionInfo &FI) const override {
612  if (!getCXXABI().classifyReturnType(FI))
613  FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
614  for (auto &Arg : FI.arguments())
615  Arg.info = classifyArgumentType(Arg.type);
616  }
617 };
618 
619 class WebAssemblyTargetCodeGenInfo final : public TargetCodeGenInfo {
620 public:
621  explicit WebAssemblyTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT)
622  : TargetCodeGenInfo(new WebAssemblyABIInfo(CGT)) {}
623 };
624 
625 /// \brief Classify argument of given type \p Ty.
626 ABIArgInfo WebAssemblyABIInfo::classifyArgumentType(QualType Ty) const {
628 
629  if (isAggregateTypeForABI(Ty)) {
630  // Records with non-trivial destructors/copy-constructors should not be
631  // passed by value.
632  if (auto RAA = getRecordArgABI(Ty, getCXXABI()))
633  return getNaturalAlignIndirect(Ty, RAA == CGCXXABI::RAA_DirectInMemory);
634  // Ignore empty structs/unions.
635  if (isEmptyRecord(getContext(), Ty, true))
636  return ABIArgInfo::getIgnore();
637  // Lower single-element structs to just pass a regular value. TODO: We
638  // could do reasonable-size multiple-element structs too, using getExpand(),
639  // though watch out for things like bitfields.
640  if (const Type *SeltTy = isSingleElementStruct(Ty, getContext()))
641  return ABIArgInfo::getDirect(CGT.ConvertType(QualType(SeltTy, 0)));
642  }
643 
644  // Otherwise just do the default thing.
645  return DefaultABIInfo::classifyArgumentType(Ty);
646 }
647 
648 ABIArgInfo WebAssemblyABIInfo::classifyReturnType(QualType RetTy) const {
649  if (isAggregateTypeForABI(RetTy)) {
650  // Records with non-trivial destructors/copy-constructors should not be
651  // returned by value.
652  if (!getRecordArgABI(RetTy, getCXXABI())) {
653  // Ignore empty structs/unions.
654  if (isEmptyRecord(getContext(), RetTy, true))
655  return ABIArgInfo::getIgnore();
656  // Lower single-element structs to just return a regular value. TODO: We
657  // could do reasonable-size multiple-element structs too, using
658  // ABIArgInfo::getDirect().
659  if (const Type *SeltTy = isSingleElementStruct(RetTy, getContext()))
660  return ABIArgInfo::getDirect(CGT.ConvertType(QualType(SeltTy, 0)));
661  }
662  }
663 
664  // Otherwise just do the default thing.
665  return DefaultABIInfo::classifyReturnType(RetTy);
666 }
667 
668 //===----------------------------------------------------------------------===//
669 // le32/PNaCl bitcode ABI Implementation
670 //
671 // This is a simplified version of the x86_32 ABI. Arguments and return values
672 // are always passed on the stack.
673 //===----------------------------------------------------------------------===//
674 
675 class PNaClABIInfo : public ABIInfo {
676  public:
677  PNaClABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {}
678 
679  ABIArgInfo classifyReturnType(QualType RetTy) const;
680  ABIArgInfo classifyArgumentType(QualType RetTy) const;
681 
682  void computeInfo(CGFunctionInfo &FI) const override;
683  Address EmitVAArg(CodeGenFunction &CGF,
684  Address VAListAddr, QualType Ty) const override;
685 };
686 
687 class PNaClTargetCodeGenInfo : public TargetCodeGenInfo {
688  public:
689  PNaClTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT)
690  : TargetCodeGenInfo(new PNaClABIInfo(CGT)) {}
691 };
692 
693 void PNaClABIInfo::computeInfo(CGFunctionInfo &FI) const {
694  if (!getCXXABI().classifyReturnType(FI))
695  FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
696 
697  for (auto &I : FI.arguments())
698  I.info = classifyArgumentType(I.type);
699 }
700 
701 Address PNaClABIInfo::EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
702  QualType Ty) const {
703  return Address::invalid();
704 }
705 
706 /// \brief Classify argument of given type \p Ty.
707 ABIArgInfo PNaClABIInfo::classifyArgumentType(QualType Ty) const {
708  if (isAggregateTypeForABI(Ty)) {
709  if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI()))
710  return getNaturalAlignIndirect(Ty, RAA == CGCXXABI::RAA_DirectInMemory);
711  return getNaturalAlignIndirect(Ty);
712  } else if (const EnumType *EnumTy = Ty->getAs<EnumType>()) {
713  // Treat an enum type as its underlying type.
714  Ty = EnumTy->getDecl()->getIntegerType();
715  } else if (Ty->isFloatingType()) {
716  // Floating-point types don't go inreg.
717  return ABIArgInfo::getDirect();
718  }
719 
720  return (Ty->isPromotableIntegerType() ?
721  ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
722 }
723 
724 ABIArgInfo PNaClABIInfo::classifyReturnType(QualType RetTy) const {
725  if (RetTy->isVoidType())
726  return ABIArgInfo::getIgnore();
727 
728  // In the PNaCl ABI we always return records/structures on the stack.
729  if (isAggregateTypeForABI(RetTy))
730  return getNaturalAlignIndirect(RetTy);
731 
732  // Treat an enum type as its underlying type.
733  if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
734  RetTy = EnumTy->getDecl()->getIntegerType();
735 
736  return (RetTy->isPromotableIntegerType() ?
737  ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
738 }
739 
740 /// IsX86_MMXType - Return true if this is an MMX type.
741 bool IsX86_MMXType(llvm::Type *IRType) {
742  // Return true if the type is an MMX type <2 x i32>, <4 x i16>, or <8 x i8>.
743  return IRType->isVectorTy() && IRType->getPrimitiveSizeInBits() == 64 &&
744  cast<llvm::VectorType>(IRType)->getElementType()->isIntegerTy() &&
745  IRType->getScalarSizeInBits() != 64;
746 }
747 
748 static llvm::Type* X86AdjustInlineAsmType(CodeGen::CodeGenFunction &CGF,
749  StringRef Constraint,
750  llvm::Type* Ty) {
751  if ((Constraint == "y" || Constraint == "&y") && Ty->isVectorTy()) {
752  if (cast<llvm::VectorType>(Ty)->getBitWidth() != 64) {
753  // Invalid MMX constraint
754  return nullptr;
755  }
756 
757  return llvm::Type::getX86_MMXTy(CGF.getLLVMContext());
758  }
759 
760  // No operation needed
761  return Ty;
762 }
763 
764 /// Returns true if this type can be passed in SSE registers with the
765 /// X86_VectorCall calling convention. Shared between x86_32 and x86_64.
766 static bool isX86VectorTypeForVectorCall(ASTContext &Context, QualType Ty) {
767  if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) {
768  if (BT->isFloatingPoint() && BT->getKind() != BuiltinType::Half)
769  return true;
770  } else if (const VectorType *VT = Ty->getAs<VectorType>()) {
771  // vectorcall can pass XMM, YMM, and ZMM vectors. We don't pass SSE1 MMX
772  // registers specially.
773  unsigned VecSize = Context.getTypeSize(VT);
774  if (VecSize == 128 || VecSize == 256 || VecSize == 512)
775  return true;
776  }
777  return false;
778 }
779 
780 /// Returns true if this aggregate is small enough to be passed in SSE registers
781 /// in the X86_VectorCall calling convention. Shared between x86_32 and x86_64.
782 static bool isX86VectorCallAggregateSmallEnough(uint64_t NumMembers) {
783  return NumMembers <= 4;
784 }
785 
786 //===----------------------------------------------------------------------===//
787 // X86-32 ABI Implementation
788 //===----------------------------------------------------------------------===//
789 
790 /// \brief Similar to llvm::CCState, but for Clang.
791 struct CCState {
792  CCState(unsigned CC) : CC(CC), FreeRegs(0), FreeSSERegs(0) {}
793 
794  unsigned CC;
795  unsigned FreeRegs;
796  unsigned FreeSSERegs;
797 };
798 
799 /// X86_32ABIInfo - The X86-32 ABI information.
800 class X86_32ABIInfo : public ABIInfo {
801  enum Class {
802  Integer,
803  Float
804  };
805 
806  static const unsigned MinABIStackAlignInBytes = 4;
807 
808  bool IsDarwinVectorABI;
809  bool IsRetSmallStructInRegABI;
810  bool IsWin32StructABI;
811  bool IsSoftFloatABI;
812  bool IsMCUABI;
813  unsigned DefaultNumRegisterParameters;
814 
815  static bool isRegisterSize(unsigned Size) {
816  return (Size == 8 || Size == 16 || Size == 32 || Size == 64);
817  }
818 
819  bool isHomogeneousAggregateBaseType(QualType Ty) const override {
820  // FIXME: Assumes vectorcall is in use.
821  return isX86VectorTypeForVectorCall(getContext(), Ty);
822  }
823 
824  bool isHomogeneousAggregateSmallEnough(const Type *Ty,
825  uint64_t NumMembers) const override {
826  // FIXME: Assumes vectorcall is in use.
827  return isX86VectorCallAggregateSmallEnough(NumMembers);
828  }
829 
830  bool shouldReturnTypeInRegister(QualType Ty, ASTContext &Context) const;
831 
832  /// getIndirectResult - Give a source type \arg Ty, return a suitable result
833  /// such that the argument will be passed in memory.
834  ABIArgInfo getIndirectResult(QualType Ty, bool ByVal, CCState &State) const;
835 
836  ABIArgInfo getIndirectReturnResult(QualType Ty, CCState &State) const;
837 
838  /// \brief Return the alignment to use for the given type on the stack.
839  unsigned getTypeStackAlignInBytes(QualType Ty, unsigned Align) const;
840 
841  Class classify(QualType Ty) const;
842  ABIArgInfo classifyReturnType(QualType RetTy, CCState &State) const;
843  ABIArgInfo classifyArgumentType(QualType RetTy, CCState &State) const;
844  /// \brief Updates the number of available free registers, returns
845  /// true if any registers were allocated.
846  bool updateFreeRegs(QualType Ty, CCState &State) const;
847 
848  bool shouldAggregateUseDirect(QualType Ty, CCState &State, bool &InReg,
849  bool &NeedsPadding) const;
850  bool shouldPrimitiveUseInReg(QualType Ty, CCState &State) const;
851 
852  /// \brief Rewrite the function info so that all memory arguments use
853  /// inalloca.
854  void rewriteWithInAlloca(CGFunctionInfo &FI) const;
855 
856  void addFieldToArgStruct(SmallVector<llvm::Type *, 6> &FrameFields,
857  CharUnits &StackOffset, ABIArgInfo &Info,
858  QualType Type) const;
859 
860 public:
861 
862  void computeInfo(CGFunctionInfo &FI) const override;
863  Address EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
864  QualType Ty) const override;
865 
866  X86_32ABIInfo(CodeGen::CodeGenTypes &CGT, bool DarwinVectorABI,
867  bool RetSmallStructInRegABI, bool Win32StructABI,
868  unsigned NumRegisterParameters, bool SoftFloatABI)
869  : ABIInfo(CGT), IsDarwinVectorABI(DarwinVectorABI),
870  IsRetSmallStructInRegABI(RetSmallStructInRegABI),
871  IsWin32StructABI(Win32StructABI),
872  IsSoftFloatABI(SoftFloatABI),
873  IsMCUABI(CGT.getTarget().getTriple().isOSIAMCU()),
874  DefaultNumRegisterParameters(NumRegisterParameters) {}
875 };
876 
877 class X86_32TargetCodeGenInfo : public TargetCodeGenInfo {
878 public:
879  X86_32TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, bool DarwinVectorABI,
880  bool RetSmallStructInRegABI, bool Win32StructABI,
881  unsigned NumRegisterParameters, bool SoftFloatABI)
882  : TargetCodeGenInfo(new X86_32ABIInfo(
883  CGT, DarwinVectorABI, RetSmallStructInRegABI, Win32StructABI,
884  NumRegisterParameters, SoftFloatABI)) {}
885 
886  static bool isStructReturnInRegABI(
887  const llvm::Triple &Triple, const CodeGenOptions &Opts);
888 
889  void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
890  CodeGen::CodeGenModule &CGM) const override;
891 
892  int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const override {
893  // Darwin uses different dwarf register numbers for EH.
894  if (CGM.getTarget().getTriple().isOSDarwin()) return 5;
895  return 4;
896  }
897 
898  bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
899  llvm::Value *Address) const override;
900 
901  llvm::Type* adjustInlineAsmType(CodeGen::CodeGenFunction &CGF,
902  StringRef Constraint,
903  llvm::Type* Ty) const override {
904  return X86AdjustInlineAsmType(CGF, Constraint, Ty);
905  }
906 
907  void addReturnRegisterOutputs(CodeGenFunction &CGF, LValue ReturnValue,
908  std::string &Constraints,
909  std::vector<llvm::Type *> &ResultRegTypes,
910  std::vector<llvm::Type *> &ResultTruncRegTypes,
911  std::vector<LValue> &ResultRegDests,
912  std::string &AsmString,
913  unsigned NumOutputs) const override;
914 
915  llvm::Constant *
916  getUBSanFunctionSignature(CodeGen::CodeGenModule &CGM) const override {
917  unsigned Sig = (0xeb << 0) | // jmp rel8
918  (0x06 << 8) | // .+0x08
919  ('F' << 16) |
920  ('T' << 24);
921  return llvm::ConstantInt::get(CGM.Int32Ty, Sig);
922  }
923 };
924 
925 }
926 
927 /// Rewrite input constraint references after adding some output constraints.
928 /// In the case where there is one output and one input and we add one output,
929 /// we need to replace all operand references greater than or equal to 1:
930 /// mov $0, $1
931 /// mov eax, $1
932 /// The result will be:
933 /// mov $0, $2
934 /// mov eax, $2
935 static void rewriteInputConstraintReferences(unsigned FirstIn,
936  unsigned NumNewOuts,
937  std::string &AsmString) {
938  std::string Buf;
939  llvm::raw_string_ostream OS(Buf);
940  size_t Pos = 0;
941  while (Pos < AsmString.size()) {
942  size_t DollarStart = AsmString.find('$', Pos);
943  if (DollarStart == std::string::npos)
944  DollarStart = AsmString.size();
945  size_t DollarEnd = AsmString.find_first_not_of('$', DollarStart);
946  if (DollarEnd == std::string::npos)
947  DollarEnd = AsmString.size();
948  OS << StringRef(&AsmString[Pos], DollarEnd - Pos);
949  Pos = DollarEnd;
950  size_t NumDollars = DollarEnd - DollarStart;
951  if (NumDollars % 2 != 0 && Pos < AsmString.size()) {
952  // We have an operand reference.
953  size_t DigitStart = Pos;
954  size_t DigitEnd = AsmString.find_first_not_of("0123456789", DigitStart);
955  if (DigitEnd == std::string::npos)
956  DigitEnd = AsmString.size();
957  StringRef OperandStr(&AsmString[DigitStart], DigitEnd - DigitStart);
958  unsigned OperandIndex;
959  if (!OperandStr.getAsInteger(10, OperandIndex)) {
960  if (OperandIndex >= FirstIn)
961  OperandIndex += NumNewOuts;
962  OS << OperandIndex;
963  } else {
964  OS << OperandStr;
965  }
966  Pos = DigitEnd;
967  }
968  }
969  AsmString = std::move(OS.str());
970 }
971 
972 /// Add output constraints for EAX:EDX because they are return registers.
973 void X86_32TargetCodeGenInfo::addReturnRegisterOutputs(
974  CodeGenFunction &CGF, LValue ReturnSlot, std::string &Constraints,
975  std::vector<llvm::Type *> &ResultRegTypes,
976  std::vector<llvm::Type *> &ResultTruncRegTypes,
977  std::vector<LValue> &ResultRegDests, std::string &AsmString,
978  unsigned NumOutputs) const {
979  uint64_t RetWidth = CGF.getContext().getTypeSize(ReturnSlot.getType());
980 
981  // Use the EAX constraint if the width is 32 or smaller and EAX:EDX if it is
982  // larger.
983  if (!Constraints.empty())
984  Constraints += ',';
985  if (RetWidth <= 32) {
986  Constraints += "={eax}";
987  ResultRegTypes.push_back(CGF.Int32Ty);
988  } else {
989  // Use the 'A' constraint for EAX:EDX.
990  Constraints += "=A";
991  ResultRegTypes.push_back(CGF.Int64Ty);
992  }
993 
994  // Truncate EAX or EAX:EDX to an integer of the appropriate size.
995  llvm::Type *CoerceTy = llvm::IntegerType::get(CGF.getLLVMContext(), RetWidth);
996  ResultTruncRegTypes.push_back(CoerceTy);
997 
998  // Coerce the integer by bitcasting the return slot pointer.
999  ReturnSlot.setAddress(CGF.Builder.CreateBitCast(ReturnSlot.getAddress(),
1000  CoerceTy->getPointerTo()));
1001  ResultRegDests.push_back(ReturnSlot);
1002 
1003  rewriteInputConstraintReferences(NumOutputs, 1, AsmString);
1004 }
1005 
1006 /// shouldReturnTypeInRegister - Determine if the given type should be
1007 /// returned in a register (for the Darwin and MCU ABI).
1008 bool X86_32ABIInfo::shouldReturnTypeInRegister(QualType Ty,
1009  ASTContext &Context) const {
1010  uint64_t Size = Context.getTypeSize(Ty);
1011 
1012  // For i386, type must be register sized.
1013  // For the MCU ABI, it only needs to be <= 8-byte
1014  if ((IsMCUABI && Size > 64) || (!IsMCUABI && !isRegisterSize(Size)))
1015  return false;
1016 
1017  if (Ty->isVectorType()) {
1018  // 64- and 128- bit vectors inside structures are not returned in
1019  // registers.
1020  if (Size == 64 || Size == 128)
1021  return false;
1022 
1023  return true;
1024  }
1025 
1026  // If this is a builtin, pointer, enum, complex type, member pointer, or
1027  // member function pointer it is ok.
1028  if (Ty->getAs<BuiltinType>() || Ty->hasPointerRepresentation() ||
1029  Ty->isAnyComplexType() || Ty->isEnumeralType() ||
1030  Ty->isBlockPointerType() || Ty->isMemberPointerType())
1031  return true;
1032 
1033  // Arrays are treated like records.
1034  if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty))
1035  return shouldReturnTypeInRegister(AT->getElementType(), Context);
1036 
1037  // Otherwise, it must be a record type.
1038  const RecordType *RT = Ty->getAs<RecordType>();
1039  if (!RT) return false;
1040 
1041  // FIXME: Traverse bases here too.
1042 
1043  // Structure types are passed in register if all fields would be
1044  // passed in a register.
1045  for (const auto *FD : RT->getDecl()->fields()) {
1046  // Empty fields are ignored.
1047  if (isEmptyField(Context, FD, true))
1048  continue;
1049 
1050  // Check fields recursively.
1051  if (!shouldReturnTypeInRegister(FD->getType(), Context))
1052  return false;
1053  }
1054  return true;
1055 }
1056 
1057 ABIArgInfo X86_32ABIInfo::getIndirectReturnResult(QualType RetTy, CCState &State) const {
1058  // If the return value is indirect, then the hidden argument is consuming one
1059  // integer register.
1060  if (State.FreeRegs) {
1061  --State.FreeRegs;
1062  if (!IsMCUABI)
1063  return getNaturalAlignIndirectInReg(RetTy);
1064  }
1065  return getNaturalAlignIndirect(RetTy, /*ByVal=*/false);
1066 }
1067 
1068 ABIArgInfo X86_32ABIInfo::classifyReturnType(QualType RetTy,
1069  CCState &State) const {
1070  if (RetTy->isVoidType())
1071  return ABIArgInfo::getIgnore();
1072 
1073  const Type *Base = nullptr;
1074  uint64_t NumElts = 0;
1075  if (State.CC == llvm::CallingConv::X86_VectorCall &&
1076  isHomogeneousAggregate(RetTy, Base, NumElts)) {
1077  // The LLVM struct type for such an aggregate should lower properly.
1078  return ABIArgInfo::getDirect();
1079  }
1080 
1081  if (const VectorType *VT = RetTy->getAs<VectorType>()) {
1082  // On Darwin, some vectors are returned in registers.
1083  if (IsDarwinVectorABI) {
1084  uint64_t Size = getContext().getTypeSize(RetTy);
1085 
1086  // 128-bit vectors are a special case; they are returned in
1087  // registers and we need to make sure to pick a type the LLVM
1088  // backend will like.
1089  if (Size == 128)
1090  return ABIArgInfo::getDirect(llvm::VectorType::get(
1091  llvm::Type::getInt64Ty(getVMContext()), 2));
1092 
1093  // Always return in register if it fits in a general purpose
1094  // register, or if it is 64 bits and has a single element.
1095  if ((Size == 8 || Size == 16 || Size == 32) ||
1096  (Size == 64 && VT->getNumElements() == 1))
1097  return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),
1098  Size));
1099 
1100  return getIndirectReturnResult(RetTy, State);
1101  }
1102 
1103  return ABIArgInfo::getDirect();
1104  }
1105 
1106  if (isAggregateTypeForABI(RetTy)) {
1107  if (const RecordType *RT = RetTy->getAs<RecordType>()) {
1108  // Structures with flexible arrays are always indirect.
1109  if (RT->getDecl()->hasFlexibleArrayMember())
1110  return getIndirectReturnResult(RetTy, State);
1111  }
1112 
1113  // If specified, structs and unions are always indirect.
1114  if (!IsRetSmallStructInRegABI && !RetTy->isAnyComplexType())
1115  return getIndirectReturnResult(RetTy, State);
1116 
1117  // Small structures which are register sized are generally returned
1118  // in a register.
1119  if (shouldReturnTypeInRegister(RetTy, getContext())) {
1120  uint64_t Size = getContext().getTypeSize(RetTy);
1121 
1122  // As a special-case, if the struct is a "single-element" struct, and
1123  // the field is of type "float" or "double", return it in a
1124  // floating-point register. (MSVC does not apply this special case.)
1125  // We apply a similar transformation for pointer types to improve the
1126  // quality of the generated IR.
1127  if (const Type *SeltTy = isSingleElementStruct(RetTy, getContext()))
1128  if ((!IsWin32StructABI && SeltTy->isRealFloatingType())
1129  || SeltTy->hasPointerRepresentation())
1130  return ABIArgInfo::getDirect(CGT.ConvertType(QualType(SeltTy, 0)));
1131 
1132  // FIXME: We should be able to narrow this integer in cases with dead
1133  // padding.
1134  return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),Size));
1135  }
1136 
1137  return getIndirectReturnResult(RetTy, State);
1138  }
1139 
1140  // Treat an enum type as its underlying type.
1141  if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
1142  RetTy = EnumTy->getDecl()->getIntegerType();
1143 
1144  return (RetTy->isPromotableIntegerType() ?
1145  ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
1146 }
1147 
1148 static bool isSSEVectorType(ASTContext &Context, QualType Ty) {
1149  return Ty->getAs<VectorType>() && Context.getTypeSize(Ty) == 128;
1150 }
1151 
1152 static bool isRecordWithSSEVectorType(ASTContext &Context, QualType Ty) {
1153  const RecordType *RT = Ty->getAs<RecordType>();
1154  if (!RT)
1155  return 0;
1156  const RecordDecl *RD = RT->getDecl();
1157 
1158  // If this is a C++ record, check the bases first.
1159  if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD))
1160  for (const auto &I : CXXRD->bases())
1161  if (!isRecordWithSSEVectorType(Context, I.getType()))
1162  return false;
1163 
1164  for (const auto *i : RD->fields()) {
1165  QualType FT = i->getType();
1166 
1167  if (isSSEVectorType(Context, FT))
1168  return true;
1169 
1170  if (isRecordWithSSEVectorType(Context, FT))
1171  return true;
1172  }
1173 
1174  return false;
1175 }
1176 
1177 unsigned X86_32ABIInfo::getTypeStackAlignInBytes(QualType Ty,
1178  unsigned Align) const {
1179  // Otherwise, if the alignment is less than or equal to the minimum ABI
1180  // alignment, just use the default; the backend will handle this.
1181  if (Align <= MinABIStackAlignInBytes)
1182  return 0; // Use default alignment.
1183 
1184  // On non-Darwin, the stack type alignment is always 4.
1185  if (!IsDarwinVectorABI) {
1186  // Set explicit alignment, since we may need to realign the top.
1187  return MinABIStackAlignInBytes;
1188  }
1189 
1190  // Otherwise, if the type contains an SSE vector type, the alignment is 16.
1191  if (Align >= 16 && (isSSEVectorType(getContext(), Ty) ||
1192  isRecordWithSSEVectorType(getContext(), Ty)))
1193  return 16;
1194 
1195  return MinABIStackAlignInBytes;
1196 }
1197 
1198 ABIArgInfo X86_32ABIInfo::getIndirectResult(QualType Ty, bool ByVal,
1199  CCState &State) const {
1200  if (!ByVal) {
1201  if (State.FreeRegs) {
1202  --State.FreeRegs; // Non-byval indirects just use one pointer.
1203  if (!IsMCUABI)
1204  return getNaturalAlignIndirectInReg(Ty);
1205  }
1206  return getNaturalAlignIndirect(Ty, false);
1207  }
1208 
1209  // Compute the byval alignment.
1210  unsigned TypeAlign = getContext().getTypeAlign(Ty) / 8;
1211  unsigned StackAlign = getTypeStackAlignInBytes(Ty, TypeAlign);
1212  if (StackAlign == 0)
1213  return ABIArgInfo::getIndirect(CharUnits::fromQuantity(4), /*ByVal=*/true);
1214 
1215  // If the stack alignment is less than the type alignment, realign the
1216  // argument.
1217  bool Realign = TypeAlign > StackAlign;
1219  /*ByVal=*/true, Realign);
1220 }
1221 
1222 X86_32ABIInfo::Class X86_32ABIInfo::classify(QualType Ty) const {
1223  const Type *T = isSingleElementStruct(Ty, getContext());
1224  if (!T)
1225  T = Ty.getTypePtr();
1226 
1227  if (const BuiltinType *BT = T->getAs<BuiltinType>()) {
1228  BuiltinType::Kind K = BT->getKind();
1229  if (K == BuiltinType::Float || K == BuiltinType::Double)
1230  return Float;
1231  }
1232  return Integer;
1233 }
1234 
1235 bool X86_32ABIInfo::updateFreeRegs(QualType Ty, CCState &State) const {
1236  if (!IsSoftFloatABI) {
1237  Class C = classify(Ty);
1238  if (C == Float)
1239  return false;
1240  }
1241 
1242  unsigned Size = getContext().getTypeSize(Ty);
1243  unsigned SizeInRegs = (Size + 31) / 32;
1244 
1245  if (SizeInRegs == 0)
1246  return false;
1247 
1248  if (!IsMCUABI) {
1249  if (SizeInRegs > State.FreeRegs) {
1250  State.FreeRegs = 0;
1251  return false;
1252  }
1253  } else {
1254  // The MCU psABI allows passing parameters in-reg even if there are
1255  // earlier parameters that are passed on the stack. Also,
1256  // it does not allow passing >8-byte structs in-register,
1257  // even if there are 3 free registers available.
1258  if (SizeInRegs > State.FreeRegs || SizeInRegs > 2)
1259  return false;
1260  }
1261 
1262  State.FreeRegs -= SizeInRegs;
1263  return true;
1264 }
1265 
1266 bool X86_32ABIInfo::shouldAggregateUseDirect(QualType Ty, CCState &State,
1267  bool &InReg,
1268  bool &NeedsPadding) const {
1269  NeedsPadding = false;
1270  InReg = !IsMCUABI;
1271 
1272  if (!updateFreeRegs(Ty, State))
1273  return false;
1274 
1275  if (IsMCUABI)
1276  return true;
1277 
1278  if (State.CC == llvm::CallingConv::X86_FastCall ||
1279  State.CC == llvm::CallingConv::X86_VectorCall) {
1280  if (getContext().getTypeSize(Ty) <= 32 && State.FreeRegs)
1281  NeedsPadding = true;
1282 
1283  return false;
1284  }
1285 
1286  return true;
1287 }
1288 
1289 bool X86_32ABIInfo::shouldPrimitiveUseInReg(QualType Ty, CCState &State) const {
1290  if (!updateFreeRegs(Ty, State))
1291  return false;
1292 
1293  if (IsMCUABI)
1294  return false;
1295 
1296  if (State.CC == llvm::CallingConv::X86_FastCall ||
1297  State.CC == llvm::CallingConv::X86_VectorCall) {
1298  if (getContext().getTypeSize(Ty) > 32)
1299  return false;
1300 
1301  return (Ty->isIntegralOrEnumerationType() || Ty->isPointerType() ||
1302  Ty->isReferenceType());
1303  }
1304 
1305  return true;
1306 }
1307 
1308 ABIArgInfo X86_32ABIInfo::classifyArgumentType(QualType Ty,
1309  CCState &State) const {
1310  // FIXME: Set alignment on indirect arguments.
1311 
1313 
1314  // Check with the C++ ABI first.
1315  const RecordType *RT = Ty->getAs<RecordType>();
1316  if (RT) {
1317  CGCXXABI::RecordArgABI RAA = getRecordArgABI(RT, getCXXABI());
1318  if (RAA == CGCXXABI::RAA_Indirect) {
1319  return getIndirectResult(Ty, false, State);
1320  } else if (RAA == CGCXXABI::RAA_DirectInMemory) {
1321  // The field index doesn't matter, we'll fix it up later.
1322  return ABIArgInfo::getInAlloca(/*FieldIndex=*/0);
1323  }
1324  }
1325 
1326  // vectorcall adds the concept of a homogenous vector aggregate, similar
1327  // to other targets.
1328  const Type *Base = nullptr;
1329  uint64_t NumElts = 0;
1330  if (State.CC == llvm::CallingConv::X86_VectorCall &&
1331  isHomogeneousAggregate(Ty, Base, NumElts)) {
1332  if (State.FreeSSERegs >= NumElts) {
1333  State.FreeSSERegs -= NumElts;
1334  if (Ty->isBuiltinType() || Ty->isVectorType())
1335  return ABIArgInfo::getDirect();
1336  return ABIArgInfo::getExpand();
1337  }
1338  return getIndirectResult(Ty, /*ByVal=*/false, State);
1339  }
1340 
1341  if (isAggregateTypeForABI(Ty)) {
1342  if (RT) {
1343  // Structs are always byval on win32, regardless of what they contain.
1344  if (IsWin32StructABI)
1345  return getIndirectResult(Ty, true, State);
1346 
1347  // Structures with flexible arrays are always indirect.
1348  if (RT->getDecl()->hasFlexibleArrayMember())
1349  return getIndirectResult(Ty, true, State);
1350  }
1351 
1352  // Ignore empty structs/unions.
1353  if (isEmptyRecord(getContext(), Ty, true))
1354  return ABIArgInfo::getIgnore();
1355 
1356  llvm::LLVMContext &LLVMContext = getVMContext();
1357  llvm::IntegerType *Int32 = llvm::Type::getInt32Ty(LLVMContext);
1358  bool NeedsPadding, InReg;
1359  if (shouldAggregateUseDirect(Ty, State, InReg, NeedsPadding)) {
1360  unsigned SizeInRegs = (getContext().getTypeSize(Ty) + 31) / 32;
1361  SmallVector<llvm::Type*, 3> Elements(SizeInRegs, Int32);
1362  llvm::Type *Result = llvm::StructType::get(LLVMContext, Elements);
1363  if (InReg)
1364  return ABIArgInfo::getDirectInReg(Result);
1365  else
1366  return ABIArgInfo::getDirect(Result);
1367  }
1368  llvm::IntegerType *PaddingType = NeedsPadding ? Int32 : nullptr;
1369 
1370  // Expand small (<= 128-bit) record types when we know that the stack layout
1371  // of those arguments will match the struct. This is important because the
1372  // LLVM backend isn't smart enough to remove byval, which inhibits many
1373  // optimizations.
1374  // Don't do this for the MCU if there are still free integer registers
1375  // (see X86_64 ABI for full explanation).
1376  if (getContext().getTypeSize(Ty) <= 4*32 &&
1377  canExpandIndirectArgument(Ty, getContext()) &&
1378  (!IsMCUABI || State.FreeRegs == 0))
1380  State.CC == llvm::CallingConv::X86_FastCall ||
1381  State.CC == llvm::CallingConv::X86_VectorCall,
1382  PaddingType);
1383 
1384  return getIndirectResult(Ty, true, State);
1385  }
1386 
1387  if (const VectorType *VT = Ty->getAs<VectorType>()) {
1388  // On Darwin, some vectors are passed in memory, we handle this by passing
1389  // it as an i8/i16/i32/i64.
1390  if (IsDarwinVectorABI) {
1391  uint64_t Size = getContext().getTypeSize(Ty);
1392  if ((Size == 8 || Size == 16 || Size == 32) ||
1393  (Size == 64 && VT->getNumElements() == 1))
1394  return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),
1395  Size));
1396  }
1397 
1398  if (IsX86_MMXType(CGT.ConvertType(Ty)))
1399  return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 64));
1400 
1401  return ABIArgInfo::getDirect();
1402  }
1403 
1404 
1405  if (const EnumType *EnumTy = Ty->getAs<EnumType>())
1406  Ty = EnumTy->getDecl()->getIntegerType();
1407 
1408  bool InReg = shouldPrimitiveUseInReg(Ty, State);
1409 
1410  if (Ty->isPromotableIntegerType()) {
1411  if (InReg)
1412  return ABIArgInfo::getExtendInReg();
1413  return ABIArgInfo::getExtend();
1414  }
1415 
1416  if (InReg)
1417  return ABIArgInfo::getDirectInReg();
1418  return ABIArgInfo::getDirect();
1419 }
1420 
1421 void X86_32ABIInfo::computeInfo(CGFunctionInfo &FI) const {
1422  CCState State(FI.getCallingConvention());
1423  if (IsMCUABI)
1424  State.FreeRegs = 3;
1425  else if (State.CC == llvm::CallingConv::X86_FastCall)
1426  State.FreeRegs = 2;
1427  else if (State.CC == llvm::CallingConv::X86_VectorCall) {
1428  State.FreeRegs = 2;
1429  State.FreeSSERegs = 6;
1430  } else if (FI.getHasRegParm())
1431  State.FreeRegs = FI.getRegParm();
1432  else
1433  State.FreeRegs = DefaultNumRegisterParameters;
1434 
1435  if (!getCXXABI().classifyReturnType(FI)) {
1436  FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), State);
1437  } else if (FI.getReturnInfo().isIndirect()) {
1438  // The C++ ABI is not aware of register usage, so we have to check if the
1439  // return value was sret and put it in a register ourselves if appropriate.
1440  if (State.FreeRegs) {
1441  --State.FreeRegs; // The sret parameter consumes a register.
1442  if (!IsMCUABI)
1443  FI.getReturnInfo().setInReg(true);
1444  }
1445  }
1446 
1447  // The chain argument effectively gives us another free register.
1448  if (FI.isChainCall())
1449  ++State.FreeRegs;
1450 
1451  bool UsedInAlloca = false;
1452  for (auto &I : FI.arguments()) {
1453  I.info = classifyArgumentType(I.type, State);
1454  UsedInAlloca |= (I.info.getKind() == ABIArgInfo::InAlloca);
1455  }
1456 
1457  // If we needed to use inalloca for any argument, do a second pass and rewrite
1458  // all the memory arguments to use inalloca.
1459  if (UsedInAlloca)
1460  rewriteWithInAlloca(FI);
1461 }
1462 
1463 void
1464 X86_32ABIInfo::addFieldToArgStruct(SmallVector<llvm::Type *, 6> &FrameFields,
1465  CharUnits &StackOffset, ABIArgInfo &Info,
1466  QualType Type) const {
1467  // Arguments are always 4-byte-aligned.
1468  CharUnits FieldAlign = CharUnits::fromQuantity(4);
1469 
1470  assert(StackOffset.isMultipleOf(FieldAlign) && "unaligned inalloca struct");
1471  Info = ABIArgInfo::getInAlloca(FrameFields.size());
1472  FrameFields.push_back(CGT.ConvertTypeForMem(Type));
1473  StackOffset += getContext().getTypeSizeInChars(Type);
1474 
1475  // Insert padding bytes to respect alignment.
1476  CharUnits FieldEnd = StackOffset;
1477  StackOffset = FieldEnd.RoundUpToAlignment(FieldAlign);
1478  if (StackOffset != FieldEnd) {
1479  CharUnits NumBytes = StackOffset - FieldEnd;
1480  llvm::Type *Ty = llvm::Type::getInt8Ty(getVMContext());
1481  Ty = llvm::ArrayType::get(Ty, NumBytes.getQuantity());
1482  FrameFields.push_back(Ty);
1483  }
1484 }
1485 
1486 static bool isArgInAlloca(const ABIArgInfo &Info) {
1487  // Leave ignored and inreg arguments alone.
1488  switch (Info.getKind()) {
1489  case ABIArgInfo::InAlloca:
1490  return true;
1491  case ABIArgInfo::Indirect:
1492  assert(Info.getIndirectByVal());
1493  return true;
1494  case ABIArgInfo::Ignore:
1495  return false;
1496  case ABIArgInfo::Direct:
1497  case ABIArgInfo::Extend:
1498  case ABIArgInfo::Expand:
1499  if (Info.getInReg())
1500  return false;
1501  return true;
1502  }
1503  llvm_unreachable("invalid enum");
1504 }
1505 
1506 void X86_32ABIInfo::rewriteWithInAlloca(CGFunctionInfo &FI) const {
1507  assert(IsWin32StructABI && "inalloca only supported on win32");
1508 
1509  // Build a packed struct type for all of the arguments in memory.
1510  SmallVector<llvm::Type *, 6> FrameFields;
1511 
1512  // The stack alignment is always 4.
1513  CharUnits StackAlign = CharUnits::fromQuantity(4);
1514 
1515  CharUnits StackOffset;
1517 
1518  // Put 'this' into the struct before 'sret', if necessary.
1519  bool IsThisCall =
1520  FI.getCallingConvention() == llvm::CallingConv::X86_ThisCall;
1521  ABIArgInfo &Ret = FI.getReturnInfo();
1522  if (Ret.isIndirect() && Ret.isSRetAfterThis() && !IsThisCall &&
1523  isArgInAlloca(I->info)) {
1524  addFieldToArgStruct(FrameFields, StackOffset, I->info, I->type);
1525  ++I;
1526  }
1527 
1528  // Put the sret parameter into the inalloca struct if it's in memory.
1529  if (Ret.isIndirect() && !Ret.getInReg()) {
1530  CanQualType PtrTy = getContext().getPointerType(FI.getReturnType());
1531  addFieldToArgStruct(FrameFields, StackOffset, Ret, PtrTy);
1532  // On Windows, the hidden sret parameter is always returned in eax.
1533  Ret.setInAllocaSRet(IsWin32StructABI);
1534  }
1535 
1536  // Skip the 'this' parameter in ecx.
1537  if (IsThisCall)
1538  ++I;
1539 
1540  // Put arguments passed in memory into the struct.
1541  for (; I != E; ++I) {
1542  if (isArgInAlloca(I->info))
1543  addFieldToArgStruct(FrameFields, StackOffset, I->info, I->type);
1544  }
1545 
1546  FI.setArgStruct(llvm::StructType::get(getVMContext(), FrameFields,
1547  /*isPacked=*/true),
1548  StackAlign);
1549 }
1550 
1551 Address X86_32ABIInfo::EmitVAArg(CodeGenFunction &CGF,
1552  Address VAListAddr, QualType Ty) const {
1553 
1554  auto TypeInfo = getContext().getTypeInfoInChars(Ty);
1555 
1556  // x86-32 changes the alignment of certain arguments on the stack.
1557  //
1558  // Just messing with TypeInfo like this works because we never pass
1559  // anything indirectly.
1561  getTypeStackAlignInBytes(Ty, TypeInfo.second.getQuantity()));
1562 
1563  return emitVoidPtrVAArg(CGF, VAListAddr, Ty, /*Indirect*/ false,
1565  /*AllowHigherAlign*/ true);
1566 }
1567 
1568 bool X86_32TargetCodeGenInfo::isStructReturnInRegABI(
1569  const llvm::Triple &Triple, const CodeGenOptions &Opts) {
1570  assert(Triple.getArch() == llvm::Triple::x86);
1571 
1572  switch (Opts.getStructReturnConvention()) {
1574  break;
1575  case CodeGenOptions::SRCK_OnStack: // -fpcc-struct-return
1576  return false;
1577  case CodeGenOptions::SRCK_InRegs: // -freg-struct-return
1578  return true;
1579  }
1580 
1581  if (Triple.isOSDarwin() || Triple.isOSIAMCU())
1582  return true;
1583 
1584  switch (Triple.getOS()) {
1585  case llvm::Triple::DragonFly:
1586  case llvm::Triple::FreeBSD:
1587  case llvm::Triple::OpenBSD:
1588  case llvm::Triple::Bitrig:
1589  case llvm::Triple::Win32:
1590  return true;
1591  default:
1592  return false;
1593  }
1594 }
1595 
1596 void X86_32TargetCodeGenInfo::setTargetAttributes(const Decl *D,
1597  llvm::GlobalValue *GV,
1598  CodeGen::CodeGenModule &CGM) const {
1599  if (const FunctionDecl *FD = dyn_cast_or_null<FunctionDecl>(D)) {
1600  if (FD->hasAttr<X86ForceAlignArgPointerAttr>()) {
1601  // Get the LLVM function.
1602  llvm::Function *Fn = cast<llvm::Function>(GV);
1603 
1604  // Now add the 'alignstack' attribute with a value of 16.
1605  llvm::AttrBuilder B;
1606  B.addStackAlignmentAttr(16);
1607  Fn->addAttributes(llvm::AttributeSet::FunctionIndex,
1608  llvm::AttributeSet::get(CGM.getLLVMContext(),
1609  llvm::AttributeSet::FunctionIndex,
1610  B));
1611  }
1612  }
1613 }
1614 
1615 bool X86_32TargetCodeGenInfo::initDwarfEHRegSizeTable(
1617  llvm::Value *Address) const {
1619 
1620  llvm::Value *Four8 = llvm::ConstantInt::get(CGF.Int8Ty, 4);
1621 
1622  // 0-7 are the eight integer registers; the order is different
1623  // on Darwin (for EH), but the range is the same.
1624  // 8 is %eip.
1625  AssignToArrayRange(Builder, Address, Four8, 0, 8);
1626 
1627  if (CGF.CGM.getTarget().getTriple().isOSDarwin()) {
1628  // 12-16 are st(0..4). Not sure why we stop at 4.
1629  // These have size 16, which is sizeof(long double) on
1630  // platforms with 8-byte alignment for that type.
1631  llvm::Value *Sixteen8 = llvm::ConstantInt::get(CGF.Int8Ty, 16);
1632  AssignToArrayRange(Builder, Address, Sixteen8, 12, 16);
1633 
1634  } else {
1635  // 9 is %eflags, which doesn't get a size on Darwin for some
1636  // reason.
1637  Builder.CreateAlignedStore(
1638  Four8, Builder.CreateConstInBoundsGEP1_32(CGF.Int8Ty, Address, 9),
1639  CharUnits::One());
1640 
1641  // 11-16 are st(0..5). Not sure why we stop at 5.
1642  // These have size 12, which is sizeof(long double) on
1643  // platforms with 4-byte alignment for that type.
1644  llvm::Value *Twelve8 = llvm::ConstantInt::get(CGF.Int8Ty, 12);
1645  AssignToArrayRange(Builder, Address, Twelve8, 11, 16);
1646  }
1647 
1648  return false;
1649 }
1650 
1651 //===----------------------------------------------------------------------===//
1652 // X86-64 ABI Implementation
1653 //===----------------------------------------------------------------------===//
1654 
1655 
1656 namespace {
1657 /// The AVX ABI level for X86 targets.
1658 enum class X86AVXABILevel {
1659  None,
1660  AVX,
1661  AVX512
1662 };
1663 
1664 /// \p returns the size in bits of the largest (native) vector for \p AVXLevel.
1665 static unsigned getNativeVectorSizeForAVXABI(X86AVXABILevel AVXLevel) {
1666  switch (AVXLevel) {
1667  case X86AVXABILevel::AVX512:
1668  return 512;
1669  case X86AVXABILevel::AVX:
1670  return 256;
1671  case X86AVXABILevel::None:
1672  return 128;
1673  }
1674  llvm_unreachable("Unknown AVXLevel");
1675 }
1676 
1677 /// X86_64ABIInfo - The X86_64 ABI information.
1678 class X86_64ABIInfo : public ABIInfo {
1679  enum Class {
1680  Integer = 0,
1681  SSE,
1682  SSEUp,
1683  X87,
1684  X87Up,
1685  ComplexX87,
1686  NoClass,
1687  Memory
1688  };
1689 
1690  /// merge - Implement the X86_64 ABI merging algorithm.
1691  ///
1692  /// Merge an accumulating classification \arg Accum with a field
1693  /// classification \arg Field.
1694  ///
1695  /// \param Accum - The accumulating classification. This should
1696  /// always be either NoClass or the result of a previous merge
1697  /// call. In addition, this should never be Memory (the caller
1698  /// should just return Memory for the aggregate).
1699  static Class merge(Class Accum, Class Field);
1700 
1701  /// postMerge - Implement the X86_64 ABI post merging algorithm.
1702  ///
1703  /// Post merger cleanup, reduces a malformed Hi and Lo pair to
1704  /// final MEMORY or SSE classes when necessary.
1705  ///
1706  /// \param AggregateSize - The size of the current aggregate in
1707  /// the classification process.
1708  ///
1709  /// \param Lo - The classification for the parts of the type
1710  /// residing in the low word of the containing object.
1711  ///
1712  /// \param Hi - The classification for the parts of the type
1713  /// residing in the higher words of the containing object.
1714  ///
1715  void postMerge(unsigned AggregateSize, Class &Lo, Class &Hi) const;
1716 
1717  /// classify - Determine the x86_64 register classes in which the
1718  /// given type T should be passed.
1719  ///
1720  /// \param Lo - The classification for the parts of the type
1721  /// residing in the low word of the containing object.
1722  ///
1723  /// \param Hi - The classification for the parts of the type
1724  /// residing in the high word of the containing object.
1725  ///
1726  /// \param OffsetBase - The bit offset of this type in the
1727  /// containing object. Some parameters are classified different
1728  /// depending on whether they straddle an eightbyte boundary.
1729  ///
1730  /// \param isNamedArg - Whether the argument in question is a "named"
1731  /// argument, as used in AMD64-ABI 3.5.7.
1732  ///
1733  /// If a word is unused its result will be NoClass; if a type should
1734  /// be passed in Memory then at least the classification of \arg Lo
1735  /// will be Memory.
1736  ///
1737  /// The \arg Lo class will be NoClass iff the argument is ignored.
1738  ///
1739  /// If the \arg Lo class is ComplexX87, then the \arg Hi class will
1740  /// also be ComplexX87.
1741  void classify(QualType T, uint64_t OffsetBase, Class &Lo, Class &Hi,
1742  bool isNamedArg) const;
1743 
1744  llvm::Type *GetByteVectorType(QualType Ty) const;
1745  llvm::Type *GetSSETypeAtOffset(llvm::Type *IRType,
1746  unsigned IROffset, QualType SourceTy,
1747  unsigned SourceOffset) const;
1748  llvm::Type *GetINTEGERTypeAtOffset(llvm::Type *IRType,
1749  unsigned IROffset, QualType SourceTy,
1750  unsigned SourceOffset) const;
1751 
1752  /// getIndirectResult - Give a source type \arg Ty, return a suitable result
1753  /// such that the argument will be returned in memory.
1754  ABIArgInfo getIndirectReturnResult(QualType Ty) const;
1755 
1756  /// getIndirectResult - Give a source type \arg Ty, return a suitable result
1757  /// such that the argument will be passed in memory.
1758  ///
1759  /// \param freeIntRegs - The number of free integer registers remaining
1760  /// available.
1761  ABIArgInfo getIndirectResult(QualType Ty, unsigned freeIntRegs) const;
1762 
1763  ABIArgInfo classifyReturnType(QualType RetTy) const;
1764 
1765  ABIArgInfo classifyArgumentType(QualType Ty,
1766  unsigned freeIntRegs,
1767  unsigned &neededInt,
1768  unsigned &neededSSE,
1769  bool isNamedArg) const;
1770 
1771  bool IsIllegalVectorType(QualType Ty) const;
1772 
1773  /// The 0.98 ABI revision clarified a lot of ambiguities,
1774  /// unfortunately in ways that were not always consistent with
1775  /// certain previous compilers. In particular, platforms which
1776  /// required strict binary compatibility with older versions of GCC
1777  /// may need to exempt themselves.
1778  bool honorsRevision0_98() const {
1779  return !getTarget().getTriple().isOSDarwin();
1780  }
1781 
1782  X86AVXABILevel AVXLevel;
1783  // Some ABIs (e.g. X32 ABI and Native Client OS) use 32 bit pointers on
1784  // 64-bit hardware.
1785  bool Has64BitPointers;
1786 
1787 public:
1788  X86_64ABIInfo(CodeGen::CodeGenTypes &CGT, X86AVXABILevel AVXLevel) :
1789  ABIInfo(CGT), AVXLevel(AVXLevel),
1790  Has64BitPointers(CGT.getDataLayout().getPointerSize(0) == 8) {
1791  }
1792 
1793  bool isPassedUsingAVXType(QualType type) const {
1794  unsigned neededInt, neededSSE;
1795  // The freeIntRegs argument doesn't matter here.
1796  ABIArgInfo info = classifyArgumentType(type, 0, neededInt, neededSSE,
1797  /*isNamedArg*/true);
1798  if (info.isDirect()) {
1799  llvm::Type *ty = info.getCoerceToType();
1800  if (llvm::VectorType *vectorTy = dyn_cast_or_null<llvm::VectorType>(ty))
1801  return (vectorTy->getBitWidth() > 128);
1802  }
1803  return false;
1804  }
1805 
1806  void computeInfo(CGFunctionInfo &FI) const override;
1807 
1808  Address EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
1809  QualType Ty) const override;
1810  Address EmitMSVAArg(CodeGenFunction &CGF, Address VAListAddr,
1811  QualType Ty) const override;
1812 
1813  bool has64BitPointers() const {
1814  return Has64BitPointers;
1815  }
1816 };
1817 
1818 /// WinX86_64ABIInfo - The Windows X86_64 ABI information.
1819 class WinX86_64ABIInfo : public ABIInfo {
1820 public:
1821  WinX86_64ABIInfo(CodeGen::CodeGenTypes &CGT)
1822  : ABIInfo(CGT),
1823  IsMingw64(getTarget().getTriple().isWindowsGNUEnvironment()) {}
1824 
1825  void computeInfo(CGFunctionInfo &FI) const override;
1826 
1827  Address EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
1828  QualType Ty) const override;
1829 
1830  bool isHomogeneousAggregateBaseType(QualType Ty) const override {
1831  // FIXME: Assumes vectorcall is in use.
1832  return isX86VectorTypeForVectorCall(getContext(), Ty);
1833  }
1834 
1835  bool isHomogeneousAggregateSmallEnough(const Type *Ty,
1836  uint64_t NumMembers) const override {
1837  // FIXME: Assumes vectorcall is in use.
1838  return isX86VectorCallAggregateSmallEnough(NumMembers);
1839  }
1840 
1841 private:
1842  ABIArgInfo classify(QualType Ty, unsigned &FreeSSERegs,
1843  bool IsReturnType) const;
1844 
1845  bool IsMingw64;
1846 };
1847 
1848 class X86_64TargetCodeGenInfo : public TargetCodeGenInfo {
1849 public:
1850  X86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, X86AVXABILevel AVXLevel)
1851  : TargetCodeGenInfo(new X86_64ABIInfo(CGT, AVXLevel)) {}
1852 
1853  const X86_64ABIInfo &getABIInfo() const {
1854  return static_cast<const X86_64ABIInfo&>(TargetCodeGenInfo::getABIInfo());
1855  }
1856 
1857  int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const override {
1858  return 7;
1859  }
1860 
1861  bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
1862  llvm::Value *Address) const override {
1863  llvm::Value *Eight8 = llvm::ConstantInt::get(CGF.Int8Ty, 8);
1864 
1865  // 0-15 are the 16 integer registers.
1866  // 16 is %rip.
1867  AssignToArrayRange(CGF.Builder, Address, Eight8, 0, 16);
1868  return false;
1869  }
1870 
1871  llvm::Type* adjustInlineAsmType(CodeGen::CodeGenFunction &CGF,
1872  StringRef Constraint,
1873  llvm::Type* Ty) const override {
1874  return X86AdjustInlineAsmType(CGF, Constraint, Ty);
1875  }
1876 
1877  bool isNoProtoCallVariadic(const CallArgList &args,
1878  const FunctionNoProtoType *fnType) const override {
1879  // The default CC on x86-64 sets %al to the number of SSA
1880  // registers used, and GCC sets this when calling an unprototyped
1881  // function, so we override the default behavior. However, don't do
1882  // that when AVX types are involved: the ABI explicitly states it is
1883  // undefined, and it doesn't work in practice because of how the ABI
1884  // defines varargs anyway.
1885  if (fnType->getCallConv() == CC_C) {
1886  bool HasAVXType = false;
1887  for (CallArgList::const_iterator
1888  it = args.begin(), ie = args.end(); it != ie; ++it) {
1889  if (getABIInfo().isPassedUsingAVXType(it->Ty)) {
1890  HasAVXType = true;
1891  break;
1892  }
1893  }
1894 
1895  if (!HasAVXType)
1896  return true;
1897  }
1898 
1899  return TargetCodeGenInfo::isNoProtoCallVariadic(args, fnType);
1900  }
1901 
1902  llvm::Constant *
1903  getUBSanFunctionSignature(CodeGen::CodeGenModule &CGM) const override {
1904  unsigned Sig;
1905  if (getABIInfo().has64BitPointers())
1906  Sig = (0xeb << 0) | // jmp rel8
1907  (0x0a << 8) | // .+0x0c
1908  ('F' << 16) |
1909  ('T' << 24);
1910  else
1911  Sig = (0xeb << 0) | // jmp rel8
1912  (0x06 << 8) | // .+0x08
1913  ('F' << 16) |
1914  ('T' << 24);
1915  return llvm::ConstantInt::get(CGM.Int32Ty, Sig);
1916  }
1917 };
1918 
1919 class PS4TargetCodeGenInfo : public X86_64TargetCodeGenInfo {
1920 public:
1921  PS4TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, X86AVXABILevel AVXLevel)
1922  : X86_64TargetCodeGenInfo(CGT, AVXLevel) {}
1923 
1924  void getDependentLibraryOption(llvm::StringRef Lib,
1925  llvm::SmallString<24> &Opt) const override {
1926  Opt = "\01";
1927  // If the argument contains a space, enclose it in quotes.
1928  if (Lib.find(" ") != StringRef::npos)
1929  Opt += "\"" + Lib.str() + "\"";
1930  else
1931  Opt += Lib;
1932  }
1933 };
1934 
1935 static std::string qualifyWindowsLibrary(llvm::StringRef Lib) {
1936  // If the argument does not end in .lib, automatically add the suffix.
1937  // If the argument contains a space, enclose it in quotes.
1938  // This matches the behavior of MSVC.
1939  bool Quote = (Lib.find(" ") != StringRef::npos);
1940  std::string ArgStr = Quote ? "\"" : "";
1941  ArgStr += Lib;
1942  if (!Lib.endswith_lower(".lib"))
1943  ArgStr += ".lib";
1944  ArgStr += Quote ? "\"" : "";
1945  return ArgStr;
1946 }
1947 
1948 class WinX86_32TargetCodeGenInfo : public X86_32TargetCodeGenInfo {
1949 public:
1950  WinX86_32TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT,
1951  bool DarwinVectorABI, bool RetSmallStructInRegABI, bool Win32StructABI,
1952  unsigned NumRegisterParameters)
1953  : X86_32TargetCodeGenInfo(CGT, DarwinVectorABI, RetSmallStructInRegABI,
1954  Win32StructABI, NumRegisterParameters, false) {}
1955 
1956  void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
1957  CodeGen::CodeGenModule &CGM) const override;
1958 
1959  void getDependentLibraryOption(llvm::StringRef Lib,
1960  llvm::SmallString<24> &Opt) const override {
1961  Opt = "/DEFAULTLIB:";
1962  Opt += qualifyWindowsLibrary(Lib);
1963  }
1964 
1965  void getDetectMismatchOption(llvm::StringRef Name,
1966  llvm::StringRef Value,
1967  llvm::SmallString<32> &Opt) const override {
1968  Opt = "/FAILIFMISMATCH:\"" + Name.str() + "=" + Value.str() + "\"";
1969  }
1970 };
1971 
1972 static void addStackProbeSizeTargetAttribute(const Decl *D,
1973  llvm::GlobalValue *GV,
1974  CodeGen::CodeGenModule &CGM) {
1975  if (D && isa<FunctionDecl>(D)) {
1976  if (CGM.getCodeGenOpts().StackProbeSize != 4096) {
1977  llvm::Function *Fn = cast<llvm::Function>(GV);
1978 
1979  Fn->addFnAttr("stack-probe-size",
1980  llvm::utostr(CGM.getCodeGenOpts().StackProbeSize));
1981  }
1982  }
1983 }
1984 
1985 void WinX86_32TargetCodeGenInfo::setTargetAttributes(const Decl *D,
1986  llvm::GlobalValue *GV,
1987  CodeGen::CodeGenModule &CGM) const {
1988  X86_32TargetCodeGenInfo::setTargetAttributes(D, GV, CGM);
1989 
1990  addStackProbeSizeTargetAttribute(D, GV, CGM);
1991 }
1992 
1993 class WinX86_64TargetCodeGenInfo : public TargetCodeGenInfo {
1994 public:
1995  WinX86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT,
1996  X86AVXABILevel AVXLevel)
1997  : TargetCodeGenInfo(new WinX86_64ABIInfo(CGT)) {}
1998 
1999  void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
2000  CodeGen::CodeGenModule &CGM) const override;
2001 
2002  int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const override {
2003  return 7;
2004  }
2005 
2006  bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
2007  llvm::Value *Address) const override {
2008  llvm::Value *Eight8 = llvm::ConstantInt::get(CGF.Int8Ty, 8);
2009 
2010  // 0-15 are the 16 integer registers.
2011  // 16 is %rip.
2012  AssignToArrayRange(CGF.Builder, Address, Eight8, 0, 16);
2013  return false;
2014  }
2015 
2016  void getDependentLibraryOption(llvm::StringRef Lib,
2017  llvm::SmallString<24> &Opt) const override {
2018  Opt = "/DEFAULTLIB:";
2019  Opt += qualifyWindowsLibrary(Lib);
2020  }
2021 
2022  void getDetectMismatchOption(llvm::StringRef Name,
2023  llvm::StringRef Value,
2024  llvm::SmallString<32> &Opt) const override {
2025  Opt = "/FAILIFMISMATCH:\"" + Name.str() + "=" + Value.str() + "\"";
2026  }
2027 };
2028 
2029 void WinX86_64TargetCodeGenInfo::setTargetAttributes(const Decl *D,
2030  llvm::GlobalValue *GV,
2031  CodeGen::CodeGenModule &CGM) const {
2033 
2034  addStackProbeSizeTargetAttribute(D, GV, CGM);
2035 }
2036 }
2037 
2038 void X86_64ABIInfo::postMerge(unsigned AggregateSize, Class &Lo,
2039  Class &Hi) const {
2040  // AMD64-ABI 3.2.3p2: Rule 5. Then a post merger cleanup is done:
2041  //
2042  // (a) If one of the classes is Memory, the whole argument is passed in
2043  // memory.
2044  //
2045  // (b) If X87UP is not preceded by X87, the whole argument is passed in
2046  // memory.
2047  //
2048  // (c) If the size of the aggregate exceeds two eightbytes and the first
2049  // eightbyte isn't SSE or any other eightbyte isn't SSEUP, the whole
2050  // argument is passed in memory. NOTE: This is necessary to keep the
2051  // ABI working for processors that don't support the __m256 type.
2052  //
2053  // (d) If SSEUP is not preceded by SSE or SSEUP, it is converted to SSE.
2054  //
2055  // Some of these are enforced by the merging logic. Others can arise
2056  // only with unions; for example:
2057  // union { _Complex double; unsigned; }
2058  //
2059  // Note that clauses (b) and (c) were added in 0.98.
2060  //
2061  if (Hi == Memory)
2062  Lo = Memory;
2063  if (Hi == X87Up && Lo != X87 && honorsRevision0_98())
2064  Lo = Memory;
2065  if (AggregateSize > 128 && (Lo != SSE || Hi != SSEUp))
2066  Lo = Memory;
2067  if (Hi == SSEUp && Lo != SSE)
2068  Hi = SSE;
2069 }
2070 
2071 X86_64ABIInfo::Class X86_64ABIInfo::merge(Class Accum, Class Field) {
2072  // AMD64-ABI 3.2.3p2: Rule 4. Each field of an object is
2073  // classified recursively so that always two fields are
2074  // considered. The resulting class is calculated according to
2075  // the classes of the fields in the eightbyte:
2076  //
2077  // (a) If both classes are equal, this is the resulting class.
2078  //
2079  // (b) If one of the classes is NO_CLASS, the resulting class is
2080  // the other class.
2081  //
2082  // (c) If one of the classes is MEMORY, the result is the MEMORY
2083  // class.
2084  //
2085  // (d) If one of the classes is INTEGER, the result is the
2086  // INTEGER.
2087  //
2088  // (e) If one of the classes is X87, X87UP, COMPLEX_X87 class,
2089  // MEMORY is used as class.
2090  //
2091  // (f) Otherwise class SSE is used.
2092 
2093  // Accum should never be memory (we should have returned) or
2094  // ComplexX87 (because this cannot be passed in a structure).
2095  assert((Accum != Memory && Accum != ComplexX87) &&
2096  "Invalid accumulated classification during merge.");
2097  if (Accum == Field || Field == NoClass)
2098  return Accum;
2099  if (Field == Memory)
2100  return Memory;
2101  if (Accum == NoClass)
2102  return Field;
2103  if (Accum == Integer || Field == Integer)
2104  return Integer;
2105  if (Field == X87 || Field == X87Up || Field == ComplexX87 ||
2106  Accum == X87 || Accum == X87Up)
2107  return Memory;
2108  return SSE;
2109 }
2110 
2111 void X86_64ABIInfo::classify(QualType Ty, uint64_t OffsetBase,
2112  Class &Lo, Class &Hi, bool isNamedArg) const {
2113  // FIXME: This code can be simplified by introducing a simple value class for
2114  // Class pairs with appropriate constructor methods for the various
2115  // situations.
2116 
2117  // FIXME: Some of the split computations are wrong; unaligned vectors
2118  // shouldn't be passed in registers for example, so there is no chance they
2119  // can straddle an eightbyte. Verify & simplify.
2120 
2121  Lo = Hi = NoClass;
2122 
2123  Class &Current = OffsetBase < 64 ? Lo : Hi;
2124  Current = Memory;
2125 
2126  if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) {
2127  BuiltinType::Kind k = BT->getKind();
2128 
2129  if (k == BuiltinType::Void) {
2130  Current = NoClass;
2131  } else if (k == BuiltinType::Int128 || k == BuiltinType::UInt128) {
2132  Lo = Integer;
2133  Hi = Integer;
2134  } else if (k >= BuiltinType::Bool && k <= BuiltinType::LongLong) {
2135  Current = Integer;
2136  } else if (k == BuiltinType::Float || k == BuiltinType::Double) {
2137  Current = SSE;
2138  } else if (k == BuiltinType::LongDouble) {
2139  const llvm::fltSemantics *LDF = &getTarget().getLongDoubleFormat();
2140  if (LDF == &llvm::APFloat::IEEEquad) {
2141  Lo = SSE;
2142  Hi = SSEUp;
2143  } else if (LDF == &llvm::APFloat::x87DoubleExtended) {
2144  Lo = X87;
2145  Hi = X87Up;
2146  } else if (LDF == &llvm::APFloat::IEEEdouble) {
2147  Current = SSE;
2148  } else
2149  llvm_unreachable("unexpected long double representation!");
2150  }
2151  // FIXME: _Decimal32 and _Decimal64 are SSE.
2152  // FIXME: _float128 and _Decimal128 are (SSE, SSEUp).
2153  return;
2154  }
2155 
2156  if (const EnumType *ET = Ty->getAs<EnumType>()) {
2157  // Classify the underlying integer type.
2158  classify(ET->getDecl()->getIntegerType(), OffsetBase, Lo, Hi, isNamedArg);
2159  return;
2160  }
2161 
2162  if (Ty->hasPointerRepresentation()) {
2163  Current = Integer;
2164  return;
2165  }
2166 
2167  if (Ty->isMemberPointerType()) {
2168  if (Ty->isMemberFunctionPointerType()) {
2169  if (Has64BitPointers) {
2170  // If Has64BitPointers, this is an {i64, i64}, so classify both
2171  // Lo and Hi now.
2172  Lo = Hi = Integer;
2173  } else {
2174  // Otherwise, with 32-bit pointers, this is an {i32, i32}. If that
2175  // straddles an eightbyte boundary, Hi should be classified as well.
2176  uint64_t EB_FuncPtr = (OffsetBase) / 64;
2177  uint64_t EB_ThisAdj = (OffsetBase + 64 - 1) / 64;
2178  if (EB_FuncPtr != EB_ThisAdj) {
2179  Lo = Hi = Integer;
2180  } else {
2181  Current = Integer;
2182  }
2183  }
2184  } else {
2185  Current = Integer;
2186  }
2187  return;
2188  }
2189 
2190  if (const VectorType *VT = Ty->getAs<VectorType>()) {
2191  uint64_t Size = getContext().getTypeSize(VT);
2192  if (Size == 1 || Size == 8 || Size == 16 || Size == 32) {
2193  // gcc passes the following as integer:
2194  // 4 bytes - <4 x char>, <2 x short>, <1 x int>, <1 x float>
2195  // 2 bytes - <2 x char>, <1 x short>
2196  // 1 byte - <1 x char>
2197  Current = Integer;
2198 
2199  // If this type crosses an eightbyte boundary, it should be
2200  // split.
2201  uint64_t EB_Lo = (OffsetBase) / 64;
2202  uint64_t EB_Hi = (OffsetBase + Size - 1) / 64;
2203  if (EB_Lo != EB_Hi)
2204  Hi = Lo;
2205  } else if (Size == 64) {
2206  // gcc passes <1 x double> in memory. :(
2207  if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::Double))
2208  return;
2209 
2210  // gcc passes <1 x long long> as INTEGER.
2211  if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::LongLong) ||
2212  VT->getElementType()->isSpecificBuiltinType(BuiltinType::ULongLong) ||
2213  VT->getElementType()->isSpecificBuiltinType(BuiltinType::Long) ||
2214  VT->getElementType()->isSpecificBuiltinType(BuiltinType::ULong))
2215  Current = Integer;
2216  else
2217  Current = SSE;
2218 
2219  // If this type crosses an eightbyte boundary, it should be
2220  // split.
2221  if (OffsetBase && OffsetBase != 64)
2222  Hi = Lo;
2223  } else if (Size == 128 ||
2224  (isNamedArg && Size <= getNativeVectorSizeForAVXABI(AVXLevel))) {
2225  // Arguments of 256-bits are split into four eightbyte chunks. The
2226  // least significant one belongs to class SSE and all the others to class
2227  // SSEUP. The original Lo and Hi design considers that types can't be
2228  // greater than 128-bits, so a 64-bit split in Hi and Lo makes sense.
2229  // This design isn't correct for 256-bits, but since there're no cases
2230  // where the upper parts would need to be inspected, avoid adding
2231  // complexity and just consider Hi to match the 64-256 part.
2232  //
2233  // Note that per 3.5.7 of AMD64-ABI, 256-bit args are only passed in
2234  // registers if they are "named", i.e. not part of the "..." of a
2235  // variadic function.
2236  //
2237  // Similarly, per 3.2.3. of the AVX512 draft, 512-bits ("named") args are
2238  // split into eight eightbyte chunks, one SSE and seven SSEUP.
2239  Lo = SSE;
2240  Hi = SSEUp;
2241  }
2242  return;
2243  }
2244 
2245  if (const ComplexType *CT = Ty->getAs<ComplexType>()) {
2246  QualType ET = getContext().getCanonicalType(CT->getElementType());
2247 
2248  uint64_t Size = getContext().getTypeSize(Ty);
2249  if (ET->isIntegralOrEnumerationType()) {
2250  if (Size <= 64)
2251  Current = Integer;
2252  else if (Size <= 128)
2253  Lo = Hi = Integer;
2254  } else if (ET == getContext().FloatTy) {
2255  Current = SSE;
2256  } else if (ET == getContext().DoubleTy) {
2257  Lo = Hi = SSE;
2258  } else if (ET == getContext().LongDoubleTy) {
2259  const llvm::fltSemantics *LDF = &getTarget().getLongDoubleFormat();
2260  if (LDF == &llvm::APFloat::IEEEquad)
2261  Current = Memory;
2262  else if (LDF == &llvm::APFloat::x87DoubleExtended)
2263  Current = ComplexX87;
2264  else if (LDF == &llvm::APFloat::IEEEdouble)
2265  Lo = Hi = SSE;
2266  else
2267  llvm_unreachable("unexpected long double representation!");
2268  }
2269 
2270  // If this complex type crosses an eightbyte boundary then it
2271  // should be split.
2272  uint64_t EB_Real = (OffsetBase) / 64;
2273  uint64_t EB_Imag = (OffsetBase + getContext().getTypeSize(ET)) / 64;
2274  if (Hi == NoClass && EB_Real != EB_Imag)
2275  Hi = Lo;
2276 
2277  return;
2278  }
2279 
2280  if (const ConstantArrayType *AT = getContext().getAsConstantArrayType(Ty)) {
2281  // Arrays are treated like structures.
2282 
2283  uint64_t Size = getContext().getTypeSize(Ty);
2284 
2285  // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger
2286  // than four eightbytes, ..., it has class MEMORY.
2287  if (Size > 256)
2288  return;
2289 
2290  // AMD64-ABI 3.2.3p2: Rule 1. If ..., or it contains unaligned
2291  // fields, it has class MEMORY.
2292  //
2293  // Only need to check alignment of array base.
2294  if (OffsetBase % getContext().getTypeAlign(AT->getElementType()))
2295  return;
2296 
2297  // Otherwise implement simplified merge. We could be smarter about
2298  // this, but it isn't worth it and would be harder to verify.
2299  Current = NoClass;
2300  uint64_t EltSize = getContext().getTypeSize(AT->getElementType());
2301  uint64_t ArraySize = AT->getSize().getZExtValue();
2302 
2303  // The only case a 256-bit wide vector could be used is when the array
2304  // contains a single 256-bit element. Since Lo and Hi logic isn't extended
2305  // to work for sizes wider than 128, early check and fallback to memory.
2306  if (Size > 128 && EltSize != 256)
2307  return;
2308 
2309  for (uint64_t i=0, Offset=OffsetBase; i<ArraySize; ++i, Offset += EltSize) {
2310  Class FieldLo, FieldHi;
2311  classify(AT->getElementType(), Offset, FieldLo, FieldHi, isNamedArg);
2312  Lo = merge(Lo, FieldLo);
2313  Hi = merge(Hi, FieldHi);
2314  if (Lo == Memory || Hi == Memory)
2315  break;
2316  }
2317 
2318  postMerge(Size, Lo, Hi);
2319  assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp array classification.");
2320  return;
2321  }
2322 
2323  if (const RecordType *RT = Ty->getAs<RecordType>()) {
2324  uint64_t Size = getContext().getTypeSize(Ty);
2325 
2326  // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger
2327  // than four eightbytes, ..., it has class MEMORY.
2328  if (Size > 256)
2329  return;
2330 
2331  // AMD64-ABI 3.2.3p2: Rule 2. If a C++ object has either a non-trivial
2332  // copy constructor or a non-trivial destructor, it is passed by invisible
2333  // reference.
2334  if (getRecordArgABI(RT, getCXXABI()))
2335  return;
2336 
2337  const RecordDecl *RD = RT->getDecl();
2338 
2339  // Assume variable sized types are passed in memory.
2340  if (RD->hasFlexibleArrayMember())
2341  return;
2342 
2343  const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD);
2344 
2345  // Reset Lo class, this will be recomputed.
2346  Current = NoClass;
2347 
2348  // If this is a C++ record, classify the bases first.
2349  if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) {
2350  for (const auto &I : CXXRD->bases()) {
2351  assert(!I.isVirtual() && !I.getType()->isDependentType() &&
2352  "Unexpected base class!");
2353  const CXXRecordDecl *Base =
2354  cast<CXXRecordDecl>(I.getType()->getAs<RecordType>()->getDecl());
2355 
2356  // Classify this field.
2357  //
2358  // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate exceeds a
2359  // single eightbyte, each is classified separately. Each eightbyte gets
2360  // initialized to class NO_CLASS.
2361  Class FieldLo, FieldHi;
2362  uint64_t Offset =
2363  OffsetBase + getContext().toBits(Layout.getBaseClassOffset(Base));
2364  classify(I.getType(), Offset, FieldLo, FieldHi, isNamedArg);
2365  Lo = merge(Lo, FieldLo);
2366  Hi = merge(Hi, FieldHi);
2367  if (Lo == Memory || Hi == Memory) {
2368  postMerge(Size, Lo, Hi);
2369  return;
2370  }
2371  }
2372  }
2373 
2374  // Classify the fields one at a time, merging the results.
2375  unsigned idx = 0;
2376  for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end();
2377  i != e; ++i, ++idx) {
2378  uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx);
2379  bool BitField = i->isBitField();
2380 
2381  // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger than
2382  // four eightbytes, or it contains unaligned fields, it has class MEMORY.
2383  //
2384  // The only case a 256-bit wide vector could be used is when the struct
2385  // contains a single 256-bit element. Since Lo and Hi logic isn't extended
2386  // to work for sizes wider than 128, early check and fallback to memory.
2387  //
2388  if (Size > 128 && getContext().getTypeSize(i->getType()) != 256) {
2389  Lo = Memory;
2390  postMerge(Size, Lo, Hi);
2391  return;
2392  }
2393  // Note, skip this test for bit-fields, see below.
2394  if (!BitField && Offset % getContext().getTypeAlign(i->getType())) {
2395  Lo = Memory;
2396  postMerge(Size, Lo, Hi);
2397  return;
2398  }
2399 
2400  // Classify this field.
2401  //
2402  // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate
2403  // exceeds a single eightbyte, each is classified
2404  // separately. Each eightbyte gets initialized to class
2405  // NO_CLASS.
2406  Class FieldLo, FieldHi;
2407 
2408  // Bit-fields require special handling, they do not force the
2409  // structure to be passed in memory even if unaligned, and
2410  // therefore they can straddle an eightbyte.
2411  if (BitField) {
2412  // Ignore padding bit-fields.
2413  if (i->isUnnamedBitfield())
2414  continue;
2415 
2416  uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx);
2417  uint64_t Size = i->getBitWidthValue(getContext());
2418 
2419  uint64_t EB_Lo = Offset / 64;
2420  uint64_t EB_Hi = (Offset + Size - 1) / 64;
2421 
2422  if (EB_Lo) {
2423  assert(EB_Hi == EB_Lo && "Invalid classification, type > 16 bytes.");
2424  FieldLo = NoClass;
2425  FieldHi = Integer;
2426  } else {
2427  FieldLo = Integer;
2428  FieldHi = EB_Hi ? Integer : NoClass;
2429  }
2430  } else
2431  classify(i->getType(), Offset, FieldLo, FieldHi, isNamedArg);
2432  Lo = merge(Lo, FieldLo);
2433  Hi = merge(Hi, FieldHi);
2434  if (Lo == Memory || Hi == Memory)
2435  break;
2436  }
2437 
2438  postMerge(Size, Lo, Hi);
2439  }
2440 }
2441 
2442 ABIArgInfo X86_64ABIInfo::getIndirectReturnResult(QualType Ty) const {
2443  // If this is a scalar LLVM value then assume LLVM will pass it in the right
2444  // place naturally.
2445  if (!isAggregateTypeForABI(Ty)) {
2446  // Treat an enum type as its underlying type.
2447  if (const EnumType *EnumTy = Ty->getAs<EnumType>())
2448  Ty = EnumTy->getDecl()->getIntegerType();
2449 
2450  return (Ty->isPromotableIntegerType() ?
2451  ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
2452  }
2453 
2454  return getNaturalAlignIndirect(Ty);
2455 }
2456 
2457 bool X86_64ABIInfo::IsIllegalVectorType(QualType Ty) const {
2458  if (const VectorType *VecTy = Ty->getAs<VectorType>()) {
2459  uint64_t Size = getContext().getTypeSize(VecTy);
2460  unsigned LargestVector = getNativeVectorSizeForAVXABI(AVXLevel);
2461  if (Size <= 64 || Size > LargestVector)
2462  return true;
2463  }
2464 
2465  return false;
2466 }
2467 
2468 ABIArgInfo X86_64ABIInfo::getIndirectResult(QualType Ty,
2469  unsigned freeIntRegs) const {
2470  // If this is a scalar LLVM value then assume LLVM will pass it in the right
2471  // place naturally.
2472  //
2473  // This assumption is optimistic, as there could be free registers available
2474  // when we need to pass this argument in memory, and LLVM could try to pass
2475  // the argument in the free register. This does not seem to happen currently,
2476  // but this code would be much safer if we could mark the argument with
2477  // 'onstack'. See PR12193.
2478  if (!isAggregateTypeForABI(Ty) && !IsIllegalVectorType(Ty)) {
2479  // Treat an enum type as its underlying type.
2480  if (const EnumType *EnumTy = Ty->getAs<EnumType>())
2481  Ty = EnumTy->getDecl()->getIntegerType();
2482 
2483  return (Ty->isPromotableIntegerType() ?
2484  ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
2485  }
2486 
2487  if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI()))
2488  return getNaturalAlignIndirect(Ty, RAA == CGCXXABI::RAA_DirectInMemory);
2489 
2490  // Compute the byval alignment. We specify the alignment of the byval in all
2491  // cases so that the mid-level optimizer knows the alignment of the byval.
2492  unsigned Align = std::max(getContext().getTypeAlign(Ty) / 8, 8U);
2493 
2494  // Attempt to avoid passing indirect results using byval when possible. This
2495  // is important for good codegen.
2496  //
2497  // We do this by coercing the value into a scalar type which the backend can
2498  // handle naturally (i.e., without using byval).
2499  //
2500  // For simplicity, we currently only do this when we have exhausted all of the
2501  // free integer registers. Doing this when there are free integer registers
2502  // would require more care, as we would have to ensure that the coerced value
2503  // did not claim the unused register. That would require either reording the
2504  // arguments to the function (so that any subsequent inreg values came first),
2505  // or only doing this optimization when there were no following arguments that
2506  // might be inreg.
2507  //
2508  // We currently expect it to be rare (particularly in well written code) for
2509  // arguments to be passed on the stack when there are still free integer
2510  // registers available (this would typically imply large structs being passed
2511  // by value), so this seems like a fair tradeoff for now.
2512  //
2513  // We can revisit this if the backend grows support for 'onstack' parameter
2514  // attributes. See PR12193.
2515  if (freeIntRegs == 0) {
2516  uint64_t Size = getContext().getTypeSize(Ty);
2517 
2518  // If this type fits in an eightbyte, coerce it into the matching integral
2519  // type, which will end up on the stack (with alignment 8).
2520  if (Align == 8 && Size <= 64)
2521  return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),
2522  Size));
2523  }
2524 
2526 }
2527 
2528 /// The ABI specifies that a value should be passed in a full vector XMM/YMM
2529 /// register. Pick an LLVM IR type that will be passed as a vector register.
2530 llvm::Type *X86_64ABIInfo::GetByteVectorType(QualType Ty) const {
2531  // Wrapper structs/arrays that only contain vectors are passed just like
2532  // vectors; strip them off if present.
2533  if (const Type *InnerTy = isSingleElementStruct(Ty, getContext()))
2534  Ty = QualType(InnerTy, 0);
2535 
2536  llvm::Type *IRType = CGT.ConvertType(Ty);
2537  if (isa<llvm::VectorType>(IRType) ||
2538  IRType->getTypeID() == llvm::Type::FP128TyID)
2539  return IRType;
2540 
2541  // We couldn't find the preferred IR vector type for 'Ty'.
2542  uint64_t Size = getContext().getTypeSize(Ty);
2543  assert((Size == 128 || Size == 256) && "Invalid type found!");
2544 
2545  // Return a LLVM IR vector type based on the size of 'Ty'.
2546  return llvm::VectorType::get(llvm::Type::getDoubleTy(getVMContext()),
2547  Size / 64);
2548 }
2549 
2550 /// BitsContainNoUserData - Return true if the specified [start,end) bit range
2551 /// is known to either be off the end of the specified type or being in
2552 /// alignment padding. The user type specified is known to be at most 128 bits
2553 /// in size, and have passed through X86_64ABIInfo::classify with a successful
2554 /// classification that put one of the two halves in the INTEGER class.
2555 ///
2556 /// It is conservatively correct to return false.
2557 static bool BitsContainNoUserData(QualType Ty, unsigned StartBit,
2558  unsigned EndBit, ASTContext &Context) {
2559  // If the bytes being queried are off the end of the type, there is no user
2560  // data hiding here. This handles analysis of builtins, vectors and other
2561  // types that don't contain interesting padding.
2562  unsigned TySize = (unsigned)Context.getTypeSize(Ty);
2563  if (TySize <= StartBit)
2564  return true;
2565 
2566  if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) {
2567  unsigned EltSize = (unsigned)Context.getTypeSize(AT->getElementType());
2568  unsigned NumElts = (unsigned)AT->getSize().getZExtValue();
2569 
2570  // Check each element to see if the element overlaps with the queried range.
2571  for (unsigned i = 0; i != NumElts; ++i) {
2572  // If the element is after the span we care about, then we're done..
2573  unsigned EltOffset = i*EltSize;
2574  if (EltOffset >= EndBit) break;
2575 
2576  unsigned EltStart = EltOffset < StartBit ? StartBit-EltOffset :0;
2577  if (!BitsContainNoUserData(AT->getElementType(), EltStart,
2578  EndBit-EltOffset, Context))
2579  return false;
2580  }
2581  // If it overlaps no elements, then it is safe to process as padding.
2582  return true;
2583  }
2584 
2585  if (const RecordType *RT = Ty->getAs<RecordType>()) {
2586  const RecordDecl *RD = RT->getDecl();
2587  const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD);
2588 
2589  // If this is a C++ record, check the bases first.
2590  if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) {
2591  for (const auto &I : CXXRD->bases()) {
2592  assert(!I.isVirtual() && !I.getType()->isDependentType() &&
2593  "Unexpected base class!");
2594  const CXXRecordDecl *Base =
2595  cast<CXXRecordDecl>(I.getType()->getAs<RecordType>()->getDecl());
2596 
2597  // If the base is after the span we care about, ignore it.
2598  unsigned BaseOffset = Context.toBits(Layout.getBaseClassOffset(Base));
2599  if (BaseOffset >= EndBit) continue;
2600 
2601  unsigned BaseStart = BaseOffset < StartBit ? StartBit-BaseOffset :0;
2602  if (!BitsContainNoUserData(I.getType(), BaseStart,
2603  EndBit-BaseOffset, Context))
2604  return false;
2605  }
2606  }
2607 
2608  // Verify that no field has data that overlaps the region of interest. Yes
2609  // this could be sped up a lot by being smarter about queried fields,
2610  // however we're only looking at structs up to 16 bytes, so we don't care
2611  // much.
2612  unsigned idx = 0;
2613  for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end();
2614  i != e; ++i, ++idx) {
2615  unsigned FieldOffset = (unsigned)Layout.getFieldOffset(idx);
2616 
2617  // If we found a field after the region we care about, then we're done.
2618  if (FieldOffset >= EndBit) break;
2619 
2620  unsigned FieldStart = FieldOffset < StartBit ? StartBit-FieldOffset :0;
2621  if (!BitsContainNoUserData(i->getType(), FieldStart, EndBit-FieldOffset,
2622  Context))
2623  return false;
2624  }
2625 
2626  // If nothing in this record overlapped the area of interest, then we're
2627  // clean.
2628  return true;
2629  }
2630 
2631  return false;
2632 }
2633 
2634 /// ContainsFloatAtOffset - Return true if the specified LLVM IR type has a
2635 /// float member at the specified offset. For example, {int,{float}} has a
2636 /// float at offset 4. It is conservatively correct for this routine to return
2637 /// false.
2638 static bool ContainsFloatAtOffset(llvm::Type *IRType, unsigned IROffset,
2639  const llvm::DataLayout &TD) {
2640  // Base case if we find a float.
2641  if (IROffset == 0 && IRType->isFloatTy())
2642  return true;
2643 
2644  // If this is a struct, recurse into the field at the specified offset.
2645  if (llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) {
2646  const llvm::StructLayout *SL = TD.getStructLayout(STy);
2647  unsigned Elt = SL->getElementContainingOffset(IROffset);
2648  IROffset -= SL->getElementOffset(Elt);
2649  return ContainsFloatAtOffset(STy->getElementType(Elt), IROffset, TD);
2650  }
2651 
2652  // If this is an array, recurse into the field at the specified offset.
2653  if (llvm::ArrayType *ATy = dyn_cast<llvm::ArrayType>(IRType)) {
2654  llvm::Type *EltTy = ATy->getElementType();
2655  unsigned EltSize = TD.getTypeAllocSize(EltTy);
2656  IROffset -= IROffset/EltSize*EltSize;
2657  return ContainsFloatAtOffset(EltTy, IROffset, TD);
2658  }
2659 
2660  return false;
2661 }
2662 
2663 
2664 /// GetSSETypeAtOffset - Return a type that will be passed by the backend in the
2665 /// low 8 bytes of an XMM register, corresponding to the SSE class.
2666 llvm::Type *X86_64ABIInfo::
2667 GetSSETypeAtOffset(llvm::Type *IRType, unsigned IROffset,
2668  QualType SourceTy, unsigned SourceOffset) const {
2669  // The only three choices we have are either double, <2 x float>, or float. We
2670  // pass as float if the last 4 bytes is just padding. This happens for
2671  // structs that contain 3 floats.
2672  if (BitsContainNoUserData(SourceTy, SourceOffset*8+32,
2673  SourceOffset*8+64, getContext()))
2674  return llvm::Type::getFloatTy(getVMContext());
2675 
2676  // We want to pass as <2 x float> if the LLVM IR type contains a float at
2677  // offset+0 and offset+4. Walk the LLVM IR type to find out if this is the
2678  // case.
2679  if (ContainsFloatAtOffset(IRType, IROffset, getDataLayout()) &&
2680  ContainsFloatAtOffset(IRType, IROffset+4, getDataLayout()))
2681  return llvm::VectorType::get(llvm::Type::getFloatTy(getVMContext()), 2);
2682 
2683  return llvm::Type::getDoubleTy(getVMContext());
2684 }
2685 
2686 
2687 /// GetINTEGERTypeAtOffset - The ABI specifies that a value should be passed in
2688 /// an 8-byte GPR. This means that we either have a scalar or we are talking
2689 /// about the high or low part of an up-to-16-byte struct. This routine picks
2690 /// the best LLVM IR type to represent this, which may be i64 or may be anything
2691 /// else that the backend will pass in a GPR that works better (e.g. i8, %foo*,
2692 /// etc).
2693 ///
2694 /// PrefType is an LLVM IR type that corresponds to (part of) the IR type for
2695 /// the source type. IROffset is an offset in bytes into the LLVM IR type that
2696 /// the 8-byte value references. PrefType may be null.
2697 ///
2698 /// SourceTy is the source-level type for the entire argument. SourceOffset is
2699 /// an offset into this that we're processing (which is always either 0 or 8).
2700 ///
2701 llvm::Type *X86_64ABIInfo::
2702 GetINTEGERTypeAtOffset(llvm::Type *IRType, unsigned IROffset,
2703  QualType SourceTy, unsigned SourceOffset) const {
2704  // If we're dealing with an un-offset LLVM IR type, then it means that we're
2705  // returning an 8-byte unit starting with it. See if we can safely use it.
2706  if (IROffset == 0) {
2707  // Pointers and int64's always fill the 8-byte unit.
2708  if ((isa<llvm::PointerType>(IRType) && Has64BitPointers) ||
2709  IRType->isIntegerTy(64))
2710  return IRType;
2711 
2712  // If we have a 1/2/4-byte integer, we can use it only if the rest of the
2713  // goodness in the source type is just tail padding. This is allowed to
2714  // kick in for struct {double,int} on the int, but not on
2715  // struct{double,int,int} because we wouldn't return the second int. We
2716  // have to do this analysis on the source type because we can't depend on
2717  // unions being lowered a specific way etc.
2718  if (IRType->isIntegerTy(8) || IRType->isIntegerTy(16) ||
2719  IRType->isIntegerTy(32) ||
2720  (isa<llvm::PointerType>(IRType) && !Has64BitPointers)) {
2721  unsigned BitWidth = isa<llvm::PointerType>(IRType) ? 32 :
2722  cast<llvm::IntegerType>(IRType)->getBitWidth();
2723 
2724  if (BitsContainNoUserData(SourceTy, SourceOffset*8+BitWidth,
2725  SourceOffset*8+64, getContext()))
2726  return IRType;
2727  }
2728  }
2729 
2730  if (llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) {
2731  // If this is a struct, recurse into the field at the specified offset.
2732  const llvm::StructLayout *SL = getDataLayout().getStructLayout(STy);
2733  if (IROffset < SL->getSizeInBytes()) {
2734  unsigned FieldIdx = SL->getElementContainingOffset(IROffset);
2735  IROffset -= SL->getElementOffset(FieldIdx);
2736 
2737  return GetINTEGERTypeAtOffset(STy->getElementType(FieldIdx), IROffset,
2738  SourceTy, SourceOffset);
2739  }
2740  }
2741 
2742  if (llvm::ArrayType *ATy = dyn_cast<llvm::ArrayType>(IRType)) {
2743  llvm::Type *EltTy = ATy->getElementType();
2744  unsigned EltSize = getDataLayout().getTypeAllocSize(EltTy);
2745  unsigned EltOffset = IROffset/EltSize*EltSize;
2746  return GetINTEGERTypeAtOffset(EltTy, IROffset-EltOffset, SourceTy,
2747  SourceOffset);
2748  }
2749 
2750  // Okay, we don't have any better idea of what to pass, so we pass this in an
2751  // integer register that isn't too big to fit the rest of the struct.
2752  unsigned TySizeInBytes =
2753  (unsigned)getContext().getTypeSizeInChars(SourceTy).getQuantity();
2754 
2755  assert(TySizeInBytes != SourceOffset && "Empty field?");
2756 
2757  // It is always safe to classify this as an integer type up to i64 that
2758  // isn't larger than the structure.
2759  return llvm::IntegerType::get(getVMContext(),
2760  std::min(TySizeInBytes-SourceOffset, 8U)*8);
2761 }
2762 
2763 
2764 /// GetX86_64ByValArgumentPair - Given a high and low type that can ideally
2765 /// be used as elements of a two register pair to pass or return, return a
2766 /// first class aggregate to represent them. For example, if the low part of
2767 /// a by-value argument should be passed as i32* and the high part as float,
2768 /// return {i32*, float}.
2769 static llvm::Type *
2771  const llvm::DataLayout &TD) {
2772  // In order to correctly satisfy the ABI, we need to the high part to start
2773  // at offset 8. If the high and low parts we inferred are both 4-byte types
2774  // (e.g. i32 and i32) then the resultant struct type ({i32,i32}) won't have
2775  // the second element at offset 8. Check for this:
2776  unsigned LoSize = (unsigned)TD.getTypeAllocSize(Lo);
2777  unsigned HiAlign = TD.getABITypeAlignment(Hi);
2778  unsigned HiStart = llvm::RoundUpToAlignment(LoSize, HiAlign);
2779  assert(HiStart != 0 && HiStart <= 8 && "Invalid x86-64 argument pair!");
2780 
2781  // To handle this, we have to increase the size of the low part so that the
2782  // second element will start at an 8 byte offset. We can't increase the size
2783  // of the second element because it might make us access off the end of the
2784  // struct.
2785  if (HiStart != 8) {
2786  // There are usually two sorts of types the ABI generation code can produce
2787  // for the low part of a pair that aren't 8 bytes in size: float or
2788  // i8/i16/i32. This can also include pointers when they are 32-bit (X32 and
2789  // NaCl).
2790  // Promote these to a larger type.
2791  if (Lo->isFloatTy())
2792  Lo = llvm::Type::getDoubleTy(Lo->getContext());
2793  else {
2794  assert((Lo->isIntegerTy() || Lo->isPointerTy())
2795  && "Invalid/unknown lo type");
2796  Lo = llvm::Type::getInt64Ty(Lo->getContext());
2797  }
2798  }
2799 
2800  llvm::StructType *Result = llvm::StructType::get(Lo, Hi, nullptr);
2801 
2802 
2803  // Verify that the second element is at an 8-byte offset.
2804  assert(TD.getStructLayout(Result)->getElementOffset(1) == 8 &&
2805  "Invalid x86-64 argument pair!");
2806  return Result;
2807 }
2808 
2809 ABIArgInfo X86_64ABIInfo::
2810 classifyReturnType(QualType RetTy) const {
2811  // AMD64-ABI 3.2.3p4: Rule 1. Classify the return type with the
2812  // classification algorithm.
2813  X86_64ABIInfo::Class Lo, Hi;
2814  classify(RetTy, 0, Lo, Hi, /*isNamedArg*/ true);
2815 
2816  // Check some invariants.
2817  assert((Hi != Memory || Lo == Memory) && "Invalid memory classification.");
2818  assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification.");
2819 
2820  llvm::Type *ResType = nullptr;
2821  switch (Lo) {
2822  case NoClass:
2823  if (Hi == NoClass)
2824  return ABIArgInfo::getIgnore();
2825  // If the low part is just padding, it takes no register, leave ResType
2826  // null.
2827  assert((Hi == SSE || Hi == Integer || Hi == X87Up) &&
2828  "Unknown missing lo part");
2829  break;
2830 
2831  case SSEUp:
2832  case X87Up:
2833  llvm_unreachable("Invalid classification for lo word.");
2834 
2835  // AMD64-ABI 3.2.3p4: Rule 2. Types of class memory are returned via
2836  // hidden argument.
2837  case Memory:
2838  return getIndirectReturnResult(RetTy);
2839 
2840  // AMD64-ABI 3.2.3p4: Rule 3. If the class is INTEGER, the next
2841  // available register of the sequence %rax, %rdx is used.
2842  case Integer:
2843  ResType = GetINTEGERTypeAtOffset(CGT.ConvertType(RetTy), 0, RetTy, 0);
2844 
2845  // If we have a sign or zero extended integer, make sure to return Extend
2846  // so that the parameter gets the right LLVM IR attributes.
2847  if (Hi == NoClass && isa<llvm::IntegerType>(ResType)) {
2848  // Treat an enum type as its underlying type.
2849  if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
2850  RetTy = EnumTy->getDecl()->getIntegerType();
2851 
2852  if (RetTy->isIntegralOrEnumerationType() &&
2853  RetTy->isPromotableIntegerType())
2854  return ABIArgInfo::getExtend();
2855  }
2856  break;
2857 
2858  // AMD64-ABI 3.2.3p4: Rule 4. If the class is SSE, the next
2859  // available SSE register of the sequence %xmm0, %xmm1 is used.
2860  case SSE:
2861  ResType = GetSSETypeAtOffset(CGT.ConvertType(RetTy), 0, RetTy, 0);
2862  break;
2863 
2864  // AMD64-ABI 3.2.3p4: Rule 6. If the class is X87, the value is
2865  // returned on the X87 stack in %st0 as 80-bit x87 number.
2866  case X87:
2867  ResType = llvm::Type::getX86_FP80Ty(getVMContext());
2868  break;
2869 
2870  // AMD64-ABI 3.2.3p4: Rule 8. If the class is COMPLEX_X87, the real
2871  // part of the value is returned in %st0 and the imaginary part in
2872  // %st1.
2873  case ComplexX87:
2874  assert(Hi == ComplexX87 && "Unexpected ComplexX87 classification.");
2875  ResType = llvm::StructType::get(llvm::Type::getX86_FP80Ty(getVMContext()),
2876  llvm::Type::getX86_FP80Ty(getVMContext()),
2877  nullptr);
2878  break;
2879  }
2880 
2881  llvm::Type *HighPart = nullptr;
2882  switch (Hi) {
2883  // Memory was handled previously and X87 should
2884  // never occur as a hi class.
2885  case Memory:
2886  case X87:
2887  llvm_unreachable("Invalid classification for hi word.");
2888 
2889  case ComplexX87: // Previously handled.
2890  case NoClass:
2891  break;
2892 
2893  case Integer:
2894  HighPart = GetINTEGERTypeAtOffset(CGT.ConvertType(RetTy), 8, RetTy, 8);
2895  if (Lo == NoClass) // Return HighPart at offset 8 in memory.
2896  return ABIArgInfo::getDirect(HighPart, 8);
2897  break;
2898  case SSE:
2899  HighPart = GetSSETypeAtOffset(CGT.ConvertType(RetTy), 8, RetTy, 8);
2900  if (Lo == NoClass) // Return HighPart at offset 8 in memory.
2901  return ABIArgInfo::getDirect(HighPart, 8);
2902  break;
2903 
2904  // AMD64-ABI 3.2.3p4: Rule 5. If the class is SSEUP, the eightbyte
2905  // is passed in the next available eightbyte chunk if the last used
2906  // vector register.
2907  //
2908  // SSEUP should always be preceded by SSE, just widen.
2909  case SSEUp:
2910  assert(Lo == SSE && "Unexpected SSEUp classification.");
2911  ResType = GetByteVectorType(RetTy);
2912  break;
2913 
2914  // AMD64-ABI 3.2.3p4: Rule 7. If the class is X87UP, the value is
2915  // returned together with the previous X87 value in %st0.
2916  case X87Up:
2917  // If X87Up is preceded by X87, we don't need to do
2918  // anything. However, in some cases with unions it may not be
2919  // preceded by X87. In such situations we follow gcc and pass the
2920  // extra bits in an SSE reg.
2921  if (Lo != X87) {
2922  HighPart = GetSSETypeAtOffset(CGT.ConvertType(RetTy), 8, RetTy, 8);
2923  if (Lo == NoClass) // Return HighPart at offset 8 in memory.
2924  return ABIArgInfo::getDirect(HighPart, 8);
2925  }
2926  break;
2927  }
2928 
2929  // If a high part was specified, merge it together with the low part. It is
2930  // known to pass in the high eightbyte of the result. We do this by forming a
2931  // first class struct aggregate with the high and low part: {low, high}
2932  if (HighPart)
2933  ResType = GetX86_64ByValArgumentPair(ResType, HighPart, getDataLayout());
2934 
2935  return ABIArgInfo::getDirect(ResType);
2936 }
2937 
2938 ABIArgInfo X86_64ABIInfo::classifyArgumentType(
2939  QualType Ty, unsigned freeIntRegs, unsigned &neededInt, unsigned &neededSSE,
2940  bool isNamedArg)
2941  const
2942 {
2944 
2945  X86_64ABIInfo::Class Lo, Hi;
2946  classify(Ty, 0, Lo, Hi, isNamedArg);
2947 
2948  // Check some invariants.
2949  // FIXME: Enforce these by construction.
2950  assert((Hi != Memory || Lo == Memory) && "Invalid memory classification.");
2951  assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification.");
2952 
2953  neededInt = 0;
2954  neededSSE = 0;
2955  llvm::Type *ResType = nullptr;
2956  switch (Lo) {
2957  case NoClass:
2958  if (Hi == NoClass)
2959  return ABIArgInfo::getIgnore();
2960  // If the low part is just padding, it takes no register, leave ResType
2961  // null.
2962  assert((Hi == SSE || Hi == Integer || Hi == X87Up) &&
2963  "Unknown missing lo part");
2964  break;
2965 
2966  // AMD64-ABI 3.2.3p3: Rule 1. If the class is MEMORY, pass the argument
2967  // on the stack.
2968  case Memory:
2969 
2970  // AMD64-ABI 3.2.3p3: Rule 5. If the class is X87, X87UP or
2971  // COMPLEX_X87, it is passed in memory.
2972  case X87:
2973  case ComplexX87:
2974  if (getRecordArgABI(Ty, getCXXABI()) == CGCXXABI::RAA_Indirect)
2975  ++neededInt;
2976  return getIndirectResult(Ty, freeIntRegs);
2977 
2978  case SSEUp:
2979  case X87Up:
2980  llvm_unreachable("Invalid classification for lo word.");
2981 
2982  // AMD64-ABI 3.2.3p3: Rule 2. If the class is INTEGER, the next
2983  // available register of the sequence %rdi, %rsi, %rdx, %rcx, %r8
2984  // and %r9 is used.
2985  case Integer:
2986  ++neededInt;
2987 
2988  // Pick an 8-byte type based on the preferred type.
2989  ResType = GetINTEGERTypeAtOffset(CGT.ConvertType(Ty), 0, Ty, 0);
2990 
2991  // If we have a sign or zero extended integer, make sure to return Extend
2992  // so that the parameter gets the right LLVM IR attributes.
2993  if (Hi == NoClass && isa<llvm::IntegerType>(ResType)) {
2994  // Treat an enum type as its underlying type.
2995  if (const EnumType *EnumTy = Ty->getAs<EnumType>())
2996  Ty = EnumTy->getDecl()->getIntegerType();
2997 
2998  if (Ty->isIntegralOrEnumerationType() &&
3000  return ABIArgInfo::getExtend();
3001  }
3002 
3003  break;
3004 
3005  // AMD64-ABI 3.2.3p3: Rule 3. If the class is SSE, the next
3006  // available SSE register is used, the registers are taken in the
3007  // order from %xmm0 to %xmm7.
3008  case SSE: {
3009  llvm::Type *IRType = CGT.ConvertType(Ty);
3010  ResType = GetSSETypeAtOffset(IRType, 0, Ty, 0);
3011  ++neededSSE;
3012  break;
3013  }
3014  }
3015 
3016  llvm::Type *HighPart = nullptr;
3017  switch (Hi) {
3018  // Memory was handled previously, ComplexX87 and X87 should
3019  // never occur as hi classes, and X87Up must be preceded by X87,
3020  // which is passed in memory.
3021  case Memory:
3022  case X87:
3023  case ComplexX87:
3024  llvm_unreachable("Invalid classification for hi word.");
3025 
3026  case NoClass: break;
3027 
3028  case Integer:
3029  ++neededInt;
3030  // Pick an 8-byte type based on the preferred type.
3031  HighPart = GetINTEGERTypeAtOffset(CGT.ConvertType(Ty), 8, Ty, 8);
3032 
3033  if (Lo == NoClass) // Pass HighPart at offset 8 in memory.
3034  return ABIArgInfo::getDirect(HighPart, 8);
3035  break;
3036 
3037  // X87Up generally doesn't occur here (long double is passed in
3038  // memory), except in situations involving unions.
3039  case X87Up:
3040  case SSE:
3041  HighPart = GetSSETypeAtOffset(CGT.ConvertType(Ty), 8, Ty, 8);
3042 
3043  if (Lo == NoClass) // Pass HighPart at offset 8 in memory.
3044  return ABIArgInfo::getDirect(HighPart, 8);
3045 
3046  ++neededSSE;
3047  break;
3048 
3049  // AMD64-ABI 3.2.3p3: Rule 4. If the class is SSEUP, the
3050  // eightbyte is passed in the upper half of the last used SSE
3051  // register. This only happens when 128-bit vectors are passed.
3052  case SSEUp:
3053  assert(Lo == SSE && "Unexpected SSEUp classification");
3054  ResType = GetByteVectorType(Ty);
3055  break;
3056  }
3057 
3058  // If a high part was specified, merge it together with the low part. It is
3059  // known to pass in the high eightbyte of the result. We do this by forming a
3060  // first class struct aggregate with the high and low part: {low, high}
3061  if (HighPart)
3062  ResType = GetX86_64ByValArgumentPair(ResType, HighPart, getDataLayout());
3063 
3064  return ABIArgInfo::getDirect(ResType);
3065 }
3066 
3067 void X86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const {
3068 
3069  if (!getCXXABI().classifyReturnType(FI))
3070  FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
3071 
3072  // Keep track of the number of assigned registers.
3073  unsigned freeIntRegs = 6, freeSSERegs = 8;
3074 
3075  // If the return value is indirect, then the hidden argument is consuming one
3076  // integer register.
3077  if (FI.getReturnInfo().isIndirect())
3078  --freeIntRegs;
3079 
3080  // The chain argument effectively gives us another free register.
3081  if (FI.isChainCall())
3082  ++freeIntRegs;
3083 
3084  unsigned NumRequiredArgs = FI.getNumRequiredArgs();
3085  // AMD64-ABI 3.2.3p3: Once arguments are classified, the registers
3086  // get assigned (in left-to-right order) for passing as follows...
3087  unsigned ArgNo = 0;
3088  for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end();
3089  it != ie; ++it, ++ArgNo) {
3090  bool IsNamedArg = ArgNo < NumRequiredArgs;
3091 
3092  unsigned neededInt, neededSSE;
3093  it->info = classifyArgumentType(it->type, freeIntRegs, neededInt,
3094  neededSSE, IsNamedArg);
3095 
3096  // AMD64-ABI 3.2.3p3: If there are no registers available for any
3097  // eightbyte of an argument, the whole argument is passed on the
3098  // stack. If registers have already been assigned for some
3099  // eightbytes of such an argument, the assignments get reverted.
3100  if (freeIntRegs >= neededInt && freeSSERegs >= neededSSE) {
3101  freeIntRegs -= neededInt;
3102  freeSSERegs -= neededSSE;
3103  } else {
3104  it->info = getIndirectResult(it->type, freeIntRegs);
3105  }
3106  }
3107 }
3108 
3110  Address VAListAddr, QualType Ty) {
3111  Address overflow_arg_area_p = CGF.Builder.CreateStructGEP(
3112  VAListAddr, 2, CharUnits::fromQuantity(8), "overflow_arg_area_p");
3113  llvm::Value *overflow_arg_area =
3114  CGF.Builder.CreateLoad(overflow_arg_area_p, "overflow_arg_area");
3115 
3116  // AMD64-ABI 3.5.7p5: Step 7. Align l->overflow_arg_area upwards to a 16
3117  // byte boundary if alignment needed by type exceeds 8 byte boundary.
3118  // It isn't stated explicitly in the standard, but in practice we use
3119  // alignment greater than 16 where necessary.
3120  CharUnits Align = CGF.getContext().getTypeAlignInChars(Ty);
3121  if (Align > CharUnits::fromQuantity(8)) {
3122  overflow_arg_area = emitRoundPointerUpToAlignment(CGF, overflow_arg_area,
3123  Align);
3124  }
3125 
3126  // AMD64-ABI 3.5.7p5: Step 8. Fetch type from l->overflow_arg_area.
3127  llvm::Type *LTy = CGF.ConvertTypeForMem(Ty);
3128  llvm::Value *Res =
3129  CGF.Builder.CreateBitCast(overflow_arg_area,
3130  llvm::PointerType::getUnqual(LTy));
3131 
3132  // AMD64-ABI 3.5.7p5: Step 9. Set l->overflow_arg_area to:
3133  // l->overflow_arg_area + sizeof(type).
3134  // AMD64-ABI 3.5.7p5: Step 10. Align l->overflow_arg_area upwards to
3135  // an 8 byte boundary.
3136 
3137  uint64_t SizeInBytes = (CGF.getContext().getTypeSize(Ty) + 7) / 8;
3138  llvm::Value *Offset =
3139  llvm::ConstantInt::get(CGF.Int32Ty, (SizeInBytes + 7) & ~7);
3140  overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset,
3141  "overflow_arg_area.next");
3142  CGF.Builder.CreateStore(overflow_arg_area, overflow_arg_area_p);
3143 
3144  // AMD64-ABI 3.5.7p5: Step 11. Return the fetched type.
3145  return Address(Res, Align);
3146 }
3147 
3148 Address X86_64ABIInfo::EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
3149  QualType Ty) const {
3150  // Assume that va_list type is correct; should be pointer to LLVM type:
3151  // struct {
3152  // i32 gp_offset;
3153  // i32 fp_offset;
3154  // i8* overflow_arg_area;
3155  // i8* reg_save_area;
3156  // };
3157  unsigned neededInt, neededSSE;
3158 
3159  Ty = getContext().getCanonicalType(Ty);
3160  ABIArgInfo AI = classifyArgumentType(Ty, 0, neededInt, neededSSE,
3161  /*isNamedArg*/false);
3162 
3163  // AMD64-ABI 3.5.7p5: Step 1. Determine whether type may be passed
3164  // in the registers. If not go to step 7.
3165  if (!neededInt && !neededSSE)
3166  return EmitX86_64VAArgFromMemory(CGF, VAListAddr, Ty);
3167 
3168  // AMD64-ABI 3.5.7p5: Step 2. Compute num_gp to hold the number of
3169  // general purpose registers needed to pass type and num_fp to hold
3170  // the number of floating point registers needed.
3171 
3172  // AMD64-ABI 3.5.7p5: Step 3. Verify whether arguments fit into
3173  // registers. In the case: l->gp_offset > 48 - num_gp * 8 or
3174  // l->fp_offset > 304 - num_fp * 16 go to step 7.
3175  //
3176  // NOTE: 304 is a typo, there are (6 * 8 + 8 * 16) = 176 bytes of
3177  // register save space).
3178 
3179  llvm::Value *InRegs = nullptr;
3180  Address gp_offset_p = Address::invalid(), fp_offset_p = Address::invalid();
3181  llvm::Value *gp_offset = nullptr, *fp_offset = nullptr;
3182  if (neededInt) {
3183  gp_offset_p =
3184  CGF.Builder.CreateStructGEP(VAListAddr, 0, CharUnits::Zero(),
3185  "gp_offset_p");
3186  gp_offset = CGF.Builder.CreateLoad(gp_offset_p, "gp_offset");
3187  InRegs = llvm::ConstantInt::get(CGF.Int32Ty, 48 - neededInt * 8);
3188  InRegs = CGF.Builder.CreateICmpULE(gp_offset, InRegs, "fits_in_gp");
3189  }
3190 
3191  if (neededSSE) {
3192  fp_offset_p =
3193  CGF.Builder.CreateStructGEP(VAListAddr, 1, CharUnits::fromQuantity(4),
3194  "fp_offset_p");
3195  fp_offset = CGF.Builder.CreateLoad(fp_offset_p, "fp_offset");
3196  llvm::Value *FitsInFP =
3197  llvm::ConstantInt::get(CGF.Int32Ty, 176 - neededSSE * 16);
3198  FitsInFP = CGF.Builder.CreateICmpULE(fp_offset, FitsInFP, "fits_in_fp");
3199  InRegs = InRegs ? CGF.Builder.CreateAnd(InRegs, FitsInFP) : FitsInFP;
3200  }
3201 
3202  llvm::BasicBlock *InRegBlock = CGF.createBasicBlock("vaarg.in_reg");
3203  llvm::BasicBlock *InMemBlock = CGF.createBasicBlock("vaarg.in_mem");
3204  llvm::BasicBlock *ContBlock = CGF.createBasicBlock("vaarg.end");
3205  CGF.Builder.CreateCondBr(InRegs, InRegBlock, InMemBlock);
3206 
3207  // Emit code to load the value if it was passed in registers.
3208 
3209  CGF.EmitBlock(InRegBlock);
3210 
3211  // AMD64-ABI 3.5.7p5: Step 4. Fetch type from l->reg_save_area with
3212  // an offset of l->gp_offset and/or l->fp_offset. This may require
3213  // copying to a temporary location in case the parameter is passed
3214  // in different register classes or requires an alignment greater
3215  // than 8 for general purpose registers and 16 for XMM registers.
3216  //
3217  // FIXME: This really results in shameful code when we end up needing to
3218  // collect arguments from different places; often what should result in a
3219  // simple assembling of a structure from scattered addresses has many more
3220  // loads than necessary. Can we clean this up?
3221  llvm::Type *LTy = CGF.ConvertTypeForMem(Ty);
3222  llvm::Value *RegSaveArea = CGF.Builder.CreateLoad(
3223  CGF.Builder.CreateStructGEP(VAListAddr, 3, CharUnits::fromQuantity(16)),
3224  "reg_save_area");
3225 
3226  Address RegAddr = Address::invalid();
3227  if (neededInt && neededSSE) {
3228  // FIXME: Cleanup.
3229  assert(AI.isDirect() && "Unexpected ABI info for mixed regs");
3230  llvm::StructType *ST = cast<llvm::StructType>(AI.getCoerceToType());
3231  Address Tmp = CGF.CreateMemTemp(Ty);
3232  Tmp = CGF.Builder.CreateElementBitCast(Tmp, ST);
3233  assert(ST->getNumElements() == 2 && "Unexpected ABI info for mixed regs");
3234  llvm::Type *TyLo = ST->getElementType(0);
3235  llvm::Type *TyHi = ST->getElementType(1);
3236  assert((TyLo->isFPOrFPVectorTy() ^ TyHi->isFPOrFPVectorTy()) &&
3237  "Unexpected ABI info for mixed regs");
3238  llvm::Type *PTyLo = llvm::PointerType::getUnqual(TyLo);
3239  llvm::Type *PTyHi = llvm::PointerType::getUnqual(TyHi);
3240  llvm::Value *GPAddr = CGF.Builder.CreateGEP(RegSaveArea, gp_offset);
3241  llvm::Value *FPAddr = CGF.Builder.CreateGEP(RegSaveArea, fp_offset);
3242  llvm::Value *RegLoAddr = TyLo->isFPOrFPVectorTy() ? FPAddr : GPAddr;
3243  llvm::Value *RegHiAddr = TyLo->isFPOrFPVectorTy() ? GPAddr : FPAddr;
3244 
3245  // Copy the first element.
3246  llvm::Value *V =
3248  CGF.Builder.CreateBitCast(RegLoAddr, PTyLo));
3249  CGF.Builder.CreateStore(V,
3250  CGF.Builder.CreateStructGEP(Tmp, 0, CharUnits::Zero()));
3251 
3252  // Copy the second element.
3254  CGF.Builder.CreateBitCast(RegHiAddr, PTyHi));
3256  getDataLayout().getStructLayout(ST)->getElementOffset(1));
3257  CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1, Offset));
3258 
3259  RegAddr = CGF.Builder.CreateElementBitCast(Tmp, LTy);
3260  } else if (neededInt) {
3261  RegAddr = Address(CGF.Builder.CreateGEP(RegSaveArea, gp_offset),
3263  RegAddr = CGF.Builder.CreateElementBitCast(RegAddr, LTy);
3264 
3265  // Copy to a temporary if necessary to ensure the appropriate alignment.
3266  std::pair<CharUnits, CharUnits> SizeAlign =
3267  getContext().getTypeInfoInChars(Ty);
3268  uint64_t TySize = SizeAlign.first.getQuantity();
3269  CharUnits TyAlign = SizeAlign.second;
3270 
3271  // Copy into a temporary if the type is more aligned than the
3272  // register save area.
3273  if (TyAlign.getQuantity() > 8) {
3274  Address Tmp = CGF.CreateMemTemp(Ty);
3275  CGF.Builder.CreateMemCpy(Tmp, RegAddr, TySize, false);
3276  RegAddr = Tmp;
3277  }
3278 
3279  } else if (neededSSE == 1) {
3280  RegAddr = Address(CGF.Builder.CreateGEP(RegSaveArea, fp_offset),
3282  RegAddr = CGF.Builder.CreateElementBitCast(RegAddr, LTy);
3283  } else {
3284  assert(neededSSE == 2 && "Invalid number of needed registers!");
3285  // SSE registers are spaced 16 bytes apart in the register save
3286  // area, we need to collect the two eightbytes together.
3287  // The ABI isn't explicit about this, but it seems reasonable
3288  // to assume that the slots are 16-byte aligned, since the stack is
3289  // naturally 16-byte aligned and the prologue is expected to store
3290  // all the SSE registers to the RSA.
3291  Address RegAddrLo = Address(CGF.Builder.CreateGEP(RegSaveArea, fp_offset),
3293  Address RegAddrHi =
3294  CGF.Builder.CreateConstInBoundsByteGEP(RegAddrLo,
3296  llvm::Type *DoubleTy = CGF.DoubleTy;
3297  llvm::StructType *ST = llvm::StructType::get(DoubleTy, DoubleTy, nullptr);
3298  llvm::Value *V;
3299  Address Tmp = CGF.CreateMemTemp(Ty);
3300  Tmp = CGF.Builder.CreateElementBitCast(Tmp, ST);
3301  V = CGF.Builder.CreateLoad(
3302  CGF.Builder.CreateElementBitCast(RegAddrLo, DoubleTy));
3303  CGF.Builder.CreateStore(V,
3304  CGF.Builder.CreateStructGEP(Tmp, 0, CharUnits::Zero()));
3305  V = CGF.Builder.CreateLoad(
3306  CGF.Builder.CreateElementBitCast(RegAddrHi, DoubleTy));
3307  CGF.Builder.CreateStore(V,
3309 
3310  RegAddr = CGF.Builder.CreateElementBitCast(Tmp, LTy);
3311  }
3312 
3313  // AMD64-ABI 3.5.7p5: Step 5. Set:
3314  // l->gp_offset = l->gp_offset + num_gp * 8
3315  // l->fp_offset = l->fp_offset + num_fp * 16.
3316  if (neededInt) {
3317  llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededInt * 8);
3318  CGF.Builder.CreateStore(CGF.Builder.CreateAdd(gp_offset, Offset),
3319  gp_offset_p);
3320  }
3321  if (neededSSE) {
3322  llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededSSE * 16);
3323  CGF.Builder.CreateStore(CGF.Builder.CreateAdd(fp_offset, Offset),
3324  fp_offset_p);
3325  }
3326  CGF.EmitBranch(ContBlock);
3327 
3328  // Emit code to load the value if it was passed in memory.
3329 
3330  CGF.EmitBlock(InMemBlock);
3331  Address MemAddr = EmitX86_64VAArgFromMemory(CGF, VAListAddr, Ty);
3332 
3333  // Return the appropriate result.
3334 
3335  CGF.EmitBlock(ContBlock);
3336  Address ResAddr = emitMergePHI(CGF, RegAddr, InRegBlock, MemAddr, InMemBlock,
3337  "vaarg.addr");
3338  return ResAddr;
3339 }
3340 
3341 Address X86_64ABIInfo::EmitMSVAArg(CodeGenFunction &CGF, Address VAListAddr,
3342  QualType Ty) const {
3343  return emitVoidPtrVAArg(CGF, VAListAddr, Ty, /*indirect*/ false,
3344  CGF.getContext().getTypeInfoInChars(Ty),
3346  /*allowHigherAlign*/ false);
3347 }
3348 
3349 ABIArgInfo WinX86_64ABIInfo::classify(QualType Ty, unsigned &FreeSSERegs,
3350  bool IsReturnType) const {
3351 
3352  if (Ty->isVoidType())
3353  return ABIArgInfo::getIgnore();
3354 
3355  if (const EnumType *EnumTy = Ty->getAs<EnumType>())
3356  Ty = EnumTy->getDecl()->getIntegerType();
3357 
3358  TypeInfo Info = getContext().getTypeInfo(Ty);
3359  uint64_t Width = Info.Width;
3360  CharUnits Align = getContext().toCharUnitsFromBits(Info.Align);
3361 
3362  const RecordType *RT = Ty->getAs<RecordType>();
3363  if (RT) {
3364  if (!IsReturnType) {
3365  if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(RT, getCXXABI()))
3366  return getNaturalAlignIndirect(Ty, RAA == CGCXXABI::RAA_DirectInMemory);
3367  }
3368 
3369  if (RT->getDecl()->hasFlexibleArrayMember())
3370  return getNaturalAlignIndirect(Ty, /*ByVal=*/false);
3371 
3372  }
3373 
3374  // vectorcall adds the concept of a homogenous vector aggregate, similar to
3375  // other targets.
3376  const Type *Base = nullptr;
3377  uint64_t NumElts = 0;
3378  if (FreeSSERegs && isHomogeneousAggregate(Ty, Base, NumElts)) {
3379  if (FreeSSERegs >= NumElts) {
3380  FreeSSERegs -= NumElts;
3381  if (IsReturnType || Ty->isBuiltinType() || Ty->isVectorType())
3382  return ABIArgInfo::getDirect();
3383  return ABIArgInfo::getExpand();
3384  }
3385  return ABIArgInfo::getIndirect(Align, /*ByVal=*/false);
3386  }
3387 
3388 
3389  if (Ty->isMemberPointerType()) {
3390  // If the member pointer is represented by an LLVM int or ptr, pass it
3391  // directly.
3392  llvm::Type *LLTy = CGT.ConvertType(Ty);
3393  if (LLTy->isPointerTy() || LLTy->isIntegerTy())
3394  return ABIArgInfo::getDirect();
3395  }
3396 
3397  if (RT || Ty->isAnyComplexType() || Ty->isMemberPointerType()) {
3398  // MS x64 ABI requirement: "Any argument that doesn't fit in 8 bytes, or is
3399  // not 1, 2, 4, or 8 bytes, must be passed by reference."
3400  if (Width > 64 || !llvm::isPowerOf2_64(Width))
3401  return getNaturalAlignIndirect(Ty, /*ByVal=*/false);
3402 
3403  // Otherwise, coerce it to a small integer.
3404  return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), Width));
3405  }
3406 
3407  // Bool type is always extended to the ABI, other builtin types are not
3408  // extended.
3409  const BuiltinType *BT = Ty->getAs<BuiltinType>();
3410  if (BT && BT->getKind() == BuiltinType::Bool)
3411  return ABIArgInfo::getExtend();
3412 
3413  // Mingw64 GCC uses the old 80 bit extended precision floating point unit. It
3414  // passes them indirectly through memory.
3415  if (IsMingw64 && BT && BT->getKind() == BuiltinType::LongDouble) {
3416  const llvm::fltSemantics *LDF = &getTarget().getLongDoubleFormat();
3417  if (LDF == &llvm::APFloat::x87DoubleExtended)
3418  return ABIArgInfo::getIndirect(Align, /*ByVal=*/false);
3419  }
3420 
3421  return ABIArgInfo::getDirect();
3422 }
3423 
3424 void WinX86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const {
3425  bool IsVectorCall =
3426  FI.getCallingConvention() == llvm::CallingConv::X86_VectorCall;
3427 
3428  // We can use up to 4 SSE return registers with vectorcall.
3429  unsigned FreeSSERegs = IsVectorCall ? 4 : 0;
3430  if (!getCXXABI().classifyReturnType(FI))
3431  FI.getReturnInfo() = classify(FI.getReturnType(), FreeSSERegs, true);
3432 
3433  // We can use up to 6 SSE register parameters with vectorcall.
3434  FreeSSERegs = IsVectorCall ? 6 : 0;
3435  for (auto &I : FI.arguments())
3436  I.info = classify(I.type, FreeSSERegs, false);
3437 }
3438 
3439 Address WinX86_64ABIInfo::EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
3440  QualType Ty) const {
3441  return emitVoidPtrVAArg(CGF, VAListAddr, Ty, /*indirect*/ false,
3442  CGF.getContext().getTypeInfoInChars(Ty),
3444  /*allowHigherAlign*/ false);
3445 }
3446 
3447 // PowerPC-32
3448 namespace {
3449 /// PPC32_SVR4_ABIInfo - The 32-bit PowerPC ELF (SVR4) ABI information.
3450 class PPC32_SVR4_ABIInfo : public DefaultABIInfo {
3451 bool IsSoftFloatABI;
3452 public:
3453  PPC32_SVR4_ABIInfo(CodeGen::CodeGenTypes &CGT, bool SoftFloatABI)
3454  : DefaultABIInfo(CGT), IsSoftFloatABI(SoftFloatABI) {}
3455 
3456  Address EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
3457  QualType Ty) const override;
3458 };
3459 
3460 class PPC32TargetCodeGenInfo : public TargetCodeGenInfo {
3461 public:
3462  PPC32TargetCodeGenInfo(CodeGenTypes &CGT, bool SoftFloatABI)
3463  : TargetCodeGenInfo(new PPC32_SVR4_ABIInfo(CGT, SoftFloatABI)) {}
3464 
3465  int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const override {
3466  // This is recovered from gcc output.
3467  return 1; // r1 is the dedicated stack pointer
3468  }
3469 
3470  bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
3471  llvm::Value *Address) const override;
3472 };
3473 
3474 }
3475 
3476 Address PPC32_SVR4_ABIInfo::EmitVAArg(CodeGenFunction &CGF, Address VAList,
3477  QualType Ty) const {
3478  const unsigned OverflowLimit = 8;
3479  if (const ComplexType *CTy = Ty->getAs<ComplexType>()) {
3480  // TODO: Implement this. For now ignore.
3481  (void)CTy;
3482  return Address::invalid();
3483  }
3484 
3485  // struct __va_list_tag {
3486  // unsigned char gpr;
3487  // unsigned char fpr;
3488  // unsigned short reserved;
3489  // void *overflow_arg_area;
3490  // void *reg_save_area;
3491  // };
3492 
3493  bool isI64 = Ty->isIntegerType() && getContext().getTypeSize(Ty) == 64;
3494  bool isInt =
3495  Ty->isIntegerType() || Ty->isPointerType() || Ty->isAggregateType();
3496  bool isF64 = Ty->isFloatingType() && getContext().getTypeSize(Ty) == 64;
3497 
3498  // All aggregates are passed indirectly? That doesn't seem consistent
3499  // with the argument-lowering code.
3500  bool isIndirect = Ty->isAggregateType();
3501 
3502  CGBuilderTy &Builder = CGF.Builder;
3503 
3504  // The calling convention either uses 1-2 GPRs or 1 FPR.
3505  Address NumRegsAddr = Address::invalid();
3506  if (isInt || IsSoftFloatABI) {
3507  NumRegsAddr = Builder.CreateStructGEP(VAList, 0, CharUnits::Zero(), "gpr");
3508  } else {
3509  NumRegsAddr = Builder.CreateStructGEP(VAList, 1, CharUnits::One(), "fpr");
3510  }
3511 
3512  llvm::Value *NumRegs = Builder.CreateLoad(NumRegsAddr, "numUsedRegs");
3513 
3514  // "Align" the register count when TY is i64.
3515  if (isI64 || (isF64 && IsSoftFloatABI)) {
3516  NumRegs = Builder.CreateAdd(NumRegs, Builder.getInt8(1));
3517  NumRegs = Builder.CreateAnd(NumRegs, Builder.getInt8((uint8_t) ~1U));
3518  }
3519 
3520  llvm::Value *CC =
3521  Builder.CreateICmpULT(NumRegs, Builder.getInt8(OverflowLimit), "cond");
3522 
3523  llvm::BasicBlock *UsingRegs = CGF.createBasicBlock("using_regs");
3524  llvm::BasicBlock *UsingOverflow = CGF.createBasicBlock("using_overflow");
3525  llvm::BasicBlock *Cont = CGF.createBasicBlock("cont");
3526 
3527  Builder.CreateCondBr(CC, UsingRegs, UsingOverflow);
3528 
3529  llvm::Type *DirectTy = CGF.ConvertType(Ty);
3530  if (isIndirect) DirectTy = DirectTy->getPointerTo(0);
3531 
3532  // Case 1: consume registers.
3533  Address RegAddr = Address::invalid();
3534  {
3535  CGF.EmitBlock(UsingRegs);
3536 
3537  Address RegSaveAreaPtr =
3538  Builder.CreateStructGEP(VAList, 4, CharUnits::fromQuantity(8));
3539  RegAddr = Address(Builder.CreateLoad(RegSaveAreaPtr),
3541  assert(RegAddr.getElementType() == CGF.Int8Ty);
3542 
3543  // Floating-point registers start after the general-purpose registers.
3544  if (!(isInt || IsSoftFloatABI)) {
3545  RegAddr = Builder.CreateConstInBoundsByteGEP(RegAddr,
3547  }
3548 
3549  // Get the address of the saved value by scaling the number of
3550  // registers we've used by the number of
3551  CharUnits RegSize = CharUnits::fromQuantity((isInt || IsSoftFloatABI) ? 4 : 8);
3552  llvm::Value *RegOffset =
3553  Builder.CreateMul(NumRegs, Builder.getInt8(RegSize.getQuantity()));
3554  RegAddr = Address(Builder.CreateInBoundsGEP(CGF.Int8Ty,
3555  RegAddr.getPointer(), RegOffset),
3556  RegAddr.getAlignment().alignmentOfArrayElement(RegSize));
3557  RegAddr = Builder.CreateElementBitCast(RegAddr, DirectTy);
3558 
3559  // Increase the used-register count.
3560  NumRegs =
3561  Builder.CreateAdd(NumRegs,
3562  Builder.getInt8((isI64 || (isF64 && IsSoftFloatABI)) ? 2 : 1));
3563  Builder.CreateStore(NumRegs, NumRegsAddr);
3564 
3565  CGF.EmitBranch(Cont);
3566  }
3567 
3568  // Case 2: consume space in the overflow area.
3569  Address MemAddr = Address::invalid();
3570  {
3571  CGF.EmitBlock(UsingOverflow);
3572 
3573  Builder.CreateStore(Builder.getInt8(OverflowLimit), NumRegsAddr);
3574 
3575  // Everything in the overflow area is rounded up to a size of at least 4.
3576  CharUnits OverflowAreaAlign = CharUnits::fromQuantity(4);
3577 
3578  CharUnits Size;
3579  if (!isIndirect) {
3580  auto TypeInfo = CGF.getContext().getTypeInfoInChars(Ty);
3581  Size = TypeInfo.first.RoundUpToAlignment(OverflowAreaAlign);
3582  } else {
3583  Size = CGF.getPointerSize();
3584  }
3585 
3586  Address OverflowAreaAddr =
3587  Builder.CreateStructGEP(VAList, 3, CharUnits::fromQuantity(4));
3588  Address OverflowArea(Builder.CreateLoad(OverflowAreaAddr, "argp.cur"),
3589  OverflowAreaAlign);
3590  // Round up address of argument to alignment
3591  CharUnits Align = CGF.getContext().getTypeAlignInChars(Ty);
3592  if (Align > OverflowAreaAlign) {
3593  llvm::Value *Ptr = OverflowArea.getPointer();
3594  OverflowArea = Address(emitRoundPointerUpToAlignment(CGF, Ptr, Align),
3595  Align);
3596  }
3597 
3598  MemAddr = Builder.CreateElementBitCast(OverflowArea, DirectTy);
3599 
3600  // Increase the overflow area.
3601  OverflowArea = Builder.CreateConstInBoundsByteGEP(OverflowArea, Size);
3602  Builder.CreateStore(OverflowArea.getPointer(), OverflowAreaAddr);
3603  CGF.EmitBranch(Cont);
3604  }
3605 
3606  CGF.EmitBlock(Cont);
3607 
3608  // Merge the cases with a phi.
3609  Address Result = emitMergePHI(CGF, RegAddr, UsingRegs, MemAddr, UsingOverflow,
3610  "vaarg.addr");
3611 
3612  // Load the pointer if the argument was passed indirectly.
3613  if (isIndirect) {
3614  Result = Address(Builder.CreateLoad(Result, "aggr"),
3615  getContext().getTypeAlignInChars(Ty));
3616  }
3617 
3618  return Result;
3619 }
3620 
3621 bool
3622 PPC32TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
3623  llvm::Value *Address) const {
3624  // This is calculated from the LLVM and GCC tables and verified
3625  // against gcc output. AFAIK all ABIs use the same encoding.
3626 
3627  CodeGen::CGBuilderTy &Builder = CGF.Builder;
3628 
3629  llvm::IntegerType *i8 = CGF.Int8Ty;
3630  llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4);
3631  llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8);
3632  llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16);
3633 
3634  // 0-31: r0-31, the 4-byte general-purpose registers
3635  AssignToArrayRange(Builder, Address, Four8, 0, 31);
3636 
3637  // 32-63: fp0-31, the 8-byte floating-point registers
3638  AssignToArrayRange(Builder, Address, Eight8, 32, 63);
3639 
3640  // 64-76 are various 4-byte special-purpose registers:
3641  // 64: mq
3642  // 65: lr
3643  // 66: ctr
3644  // 67: ap
3645  // 68-75 cr0-7
3646  // 76: xer
3647  AssignToArrayRange(Builder, Address, Four8, 64, 76);
3648 
3649  // 77-108: v0-31, the 16-byte vector registers
3650  AssignToArrayRange(Builder, Address, Sixteen8, 77, 108);
3651 
3652  // 109: vrsave
3653  // 110: vscr
3654  // 111: spe_acc
3655  // 112: spefscr
3656  // 113: sfp
3657  AssignToArrayRange(Builder, Address, Four8, 109, 113);
3658 
3659  return false;
3660 }
3661 
3662 // PowerPC-64
3663 
3664 namespace {
3665 /// PPC64_SVR4_ABIInfo - The 64-bit PowerPC ELF (SVR4) ABI information.
3666 class PPC64_SVR4_ABIInfo : public DefaultABIInfo {
3667 public:
3668  enum ABIKind {
3669  ELFv1 = 0,
3670  ELFv2
3671  };
3672 
3673 private:
3674  static const unsigned GPRBits = 64;
3675  ABIKind Kind;
3676  bool HasQPX;
3677 
3678  // A vector of float or double will be promoted to <4 x f32> or <4 x f64> and
3679  // will be passed in a QPX register.
3680  bool IsQPXVectorTy(const Type *Ty) const {
3681  if (!HasQPX)
3682  return false;
3683 
3684  if (const VectorType *VT = Ty->getAs<VectorType>()) {
3685  unsigned NumElements = VT->getNumElements();
3686  if (NumElements == 1)
3687  return false;
3688 
3689  if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::Double)) {
3690  if (getContext().getTypeSize(Ty) <= 256)
3691  return true;
3692  } else if (VT->getElementType()->
3693  isSpecificBuiltinType(BuiltinType::Float)) {
3694  if (getContext().getTypeSize(Ty) <= 128)
3695  return true;
3696  }
3697  }
3698 
3699  return false;
3700  }
3701 
3702  bool IsQPXVectorTy(QualType Ty) const {
3703  return IsQPXVectorTy(Ty.getTypePtr());
3704  }
3705 
3706 public:
3707  PPC64_SVR4_ABIInfo(CodeGen::CodeGenTypes &CGT, ABIKind Kind, bool HasQPX)
3708  : DefaultABIInfo(CGT), Kind(Kind), HasQPX(HasQPX) {}
3709 
3710  bool isPromotableTypeForABI(QualType Ty) const;
3711  CharUnits getParamTypeAlignment(QualType Ty) const;
3712 
3713  ABIArgInfo classifyReturnType(QualType RetTy) const;
3714  ABIArgInfo classifyArgumentType(QualType Ty) const;
3715 
3716  bool isHomogeneousAggregateBaseType(QualType Ty) const override;
3717  bool isHomogeneousAggregateSmallEnough(const Type *Ty,
3718  uint64_t Members) const override;
3719 
3720  // TODO: We can add more logic to computeInfo to improve performance.
3721  // Example: For aggregate arguments that fit in a register, we could
3722  // use getDirectInReg (as is done below for structs containing a single
3723  // floating-point value) to avoid pushing them to memory on function
3724  // entry. This would require changing the logic in PPCISelLowering
3725  // when lowering the parameters in the caller and args in the callee.
3726  void computeInfo(CGFunctionInfo &FI) const override {
3727  if (!getCXXABI().classifyReturnType(FI))
3728  FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
3729  for (auto &I : FI.arguments()) {
3730  // We rely on the default argument classification for the most part.
3731  // One exception: An aggregate containing a single floating-point
3732  // or vector item must be passed in a register if one is available.
3733  const Type *T = isSingleElementStruct(I.type, getContext());
3734  if (T) {
3735  const BuiltinType *BT = T->getAs<BuiltinType>();
3736  if (IsQPXVectorTy(T) ||
3737  (T->isVectorType() && getContext().getTypeSize(T) == 128) ||
3738  (BT && BT->isFloatingPoint())) {
3739  QualType QT(T, 0);
3740  I.info = ABIArgInfo::getDirectInReg(CGT.ConvertType(QT));
3741  continue;
3742  }
3743  }
3744  I.info = classifyArgumentType(I.type);
3745  }
3746  }
3747 
3748  Address EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
3749  QualType Ty) const override;
3750 };
3751 
3752 class PPC64_SVR4_TargetCodeGenInfo : public TargetCodeGenInfo {
3753 
3754 public:
3755  PPC64_SVR4_TargetCodeGenInfo(CodeGenTypes &CGT,
3756  PPC64_SVR4_ABIInfo::ABIKind Kind, bool HasQPX)
3757  : TargetCodeGenInfo(new PPC64_SVR4_ABIInfo(CGT, Kind, HasQPX)) {}
3758 
3759  int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const override {
3760  // This is recovered from gcc output.
3761  return 1; // r1 is the dedicated stack pointer
3762  }
3763 
3764  bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
3765  llvm::Value *Address) const override;
3766 };
3767 
3768 class PPC64TargetCodeGenInfo : public DefaultTargetCodeGenInfo {
3769 public:
3770  PPC64TargetCodeGenInfo(CodeGenTypes &CGT) : DefaultTargetCodeGenInfo(CGT) {}
3771 
3772  int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const override {
3773  // This is recovered from gcc output.
3774  return 1; // r1 is the dedicated stack pointer
3775  }
3776 
3777  bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
3778  llvm::Value *Address) const override;
3779 };
3780 
3781 }
3782 
3783 // Return true if the ABI requires Ty to be passed sign- or zero-
3784 // extended to 64 bits.
3785 bool
3786 PPC64_SVR4_ABIInfo::isPromotableTypeForABI(QualType Ty) const {
3787  // Treat an enum type as its underlying type.
3788  if (const EnumType *EnumTy = Ty->getAs<EnumType>())
3789  Ty = EnumTy->getDecl()->getIntegerType();
3790 
3791  // Promotable integer types are required to be promoted by the ABI.
3792  if (Ty->isPromotableIntegerType())
3793  return true;
3794 
3795  // In addition to the usual promotable integer types, we also need to
3796  // extend all 32-bit types, since the ABI requires promotion to 64 bits.
3797  if (const BuiltinType *BT = Ty->getAs<BuiltinType>())
3798  switch (BT->getKind()) {
3799  case BuiltinType::Int:
3800  case BuiltinType::UInt:
3801  return true;
3802  default:
3803  break;
3804  }
3805 
3806  return false;
3807 }
3808 
3809 /// isAlignedParamType - Determine whether a type requires 16-byte or
3810 /// higher alignment in the parameter area. Always returns at least 8.
3811 CharUnits PPC64_SVR4_ABIInfo::getParamTypeAlignment(QualType Ty) const {
3812  // Complex types are passed just like their elements.
3813  if (const ComplexType *CTy = Ty->getAs<ComplexType>())
3814  Ty = CTy->getElementType();
3815 
3816  // Only vector types of size 16 bytes need alignment (larger types are
3817  // passed via reference, smaller types are not aligned).
3818  if (IsQPXVectorTy(Ty)) {
3819  if (getContext().getTypeSize(Ty) > 128)
3820  return CharUnits::fromQuantity(32);
3821 
3822  return CharUnits::fromQuantity(16);
3823  } else if (Ty->isVectorType()) {
3824  return CharUnits::fromQuantity(getContext().getTypeSize(Ty) == 128 ? 16 : 8);
3825  }
3826 
3827  // For single-element float/vector structs, we consider the whole type
3828  // to have the same alignment requirements as its single element.
3829  const Type *AlignAsType = nullptr;
3830  const Type *EltType = isSingleElementStruct(Ty, getContext());
3831  if (EltType) {
3832  const BuiltinType *BT = EltType->getAs<BuiltinType>();
3833  if (IsQPXVectorTy(EltType) || (EltType->isVectorType() &&
3834  getContext().getTypeSize(EltType) == 128) ||
3835  (BT && BT->isFloatingPoint()))
3836  AlignAsType = EltType;
3837  }
3838 
3839  // Likewise for ELFv2 homogeneous aggregates.
3840  const Type *Base = nullptr;
3841  uint64_t Members = 0;
3842  if (!AlignAsType && Kind == ELFv2 &&
3843  isAggregateTypeForABI(Ty) && isHomogeneousAggregate(Ty, Base, Members))
3844  AlignAsType = Base;
3845 
3846  // With special case aggregates, only vector base types need alignment.
3847  if (AlignAsType && IsQPXVectorTy(AlignAsType)) {
3848  if (getContext().getTypeSize(AlignAsType) > 128)
3849  return CharUnits::fromQuantity(32);
3850 
3851  return CharUnits::fromQuantity(16);
3852  } else if (AlignAsType) {
3853  return CharUnits::fromQuantity(AlignAsType->isVectorType() ? 16 : 8);
3854  }
3855 
3856  // Otherwise, we only need alignment for any aggregate type that
3857  // has an alignment requirement of >= 16 bytes.
3858  if (isAggregateTypeForABI(Ty) && getContext().getTypeAlign(Ty) >= 128) {
3859  if (HasQPX && getContext().getTypeAlign(Ty) >= 256)
3860  return CharUnits::fromQuantity(32);
3861  return CharUnits::fromQuantity(16);
3862  }
3863 
3864  return CharUnits::fromQuantity(8);
3865 }
3866 
3867 /// isHomogeneousAggregate - Return true if a type is an ELFv2 homogeneous
3868 /// aggregate. Base is set to the base element type, and Members is set
3869 /// to the number of base elements.
3870 bool ABIInfo::isHomogeneousAggregate(QualType Ty, const Type *&Base,
3871  uint64_t &Members) const {
3872  if (const ConstantArrayType *AT = getContext().getAsConstantArrayType(Ty)) {
3873  uint64_t NElements = AT->getSize().getZExtValue();
3874  if (NElements == 0)
3875  return false;
3876  if (!isHomogeneousAggregate(AT->getElementType(), Base, Members))
3877  return false;
3878  Members *= NElements;
3879  } else if (const RecordType *RT = Ty->getAs<RecordType>()) {
3880  const RecordDecl *RD = RT->getDecl();
3881  if (RD->hasFlexibleArrayMember())
3882  return false;
3883 
3884  Members = 0;
3885 
3886  // If this is a C++ record, check the bases first.
3887  if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) {
3888  for (const auto &I : CXXRD->bases()) {
3889  // Ignore empty records.
3890  if (isEmptyRecord(getContext(), I.getType(), true))
3891  continue;
3892 
3893  uint64_t FldMembers;
3894  if (!isHomogeneousAggregate(I.getType(), Base, FldMembers))
3895  return false;
3896 
3897  Members += FldMembers;
3898  }
3899  }
3900 
3901  for (const auto *FD : RD->fields()) {
3902  // Ignore (non-zero arrays of) empty records.
3903  QualType FT = FD->getType();
3904  while (const ConstantArrayType *AT =
3905  getContext().getAsConstantArrayType(FT)) {
3906  if (AT->getSize().getZExtValue() == 0)
3907  return false;
3908  FT = AT->getElementType();
3909  }
3910  if (isEmptyRecord(getContext(), FT, true))
3911  continue;
3912 
3913  // For compatibility with GCC, ignore empty bitfields in C++ mode.
3914  if (getContext().getLangOpts().CPlusPlus &&
3915  FD->isBitField() && FD->getBitWidthValue(getContext()) == 0)
3916  continue;
3917 
3918  uint64_t FldMembers;
3919  if (!isHomogeneousAggregate(FD->getType(), Base, FldMembers))
3920  return false;
3921 
3922  Members = (RD->isUnion() ?
3923  std::max(Members, FldMembers) : Members + FldMembers);
3924  }
3925 
3926  if (!Base)
3927  return false;
3928 
3929  // Ensure there is no padding.
3930  if (getContext().getTypeSize(Base) * Members !=
3931  getContext().getTypeSize(Ty))
3932  return false;
3933  } else {
3934  Members = 1;
3935  if (const ComplexType *CT = Ty->getAs<ComplexType>()) {
3936  Members = 2;
3937  Ty = CT->getElementType();
3938  }
3939 
3940  // Most ABIs only support float, double, and some vector type widths.
3941  if (!isHomogeneousAggregateBaseType(Ty))
3942  return false;
3943 
3944  // The base type must be the same for all members. Types that
3945  // agree in both total size and mode (float vs. vector) are
3946  // treated as being equivalent here.
3947  const Type *TyPtr = Ty.getTypePtr();
3948  if (!Base)
3949  Base = TyPtr;
3950 
3951  if (Base->isVectorType() != TyPtr->isVectorType() ||
3952  getContext().getTypeSize(Base) != getContext().getTypeSize(TyPtr))
3953  return false;
3954  }
3955  return Members > 0 && isHomogeneousAggregateSmallEnough(Base, Members);
3956 }
3957 
3958 bool PPC64_SVR4_ABIInfo::isHomogeneousAggregateBaseType(QualType Ty) const {
3959  // Homogeneous aggregates for ELFv2 must have base types of float,
3960  // double, long double, or 128-bit vectors.
3961  if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) {
3962  if (BT->getKind() == BuiltinType::Float ||
3963  BT->getKind() == BuiltinType::Double ||
3964  BT->getKind() == BuiltinType::LongDouble)
3965  return true;
3966  }
3967  if (const VectorType *VT = Ty->getAs<VectorType>()) {
3968  if (getContext().getTypeSize(VT) == 128 || IsQPXVectorTy(Ty))
3969  return true;
3970  }
3971  return false;
3972 }
3973 
3974 bool PPC64_SVR4_ABIInfo::isHomogeneousAggregateSmallEnough(
3975  const Type *Base, uint64_t Members) const {
3976  // Vector types require one register, floating point types require one
3977  // or two registers depending on their size.
3978  uint32_t NumRegs =
3979  Base->isVectorType() ? 1 : (getContext().getTypeSize(Base) + 63) / 64;
3980 
3981  // Homogeneous Aggregates may occupy at most 8 registers.
3982  return Members * NumRegs <= 8;
3983 }
3984 
3985 ABIArgInfo
3986 PPC64_SVR4_ABIInfo::classifyArgumentType(QualType Ty) const {
3988 
3989  if (Ty->isAnyComplexType())
3990  return ABIArgInfo::getDirect();
3991 
3992  // Non-Altivec vector types are passed in GPRs (smaller than 16 bytes)
3993  // or via reference (larger than 16 bytes).
3994  if (Ty->isVectorType() && !IsQPXVectorTy(Ty)) {
3995  uint64_t Size = getContext().getTypeSize(Ty);
3996  if (Size > 128)
3997  return getNaturalAlignIndirect(Ty, /*ByVal=*/false);
3998  else if (Size < 128) {
3999  llvm::Type *CoerceTy = llvm::IntegerType::get(getVMContext(), Size);
4000  return ABIArgInfo::getDirect(CoerceTy);
4001  }
4002  }
4003 
4004  if (isAggregateTypeForABI(Ty)) {
4005  if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI()))
4006  return getNaturalAlignIndirect(Ty, RAA == CGCXXABI::RAA_DirectInMemory);
4007 
4008  uint64_t ABIAlign = getParamTypeAlignment(Ty).getQuantity();
4009  uint64_t TyAlign = getContext().getTypeAlignInChars(Ty).getQuantity();
4010 
4011  // ELFv2 homogeneous aggregates are passed as array types.
4012  const Type *Base = nullptr;
4013  uint64_t Members = 0;
4014  if (Kind == ELFv2 &&
4015  isHomogeneousAggregate(Ty, Base, Members)) {
4016  llvm::Type *BaseTy = CGT.ConvertType(QualType(Base, 0));
4017  llvm::Type *CoerceTy = llvm::ArrayType::get(BaseTy, Members);
4018  return ABIArgInfo::getDirect(CoerceTy);
4019  }
4020 
4021  // If an aggregate may end up fully in registers, we do not
4022  // use the ByVal method, but pass the aggregate as array.
4023  // This is usually beneficial since we avoid forcing the
4024  // back-end to store the argument to memory.
4025  uint64_t Bits = getContext().getTypeSize(Ty);
4026  if (Bits > 0 && Bits <= 8 * GPRBits) {
4027  llvm::Type *CoerceTy;
4028 
4029  // Types up to 8 bytes are passed as integer type (which will be
4030  // properly aligned in the argument save area doubleword).
4031  if (Bits <= GPRBits)
4032  CoerceTy = llvm::IntegerType::get(getVMContext(),
4033  llvm::RoundUpToAlignment(Bits, 8));
4034  // Larger types are passed as arrays, with the base type selected
4035  // according to the required alignment in the save area.
4036  else {
4037  uint64_t RegBits = ABIAlign * 8;
4038  uint64_t NumRegs = llvm::RoundUpToAlignment(Bits, RegBits) / RegBits;
4039  llvm::Type *RegTy = llvm::IntegerType::get(getVMContext(), RegBits);
4040  CoerceTy = llvm::ArrayType::get(RegTy, NumRegs);
4041  }
4042 
4043  return ABIArgInfo::getDirect(CoerceTy);
4044  }
4045 
4046  // All other aggregates are passed ByVal.
4048  /*ByVal=*/true,
4049  /*Realign=*/TyAlign > ABIAlign);
4050  }
4051 
4052  return (isPromotableTypeForABI(Ty) ?
4054 }
4055 
4056 ABIArgInfo
4057 PPC64_SVR4_ABIInfo::classifyReturnType(QualType RetTy) const {
4058  if (RetTy->isVoidType())
4059  return ABIArgInfo::getIgnore();
4060 
4061  if (RetTy->isAnyComplexType())
4062  return ABIArgInfo::getDirect();
4063 
4064  // Non-Altivec vector types are returned in GPRs (smaller than 16 bytes)
4065  // or via reference (larger than 16 bytes).
4066  if (RetTy->isVectorType() && !IsQPXVectorTy(RetTy)) {
4067  uint64_t Size = getContext().getTypeSize(RetTy);
4068  if (Size > 128)
4069  return getNaturalAlignIndirect(RetTy);
4070  else if (Size < 128) {
4071  llvm::Type *CoerceTy = llvm::IntegerType::get(getVMContext(), Size);
4072  return ABIArgInfo::getDirect(CoerceTy);
4073  }
4074  }
4075 
4076  if (isAggregateTypeForABI(RetTy)) {
4077  // ELFv2 homogeneous aggregates are returned as array types.
4078  const Type *Base = nullptr;
4079  uint64_t Members = 0;
4080  if (Kind == ELFv2 &&
4081  isHomogeneousAggregate(RetTy, Base, Members)) {
4082  llvm::Type *BaseTy = CGT.ConvertType(QualType(Base, 0));
4083  llvm::Type *CoerceTy = llvm::ArrayType::get(BaseTy, Members);
4084  return ABIArgInfo::getDirect(CoerceTy);
4085  }
4086 
4087  // ELFv2 small aggregates are returned in up to two registers.
4088  uint64_t Bits = getContext().getTypeSize(RetTy);
4089  if (Kind == ELFv2 && Bits <= 2 * GPRBits) {
4090  if (Bits == 0)
4091  return ABIArgInfo::getIgnore();
4092 
4093  llvm::Type *CoerceTy;
4094  if (Bits > GPRBits) {
4095  CoerceTy = llvm::IntegerType::get(getVMContext(), GPRBits);
4096  CoerceTy = llvm::StructType::get(CoerceTy, CoerceTy, nullptr);
4097  } else
4098  CoerceTy = llvm::IntegerType::get(getVMContext(),
4099  llvm::RoundUpToAlignment(Bits, 8));
4100  return ABIArgInfo::getDirect(CoerceTy);
4101  }
4102 
4103  // All other aggregates are returned indirectly.
4104  return getNaturalAlignIndirect(RetTy);
4105  }
4106 
4107  return (isPromotableTypeForABI(RetTy) ?
4109 }
4110 
4111 // Based on ARMABIInfo::EmitVAArg, adjusted for 64-bit machine.
4112 Address PPC64_SVR4_ABIInfo::EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
4113  QualType Ty) const {
4114  auto TypeInfo = getContext().getTypeInfoInChars(Ty);
4115  TypeInfo.second = getParamTypeAlignment(Ty);
4116 
4117  CharUnits SlotSize = CharUnits::fromQuantity(8);
4118 
4119  // If we have a complex type and the base type is smaller than 8 bytes,
4120  // the ABI calls for the real and imaginary parts to be right-adjusted
4121  // in separate doublewords. However, Clang expects us to produce a
4122  // pointer to a structure with the two parts packed tightly. So generate
4123  // loads of the real and imaginary parts relative to the va_list pointer,
4124  // and store them to a temporary structure.
4125  if (const ComplexType *CTy = Ty->getAs<ComplexType>()) {
4126  CharUnits EltSize = TypeInfo.first / 2;
4127  if (EltSize < SlotSize) {
4128  Address Addr = emitVoidPtrDirectVAArg(CGF, VAListAddr, CGF.Int8Ty,
4129  SlotSize * 2, SlotSize,
4130  SlotSize, /*AllowHigher*/ true);
4131 
4132  Address RealAddr = Addr;
4133  Address ImagAddr = RealAddr;
4134  if (CGF.CGM.getDataLayout().isBigEndian()) {
4135  RealAddr = CGF.Builder.CreateConstInBoundsByteGEP(RealAddr,
4136  SlotSize - EltSize);
4137  ImagAddr = CGF.Builder.CreateConstInBoundsByteGEP(ImagAddr,
4138  2 * SlotSize - EltSize);
4139  } else {
4140  ImagAddr = CGF.Builder.CreateConstInBoundsByteGEP(RealAddr, SlotSize);
4141  }
4142 
4143  llvm::Type *EltTy = CGF.ConvertTypeForMem(CTy->getElementType());
4144  RealAddr = CGF.Builder.CreateElementBitCast(RealAddr, EltTy);
4145  ImagAddr = CGF.Builder.CreateElementBitCast(ImagAddr, EltTy);
4146  llvm::Value *Real = CGF.Builder.CreateLoad(RealAddr, ".vareal");
4147  llvm::Value *Imag = CGF.Builder.CreateLoad(ImagAddr, ".vaimag");
4148 
4149  Address Temp = CGF.CreateMemTemp(Ty, "vacplx");
4150  CGF.EmitStoreOfComplex({Real, Imag}, CGF.MakeAddrLValue(Temp, Ty),
4151  /*init*/ true);
4152  return Temp;
4153  }
4154  }
4155 
4156  // Otherwise, just use the general rule.
4157  return emitVoidPtrVAArg(CGF, VAListAddr, Ty, /*Indirect*/ false,
4158  TypeInfo, SlotSize, /*AllowHigher*/ true);
4159 }
4160 
4161 static bool
4163  llvm::Value *Address) {
4164  // This is calculated from the LLVM and GCC tables and verified
4165  // against gcc output. AFAIK all ABIs use the same encoding.
4166 
4167  CodeGen::CGBuilderTy &Builder = CGF.Builder;
4168 
4169  llvm::IntegerType *i8 = CGF.Int8Ty;
4170  llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4);
4171  llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8);
4172  llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16);
4173 
4174  // 0-31: r0-31, the 8-byte general-purpose registers
4175  AssignToArrayRange(Builder, Address, Eight8, 0, 31);
4176 
4177  // 32-63: fp0-31, the 8-byte floating-point registers
4178  AssignToArrayRange(Builder, Address, Eight8, 32, 63);
4179 
4180  // 64-76 are various 4-byte special-purpose registers:
4181  // 64: mq
4182  // 65: lr
4183  // 66: ctr
4184  // 67: ap
4185  // 68-75 cr0-7
4186  // 76: xer
4187  AssignToArrayRange(Builder, Address, Four8, 64, 76);
4188 
4189  // 77-108: v0-31, the 16-byte vector registers
4190  AssignToArrayRange(Builder, Address, Sixteen8, 77, 108);
4191 
4192  // 109: vrsave
4193  // 110: vscr
4194  // 111: spe_acc
4195  // 112: spefscr
4196  // 113: sfp
4197  AssignToArrayRange(Builder, Address, Four8, 109, 113);
4198 
4199  return false;
4200 }
4201 
4202 bool
4203 PPC64_SVR4_TargetCodeGenInfo::initDwarfEHRegSizeTable(
4205  llvm::Value *Address) const {
4206 
4207  return PPC64_initDwarfEHRegSizeTable(CGF, Address);
4208 }
4209 
4210 bool
4211 PPC64TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
4212  llvm::Value *Address) const {
4213 
4214  return PPC64_initDwarfEHRegSizeTable(CGF, Address);
4215 }
4216 
4217 //===----------------------------------------------------------------------===//
4218 // AArch64 ABI Implementation
4219 //===----------------------------------------------------------------------===//
4220 
4221 namespace {
4222 
4223 class AArch64ABIInfo : public ABIInfo {
4224 public:
4225  enum ABIKind {
4226  AAPCS = 0,
4227  DarwinPCS
4228  };
4229 
4230 private:
4231  ABIKind Kind;
4232 
4233 public:
4234  AArch64ABIInfo(CodeGenTypes &CGT, ABIKind Kind) : ABIInfo(CGT), Kind(Kind) {}
4235 
4236 private:
4237  ABIKind getABIKind() const { return Kind; }
4238  bool isDarwinPCS() const { return Kind == DarwinPCS; }
4239 
4240  ABIArgInfo classifyReturnType(QualType RetTy) const;
4241  ABIArgInfo classifyArgumentType(QualType RetTy) const;
4242  bool isHomogeneousAggregateBaseType(QualType Ty) const override;
4243  bool isHomogeneousAggregateSmallEnough(const Type *Ty,
4244  uint64_t Members) const override;
4245 
4246  bool isIllegalVectorType(QualType Ty) const;
4247 
4248  void computeInfo(CGFunctionInfo &FI) const override {
4249  if (!getCXXABI().classifyReturnType(FI))
4250  FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
4251 
4252  for (auto &it : FI.arguments())
4253  it.info = classifyArgumentType(it.type);
4254  }
4255 
4256  Address EmitDarwinVAArg(Address VAListAddr, QualType Ty,
4257  CodeGenFunction &CGF) const;
4258 
4259  Address EmitAAPCSVAArg(Address VAListAddr, QualType Ty,
4260  CodeGenFunction &CGF) const;
4261 
4262  Address EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
4263  QualType Ty) const override {
4264  return isDarwinPCS() ? EmitDarwinVAArg(VAListAddr, Ty, CGF)
4265  : EmitAAPCSVAArg(VAListAddr, Ty, CGF);
4266  }
4267 };
4268 
4269 class AArch64TargetCodeGenInfo : public TargetCodeGenInfo {
4270 public:
4271  AArch64TargetCodeGenInfo(CodeGenTypes &CGT, AArch64ABIInfo::ABIKind Kind)
4272  : TargetCodeGenInfo(new AArch64ABIInfo(CGT, Kind)) {}
4273 
4274  StringRef getARCRetainAutoreleasedReturnValueMarker() const override {
4275  return "mov\tfp, fp\t\t; marker for objc_retainAutoreleaseReturnValue";
4276  }
4277 
4278  int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const override {
4279  return 31;
4280  }
4281 
4282  bool doesReturnSlotInterfereWithArgs() const override { return false; }
4283 };
4284 }
4285 
4286 ABIArgInfo AArch64ABIInfo::classifyArgumentType(QualType Ty) const {
4288 
4289  // Handle illegal vector types here.
4290  if (isIllegalVectorType(Ty)) {
4291  uint64_t Size = getContext().getTypeSize(Ty);
4292  if (Size <= 32) {
4293  llvm::Type *ResType = llvm::Type::getInt32Ty(getVMContext());
4294  return ABIArgInfo::getDirect(ResType);
4295  }
4296  if (Size == 64) {
4297  llvm::Type *ResType =
4298  llvm::VectorType::get(llvm::Type::getInt32Ty(getVMContext()), 2);
4299  return ABIArgInfo::getDirect(ResType);
4300  }
4301  if (Size == 128) {
4302  llvm::Type *ResType =
4303  llvm::VectorType::get(llvm::Type::getInt32Ty(getVMContext()), 4);
4304  return ABIArgInfo::getDirect(ResType);
4305  }
4306  return getNaturalAlignIndirect(Ty, /*ByVal=*/false);
4307  }
4308 
4309  if (!isAggregateTypeForABI(Ty)) {
4310  // Treat an enum type as its underlying type.
4311  if (const EnumType *EnumTy = Ty->getAs<EnumType>())
4312  Ty = EnumTy->getDecl()->getIntegerType();
4313 
4314  return (Ty->isPromotableIntegerType() && isDarwinPCS()
4316  : ABIArgInfo::getDirect());
4317  }
4318 
4319  // Structures with either a non-trivial destructor or a non-trivial
4320  // copy constructor are always indirect.
4321  if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI())) {
4322  return getNaturalAlignIndirect(Ty, /*ByVal=*/RAA ==
4324  }
4325 
4326  // Empty records are always ignored on Darwin, but actually passed in C++ mode
4327  // elsewhere for GNU compatibility.
4328  if (isEmptyRecord(getContext(), Ty, true)) {
4329  if (!getContext().getLangOpts().CPlusPlus || isDarwinPCS())
4330  return ABIArgInfo::getIgnore();
4331 
4332  return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext()));
4333  }
4334 
4335  // Homogeneous Floating-point Aggregates (HFAs) need to be expanded.
4336  const Type *Base = nullptr;
4337  uint64_t Members = 0;
4338  if (isHomogeneousAggregate(Ty, Base, Members)) {
4339  return ABIArgInfo::getDirect(
4340  llvm::ArrayType::get(CGT.ConvertType(QualType(Base, 0)), Members));
4341  }
4342 
4343  // Aggregates <= 16 bytes are passed directly in registers or on the stack.
4344  uint64_t Size = getContext().getTypeSize(Ty);
4345  if (Size <= 128) {
4346  unsigned Alignment = getContext().getTypeAlign(Ty);
4347  Size = 64 * ((Size + 63) / 64); // round up to multiple of 8 bytes
4348 
4349  // We use a pair of i64 for 16-byte aggregate with 8-byte alignment.
4350  // For aggregates with 16-byte alignment, we use i128.
4351  if (Alignment < 128 && Size == 128) {
4352  llvm::Type *BaseTy = llvm::Type::getInt64Ty(getVMContext());
4353  return ABIArgInfo::getDirect(llvm::ArrayType::get(BaseTy, Size / 64));
4354  }
4355  return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), Size));
4356  }
4357 
4358  return getNaturalAlignIndirect(Ty, /*ByVal=*/false);
4359 }
4360 
4361 ABIArgInfo AArch64ABIInfo::classifyReturnType(QualType RetTy) const {
4362  if (RetTy->isVoidType())
4363  return ABIArgInfo::getIgnore();
4364 
4365  // Large vector types should be returned via memory.
4366  if (RetTy->isVectorType() && getContext().getTypeSize(RetTy) > 128)
4367  return getNaturalAlignIndirect(RetTy);
4368 
4369  if (!isAggregateTypeForABI(RetTy)) {
4370  // Treat an enum type as its underlying type.
4371  if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
4372  RetTy = EnumTy->getDecl()->getIntegerType();
4373 
4374  return (RetTy->isPromotableIntegerType() && isDarwinPCS()
4376  : ABIArgInfo::getDirect());
4377  }
4378 
4379  if (isEmptyRecord(getContext(), RetTy, true))
4380  return ABIArgInfo::getIgnore();
4381 
4382  const Type *Base = nullptr;
4383  uint64_t Members = 0;
4384  if (isHomogeneousAggregate(RetTy, Base, Members))
4385  // Homogeneous Floating-point Aggregates (HFAs) are returned directly.
4386  return ABIArgInfo::getDirect();
4387 
4388  // Aggregates <= 16 bytes are returned directly in registers or on the stack.
4389  uint64_t Size = getContext().getTypeSize(RetTy);
4390  if (Size <= 128) {
4391  unsigned Alignment = getContext().getTypeAlign(RetTy);
4392  Size = 64 * ((Size + 63) / 64); // round up to multiple of 8 bytes
4393 
4394  // We use a pair of i64 for 16-byte aggregate with 8-byte alignment.
4395  // For aggregates with 16-byte alignment, we use i128.
4396  if (Alignment < 128 && Size == 128) {
4397  llvm::Type *BaseTy = llvm::Type::getInt64Ty(getVMContext());
4398  return ABIArgInfo::getDirect(llvm::ArrayType::get(BaseTy, Size / 64));
4399  }
4400  return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), Size));
4401  }
4402 
4403  return getNaturalAlignIndirect(RetTy);
4404 }
4405 
4406 /// isIllegalVectorType - check whether the vector type is legal for AArch64.
4407 bool AArch64ABIInfo::isIllegalVectorType(QualType Ty) const {
4408  if (const VectorType *VT = Ty->getAs<VectorType>()) {
4409  // Check whether VT is legal.
4410  unsigned NumElements = VT->getNumElements();
4411  uint64_t Size = getContext().getTypeSize(VT);
4412  // NumElements should be power of 2 between 1 and 16.
4413  if ((NumElements & (NumElements - 1)) != 0 || NumElements > 16)
4414  return true;
4415  return Size != 64 && (Size != 128 || NumElements == 1);
4416  }
4417  return false;
4418 }
4419 
4420 bool AArch64ABIInfo::isHomogeneousAggregateBaseType(QualType Ty) const {
4421  // Homogeneous aggregates for AAPCS64 must have base types of a floating
4422  // point type or a short-vector type. This is the same as the 32-bit ABI,
4423  // but with the difference that any floating-point type is allowed,
4424  // including __fp16.
4425  if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) {
4426  if (BT->isFloatingPoint())
4427  return true;
4428  } else if (const VectorType *VT = Ty->getAs<VectorType>()) {
4429  unsigned VecSize = getContext().getTypeSize(VT);
4430  if (VecSize == 64 || VecSize == 128)
4431  return true;
4432  }
4433  return false;
4434 }
4435 
4436 bool AArch64ABIInfo::isHomogeneousAggregateSmallEnough(const Type *Base,
4437  uint64_t Members) const {
4438  return Members <= 4;
4439 }
4440 
4441 Address AArch64ABIInfo::EmitAAPCSVAArg(Address VAListAddr,
4442  QualType Ty,
4443  CodeGenFunction &CGF) const {
4444  ABIArgInfo AI = classifyArgumentType(Ty);
4445  bool IsIndirect = AI.isIndirect();
4446 
4447  llvm::Type *BaseTy = CGF.ConvertType(Ty);
4448  if (IsIndirect)
4449  BaseTy = llvm::PointerType::getUnqual(BaseTy);
4450  else if (AI.getCoerceToType())
4451  BaseTy = AI.getCoerceToType();
4452 
4453  unsigned NumRegs = 1;
4454  if (llvm::ArrayType *ArrTy = dyn_cast<llvm::ArrayType>(BaseTy)) {
4455  BaseTy = ArrTy->getElementType();
4456  NumRegs = ArrTy->getNumElements();
4457  }
4458  bool IsFPR = BaseTy->isFloatingPointTy() || BaseTy->isVectorTy();
4459 
4460  // The AArch64 va_list type and handling is specified in the Procedure Call
4461  // Standard, section B.4:
4462  //
4463  // struct {
4464  // void *__stack;
4465  // void *__gr_top;
4466  // void *__vr_top;
4467  // int __gr_offs;
4468  // int __vr_offs;
4469  // };
4470 
4471  llvm::BasicBlock *MaybeRegBlock = CGF.createBasicBlock("vaarg.maybe_reg");
4472  llvm::BasicBlock *InRegBlock = CGF.createBasicBlock("vaarg.in_reg");
4473  llvm::BasicBlock *OnStackBlock = CGF.createBasicBlock("vaarg.on_stack");
4474  llvm::BasicBlock *ContBlock = CGF.createBasicBlock("vaarg.end");
4475 
4476  auto TyInfo = getContext().getTypeInfoInChars(Ty);
4477  CharUnits TyAlign = TyInfo.second;
4478 
4479  Address reg_offs_p = Address::invalid();
4480  llvm::Value *reg_offs = nullptr;
4481  int reg_top_index;
4482  CharUnits reg_top_offset;
4483  int RegSize = IsIndirect ? 8 : TyInfo.first.getQuantity();
4484  if (!IsFPR) {
4485  // 3 is the field number of __gr_offs
4486  reg_offs_p =
4487  CGF.Builder.CreateStructGEP(VAListAddr, 3, CharUnits::fromQuantity(24),
4488  "gr_offs_p");
4489  reg_offs = CGF.Builder.CreateLoad(reg_offs_p, "gr_offs");
4490  reg_top_index = 1; // field number for __gr_top
4491  reg_top_offset = CharUnits::fromQuantity(8);
4492  RegSize = llvm::RoundUpToAlignment(RegSize, 8);
4493  } else {
4494  // 4 is the field number of __vr_offs.
4495  reg_offs_p =
4496  CGF.Builder.CreateStructGEP(VAListAddr, 4, CharUnits::fromQuantity(28),
4497  "vr_offs_p");
4498  reg_offs = CGF.Builder.CreateLoad(reg_offs_p, "vr_offs");
4499  reg_top_index = 2; // field number for __vr_top
4500  reg_top_offset = CharUnits::fromQuantity(16);
4501  RegSize = 16 * NumRegs;
4502  }
4503 
4504  //=======================================
4505  // Find out where argument was passed
4506  //=======================================
4507 
4508  // If reg_offs >= 0 we're already using the stack for this type of
4509  // argument. We don't want to keep updating reg_offs (in case it overflows,
4510  // though anyone passing 2GB of arguments, each at most 16 bytes, deserves
4511  // whatever they get).
4512  llvm::Value *UsingStack = nullptr;
4513  UsingStack = CGF.Builder.CreateICmpSGE(
4514  reg_offs, llvm::ConstantInt::get(CGF.Int32Ty, 0));
4515 
4516  CGF.Builder.CreateCondBr(UsingStack, OnStackBlock, MaybeRegBlock);
4517 
4518  // Otherwise, at least some kind of argument could go in these registers, the
4519  // question is whether this particular type is too big.
4520  CGF.EmitBlock(MaybeRegBlock);
4521 
4522  // Integer arguments may need to correct register alignment (for example a
4523  // "struct { __int128 a; };" gets passed in x_2N, x_{2N+1}). In this case we
4524  // align __gr_offs to calculate the potential address.
4525  if (!IsFPR && !IsIndirect && TyAlign.getQuantity() > 8) {
4526  int Align = TyAlign.getQuantity();
4527 
4528  reg_offs = CGF.Builder.CreateAdd(
4529  reg_offs, llvm::ConstantInt::get(CGF.Int32Ty, Align - 1),
4530  "align_regoffs");
4531  reg_offs = CGF.Builder.CreateAnd(
4532  reg_offs, llvm::ConstantInt::get(CGF.Int32Ty, -Align),
4533  "aligned_regoffs");
4534  }
4535 
4536  // Update the gr_offs/vr_offs pointer for next call to va_arg on this va_list.
4537  // The fact that this is done unconditionally reflects the fact that
4538  // allocating an argument to the stack also uses up all the remaining
4539  // registers of the appropriate kind.
4540  llvm::Value *NewOffset = nullptr;
4541  NewOffset = CGF.Builder.CreateAdd(
4542  reg_offs, llvm::ConstantInt::get(CGF.Int32Ty, RegSize), "new_reg_offs");
4543  CGF.Builder.CreateStore(NewOffset, reg_offs_p);
4544 
4545  // Now we're in a position to decide whether this argument really was in
4546  // registers or not.
4547  llvm::Value *InRegs = nullptr;
4548  InRegs = CGF.Builder.CreateICmpSLE(
4549  NewOffset, llvm::ConstantInt::get(CGF.Int32Ty, 0), "inreg");
4550 
4551  CGF.Builder.CreateCondBr(InRegs, InRegBlock, OnStackBlock);
4552 
4553  //=======================================
4554  // Argument was in registers
4555  //=======================================
4556 
4557  // Now we emit the code for if the argument was originally passed in
4558  // registers. First start the appropriate block:
4559  CGF.EmitBlock(InRegBlock);
4560 
4561  llvm::Value *reg_top = nullptr;
4562  Address reg_top_p = CGF.Builder.CreateStructGEP(VAListAddr, reg_top_index,
4563  reg_top_offset, "reg_top_p");
4564  reg_top = CGF.Builder.CreateLoad(reg_top_p, "reg_top");
4565  Address BaseAddr(CGF.Builder.CreateInBoundsGEP(reg_top, reg_offs),
4566  CharUnits::fromQuantity(IsFPR ? 16 : 8));
4567  Address RegAddr = Address::invalid();
4568  llvm::Type *MemTy = CGF.ConvertTypeForMem(Ty);
4569 
4570  if (IsIndirect) {
4571  // If it's been passed indirectly (actually a struct), whatever we find from
4572  // stored registers or on the stack will actually be a struct **.
4573  MemTy = llvm::PointerType::getUnqual(MemTy);
4574  }
4575 
4576  const Type *Base = nullptr;
4577  uint64_t NumMembers = 0;
4578  bool IsHFA = isHomogeneousAggregate(Ty, Base, NumMembers);
4579  if (IsHFA && NumMembers > 1) {
4580  // Homogeneous aggregates passed in registers will have their elements split
4581  // and stored 16-bytes apart regardless of size (they're notionally in qN,
4582  // qN+1, ...). We reload and store into a temporary local variable
4583  // contiguously.
4584  assert(!IsIndirect && "Homogeneous aggregates should be passed directly");
4585  auto BaseTyInfo = getContext().getTypeInfoInChars(QualType(Base, 0));
4586  llvm::Type *BaseTy = CGF.ConvertType(QualType(Base, 0));
4587  llvm::Type *HFATy = llvm::ArrayType::get(BaseTy, NumMembers);
4588  Address Tmp = CGF.CreateTempAlloca(HFATy,
4589  std::max(TyAlign, BaseTyInfo.second));
4590 
4591  // On big-endian platforms, the value will be right-aligned in its slot.
4592  int Offset = 0;
4593  if (CGF.CGM.getDataLayout().isBigEndian() &&
4594  BaseTyInfo.first.getQuantity() < 16)
4595  Offset = 16 - BaseTyInfo.first.getQuantity();
4596 
4597  for (unsigned i = 0; i < NumMembers; ++i) {
4598  CharUnits BaseOffset = CharUnits::fromQuantity(16 * i + Offset);
4599  Address LoadAddr =
4600  CGF.Builder.CreateConstInBoundsByteGEP(BaseAddr, BaseOffset);
4601  LoadAddr = CGF.Builder.CreateElementBitCast(LoadAddr, BaseTy);
4602 
4603  Address StoreAddr =
4604  CGF.Builder.CreateConstArrayGEP(Tmp, i, BaseTyInfo.first);
4605 
4606  llvm::Value *Elem = CGF.Builder.CreateLoad(LoadAddr);
4607  CGF.Builder.CreateStore(Elem, StoreAddr);
4608  }
4609 
4610  RegAddr = CGF.Builder.CreateElementBitCast(Tmp, MemTy);
4611  } else {
4612  // Otherwise the object is contiguous in memory.
4613 
4614  // It might be right-aligned in its slot.
4615  CharUnits SlotSize = BaseAddr.getAlignment();
4616  if (CGF.CGM.getDataLayout().isBigEndian() && !IsIndirect &&
4617  (IsHFA || !isAggregateTypeForABI(Ty)) &&
4618  TyInfo.first < SlotSize) {
4619  CharUnits Offset = SlotSize - TyInfo.first;
4620  BaseAddr = CGF.Builder.CreateConstInBoundsByteGEP(BaseAddr, Offset);
4621  }
4622 
4623  RegAddr = CGF.Builder.CreateElementBitCast(BaseAddr, MemTy);
4624  }
4625 
4626  CGF.EmitBranch(ContBlock);
4627 
4628  //=======================================
4629  // Argument was on the stack
4630  //=======================================
4631  CGF.EmitBlock(OnStackBlock);
4632 
4633  Address stack_p = CGF.Builder.CreateStructGEP(VAListAddr, 0,
4634  CharUnits::Zero(), "stack_p");
4635  llvm::Value *OnStackPtr = CGF.Builder.CreateLoad(stack_p, "stack");
4636 
4637  // Again, stack arguments may need realignment. In this case both integer and
4638  // floating-point ones might be affected.
4639  if (!IsIndirect && TyAlign.getQuantity() > 8) {
4640  int Align = TyAlign.getQuantity();
4641 
4642  OnStackPtr = CGF.Builder.CreatePtrToInt(OnStackPtr, CGF.Int64Ty);
4643 
4644  OnStackPtr = CGF.Builder.CreateAdd(
4645  OnStackPtr, llvm::ConstantInt::get(CGF.Int64Ty, Align - 1),
4646  "align_stack");
4647  OnStackPtr = CGF.Builder.CreateAnd(
4648  OnStackPtr, llvm::ConstantInt::get(CGF.Int64Ty, -Align),
4649  "align_stack");
4650 
4651  OnStackPtr = CGF.Builder.CreateIntToPtr(OnStackPtr, CGF.Int8PtrTy);
4652  }
4653  Address OnStackAddr(OnStackPtr,
4654  std::max(CharUnits::fromQuantity(8), TyAlign));
4655 
4656  // All stack slots are multiples of 8 bytes.
4657  CharUnits StackSlotSize = CharUnits::fromQuantity(8);
4658  CharUnits StackSize;
4659  if (IsIndirect)
4660  StackSize = StackSlotSize;
4661  else
4662  StackSize = TyInfo.first.RoundUpToAlignment(StackSlotSize);
4663 
4664  llvm::Value *StackSizeC = CGF.Builder.getSize(StackSize);
4665  llvm::Value *NewStack =
4666  CGF.Builder.CreateInBoundsGEP(OnStackPtr, StackSizeC, "new_stack");
4667 
4668  // Write the new value of __stack for the next call to va_arg
4669  CGF.Builder.CreateStore(NewStack, stack_p);
4670 
4671  if (CGF.CGM.getDataLayout().isBigEndian() && !isAggregateTypeForABI(Ty) &&
4672  TyInfo.first < StackSlotSize) {
4673  CharUnits Offset = StackSlotSize - TyInfo.first;
4674  OnStackAddr = CGF.Builder.CreateConstInBoundsByteGEP(OnStackAddr, Offset);
4675  }
4676 
4677  OnStackAddr = CGF.Builder.CreateElementBitCast(OnStackAddr, MemTy);
4678 
4679  CGF.EmitBranch(ContBlock);
4680 
4681  //=======================================
4682  // Tidy up
4683  //=======================================
4684  CGF.EmitBlock(ContBlock);
4685 
4686  Address ResAddr = emitMergePHI(CGF, RegAddr, InRegBlock,
4687  OnStackAddr, OnStackBlock, "vaargs.addr");
4688 
4689  if (IsIndirect)
4690  return Address(CGF.Builder.CreateLoad(ResAddr, "vaarg.addr"),
4691  TyInfo.second);
4692 
4693  return ResAddr;
4694 }
4695 
4696 Address AArch64ABIInfo::EmitDarwinVAArg(Address VAListAddr, QualType Ty,
4697  CodeGenFunction &CGF) const {
4698  // The backend's lowering doesn't support va_arg for aggregates or
4699  // illegal vector types. Lower VAArg here for these cases and use
4700  // the LLVM va_arg instruction for everything else.
4701  if (!isAggregateTypeForABI(Ty) && !isIllegalVectorType(Ty))
4702  return Address::invalid();
4703 
4704  CharUnits SlotSize = CharUnits::fromQuantity(8);
4705 
4706  // Empty records are ignored for parameter passing purposes.
4707  if (isEmptyRecord(getContext(), Ty, true)) {
4708  Address Addr(CGF.Builder.CreateLoad(VAListAddr, "ap.cur"), SlotSize);
4709  Addr = CGF.Builder.CreateElementBitCast(Addr, CGF.ConvertTypeForMem(Ty));
4710  return Addr;
4711  }
4712 
4713  // The size of the actual thing passed, which might end up just
4714  // being a pointer for indirect types.
4715  auto TyInfo = getContext().getTypeInfoInChars(Ty);
4716 
4717  // Arguments bigger than 16 bytes which aren't homogeneous
4718  // aggregates should be passed indirectly.
4719  bool IsIndirect = false;
4720  if (TyInfo.first.getQuantity() > 16) {
4721  const Type *Base = nullptr;
4722  uint64_t Members = 0;
4723  IsIndirect = !isHomogeneousAggregate(Ty, Base, Members);
4724  }
4725 
4726  return emitVoidPtrVAArg(CGF, VAListAddr, Ty, IsIndirect,
4727  TyInfo, SlotSize, /*AllowHigherAlign*/ true);
4728 }
4729 
4730 //===----------------------------------------------------------------------===//
4731 // ARM ABI Implementation
4732 //===----------------------------------------------------------------------===//
4733 
4734 namespace {
4735 
4736 class ARMABIInfo : public ABIInfo {
4737 public:
4738  enum ABIKind {
4739  APCS = 0,
4740  AAPCS = 1,
4741  AAPCS_VFP = 2,
4742  AAPCS16_VFP = 3,
4743  };
4744 
4745 private:
4746  ABIKind Kind;
4747 
4748 public:
4749  ARMABIInfo(CodeGenTypes &CGT, ABIKind _Kind) : ABIInfo(CGT), Kind(_Kind) {
4750  setCCs();
4751  }
4752 
4753  bool isEABI() const {
4754  switch (getTarget().getTriple().getEnvironment()) {
4755  case llvm::Triple::Android:
4756  case llvm::Triple::EABI:
4757  case llvm::Triple::EABIHF:
4758  case llvm::Triple::GNUEABI:
4759  case llvm::Triple::GNUEABIHF:
4760  return true;
4761  default:
4762  return false;
4763  }
4764  }
4765 
4766  bool isEABIHF() const {
4767  switch (getTarget().getTriple().getEnvironment()) {
4768  case llvm::Triple::EABIHF:
4769  case llvm::Triple::GNUEABIHF:
4770  return true;
4771  default:
4772  return false;
4773  }
4774  }
4775 
4776  bool isAndroid() const {
4777  return (getTarget().getTriple().getEnvironment() ==
4778  llvm::Triple::Android);
4779  }
4780 
4781  ABIKind getABIKind() const { return Kind; }
4782 
4783 private:
4784  ABIArgInfo classifyReturnType(QualType RetTy, bool isVariadic) const;
4785  ABIArgInfo classifyArgumentType(QualType RetTy, bool isVariadic) const;
4786  bool isIllegalVectorType(QualType Ty) const;
4787 
4788  bool isHomogeneousAggregateBaseType(QualType Ty) const override;
4789  bool isHomogeneousAggregateSmallEnough(const Type *Ty,
4790  uint64_t Members) const override;
4791 
4792  void computeInfo(CGFunctionInfo &FI) const override;
4793 
4794  Address EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
4795  QualType Ty) const override;
4796 
4797  llvm::CallingConv::ID getLLVMDefaultCC() const;
4798  llvm::CallingConv::ID getABIDefaultCC() const;
4799  void setCCs();
4800 };
4801 
4802 class ARMTargetCodeGenInfo : public TargetCodeGenInfo {
4803 public:
4804  ARMTargetCodeGenInfo(CodeGenTypes &CGT, ARMABIInfo::ABIKind K)
4805  :TargetCodeGenInfo(new ARMABIInfo(CGT, K)) {}
4806 
4807  const ARMABIInfo &getABIInfo() const {
4808  return static_cast<const ARMABIInfo&>(TargetCodeGenInfo::getABIInfo());
4809  }
4810 
4811  int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const override {
4812  return 13;
4813  }
4814 
4815  StringRef getARCRetainAutoreleasedReturnValueMarker() const override {
4816  return "mov\tr7, r7\t\t@ marker for objc_retainAutoreleaseReturnValue";
4817  }
4818 
4819  bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
4820  llvm::Value *Address) const override {
4821  llvm::Value *Four8 = llvm::ConstantInt::get(CGF.Int8Ty, 4);
4822 
4823  // 0-15 are the 16 integer registers.
4824  AssignToArrayRange(CGF.Builder, Address, Four8, 0, 15);
4825  return false;
4826  }
4827 
4828  unsigned getSizeOfUnwindException() const override {
4829  if (getABIInfo().isEABI()) return 88;
4831  }
4832 
4833  void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
4834  CodeGen::CodeGenModule &CGM) const override {
4835  const FunctionDecl *FD = dyn_cast_or_null<FunctionDecl>(D);
4836  if (!FD)
4837  return;
4838 
4839  const ARMInterruptAttr *Attr = FD->getAttr<ARMInterruptAttr>();
4840  if (!Attr)
4841  return;
4842 
4843  const char *Kind;
4844  switch (Attr->getInterrupt()) {
4845  case ARMInterruptAttr::Generic: Kind = ""; break;
4846  case ARMInterruptAttr::IRQ: Kind = "IRQ"; break;
4847  case ARMInterruptAttr::FIQ: Kind = "FIQ"; break;
4848  case ARMInterruptAttr::SWI: Kind = "SWI"; break;
4849  case ARMInterruptAttr::ABORT: Kind = "ABORT"; break;
4850  case ARMInterruptAttr::UNDEF: Kind = "UNDEF"; break;
4851  }
4852 
4853  llvm::Function *Fn = cast<llvm::Function>(GV);
4854 
4855  Fn->addFnAttr("interrupt", Kind);
4856 
4857  ARMABIInfo::ABIKind ABI = cast<ARMABIInfo>(getABIInfo()).getABIKind();
4858  if (ABI == ARMABIInfo::APCS)
4859  return;
4860 
4861  // AAPCS guarantees that sp will be 8-byte aligned on any public interface,
4862  // however this is not necessarily true on taking any interrupt. Instruct
4863  // the backend to perform a realignment as part of the function prologue.
4864  llvm::AttrBuilder B;
4865  B.addStackAlignmentAttr(8);
4866  Fn->addAttributes(llvm::AttributeSet::FunctionIndex,
4867  llvm::AttributeSet::get(CGM.getLLVMContext(),
4868  llvm::AttributeSet::FunctionIndex,
4869  B));
4870  }
4871 };
4872 
4873 class WindowsARMTargetCodeGenInfo : public ARMTargetCodeGenInfo {
4874 public:
4875  WindowsARMTargetCodeGenInfo(CodeGenTypes &CGT, ARMABIInfo::ABIKind K)
4876  : ARMTargetCodeGenInfo(CGT, K) {}
4877 
4878  void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
4879  CodeGen::CodeGenModule &CGM) const override;
4880 };
4881 
4882 void WindowsARMTargetCodeGenInfo::setTargetAttributes(
4883  const Decl *D, llvm::GlobalValue *GV, CodeGen::CodeGenModule &CGM) const {
4884  ARMTargetCodeGenInfo::setTargetAttributes(D, GV, CGM);
4885  addStackProbeSizeTargetAttribute(D, GV, CGM);
4886 }
4887 }
4888 
4889 void ARMABIInfo::computeInfo(CGFunctionInfo &FI) const {
4890  if (!getCXXABI().classifyReturnType(FI))
4891  FI.getReturnInfo() =
4892  classifyReturnType(FI.getReturnType(), FI.isVariadic());
4893 
4894  for (auto &I : FI.arguments())
4895  I.info = classifyArgumentType(I.type, FI.isVariadic());
4896 
4897  // Always honor user-specified calling convention.
4899  return;
4900 
4901  llvm::CallingConv::ID cc = getRuntimeCC();
4902  if (cc != llvm::CallingConv::C)
4904 }
4905 
4906 /// Return the default calling convention that LLVM will use.
4907 llvm::CallingConv::ID ARMABIInfo::getLLVMDefaultCC() const {
4908  // The default calling convention that LLVM will infer.
4909  if (isEABIHF() || getTarget().getTriple().isWatchOS())
4910  return llvm::CallingConv::ARM_AAPCS_VFP;
4911  else if (isEABI())
4912  return llvm::CallingConv::ARM_AAPCS;
4913  else
4914  return llvm::CallingConv::ARM_APCS;
4915 }
4916 
4917 /// Return the calling convention that our ABI would like us to use
4918 /// as the C calling convention.
4919 llvm::CallingConv::ID ARMABIInfo::getABIDefaultCC() const {
4920  switch (getABIKind()) {
4921  case APCS: return llvm::CallingConv::ARM_APCS;
4922  case AAPCS: return llvm::CallingConv::ARM_AAPCS;
4923  case AAPCS_VFP: return llvm::CallingConv::ARM_AAPCS_VFP;
4924  case AAPCS16_VFP: return llvm::CallingConv::ARM_AAPCS_VFP;
4925  }
4926  llvm_unreachable("bad ABI kind");
4927 }
4928 
4929 void ARMABIInfo::setCCs() {
4930  assert(getRuntimeCC() == llvm::CallingConv::C);
4931 
4932  // Don't muddy up the IR with a ton of explicit annotations if
4933  // they'd just match what LLVM will infer from the triple.
4934  llvm::CallingConv::ID abiCC = getABIDefaultCC();
4935  if (abiCC != getLLVMDefaultCC())
4936  RuntimeCC = abiCC;
4937 
4938  // AAPCS apparently requires runtime support functions to be soft-float, but
4939  // that's almost certainly for historic reasons (Thumb1 not supporting VFP
4940  // most likely). It's more convenient for AAPCS16_VFP to be hard-float.
4941  switch (getABIKind()) {
4942  case APCS:
4943  case AAPCS16_VFP:
4944  if (abiCC != getLLVMDefaultCC())
4945  BuiltinCC = abiCC;
4946  break;
4947  case AAPCS:
4948  case AAPCS_VFP:
4949  BuiltinCC = llvm::CallingConv::ARM_AAPCS;
4950  break;
4951  }
4952 }
4953 
4954 ABIArgInfo ARMABIInfo::classifyArgumentType(QualType Ty,
4955  bool isVariadic) const {
4956  // 6.1.2.1 The following argument types are VFP CPRCs:
4957  // A single-precision floating-point type (including promoted
4958  // half-precision types); A double-precision floating-point type;
4959  // A 64-bit or 128-bit containerized vector type; Homogeneous Aggregate
4960  // with a Base Type of a single- or double-precision floating-point type,
4961  // 64-bit containerized vectors or 128-bit containerized vectors with one
4962  // to four Elements.
4963  bool IsEffectivelyAAPCS_VFP = getABIKind() == AAPCS_VFP && !isVariadic;
4964 
4966 
4967  // Handle illegal vector types here.
4968  if (isIllegalVectorType(Ty)) {
4969  uint64_t Size = getContext().getTypeSize(Ty);
4970  if (Size <= 32) {
4971  llvm::Type *ResType =
4972  llvm::Type::getInt32Ty(getVMContext());
4973  return ABIArgInfo::getDirect(ResType);
4974  }
4975  if (Size == 64) {
4976  llvm::Type *ResType = llvm::VectorType::get(
4977  llvm::Type::getInt32Ty(getVMContext()), 2);
4978  return ABIArgInfo::getDirect(ResType);
4979  }
4980  if (Size == 128) {
4981  llvm::Type *ResType = llvm::VectorType::get(
4982  llvm::Type::getInt32Ty(getVMContext()), 4);
4983  return ABIArgInfo::getDirect(ResType);
4984  }
4985  return getNaturalAlignIndirect(Ty, /*ByVal=*/false);
4986  }
4987 
4988  // __fp16 gets passed as if it were an int or float, but with the top 16 bits
4989  // unspecified. This is not done for OpenCL as it handles the half type
4990  // natively, and does not need to interwork with AAPCS code.
4991  if (Ty->isHalfType() && !getContext().getLangOpts().OpenCL) {
4992  llvm::Type *ResType = IsEffectivelyAAPCS_VFP ?
4993  llvm::Type::getFloatTy(getVMContext()) :
4994  llvm::Type::getInt32Ty(getVMContext());
4995  return ABIArgInfo::getDirect(ResType);
4996  }
4997 
4998  if (!isAggregateTypeForABI(Ty)) {
4999  // Treat an enum type as its underlying type.
5000  if (const EnumType *EnumTy = Ty->getAs<EnumType>()) {
5001  Ty = EnumTy->getDecl()->getIntegerType();
5002  }
5003 
5005  : ABIArgInfo::getDirect());
5006  }
5007 
5008  if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI())) {
5009  return getNaturalAlignIndirect(Ty, RAA == CGCXXABI::RAA_DirectInMemory);
5010  }
5011 
5012  // Ignore empty records.
5013  if (isEmptyRecord(getContext(), Ty, true))
5014  return ABIArgInfo::getIgnore();
5015 
5016  if (IsEffectivelyAAPCS_VFP) {
5017  // Homogeneous Aggregates need to be expanded when we can fit the aggregate
5018  // into VFP registers.
5019  const Type *Base = nullptr;
5020  uint64_t Members = 0;
5021  if (isHomogeneousAggregate(Ty, Base, Members)) {
5022  assert(Base && "Base class should be set for homogeneous aggregate");
5023  // Base can be a floating-point or a vector.
5024  return ABIArgInfo::getDirect(nullptr, 0, nullptr, false);
5025  }
5026  } else if (getABIKind() == ARMABIInfo::AAPCS16_VFP) {
5027  // WatchOS does have homogeneous aggregates. Note that we intentionally use
5028  // this convention even for a variadic function: the backend will use GPRs
5029  // if needed.
5030  const Type *Base = nullptr;
5031  uint64_t Members = 0;
5032  if (isHomogeneousAggregate(Ty, Base, Members)) {
5033  assert(Base && Members <= 4 && "unexpected homogeneous aggregate");
5034  llvm::Type *Ty =
5035  llvm::ArrayType::get(CGT.ConvertType(QualType(Base, 0)), Members);
5036  return ABIArgInfo::getDirect(Ty, 0, nullptr, false);
5037  }
5038  }
5039 
5040  if (getABIKind() == ARMABIInfo::AAPCS16_VFP &&
5041  getContext().getTypeSizeInChars(Ty) > CharUnits::fromQuantity(16)) {
5042  // WatchOS is adopting the 64-bit AAPCS rule on composite types: if they're
5043  // bigger than 128-bits, they get placed in space allocated by the caller,
5044  // and a pointer is passed.
5045  return ABIArgInfo::getIndirect(
5046  CharUnits::fromQuantity(getContext().getTypeAlign(Ty) / 8), false);
5047  }
5048 
5049  // Support byval for ARM.
5050  // The ABI alignment for APCS is 4-byte and for AAPCS at least 4-byte and at
5051  // most 8-byte. We realign the indirect argument if type alignment is bigger
5052  // than ABI alignment.
5053  uint64_t ABIAlign = 4;
5054  uint64_t TyAlign = getContext().getTypeAlign(Ty) / 8;
5055  if (getABIKind() == ARMABIInfo::AAPCS_VFP ||
5056  getABIKind() == ARMABIInfo::AAPCS)
5057  ABIAlign = std::min(std::max(TyAlign, (uint64_t)4), (uint64_t)8);
5058 
5059  if (getContext().getTypeSizeInChars(Ty) > CharUnits::fromQuantity(64)) {
5060  assert(getABIKind() != ARMABIInfo::AAPCS16_VFP && "unexpected byval");
5062  /*ByVal=*/true,
5063  /*Realign=*/TyAlign > ABIAlign);
5064  }
5065 
5066  // Otherwise, pass by coercing to a structure of the appropriate size.
5067  llvm::Type* ElemTy;
5068  unsigned SizeRegs;
5069  // FIXME: Try to match the types of the arguments more accurately where
5070  // we can.
5071  if (getContext().getTypeAlign(Ty) <= 32) {
5072  ElemTy = llvm::Type::getInt32Ty(getVMContext());
5073  SizeRegs = (getContext().getTypeSize(Ty) + 31) / 32;
5074  } else {
5075  ElemTy = llvm::Type::getInt64Ty(getVMContext());
5076  SizeRegs = (getContext().getTypeSize(Ty) + 63) / 64;
5077  }
5078 
5079  return ABIArgInfo::getDirect(llvm::ArrayType::get(ElemTy, SizeRegs));
5080 }
5081 
5082 static bool isIntegerLikeType(QualType Ty, ASTContext &Context,
5083  llvm::LLVMContext &VMContext) {
5084  // APCS, C Language Calling Conventions, Non-Simple Return Values: A structure
5085  // is called integer-like if its size is less than or equal to one word, and
5086  // the offset of each of its addressable sub-fields is zero.
5087 
5088  uint64_t Size = Context.getTypeSize(Ty);
5089 
5090  // Check that the type fits in a word.
5091  if (Size > 32)
5092  return false;
5093 
5094  // FIXME: Handle vector types!
5095  if (Ty->isVectorType())
5096  return false;
5097 
5098  // Float types are never treated as "integer like".
5099  if (Ty->isRealFloatingType())
5100  return false;
5101 
5102  // If this is a builtin or pointer type then it is ok.
5103  if (Ty->getAs<BuiltinType>() || Ty->isPointerType())
5104  return true;
5105 
5106  // Small complex integer types are "integer like".
5107  if (const ComplexType *CT = Ty->getAs<ComplexType>())
5108  return isIntegerLikeType(CT->getElementType(), Context, VMContext);
5109 
5110  // Single element and zero sized arrays should be allowed, by the definition
5111  // above, but they are not.
5112 
5113  // Otherwise, it must be a record type.
5114  const RecordType *RT = Ty->getAs<RecordType>();
5115  if (!RT) return false;
5116 
5117  // Ignore records with flexible arrays.
5118  const RecordDecl *RD = RT->getDecl();
5119  if (RD->hasFlexibleArrayMember())
5120  return false;
5121 
5122  // Check that all sub-fields are at offset 0, and are themselves "integer
5123  // like".
5124  const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD);
5125 
5126  bool HadField = false;
5127  unsigned idx = 0;
5128  for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end();
5129  i != e; ++i, ++idx) {
5130  const FieldDecl *FD = *i;
5131 
5132  // Bit-fields are not addressable, we only need to verify they are "integer
5133  // like". We still have to disallow a subsequent non-bitfield, for example:
5134  // struct { int : 0; int x }
5135  // is non-integer like according to gcc.
5136  if (FD->isBitField()) {
5137  if (!RD->isUnion())
5138  HadField = true;
5139 
5140  if (!isIntegerLikeType(FD->getType(), Context, VMContext))
5141  return false;
5142 
5143  continue;
5144  }
5145 
5146  // Check if this field is at offset 0.
5147  if (Layout.getFieldOffset(idx) != 0)
5148  return false;
5149 
5150  if (!isIntegerLikeType(FD->getType(), Context, VMContext))
5151  return false;
5152 
5153  // Only allow at most one field in a structure. This doesn't match the
5154  // wording above, but follows gcc in situations with a field following an
5155  // empty structure.
5156  if (!RD->isUnion()) {
5157  if (HadField)
5158  return false;
5159 
5160  HadField = true;
5161  }
5162  }
5163 
5164  return true;
5165 }
5166 
5167 ABIArgInfo ARMABIInfo::classifyReturnType(QualType RetTy,
5168  bool isVariadic) const {
5169  bool IsEffectivelyAAPCS_VFP =
5170  (getABIKind() == AAPCS_VFP || getABIKind() == AAPCS16_VFP) && !isVariadic;
5171 
5172  if (RetTy->isVoidType())
5173  return ABIArgInfo::getIgnore();
5174 
5175  // Large vector types should be returned via memory.
5176  if (RetTy->isVectorType() && getContext().getTypeSize(RetTy) > 128) {
5177  return getNaturalAlignIndirect(RetTy);
5178  }
5179 
5180  // __fp16 gets returned as if it were an int or float, but with the top 16
5181  // bits unspecified. This is not done for OpenCL as it handles the half type
5182  // natively, and does not need to interwork with AAPCS code.
5183  if (RetTy->isHalfType() && !getContext().getLangOpts().OpenCL) {
5184  llvm::Type *ResType = IsEffectivelyAAPCS_VFP ?
5185  llvm::Type::getFloatTy(getVMContext()) :
5186  llvm::Type::getInt32Ty(getVMContext());
5187  return ABIArgInfo::getDirect(ResType);
5188  }
5189 
5190  if (!isAggregateTypeForABI(RetTy)) {
5191  // Treat an enum type as its underlying type.
5192  if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
5193  RetTy = EnumTy->getDecl()->getIntegerType();
5194 
5196  : ABIArgInfo::getDirect();
5197  }
5198 
5199  // Are we following APCS?
5200  if (getABIKind() == APCS) {
5201  if (isEmptyRecord(getContext(), RetTy, false))
5202  return ABIArgInfo::getIgnore();
5203 
5204  // Complex types are all returned as packed integers.
5205  //
5206  // FIXME: Consider using 2 x vector types if the back end handles them
5207  // correctly.
5208  if (RetTy->isAnyComplexType())
5209  return ABIArgInfo::getDirect(llvm::IntegerType::get(
5210  getVMContext(), getContext().getTypeSize(RetTy)));
5211 
5212  // Integer like structures are returned in r0.
5213  if (isIntegerLikeType(RetTy, getContext(), getVMContext())) {
5214  // Return in the smallest viable integer type.
5215  uint64_t Size = getContext().getTypeSize(RetTy);
5216  if (Size <= 8)
5217  return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext()));
5218  if (Size <= 16)
5219  return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext()));
5220  return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext()));
5221  }
5222 
5223  // Otherwise return in memory.
5224  return getNaturalAlignIndirect(RetTy);
5225  }
5226 
5227  // Otherwise this is an AAPCS variant.
5228 
5229  if (isEmptyRecord(getContext(), RetTy, true))
5230  return ABIArgInfo::getIgnore();
5231 
5232  // Check for homogeneous aggregates with AAPCS-VFP.
5233  if (IsEffectivelyAAPCS_VFP) {
5234  const Type *Base = nullptr;
5235  uint64_t Members = 0;
5236  if (isHomogeneousAggregate(RetTy, Base, Members)) {
5237  assert(Base && "Base class should be set for homogeneous aggregate");
5238  // Homogeneous Aggregates are returned directly.
5239  return ABIArgInfo::getDirect(nullptr, 0, nullptr, false);
5240  }
5241  }
5242 
5243  // Aggregates <= 4 bytes are returned in r0; other aggregates
5244  // are returned indirectly.
5245  uint64_t Size = getContext().getTypeSize(RetTy);
5246  if (Size <= 32) {
5247  if (getDataLayout().isBigEndian())
5248  // Return in 32 bit integer integer type (as if loaded by LDR, AAPCS 5.4)
5249  return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext()));
5250 
5251  // Return in the smallest viable integer type.
5252  if (Size <= 8)
5253  return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext()));
5254  if (Size <= 16)
5255  return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext()));
5256  return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext()));
5257  } else if (Size <= 128 && getABIKind() == AAPCS16_VFP) {
5258  llvm::Type *Int32Ty = llvm::Type::getInt32Ty(getVMContext());
5259  llvm::Type *CoerceTy =
5260  llvm::ArrayType::get(Int32Ty, llvm::RoundUpToAlignment(Size, 32) / 32);
5261  return ABIArgInfo::getDirect(CoerceTy);
5262  }
5263 
5264  return getNaturalAlignIndirect(RetTy);
5265 }
5266 
5267 /// isIllegalVector - check whether Ty is an illegal vector type.
5268 bool ARMABIInfo::isIllegalVectorType(QualType Ty) const {
5269  if (const VectorType *VT = Ty->getAs<VectorType> ()) {
5270  if (isAndroid()) {
5271  // Android shipped using Clang 3.1, which supported a slightly different
5272  // vector ABI. The primary differences were that 3-element vector types
5273  // were legal, and so were sub 32-bit vectors (i.e. <2 x i8>). This path
5274  // accepts that legacy behavior for Android only.
5275  // Check whether VT is legal.
5276  unsigned NumElements = VT->getNumElements();
5277  // NumElements should be power of 2 or equal to 3.
5278  if (!llvm::isPowerOf2_32(NumElements) && NumElements != 3)
5279  return true;
5280  } else {
5281  // Check whether VT is legal.
5282  unsigned NumElements = VT->getNumElements();
5283  uint64_t Size = getContext().getTypeSize(VT);
5284  // NumElements should be power of 2.
5285  if (!llvm::isPowerOf2_32(NumElements))
5286  return true;
5287  // Size should be greater than 32 bits.
5288  return Size <= 32;
5289  }
5290  }
5291  return false;
5292 }
5293 
5294 bool ARMABIInfo::isHomogeneousAggregateBaseType(QualType Ty) const {
5295  // Homogeneous aggregates for AAPCS-VFP must have base types of float,
5296  // double, or 64-bit or 128-bit vectors.
5297  if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) {
5298  if (BT->getKind() == BuiltinType::Float ||
5299  BT->getKind() == BuiltinType::Double ||
5300  BT->getKind() == BuiltinType::LongDouble)
5301  return true;
5302  } else if (const VectorType *VT = Ty->getAs<VectorType>()) {
5303  unsigned VecSize = getContext().getTypeSize(VT);
5304  if (VecSize == 64 || VecSize == 128)
5305  return true;
5306  }
5307  return false;
5308 }
5309 
5310 bool ARMABIInfo::isHomogeneousAggregateSmallEnough(const Type *Base,
5311  uint64_t Members) const {
5312  return Members <= 4;
5313 }
5314 
5315 Address ARMABIInfo::EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
5316  QualType Ty) const {
5317  CharUnits SlotSize = CharUnits::fromQuantity(4);
5318 
5319  // Empty records are ignored for parameter passing purposes.
5320  if (isEmptyRecord(getContext(), Ty, true)) {
5321  Address Addr(CGF.Builder.CreateLoad(VAListAddr), SlotSize);
5322  Addr = CGF.Builder.CreateElementBitCast(Addr, CGF.ConvertTypeForMem(Ty));
5323  return Addr;
5324  }
5325 
5326  auto TyInfo = getContext().getTypeInfoInChars(Ty);
5327  CharUnits TyAlignForABI = TyInfo.second;
5328 
5329  // Use indirect if size of the illegal vector is bigger than 16 bytes.
5330  bool IsIndirect = false;
5331  const Type *Base = nullptr;
5332  uint64_t Members = 0;
5333  if (TyInfo.first > CharUnits::fromQuantity(16) && isIllegalVectorType(Ty)) {
5334  IsIndirect = true;
5335 
5336  // ARMv7k passes structs bigger than 16 bytes indirectly, in space
5337  // allocated by the caller.
5338  } else if (TyInfo.first > CharUnits::fromQuantity(16) &&
5339  getABIKind() == ARMABIInfo::AAPCS16_VFP &&
5340  !isHomogeneousAggregate(Ty, Base, Members)) {
5341  IsIndirect = true;
5342 
5343  // Otherwise, bound the type's ABI alignment.
5344  // The ABI alignment for 64-bit or 128-bit vectors is 8 for AAPCS and 4 for
5345  // APCS. For AAPCS, the ABI alignment is at least 4-byte and at most 8-byte.
5346  // Our callers should be prepared to handle an under-aligned address.
5347  } else if (getABIKind() == ARMABIInfo::AAPCS_VFP ||
5348  getABIKind() == ARMABIInfo::AAPCS) {
5349  TyAlignForABI = std::max(TyAlignForABI, CharUnits::fromQuantity(4));
5350  TyAlignForABI = std::min(TyAlignForABI, CharUnits::fromQuantity(8));
5351  } else if (getABIKind() == ARMABIInfo::AAPCS16_VFP) {
5352  // ARMv7k allows type alignment up to 16 bytes.
5353  TyAlignForABI = std::max(TyAlignForABI, CharUnits::fromQuantity(4));
5354  TyAlignForABI = std::min(TyAlignForABI, CharUnits::fromQuantity(16));
5355  } else {
5356  TyAlignForABI = CharUnits::fromQuantity(4);
5357  }
5358  TyInfo.second = TyAlignForABI;
5359 
5360  return emitVoidPtrVAArg(CGF, VAListAddr, Ty, IsIndirect, TyInfo,
5361  SlotSize, /*AllowHigherAlign*/ true);
5362 }
5363 
5364 //===----------------------------------------------------------------------===//
5365 // NVPTX ABI Implementation
5366 //===----------------------------------------------------------------------===//
5367 
5368 namespace {
5369 
5370 class NVPTXABIInfo : public ABIInfo {
5371 public:
5372  NVPTXABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {}
5373 
5374  ABIArgInfo classifyReturnType(QualType RetTy) const;
5375  ABIArgInfo classifyArgumentType(QualType Ty) const;
5376 
5377  void computeInfo(CGFunctionInfo &FI) const override;
5378  Address EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
5379  QualType Ty) const override;
5380 };
5381 
5382 class NVPTXTargetCodeGenInfo : public TargetCodeGenInfo {
5383 public:
5384  NVPTXTargetCodeGenInfo(CodeGenTypes &CGT)
5385  : TargetCodeGenInfo(new NVPTXABIInfo(CGT)) {}
5386 
5387  void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
5388  CodeGen::CodeGenModule &M) const override;
5389 private:
5390  // Adds a NamedMDNode with F, Name, and Operand as operands, and adds the
5391  // resulting MDNode to the nvvm.annotations MDNode.
5392  static void addNVVMMetadata(llvm::Function *F, StringRef Name, int Operand);
5393 };
5394 
5395 ABIArgInfo NVPTXABIInfo::classifyReturnType(QualType RetTy) const {
5396  if (RetTy->isVoidType())
5397  return ABIArgInfo::getIgnore();
5398 
5399  // note: this is different from default ABI
5400  if (!RetTy->isScalarType())
5401  return ABIArgInfo::getDirect();
5402 
5403  // Treat an enum type as its underlying type.
5404  if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
5405  RetTy = EnumTy->getDecl()->getIntegerType();
5406 
5407  return (RetTy->isPromotableIntegerType() ?
5408  ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
5409 }
5410 
5411 ABIArgInfo NVPTXABIInfo::classifyArgumentType(QualType Ty) const {
5412  // Treat an enum type as its underlying type.
5413  if (const EnumType *EnumTy = Ty->getAs<EnumType>())
5414  Ty = EnumTy->getDecl()->getIntegerType();
5415 
5416  // Return aggregates type as indirect by value
5417  if (isAggregateTypeForABI(Ty))
5418  return getNaturalAlignIndirect(Ty, /* byval */ true);
5419 
5420  return (Ty->isPromotableIntegerType() ?
5421  ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
5422 }
5423 
5424 void NVPTXABIInfo::computeInfo(CGFunctionInfo &FI) const {
5425  if (!getCXXABI().classifyReturnType(FI))
5426  FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
5427  for (auto &I : FI.arguments())
5428  I.info = classifyArgumentType(I.type);
5429 
5430  // Always honor user-specified calling convention.
5432  return;
5433 
5434  FI.setEffectiveCallingConvention(getRuntimeCC());
5435 }
5436 
5437 Address NVPTXABIInfo::EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
5438  QualType Ty) const {
5439  llvm_unreachable("NVPTX does not support varargs");
5440 }
5441 
5442 void NVPTXTargetCodeGenInfo::
5443 setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
5444  CodeGen::CodeGenModule &M) const{
5445  const FunctionDecl *FD = dyn_cast_or_null<FunctionDecl>(D);
5446  if (!FD) return;
5447 
5448  llvm::Function *F = cast<llvm::Function>(GV);
5449 
5450  // Perform special handling in OpenCL mode
5451  if (M.getLangOpts().OpenCL) {
5452  // Use OpenCL function attributes to check for kernel functions
5453  // By default, all functions are device functions
5454  if (FD->hasAttr<OpenCLKernelAttr>()) {
5455  // OpenCL __kernel functions get kernel metadata
5456  // Create !{<func-ref>, metadata !"kernel", i32 1} node
5457  addNVVMMetadata(F, "kernel", 1);
5458  // And kernel functions are not subject to inlining
5459  F->addFnAttr(llvm::Attribute::NoInline);
5460  }
5461  }
5462 
5463  // Perform special handling in CUDA mode.
5464  if (M.getLangOpts().CUDA) {
5465  // CUDA __global__ functions get a kernel metadata entry. Since
5466  // __global__ functions cannot be called from the device, we do not
5467  // need to set the noinline attribute.
5468  if (FD->hasAttr<CUDAGlobalAttr>()) {
5469  // Create !{<func-ref>, metadata !"kernel", i32 1} node
5470  addNVVMMetadata(F, "kernel", 1);
5471  }
5472  if (CUDALaunchBoundsAttr *Attr = FD->getAttr<CUDALaunchBoundsAttr>()) {
5473  // Create !{<func-ref>, metadata !"maxntidx", i32 <val>} node
5474  llvm::APSInt MaxThreads(32);
5475  MaxThreads = Attr->getMaxThreads()->EvaluateKnownConstInt(M.getContext());
5476  if (MaxThreads > 0)
5477  addNVVMMetadata(F, "maxntidx", MaxThreads.getExtValue());
5478 
5479  // min blocks is an optional argument for CUDALaunchBoundsAttr. If it was
5480  // not specified in __launch_bounds__ or if the user specified a 0 value,
5481  // we don't have to add a PTX directive.
5482  if (Attr->getMinBlocks()) {
5483  llvm::APSInt MinBlocks(32);
5484  MinBlocks = Attr->getMinBlocks()->EvaluateKnownConstInt(M.getContext());
5485  if (MinBlocks > 0)
5486  // Create !{<func-ref>, metadata !"minctasm", i32 <val>} node
5487  addNVVMMetadata(F, "minctasm", MinBlocks.getExtValue());
5488  }
5489  }
5490  }
5491 }
5492 
5493 void NVPTXTargetCodeGenInfo::addNVVMMetadata(llvm::Function *F, StringRef Name,
5494  int Operand) {
5495  llvm::Module *M = F->getParent();
5496  llvm::LLVMContext &Ctx = M->getContext();
5497 
5498  // Get "nvvm.annotations" metadata node
5499  llvm::NamedMDNode *MD = M->getOrInsertNamedMetadata("nvvm.annotations");
5500 
5501  llvm::Metadata *MDVals[] = {
5502  llvm::ConstantAsMetadata::get(F), llvm::MDString::get(Ctx, Name),
5503  llvm::ConstantAsMetadata::get(
5504  llvm::ConstantInt::get(llvm::Type::getInt32Ty(Ctx), Operand))};
5505  // Append metadata to nvvm.annotations
5506  MD->addOperand(llvm::MDNode::get(Ctx, MDVals));
5507 }
5508 }
5509 
5510 //===----------------------------------------------------------------------===//
5511 // SystemZ ABI Implementation
5512 //===----------------------------------------------------------------------===//
5513 
5514 namespace {
5515 
5516 class SystemZABIInfo : public ABIInfo {
5517  bool HasVector;
5518 
5519 public:
5520  SystemZABIInfo(CodeGenTypes &CGT, bool HV)
5521  : ABIInfo(CGT), HasVector(HV) {}
5522 
5523  bool isPromotableIntegerType(QualType Ty) const;
5524  bool isCompoundType(QualType Ty) const;
5525  bool isVectorArgumentType(QualType Ty) const;
5526  bool isFPArgumentType(QualType Ty) const;
5527  QualType GetSingleElementType(QualType Ty) const;
5528 
5529  ABIArgInfo classifyReturnType(QualType RetTy) const;
5530  ABIArgInfo classifyArgumentType(QualType ArgTy) const;
5531 
5532  void computeInfo(CGFunctionInfo &FI) const override {
5533  if (!getCXXABI().classifyReturnType(FI))
5534  FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
5535  for (auto &I : FI.arguments())
5536  I.info = classifyArgumentType(I.type);
5537  }
5538 
5539  Address EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
5540  QualType Ty) const override;
5541 };
5542 
5543 class SystemZTargetCodeGenInfo : public TargetCodeGenInfo {
5544 public:
5545  SystemZTargetCodeGenInfo(CodeGenTypes &CGT, bool HasVector)
5546  : TargetCodeGenInfo(new SystemZABIInfo(CGT, HasVector)) {}
5547 };
5548 
5549 }
5550 
5551 bool SystemZABIInfo::isPromotableIntegerType(QualType Ty) const {
5552  // Treat an enum type as its underlying type.
5553  if (const EnumType *EnumTy = Ty->getAs<EnumType>())
5554  Ty = EnumTy->getDecl()->getIntegerType();
5555 
5556  // Promotable integer types are required to be promoted by the ABI.
5557  if (Ty->isPromotableIntegerType())
5558  return true;
5559 
5560  // 32-bit values must also be promoted.
5561  if (const BuiltinType *BT = Ty->getAs<BuiltinType>())
5562  switch (BT->getKind()) {
5563  case BuiltinType::Int:
5564  case BuiltinType::UInt:
5565  return true;
5566  default:
5567  return false;
5568  }
5569  return false;
5570 }
5571 
5572 bool SystemZABIInfo::isCompoundType(QualType Ty) const {
5573  return (Ty->isAnyComplexType() ||
5574  Ty->isVectorType() ||
5575  isAggregateTypeForABI(Ty));
5576 }
5577 
5578 bool SystemZABIInfo::isVectorArgumentType(QualType Ty) const {
5579  return (HasVector &&
5580  Ty->isVectorType() &&
5581  getContext().getTypeSize(Ty) <= 128);
5582 }
5583 
5584 bool SystemZABIInfo::isFPArgumentType(QualType Ty) const {
5585  if (const BuiltinType *BT = Ty->getAs<BuiltinType>())
5586  switch (BT->getKind()) {
5587  case BuiltinType::Float:
5588  case BuiltinType::Double:
5589  return true;
5590  default:
5591  return false;
5592  }
5593 
5594  return false;
5595 }
5596 
5597 QualType SystemZABIInfo::GetSingleElementType(QualType Ty) const {
5598  if (const RecordType *RT = Ty->getAsStructureType()) {
5599  const RecordDecl *RD = RT->getDecl();
5600  QualType Found;
5601 
5602  // If this is a C++ record, check the bases first.
5603  if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD))
5604  for (const auto &I : CXXRD->bases()) {
5605  QualType Base = I.getType();
5606 
5607  // Empty bases don't affect things either way.
5608  if (isEmptyRecord(getContext(), Base, true))
5609  continue;
5610 
5611  if (!Found.isNull())
5612  return Ty;
5613  Found = GetSingleElementType(Base);
5614  }
5615 
5616  // Check the fields.
5617  for (const auto *FD : RD->fields()) {
5618  // For compatibility with GCC, ignore empty bitfields in C++ mode.
5619  // Unlike isSingleElementStruct(), empty structure and array fields
5620  // do count. So do anonymous bitfields that aren't zero-sized.
5621  if (getContext().getLangOpts().CPlusPlus &&
5622  FD->isBitField() && FD->getBitWidthValue(getContext()) == 0)
5623  continue;
5624 
5625  // Unlike isSingleElementStruct(), arrays do not count.
5626  // Nested structures still do though.
5627  if (!Found.isNull())
5628  return Ty;
5629  Found = GetSingleElementType(FD->getType());
5630  }
5631 
5632  // Unlike isSingleElementStruct(), trailing padding is allowed.
5633  // An 8-byte aligned struct s { float f; } is passed as a double.
5634  if (!Found.isNull())
5635  return Found;
5636  }
5637 
5638  return Ty;
5639 }
5640 
5641 Address SystemZABIInfo::EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
5642  QualType Ty) const {
5643  // Assume that va_list type is correct; should be pointer to LLVM type:
5644  // struct {
5645  // i64 __gpr;
5646  // i64 __fpr;
5647  // i8 *__overflow_arg_area;
5648  // i8 *__reg_save_area;
5649  // };
5650 
5651  // Every non-vector argument occupies 8 bytes and is passed by preference
5652  // in either GPRs or FPRs. Vector arguments occupy 8 or 16 bytes and are
5653  // always passed on the stack.
5654  Ty = getContext().getCanonicalType(Ty);
5655  auto TyInfo = getContext().getTypeInfoInChars(Ty);
5656  llvm::Type *ArgTy = CGF.ConvertTypeForMem(Ty);
5657  llvm::Type *DirectTy = ArgTy;
5658  ABIArgInfo AI = classifyArgumentType(Ty);
5659  bool IsIndirect = AI.isIndirect();
5660  bool InFPRs = false;
5661  bool IsVector = false;
5662  CharUnits UnpaddedSize;
5663  CharUnits DirectAlign;
5664  if (IsIndirect) {
5665  DirectTy = llvm::PointerType::getUnqual(DirectTy);
5666  UnpaddedSize = DirectAlign = CharUnits::fromQuantity(8);
5667  } else {
5668  if (AI.getCoerceToType())
5669  ArgTy = AI.getCoerceToType();
5670  InFPRs = ArgTy->isFloatTy() || ArgTy->isDoubleTy();
5671  IsVector = ArgTy->isVectorTy();
5672  UnpaddedSize = TyInfo.first;
5673  DirectAlign = TyInfo.second;
5674  }
5675  CharUnits PaddedSize = CharUnits::fromQuantity(8);
5676  if (IsVector && UnpaddedSize > PaddedSize)
5677  PaddedSize = CharUnits::fromQuantity(16);
5678  assert((UnpaddedSize <= PaddedSize) && "Invalid argument size.");
5679 
5680  CharUnits Padding = (PaddedSize - UnpaddedSize);
5681 
5682  llvm::Type *IndexTy = CGF.Int64Ty;
5683  llvm::Value *PaddedSizeV =
5684  llvm::ConstantInt::get(IndexTy, PaddedSize.getQuantity());
5685 
5686  if (IsVector) {
5687  // Work out the address of a vector argument on the stack.
5688  // Vector arguments are always passed in the high bits of a
5689  // single (8 byte) or double (16 byte) stack slot.
5690  Address OverflowArgAreaPtr =
5691  CGF.Builder.CreateStructGEP(VAListAddr, 2, CharUnits::fromQuantity(16),
5692  "overflow_arg_area_ptr");
5693  Address OverflowArgArea =
5694  Address(CGF.Builder.CreateLoad(OverflowArgAreaPtr, "overflow_arg_area"),
5695  TyInfo.second);
5696  Address MemAddr =
5697  CGF.Builder.CreateElementBitCast(OverflowArgArea, DirectTy, "mem_addr");
5698 
5699  // Update overflow_arg_area_ptr pointer
5700  llvm::Value *NewOverflowArgArea =
5701  CGF.Builder.CreateGEP(OverflowArgArea.getPointer(), PaddedSizeV,
5702  "overflow_arg_area");
5703  CGF.Builder.CreateStore(NewOverflowArgArea, OverflowArgAreaPtr);
5704 
5705  return MemAddr;
5706  }
5707 
5708  assert(PaddedSize.getQuantity() == 8);
5709 
5710  unsigned MaxRegs, RegCountField, RegSaveIndex;
5711  CharUnits RegPadding;
5712  if (InFPRs) {
5713  MaxRegs = 4; // Maximum of 4 FPR arguments
5714  RegCountField = 1; // __fpr
5715  RegSaveIndex = 16; // save offset for f0
5716  RegPadding = CharUnits(); // floats are passed in the high bits of an FPR
5717  } else {
5718  MaxRegs = 5; // Maximum of 5 GPR arguments
5719  RegCountField = 0; // __gpr
5720  RegSaveIndex = 2; // save offset for r2
5721  RegPadding = Padding; // values are passed in the low bits of a GPR
5722  }
5723 
5724  Address RegCountPtr = CGF.Builder.CreateStructGEP(
5725  VAListAddr, RegCountField, RegCountField * CharUnits::fromQuantity(8),
5726  "reg_count_ptr");
5727  llvm::Value *RegCount = CGF.Builder.CreateLoad(RegCountPtr, "reg_count");
5728  llvm::Value *MaxRegsV = llvm::ConstantInt::get(IndexTy, MaxRegs);
5729  llvm::Value *InRegs = CGF.Builder.CreateICmpULT(RegCount, MaxRegsV,
5730  "fits_in_regs");
5731 
5732  llvm::BasicBlock *InRegBlock = CGF.createBasicBlock("vaarg.in_reg");
5733  llvm::BasicBlock *InMemBlock = CGF.createBasicBlock("vaarg.in_mem");
5734  llvm::BasicBlock *ContBlock = CGF.createBasicBlock("vaarg.end");
5735  CGF.Builder.CreateCondBr(InRegs, InRegBlock, InMemBlock);
5736 
5737  // Emit code to load the value if it was passed in registers.
5738  CGF.EmitBlock(InRegBlock);
5739 
5740  // Work out the address of an argument register.
5741  llvm::Value *ScaledRegCount =
5742  CGF.Builder.CreateMul(RegCount, PaddedSizeV, "scaled_reg_count");
5743  llvm::Value *RegBase =
5744  llvm::ConstantInt::get(IndexTy, RegSaveIndex * PaddedSize.getQuantity()
5745  + RegPadding.getQuantity());
5746  llvm::Value *RegOffset =
5747  CGF.Builder.CreateAdd(ScaledRegCount, RegBase, "reg_offset");
5748  Address RegSaveAreaPtr =
5749  CGF.Builder.CreateStructGEP(VAListAddr, 3, CharUnits::fromQuantity(24),
5750  "reg_save_area_ptr");
5751  llvm::Value *RegSaveArea =
5752  CGF.Builder.CreateLoad(RegSaveAreaPtr, "reg_save_area");
5753  Address RawRegAddr(CGF.Builder.CreateGEP(RegSaveArea, RegOffset,
5754  "raw_reg_addr"),
5755  PaddedSize);
5756  Address RegAddr =
5757  CGF.Builder.CreateElementBitCast(RawRegAddr, DirectTy, "reg_addr");
5758 
5759  // Update the register count
5760  llvm::Value *One = llvm::ConstantInt::get(IndexTy, 1);
5761  llvm::Value *NewRegCount =
5762  CGF.Builder.CreateAdd(RegCount, One, "reg_count");
5763  CGF.Builder.CreateStore(NewRegCount, RegCountPtr);
5764  CGF.EmitBranch(ContBlock);
5765 
5766  // Emit code to load the value if it was passed in memory.
5767  CGF.EmitBlock(InMemBlock);
5768 
5769  // Work out the address of a stack argument.
5770  Address OverflowArgAreaPtr = CGF.Builder.CreateStructGEP(
5771  VAListAddr, 2, CharUnits::fromQuantity(16), "overflow_arg_area_ptr");
5772  Address OverflowArgArea =
5773  Address(CGF.Builder.CreateLoad(OverflowArgAreaPtr, "overflow_arg_area"),
5774  PaddedSize);
5775  Address RawMemAddr =
5776  CGF.Builder.CreateConstByteGEP(OverflowArgArea, Padding, "raw_mem_addr");
5777  Address MemAddr =
5778  CGF.Builder.CreateElementBitCast(RawMemAddr, DirectTy, "mem_addr");
5779 
5780  // Update overflow_arg_area_ptr pointer
5781  llvm::Value *NewOverflowArgArea =
5782  CGF.Builder.CreateGEP(OverflowArgArea.getPointer(), PaddedSizeV,
5783  "overflow_arg_area");
5784  CGF.Builder.CreateStore(NewOverflowArgArea, OverflowArgAreaPtr);
5785  CGF.EmitBranch(ContBlock);
5786 
5787  // Return the appropriate result.
5788  CGF.EmitBlock(ContBlock);
5789  Address ResAddr = emitMergePHI(CGF, RegAddr, InRegBlock,
5790  MemAddr, InMemBlock, "va_arg.addr");
5791 
5792  if (IsIndirect)
5793  ResAddr = Address(CGF.Builder.CreateLoad(ResAddr, "indirect_arg"),
5794  TyInfo.second);
5795 
5796  return ResAddr;
5797 }
5798 
5799 ABIArgInfo SystemZABIInfo::classifyReturnType(QualType RetTy) const {
5800  if (RetTy->isVoidType())
5801  return ABIArgInfo::getIgnore();
5802  if (isVectorArgumentType(RetTy))
5803  return ABIArgInfo::getDirect();
5804  if (isCompoundType(RetTy) || getContext().getTypeSize(RetTy) > 64)
5805  return getNaturalAlignIndirect(RetTy);
5806  return (isPromotableIntegerType(RetTy) ?
5807  ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
5808 }
5809 
5810 ABIArgInfo SystemZABIInfo::classifyArgumentType(QualType Ty) const {
5811  // Handle the generic C++ ABI.
5812  if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI()))
5813  return getNaturalAlignIndirect(Ty, RAA == CGCXXABI::RAA_DirectInMemory);
5814 
5815  // Integers and enums are extended to full register width.
5816  if (isPromotableIntegerType(Ty))
5817  return ABIArgInfo::getExtend();
5818 
5819  // Handle vector types and vector-like structure types. Note that
5820  // as opposed to float-like structure types, we do not allow any
5821  // padding for vector-like structures, so verify the sizes match.
5822  uint64_t Size = getContext().getTypeSize(Ty);
5823  QualType SingleElementTy = GetSingleElementType(Ty);
5824  if (isVectorArgumentType(SingleElementTy) &&
5825  getContext().getTypeSize(SingleElementTy) == Size)
5826  return ABIArgInfo::getDirect(CGT.ConvertType(SingleElementTy));
5827 
5828  // Values that are not 1, 2, 4 or 8 bytes in size are passed indirectly.
5829  if (Size != 8 && Size != 16 && Size != 32 && Size != 64)
5830  return getNaturalAlignIndirect(Ty, /*ByVal=*/false);
5831 
5832  // Handle small structures.
5833  if (const RecordType *RT = Ty->getAs<RecordType>()) {
5834  // Structures with flexible arrays have variable length, so really
5835  // fail the size test above.
5836  const RecordDecl *RD = RT->getDecl();
5837  if (RD->hasFlexibleArrayMember())
5838  return getNaturalAlignIndirect(Ty, /*ByVal=*/false);
5839 
5840  // The structure is passed as an unextended integer, a float, or a double.
5841  llvm::Type *PassTy;
5842  if (isFPArgumentType(SingleElementTy)) {
5843  assert(Size == 32 || Size == 64);
5844  if (Size == 32)
5845  PassTy = llvm::Type::getFloatTy(getVMContext());
5846  else
5847  PassTy = llvm::Type::getDoubleTy(getVMContext());
5848  } else
5849  PassTy = llvm::IntegerType::get(getVMContext(), Size);
5850  return ABIArgInfo::getDirect(PassTy);
5851  }
5852 
5853  // Non-structure compounds are passed indirectly.
5854  if (isCompoundType(Ty))
5855  return getNaturalAlignIndirect(Ty, /*ByVal=*/false);
5856 
5857  return ABIArgInfo::getDirect(nullptr);
5858 }
5859 
5860 //===----------------------------------------------------------------------===//
5861 // MSP430 ABI Implementation
5862 //===----------------------------------------------------------------------===//
5863 
5864 namespace {
5865 
5866 class MSP430TargetCodeGenInfo : public TargetCodeGenInfo {
5867 public:
5868  MSP430TargetCodeGenInfo(CodeGenTypes &CGT)
5869  : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {}
5870  void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
5871  CodeGen::CodeGenModule &M) const override;
5872 };
5873 
5874 }
5875 
5876 void MSP430TargetCodeGenInfo::setTargetAttributes(const Decl *D,
5877  llvm::GlobalValue *GV,
5878  CodeGen::CodeGenModule &M) const {
5879  if (const FunctionDecl *FD = dyn_cast_or_null<FunctionDecl>(D)) {
5880  if (const MSP430InterruptAttr *attr = FD->getAttr<MSP430InterruptAttr>()) {
5881  // Handle 'interrupt' attribute:
5882  llvm::Function *F = cast<llvm::Function>(GV);
5883 
5884  // Step 1: Set ISR calling convention.
5885  F->setCallingConv(llvm::CallingConv::MSP430_INTR);
5886 
5887  // Step 2: Add attributes goodness.
5888  F->addFnAttr(llvm::Attribute::NoInline);
5889 
5890  // Step 3: Emit ISR vector alias.
5891  unsigned Num = attr->getNumber() / 2;
5893  "__isr_" + Twine(Num), F);
5894  }
5895  }
5896 }
5897 
5898 //===----------------------------------------------------------------------===//
5899 // MIPS ABI Implementation. This works for both little-endian and
5900 // big-endian variants.
5901 //===----------------------------------------------------------------------===//
5902 
5903 namespace {
5904 class MipsABIInfo : public ABIInfo {
5905  bool IsO32;
5906  unsigned MinABIStackAlignInBytes, StackAlignInBytes;
5907  void CoerceToIntArgs(uint64_t TySize,
5908  SmallVectorImpl<llvm::Type *> &ArgList) const;
5909  llvm::Type* HandleAggregates(QualType Ty, uint64_t TySize) const;
5910  llvm::Type* returnAggregateInRegs(QualType RetTy, uint64_t Size) const;
5911  llvm::Type* getPaddingType(uint64_t Align, uint64_t Offset) const;
5912 public:
5913  MipsABIInfo(CodeGenTypes &CGT, bool _IsO32) :
5914  ABIInfo(CGT), IsO32(_IsO32), MinABIStackAlignInBytes(IsO32 ? 4 : 8),
5915  StackAlignInBytes(IsO32 ? 8 : 16) {}
5916 
5917  ABIArgInfo classifyReturnType(QualType RetTy) const;
5918  ABIArgInfo classifyArgumentType(QualType RetTy, uint64_t &Offset) const;
5919  void computeInfo(CGFunctionInfo &FI) const override;
5920  Address EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
5921  QualType Ty) const override;
5922  bool shouldSignExtUnsignedType(QualType Ty) const override;
5923 };
5924 
5925 class MIPSTargetCodeGenInfo : public TargetCodeGenInfo {
5926  unsigned SizeOfUnwindException;
5927 public:
5928  MIPSTargetCodeGenInfo(CodeGenTypes &CGT, bool IsO32)
5929  : TargetCodeGenInfo(new MipsABIInfo(CGT, IsO32)),
5930  SizeOfUnwindException(IsO32 ? 24 : 32) {}
5931 
5932  int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const override {
5933  return 29;
5934  }
5935 
5936  void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
5937  CodeGen::CodeGenModule &CGM) const override {
5938  const FunctionDecl *FD = dyn_cast_or_null<FunctionDecl>(D);
5939  if (!FD) return;
5940  llvm::Function *Fn = cast<llvm::Function>(GV);
5941  if (FD->hasAttr<Mips16Attr>()) {
5942  Fn->addFnAttr("mips16");
5943  }
5944  else if (FD->hasAttr<NoMips16Attr>()) {
5945  Fn->addFnAttr("nomips16");
5946  }
5947 
5948  const MipsInterruptAttr *Attr = FD->getAttr<MipsInterruptAttr>();
5949  if (!Attr)
5950  return;
5951 
5952  const char *Kind;
5953  switch (Attr->getInterrupt()) {
5954  case MipsInterruptAttr::eic: Kind = "eic"; break;
5955  case MipsInterruptAttr::sw0: Kind = "sw0"; break;
5956  case MipsInterruptAttr::sw1: Kind = "sw1"; break;
5957  case MipsInterruptAttr::hw0: Kind = "hw0"; break;
5958  case MipsInterruptAttr::hw1: Kind = "hw1"; break;
5959  case MipsInterruptAttr::hw2: Kind = "hw2"; break;
5960  case MipsInterruptAttr::hw3: Kind = "hw3"; break;
5961  case MipsInterruptAttr::hw4: Kind = "hw4"; break;
5962  case MipsInterruptAttr::hw5: Kind = "hw5"; break;
5963  }
5964 
5965  Fn->addFnAttr("interrupt", Kind);
5966 
5967  }
5968 
5969  bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
5970  llvm::Value *Address) const override;
5971 
5972  unsigned getSizeOfUnwindException() const override {
5973  return SizeOfUnwindException;
5974  }
5975 };
5976 }
5977 
5978 void MipsABIInfo::CoerceToIntArgs(
5979  uint64_t TySize, SmallVectorImpl<llvm::Type *> &ArgList) const {
5980  llvm::IntegerType *IntTy =
5981  llvm::IntegerType::get(getVMContext(), MinABIStackAlignInBytes * 8);
5982 
5983  // Add (TySize / MinABIStackAlignInBytes) args of IntTy.
5984  for (unsigned N = TySize / (MinABIStackAlignInBytes * 8); N; --N)
5985  ArgList.push_back(IntTy);
5986 
5987  // If necessary, add one more integer type to ArgList.
5988  unsigned R = TySize % (MinABIStackAlignInBytes * 8);
5989 
5990  if (R)
5991  ArgList.push_back(llvm::IntegerType::get(getVMContext(), R));
5992 }
5993 
5994 // In N32/64, an aligned double precision floating point field is passed in
5995 // a register.
5996 llvm::Type* MipsABIInfo::HandleAggregates(QualType Ty, uint64_t TySize) const {
5997  SmallVector<llvm::Type*, 8> ArgList, IntArgList;
5998 
5999  if (IsO32) {
6000  CoerceToIntArgs(TySize, ArgList);
6001  return llvm::StructType::get(getVMContext(), ArgList);
6002  }
6003 
6004  if (Ty->isComplexType())
6005  return CGT.ConvertType(Ty);
6006 
6007  const RecordType *RT = Ty->getAs<RecordType>();
6008 
6009  // Unions/vectors are passed in integer registers.
6010  if (!RT || !RT->isStructureOrClassType()) {
6011  CoerceToIntArgs(TySize, ArgList);
6012  return llvm::StructType::get(getVMContext(), ArgList);
6013  }
6014 
6015  const RecordDecl *RD = RT->getDecl();
6016  const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD);
6017  assert(!(TySize % 8) && "Size of structure must be multiple of 8.");
6018 
6019  uint64_t LastOffset = 0;
6020  unsigned idx = 0;
6021  llvm::IntegerType *I64 = llvm::IntegerType::get(getVMContext(), 64);
6022 
6023  // Iterate over fields in the struct/class and check if there are any aligned
6024  // double fields.
6025  for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end();
6026  i != e; ++i, ++idx) {
6027  const QualType Ty = i->getType();
6028  const BuiltinType *BT = Ty->getAs<BuiltinType>();
6029 
6030  if (!BT || BT->getKind() != BuiltinType::Double)
6031  continue;
6032 
6033  uint64_t Offset = Layout.getFieldOffset(idx);
6034  if (Offset % 64) // Ignore doubles that are not aligned.
6035  continue;
6036 
6037  // Add ((Offset - LastOffset) / 64) args of type i64.
6038  for (unsigned j = (Offset - LastOffset) / 64; j > 0; --j)
6039  ArgList.push_back(I64);
6040 
6041  // Add double type.
6042  ArgList.push_back(llvm::Type::getDoubleTy(getVMContext()));
6043  LastOffset = Offset + 64;
6044  }
6045 
6046  CoerceToIntArgs(TySize - LastOffset, IntArgList);
6047  ArgList.append(IntArgList.begin(), IntArgList.end());
6048 
6049  return llvm::StructType::get(getVMContext(), ArgList);
6050 }
6051 
6052 llvm::Type *MipsABIInfo::getPaddingType(uint64_t OrigOffset,
6053  uint64_t Offset) const {
6054  if (OrigOffset + MinABIStackAlignInBytes > Offset)
6055  return nullptr;
6056 
6057  return llvm::IntegerType::get(getVMContext(), (Offset - OrigOffset) * 8);
6058 }
6059 
6060 ABIArgInfo
6061 MipsABIInfo::classifyArgumentType(QualType Ty, uint64_t &Offset) const {
6063 
6064  uint64_t OrigOffset = Offset;
6065  uint64_t TySize = getContext().getTypeSize(Ty);
6066  uint64_t Align = getContext().getTypeAlign(Ty) / 8;
6067 
6068  Align = std::min(std::max(Align, (uint64_t)MinABIStackAlignInBytes),
6069  (uint64_t)StackAlignInBytes);
6070  unsigned CurrOffset = llvm::RoundUpToAlignment(Offset, Align);
6071  Offset = CurrOffset + llvm::RoundUpToAlignment(TySize, Align * 8) / 8;
6072 
6073  if (isAggregateTypeForABI(Ty) || Ty->isVectorType()) {
6074  // Ignore empty aggregates.
6075  if (TySize == 0)
6076  return ABIArgInfo::getIgnore();
6077 
6078  if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI())) {
6079  Offset = OrigOffset + MinABIStackAlignInBytes;
6080  return getNaturalAlignIndirect(Ty, RAA == CGCXXABI::RAA_DirectInMemory);
6081  }
6082 
6083  // If we have reached here, aggregates are passed directly by coercing to
6084  // another structure type. Padding is inserted if the offset of the
6085  // aggregate is unaligned.
6086  ABIArgInfo ArgInfo =
6087  ABIArgInfo::getDirect(HandleAggregates(Ty, TySize), 0,
6088  getPaddingType(OrigOffset, CurrOffset));
6089  ArgInfo.setInReg(true);
6090  return ArgInfo;
6091  }
6092 
6093  // Treat an enum type as its underlying type.
6094  if (const EnumType *EnumTy = Ty->getAs<EnumType>())
6095  Ty = EnumTy->getDecl()->getIntegerType();
6096 
6097  // All integral types are promoted to the GPR width.
6098  if (Ty->isIntegralOrEnumerationType())
6099  return ABIArgInfo::getExtend();
6100 
6101  return ABIArgInfo::getDirect(
6102  nullptr, 0, IsO32 ? nullptr : getPaddingType(OrigOffset, CurrOffset));
6103 }
6104 
6105 llvm::Type*
6106 MipsABIInfo::returnAggregateInRegs(QualType RetTy, uint64_t Size) const {
6107  const RecordType *RT = RetTy->getAs<RecordType>();
6109 
6110  if (RT && RT->isStructureOrClassType()) {
6111  const RecordDecl *RD = RT->getDecl();
6112  const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD);
6113  unsigned FieldCnt = Layout.getFieldCount();
6114 
6115  // N32/64 returns struct/classes in floating point registers if the
6116  // following conditions are met:
6117  // 1. The size of the struct/class is no larger than 128-bit.
6118  // 2. The struct/class has one or two fields all of which are floating
6119  // point types.
6120  // 3. The offset of the first field is zero (this follows what gcc does).
6121  //
6122  // Any other composite results are returned in integer registers.
6123  //
6124  if (FieldCnt && (FieldCnt <= 2) && !Layout.getFieldOffset(0)) {
6125  RecordDecl::field_iterator b = RD->field_begin(), e = RD->field_end();
6126  for (; b != e; ++b) {
6127  const BuiltinType *BT = b->getType()->getAs<BuiltinType>();
6128 
6129  if (!BT || !BT->isFloatingPoint())
6130  break;
6131 
6132  RTList.push_back(CGT.ConvertType(b->getType()));
6133  }
6134 
6135  if (b == e)
6136  return llvm::StructType::get(getVMContext(), RTList,
6137  RD->hasAttr<PackedAttr>());
6138 
6139  RTList.clear();
6140  }
6141  }
6142 
6143  CoerceToIntArgs(Size, RTList);
6144  return llvm::StructType::get(getVMContext(), RTList);
6145 }
6146 
6147 ABIArgInfo MipsABIInfo::classifyReturnType(QualType RetTy) const {
6148  uint64_t Size = getContext().getTypeSize(RetTy);
6149 
6150  if (RetTy->isVoidType())
6151  return ABIArgInfo::getIgnore();
6152 
6153  // O32 doesn't treat zero-sized structs differently from other structs.
6154  // However, N32/N64 ignores zero sized return values.
6155  if (!IsO32 && Size == 0)
6156  return ABIArgInfo::getIgnore();
6157 
6158  if (isAggregateTypeForABI(RetTy) || RetTy->isVectorType()) {
6159  if (Size <= 128) {
6160  if (RetTy->isAnyComplexType())
6161  return ABIArgInfo::getDirect();
6162 
6163  // O32 returns integer vectors in registers and N32/N64 returns all small
6164  // aggregates in registers.
6165  if (!IsO32 ||
6166  (RetTy->isVectorType() && !RetTy->hasFloatingRepresentation())) {
6167  ABIArgInfo ArgInfo =
6168  ABIArgInfo::getDirect(returnAggregateInRegs(RetTy, Size));
6169  ArgInfo.setInReg(true);
6170  return ArgInfo;
6171  }
6172  }
6173 
6174  return getNaturalAlignIndirect(RetTy);
6175  }
6176 
6177  // Treat an enum type as its underlying type.
6178  if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
6179  RetTy = EnumTy->getDecl()->getIntegerType();
6180 
6181  return (RetTy->isPromotableIntegerType() ?
6182  ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
6183 }
6184 
6185 void MipsABIInfo::computeInfo(CGFunctionInfo &FI) const {
6186  ABIArgInfo &RetInfo = FI.getReturnInfo();
6187  if (!getCXXABI().classifyReturnType(FI))
6188  RetInfo = classifyReturnType(FI.getReturnType());
6189 
6190  // Check if a pointer to an aggregate is passed as a hidden argument.
6191  uint64_t Offset = RetInfo.isIndirect() ? MinABIStackAlignInBytes : 0;
6192 
6193  for (auto &I : FI.arguments())
6194  I.info = classifyArgumentType(I.type, Offset);
6195 }
6196 
6197 Address MipsABIInfo::EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
6198  QualType OrigTy) const {
6199  QualType Ty = OrigTy;
6200 
6201  // Integer arguments are promoted to 32-bit on O32 and 64-bit on N32/N64.
6202  // Pointers are also promoted in the same way but this only matters for N32.
6203  unsigned SlotSizeInBits = IsO32 ? 32 : 64;
6204  unsigned PtrWidth = getTarget().getPointerWidth(0);
6205  bool DidPromote = false;
6206  if ((Ty->isIntegerType() &&
6207  getContext().getIntWidth(Ty) < SlotSizeInBits) ||
6208  (Ty->isPointerType() && PtrWidth < SlotSizeInBits)) {
6209  DidPromote = true;
6210  Ty = getContext().getIntTypeForBitwidth(SlotSizeInBits,
6211  Ty->isSignedIntegerType());
6212  }
6213 
6214  auto TyInfo = getContext().getTypeInfoInChars(Ty);
6215 
6216  // The alignment of things in the argument area is never larger than
6217  // StackAlignInBytes.
6218  TyInfo.second =
6219  std::min(TyInfo.second, CharUnits::fromQuantity(StackAlignInBytes));
6220 
6221  // MinABIStackAlignInBytes is the size of argument slots on the stack.
6222  CharUnits ArgSlotSize = CharUnits::fromQuantity(MinABIStackAlignInBytes);
6223 
6224  Address Addr = emitVoidPtrVAArg(CGF, VAListAddr, Ty, /*indirect*/ false,
6225  TyInfo, ArgSlotSize, /*AllowHigherAlign*/ true);
6226 
6227 
6228  // If there was a promotion, "unpromote" into a temporary.
6229  // TODO: can we just use a pointer into a subset of the original slot?
6230  if (DidPromote) {
6231  Address Temp = CGF.CreateMemTemp(OrigTy, "vaarg.promotion-temp");
6232  llvm::Value *Promoted = CGF.Builder.CreateLoad(Addr);
6233 
6234  // Truncate down to the right width.
6235  llvm::Type *IntTy = (OrigTy->isIntegerType() ? Temp.getElementType()
6236  : CGF.IntPtrTy);
6237  llvm::Value *V = CGF.Builder.CreateTrunc(Promoted, IntTy);
6238  if (OrigTy->isPointerType())
6239  V = CGF.Builder.CreateIntToPtr(V, Temp.getElementType());
6240 
6241  CGF.Builder.CreateStore(V, Temp);
6242  Addr = Temp;
6243  }
6244 
6245  return Addr;
6246 }
6247 
6248 bool MipsABIInfo::shouldSignExtUnsignedType(QualType Ty) const {
6249  int TySize = getContext().getTypeSize(Ty);
6250 
6251  // MIPS64 ABI requires unsigned 32 bit integers to be sign extended.
6252  if (Ty->isUnsignedIntegerOrEnumerationType() && TySize == 32)
6253  return true;
6254 
6255  return false;
6256 }
6257 
6258 bool
6259 MIPSTargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
6260  llvm::Value *Address) const {
6261  // This information comes from gcc's implementation, which seems to
6262  // as canonical as it gets.
6263 
6264  // Everything on MIPS is 4 bytes. Double-precision FP registers
6265  // are aliased to pairs of single-precision FP registers.
6266  llvm::Value *Four8 = llvm::ConstantInt::get(CGF.Int8Ty, 4);
6267 
6268  // 0-31 are the general purpose registers, $0 - $31.
6269  // 32-63 are the floating-point registers, $f0 - $f31.
6270  // 64 and 65 are the multiply/divide registers, $hi and $lo.
6271  // 66 is the (notional, I think) register for signal-handler return.
6272  AssignToArrayRange(CGF.Builder, Address, Four8, 0, 65);
6273 
6274  // 67-74 are the floating-point status registers, $fcc0 - $fcc7.
6275  // They are one bit wide and ignored here.
6276 
6277  // 80-111 are the coprocessor 0 registers, $c0r0 - $c0r31.
6278  // (coprocessor 1 is the FP unit)
6279  // 112-143 are the coprocessor 2 registers, $c2r0 - $c2r31.
6280  // 144-175 are the coprocessor 3 registers, $c3r0 - $c3r31.
6281  // 176-181 are the DSP accumulator registers.
6282  AssignToArrayRange(CGF.Builder, Address, Four8, 80, 181);
6283  return false;
6284 }
6285 
6286 //===----------------------------------------------------------------------===//
6287 // TCE ABI Implementation (see http://tce.cs.tut.fi). Uses mostly the defaults.
6288 // Currently subclassed only to implement custom OpenCL C function attribute
6289 // handling.
6290 //===----------------------------------------------------------------------===//
6291 
6292 namespace {
6293 
6294 class TCETargetCodeGenInfo : public DefaultTargetCodeGenInfo {
6295 public:
6296  TCETargetCodeGenInfo(CodeGenTypes &CGT)
6297  : DefaultTargetCodeGenInfo(CGT) {}
6298 
6299  void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
6300  CodeGen::CodeGenModule &M) const override;
6301 };
6302 
6303 void TCETargetCodeGenInfo::setTargetAttributes(
6304  const Decl *D, llvm::GlobalValue *GV, CodeGen::CodeGenModule &M) const {
6305  const FunctionDecl *FD = dyn_cast_or_null<FunctionDecl>(D);
6306  if (!FD) return;
6307 
6308  llvm::Function *F = cast<llvm::Function>(GV);
6309 
6310  if (M.getLangOpts().OpenCL) {
6311  if (FD->hasAttr<OpenCLKernelAttr>()) {
6312  // OpenCL C Kernel functions are not subject to inlining
6313  F->addFnAttr(llvm::Attribute::NoInline);
6314  const ReqdWorkGroupSizeAttr *Attr = FD->getAttr<ReqdWorkGroupSizeAttr>();
6315  if (Attr) {
6316  // Convert the reqd_work_group_size() attributes to metadata.
6317  llvm::LLVMContext &Context = F->getContext();
6318  llvm::NamedMDNode *OpenCLMetadata =
6319  M.getModule().getOrInsertNamedMetadata(
6320  "opencl.kernel_wg_size_info");
6321 
6323  Operands.push_back(llvm::ConstantAsMetadata::get(F));
6324 
6325  Operands.push_back(
6326  llvm::ConstantAsMetadata::get(llvm::Constant::getIntegerValue(
6327  M.Int32Ty, llvm::APInt(32, Attr->getXDim()))));
6328  Operands.push_back(
6329  llvm::ConstantAsMetadata::get(llvm::Constant::getIntegerValue(
6330  M.Int32Ty, llvm::APInt(32, Attr->getYDim()))));
6331  Operands.push_back(
6332  llvm::ConstantAsMetadata::get(llvm::Constant::getIntegerValue(
6333  M.Int32Ty, llvm::APInt(32, Attr->getZDim()))));
6334 
6335  // Add a boolean constant operand for "required" (true) or "hint"
6336  // (false) for implementing the work_group_size_hint attr later.
6337  // Currently always true as the hint is not yet implemented.
6338  Operands.push_back(
6339  llvm::ConstantAsMetadata::get(llvm::ConstantInt::getTrue(Context)));
6340  OpenCLMetadata->addOperand(llvm::MDNode::get(Context, Operands));
6341  }
6342  }
6343  }
6344 }
6345 
6346 }
6347 
6348 //===----------------------------------------------------------------------===//
6349 // Hexagon ABI Implementation
6350 //===----------------------------------------------------------------------===//
6351 
6352 namespace {
6353 
6354 class HexagonABIInfo : public ABIInfo {
6355 
6356 
6357 public:
6358  HexagonABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {}
6359 
6360 private:
6361 
6362  ABIArgInfo classifyReturnType(QualType RetTy) const;
6363  ABIArgInfo classifyArgumentType(QualType RetTy) const;
6364 
6365  void computeInfo(CGFunctionInfo &FI) const override;
6366 
6367  Address EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
6368  QualType Ty) const override;
6369 };
6370 
6371 class HexagonTargetCodeGenInfo : public TargetCodeGenInfo {
6372 public:
6373  HexagonTargetCodeGenInfo(CodeGenTypes &CGT)
6374  :TargetCodeGenInfo(new HexagonABIInfo(CGT)) {}
6375 
6376  int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const override {
6377  return 29;
6378  }
6379 };
6380 
6381 }
6382 
6383 void HexagonABIInfo::computeInfo(CGFunctionInfo &FI) const {
6384  if (!getCXXABI().classifyReturnType(FI))
6385  FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
6386  for (auto &I : FI.arguments())
6387  I.info = classifyArgumentType(I.type);
6388 }
6389 
6390 ABIArgInfo HexagonABIInfo::classifyArgumentType(QualType Ty) const {
6391  if (!isAggregateTypeForABI(Ty)) {
6392  // Treat an enum type as its underlying type.
6393  if (const EnumType *EnumTy = Ty->getAs<EnumType>())
6394  Ty = EnumTy->getDecl()->getIntegerType();
6395 
6396  return (Ty->isPromotableIntegerType() ?
6397  ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
6398  }
6399 
6400  // Ignore empty records.
6401  if (isEmptyRecord(getContext(), Ty, true))
6402  return ABIArgInfo::getIgnore();
6403 
6404  if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI()))
6405  return getNaturalAlignIndirect(Ty, RAA == CGCXXABI::RAA_DirectInMemory);
6406 
6407  uint64_t Size = getContext().getTypeSize(Ty);
6408  if (Size > 64)
6409  return getNaturalAlignIndirect(Ty, /*ByVal=*/true);
6410  // Pass in the smallest viable integer type.
6411  else if (Size > 32)
6412  return ABIArgInfo::getDirect(llvm::Type::getInt64Ty(getVMContext()));
6413  else if (Size > 16)
6414  return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext()));
6415  else if (Size > 8)
6416  return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext()));
6417  else
6418  return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext()));
6419 }
6420 
6421 ABIArgInfo HexagonABIInfo::classifyReturnType(QualType RetTy) const {
6422  if (RetTy->isVoidType())
6423  return ABIArgInfo::getIgnore();
6424 
6425  // Large vector types should be returned via memory.
6426  if (RetTy->isVectorType() && getContext().getTypeSize(RetTy) > 64)
6427  return getNaturalAlignIndirect(RetTy);
6428 
6429  if (!isAggregateTypeForABI(RetTy)) {
6430  // Treat an enum type as its underlying type.
6431  if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
6432  RetTy = EnumTy->getDecl()->getIntegerType();
6433 
6434  return (RetTy->isPromotableIntegerType() ?
6435  ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
6436  }
6437 
6438  if (isEmptyRecord(getContext(), RetTy, true))
6439  return ABIArgInfo::getIgnore();
6440 
6441  // Aggregates <= 8 bytes are returned in r0; other aggregates
6442  // are returned indirectly.
6443  uint64_t Size = getContext().getTypeSize(RetTy);
6444  if (Size <= 64) {
6445  // Return in the smallest viable integer type.
6446  if (Size <= 8)
6447  return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext()));
6448  if (Size <= 16)
6449  return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext()));
6450  if (Size <= 32)
6451  return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext()));
6452  return ABIArgInfo::getDirect(llvm::Type::getInt64Ty(getVMContext()));
6453  }
6454 
6455  return getNaturalAlignIndirect(RetTy, /*ByVal=*/true);
6456 }
6457 
6458 Address HexagonABIInfo::EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
6459  QualType Ty) const {
6460  // FIXME: Someone needs to audit that this handle alignment correctly.
6461  return emitVoidPtrVAArg(CGF, VAListAddr, Ty, /*indirect*/ false,
6462  getContext().getTypeInfoInChars(Ty),
6464  /*AllowHigherAlign*/ true);
6465 }
6466 
6467 //===----------------------------------------------------------------------===//
6468 // AMDGPU ABI Implementation
6469 //===----------------------------------------------------------------------===//
6470 
6471 namespace {
6472 
6473 class AMDGPUTargetCodeGenInfo : public TargetCodeGenInfo {
6474 public:
6475  AMDGPUTargetCodeGenInfo(CodeGenTypes &CGT)
6476  : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {}
6477  void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
6478  CodeGen::CodeGenModule &M) const override;
6479 };
6480 
6481 }
6482 
6483 void AMDGPUTargetCodeGenInfo::setTargetAttributes(
6484  const Decl *D,
6485  llvm::GlobalValue *GV,
6486  CodeGen::CodeGenModule &M) const {
6487  const FunctionDecl *FD = dyn_cast_or_null<FunctionDecl>(D);
6488  if (!FD)
6489  return;
6490 
6491  if (const auto Attr = FD->getAttr<AMDGPUNumVGPRAttr>()) {
6492  llvm::Function *F = cast<llvm::Function>(GV);
6493  uint32_t NumVGPR = Attr->getNumVGPR();
6494  if (NumVGPR != 0)
6495  F->addFnAttr("amdgpu_num_vgpr", llvm::utostr(NumVGPR));
6496  }
6497 
6498  if (const auto Attr = FD->getAttr<AMDGPUNumSGPRAttr>()) {
6499  llvm::Function *F = cast<llvm::Function>(GV);
6500  unsigned NumSGPR = Attr->getNumSGPR();
6501  if (NumSGPR != 0)
6502  F->addFnAttr("amdgpu_num_sgpr", llvm::utostr(NumSGPR));
6503  }
6504 }
6505 
6506 
6507 //===----------------------------------------------------------------------===//
6508 // SPARC v9 ABI Implementation.
6509 // Based on the SPARC Compliance Definition version 2.4.1.
6510 //
6511 // Function arguments a mapped to a nominal "parameter array" and promoted to
6512 // registers depending on their type. Each argument occupies 8 or 16 bytes in
6513 // the array, structs larger than 16 bytes are passed indirectly.
6514 //
6515 // One case requires special care:
6516 //
6517 // struct mixed {
6518 // int i;
6519 // float f;
6520 // };
6521 //
6522 // When a struct mixed is passed by value, it only occupies 8 bytes in the
6523 // parameter array, but the int is passed in an integer register, and the float
6524 // is passed in a floating point register. This is represented as two arguments
6525 // with the LLVM IR inreg attribute:
6526 //
6527 // declare void f(i32 inreg %i, float inreg %f)
6528 //
6529 // The code generator will only allocate 4 bytes from the parameter array for
6530 // the inreg arguments. All other arguments are allocated a multiple of 8
6531 // bytes.
6532 //
6533 namespace {
6534 class SparcV9ABIInfo : public ABIInfo {
6535 public:
6536  SparcV9ABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {}
6537 
6538 private:
6539  ABIArgInfo classifyType(QualType RetTy, unsigned SizeLimit) const;
6540  void computeInfo(CGFunctionInfo &FI) const override;
6541  Address EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
6542  QualType Ty) const override;
6543 
6544  // Coercion type builder for structs passed in registers. The coercion type
6545  // serves two purposes:
6546  //
6547  // 1. Pad structs to a multiple of 64 bits, so they are passed 'left-aligned'
6548  // in registers.
6549  // 2. Expose aligned floating point elements as first-level elements, so the
6550  // code generator knows to pass them in floating point registers.
6551  //
6552  // We also compute the InReg flag which indicates that the struct contains
6553  // aligned 32-bit floats.
6554  //
6555  struct CoerceBuilder {
6556  llvm::LLVMContext &Context;
6557  const llvm::DataLayout &DL;
6559  uint64_t Size;
6560  bool InReg;
6561 
6562  CoerceBuilder(llvm::LLVMContext &c, const llvm::DataLayout &dl)
6563  : Context(c), DL(dl), Size(0), InReg(false) {}
6564 
6565  // Pad Elems with integers until Size is ToSize.
6566  void pad(uint64_t ToSize) {
6567  assert(ToSize >= Size && "Cannot remove elements");
6568  if (ToSize == Size)
6569  return;
6570 
6571  // Finish the current 64-bit word.
6572  uint64_t Aligned = llvm::RoundUpToAlignment(Size, 64);
6573  if (Aligned > Size && Aligned <= ToSize) {
6574  Elems.push_back(llvm::IntegerType::get(Context, Aligned - Size));
6575  Size = Aligned;
6576  }
6577 
6578  // Add whole 64-bit words.
6579  while (Size + 64 <= ToSize) {
6580  Elems.push_back(llvm::Type::getInt64Ty(Context));
6581  Size += 64;
6582  }
6583 
6584  // Final in-word padding.
6585  if (Size < ToSize) {
6586  Elems.push_back(llvm::IntegerType::get(Context, ToSize - Size));
6587  Size = ToSize;
6588  }
6589  }
6590 
6591  // Add a floating point element at Offset.
6592  void addFloat(uint64_t Offset, llvm::Type *Ty, unsigned Bits) {
6593  // Unaligned floats are treated as integers.
6594  if (Offset % Bits)
6595  return;
6596  // The InReg flag is only required if there are any floats < 64 bits.
6597  if (Bits < 64)
6598  InReg = true;
6599  pad(Offset);
6600  Elems.push_back(Ty);
6601  Size = Offset + Bits;
6602  }
6603 
6604  // Add a struct type to the coercion type, starting at Offset (in bits).
6605  void addStruct(uint64_t Offset, llvm::StructType *StrTy) {
6606  const llvm::StructLayout *Layout = DL.getStructLayout(StrTy);
6607  for (unsigned i = 0, e = StrTy->getNumElements(); i != e; ++i) {
6608  llvm::Type *ElemTy = StrTy->getElementType(i);
6609  uint64_t ElemOffset = Offset + Layout->getElementOffsetInBits(i);
6610  switch (ElemTy->getTypeID()) {
6611  case llvm::Type::StructTyID:
6612  addStruct(ElemOffset, cast<llvm::StructType>(ElemTy));
6613  break;
6614  case llvm::Type::FloatTyID:
6615  addFloat(ElemOffset, ElemTy, 32);
6616  break;
6617  case llvm::Type::DoubleTyID:
6618  addFloat(ElemOffset, ElemTy, 64);
6619  break;
6620  case llvm::Type::FP128TyID:
6621  addFloat(ElemOffset, ElemTy, 128);
6622  break;
6623  case llvm::Type::PointerTyID:
6624  if (ElemOffset % 64 == 0) {
6625  pad(ElemOffset);
6626  Elems.push_back(ElemTy);
6627  Size += 64;
6628  }
6629  break;
6630  default:
6631  break;
6632  }
6633  }
6634  }
6635 
6636  // Check if Ty is a usable substitute for the coercion type.
6637  bool isUsableType(llvm::StructType *Ty) const {
6638  return llvm::makeArrayRef(Elems) == Ty->elements();
6639  }
6640 
6641  // Get the coercion type as a literal struct type.
6642  llvm::Type *getType() const {
6643  if (Elems.size() == 1)
6644  return Elems.front();
6645  else
6646  return llvm::StructType::get(Context, Elems);
6647  }
6648  };
6649 };
6650 } // end anonymous namespace
6651 
6652 ABIArgInfo
6653 SparcV9ABIInfo::classifyType(QualType Ty, unsigned SizeLimit) const {
6654  if (Ty->isVoidType())
6655  return ABIArgInfo::getIgnore();
6656 
6657  uint64_t Size = getContext().getTypeSize(Ty);
6658 
6659  // Anything too big to fit in registers is passed with an explicit indirect
6660  // pointer / sret pointer.
6661  if (Size > SizeLimit)
6662  return getNaturalAlignIndirect(Ty, /*ByVal=*/false);
6663 
6664  // Treat an enum type as its underlying type.
6665  if (const EnumType *EnumTy = Ty->getAs<EnumType>())
6666  Ty = EnumTy->getDecl()->getIntegerType();
6667 
6668  // Integer types smaller than a register are extended.
6669  if (Size < 64 && Ty->isIntegerType())
6670  return ABIArgInfo::getExtend();
6671 
6672  // Other non-aggregates go in registers.
6673  if (!isAggregateTypeForABI(Ty))
6674  return ABIArgInfo::getDirect();
6675 
6676  // If a C++ object has either a non-trivial copy constructor or a non-trivial
6677  // destructor, it is passed with an explicit indirect pointer / sret pointer.
6678  if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI()))
6679  return getNaturalAlignIndirect(Ty, RAA == CGCXXABI::RAA_DirectInMemory);
6680 
6681  // This is a small aggregate type that should be passed in registers.
6682  // Build a coercion type from the LLVM struct type.
6683  llvm::StructType *StrTy = dyn_cast<llvm::StructType>(CGT.ConvertType(Ty));
6684  if (!StrTy)
6685  return ABIArgInfo::getDirect();
6686 
6687  CoerceBuilder CB(getVMContext(), getDataLayout());
6688  CB.addStruct(0, StrTy);
6689  CB.pad(llvm::RoundUpToAlignment(CB.DL.getTypeSizeInBits(StrTy), 64));
6690 
6691  // Try to use the original type for coercion.
6692  llvm::Type *CoerceTy = CB.isUsableType(StrTy) ? StrTy : CB.getType();
6693 
6694  if (CB.InReg)
6695  return ABIArgInfo::getDirectInReg(CoerceTy);
6696  else
6697  return ABIArgInfo::getDirect(CoerceTy);
6698 }
6699 
6700 Address SparcV9ABIInfo::EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
6701  QualType Ty) const {
6702  ABIArgInfo AI = classifyType(Ty, 16 * 8);
6703  llvm::Type *ArgTy = CGT.ConvertType(Ty);
6704  if (AI.canHaveCoerceToType() && !AI.getCoerceToType())
6705  AI.setCoerceToType(ArgTy);
6706 
6707  CharUnits SlotSize = CharUnits::fromQuantity(8);
6708 
6709  CGBuilderTy &Builder = CGF.Builder;
6710  Address Addr(Builder.CreateLoad(VAListAddr, "ap.cur"), SlotSize);
6711  llvm::Type *ArgPtrTy = llvm::PointerType::getUnqual(ArgTy);
6712 
6713  auto TypeInfo = getContext().getTypeInfoInChars(Ty);
6714 
6715  Address ArgAddr = Address::invalid();
6716  CharUnits Stride;
6717  switch (AI.getKind()) {
6718  case ABIArgInfo::Expand:
6719  case ABIArgInfo::InAlloca:
6720  llvm_unreachable("Unsupported ABI kind for va_arg");
6721 
6722  case ABIArgInfo::Extend: {
6723  Stride = SlotSize;
6724  CharUnits Offset = SlotSize - TypeInfo.first;
6725  ArgAddr = Builder.CreateConstInBoundsByteGEP(Addr, Offset, "extend");
6726  break;
6727  }
6728 
6729  case ABIArgInfo::Direct: {
6730  auto AllocSize = getDataLayout().getTypeAllocSize(AI.getCoerceToType());
6731  Stride = CharUnits::fromQuantity(AllocSize).RoundUpToAlignment(SlotSize);
6732  ArgAddr = Addr;
6733  break;
6734  }
6735 
6736  case ABIArgInfo::Indirect:
6737  Stride = SlotSize;
6738  ArgAddr = Builder.CreateElementBitCast(Addr, ArgPtrTy, "indirect");
6739  ArgAddr = Address(Builder.CreateLoad(ArgAddr, "indirect.arg"),
6740  TypeInfo.second);
6741  break;
6742 
6743  case ABIArgInfo::Ignore:
6744  return Address(llvm::UndefValue::get(ArgPtrTy), TypeInfo.second);
6745  }
6746 
6747  // Update VAList.
6748  llvm::Value *NextPtr =
6749  Builder.CreateConstInBoundsByteGEP(Addr.getPointer(), Stride, "ap.next");
6750  Builder.CreateStore(NextPtr, VAListAddr);
6751 
6752  return Builder.CreateBitCast(ArgAddr, ArgPtrTy, "arg.addr");
6753 }
6754 
6755 void SparcV9ABIInfo::computeInfo(CGFunctionInfo &FI) const {
6756  FI.getReturnInfo() = classifyType(FI.getReturnType(), 32 * 8);
6757  for (auto &I : FI.arguments())
6758  I.info = classifyType(I.type, 16 * 8);
6759 }
6760 
6761 namespace {
6762 class SparcV9TargetCodeGenInfo : public TargetCodeGenInfo {
6763 public:
6764  SparcV9TargetCodeGenInfo(CodeGenTypes &CGT)
6765  : TargetCodeGenInfo(new SparcV9ABIInfo(CGT)) {}
6766 
6767  int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const override {
6768  return 14;
6769  }
6770 
6771  bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
6772  llvm::Value *Address) const override;
6773 };
6774 } // end anonymous namespace
6775 
6776 bool
6777 SparcV9TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
6778  llvm::Value *Address) const {
6779  // This is calculated from the LLVM and GCC tables and verified
6780  // against gcc output. AFAIK all ABIs use the same encoding.
6781 
6782  CodeGen::CGBuilderTy &Builder = CGF.Builder;
6783 
6784  llvm::IntegerType *i8 = CGF.Int8Ty;
6785  llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4);
6786  llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8);
6787 
6788  // 0-31: the 8-byte general-purpose registers
6789  AssignToArrayRange(Builder, Address, Eight8, 0, 31);
6790 
6791  // 32-63: f0-31, the 4-byte floating-point registers
6792  AssignToArrayRange(Builder, Address, Four8, 32, 63);
6793 
6794  // Y = 64
6795  // PSR = 65
6796  // WIM = 66
6797  // TBR = 67
6798  // PC = 68
6799  // NPC = 69
6800  // FSR = 70
6801  // CSR = 71
6802  AssignToArrayRange(Builder, Address, Eight8, 64, 71);
6803 
6804  // 72-87: d0-15, the 8-byte floating-point registers
6805  AssignToArrayRange(Builder, Address, Eight8, 72, 87);
6806 
6807  return false;
6808 }
6809 
6810 
6811 //===----------------------------------------------------------------------===//
6812 // XCore ABI Implementation
6813 //===----------------------------------------------------------------------===//
6814 
6815 namespace {
6816 
6817 /// A SmallStringEnc instance is used to build up the TypeString by passing
6818 /// it by reference between functions that append to it.
6819 typedef llvm::SmallString<128> SmallStringEnc;
6820 
6821 /// TypeStringCache caches the meta encodings of Types.
6822 ///
6823 /// The reason for caching TypeStrings is two fold:
6824 /// 1. To cache a type's encoding for later uses;
6825 /// 2. As a means to break recursive member type inclusion.
6826 ///
6827 /// A cache Entry can have a Status of:
6828 /// NonRecursive: The type encoding is not recursive;
6829 /// Recursive: The type encoding is recursive;
6830 /// Incomplete: An incomplete TypeString;
6831 /// IncompleteUsed: An incomplete TypeString that has been used in a
6832 /// Recursive type encoding.
6833 ///
6834 /// A NonRecursive entry will have all of its sub-members expanded as fully
6835 /// as possible. Whilst it may contain types which are recursive, the type
6836 /// itself is not recursive and thus its encoding may be safely used whenever
6837 /// the type is encountered.
6838 ///
6839 /// A Recursive entry will have all of its sub-members expanded as fully as
6840 /// possible. The type itself is recursive and it may contain other types which
6841 /// are recursive. The Recursive encoding must not be used during the expansion
6842 /// of a recursive type's recursive branch. For simplicity the code uses
6843 /// IncompleteCount to reject all usage of Recursive encodings for member types.
6844 ///
6845 /// An Incomplete entry is always a RecordType and only encodes its
6846 /// identifier e.g. "s(S){}". Incomplete 'StubEnc' entries are ephemeral and
6847 /// are placed into the cache during type expansion as a means to identify and
6848 /// handle recursive inclusion of types as sub-members. If there is recursion
6849 /// the entry becomes IncompleteUsed.
6850 ///
6851 /// During the expansion of a RecordType's members:
6852 ///
6853 /// If the cache contains a NonRecursive encoding for the member type, the
6854 /// cached encoding is used;
6855 ///
6856 /// If the cache contains a Recursive encoding for the member type, the
6857 /// cached encoding is 'Swapped' out, as it may be incorrect, and...
6858 ///
6859 /// If the member is a RecordType, an Incomplete encoding is placed into the
6860 /// cache to break potential recursive inclusion of itself as a sub-member;
6861 ///
6862 /// Once a member RecordType has been expanded, its temporary incomplete
6863 /// entry is removed from the cache. If a Recursive encoding was swapped out
6864 /// it is swapped back in;
6865 ///
6866 /// If an incomplete entry is used to expand a sub-member, the incomplete
6867 /// entry is marked as IncompleteUsed. The cache keeps count of how many
6868 /// IncompleteUsed entries it currently contains in IncompleteUsedCount;
6869 ///
6870 /// If a member's encoding is found to be a NonRecursive or Recursive viz:
6871 /// IncompleteUsedCount==0, the member's encoding is added to the cache.
6872 /// Else the member is part of a recursive type and thus the recursion has
6873 /// been exited too soon for the encoding to be correct for the member.
6874 ///
6875 class TypeStringCache {
6876  enum Status {NonRecursive, Recursive, Incomplete, IncompleteUsed};
6877  struct Entry {
6878  std::string Str; // The encoded TypeString for the type.
6879  enum Status State; // Information about the encoding in 'Str'.
6880  std::string Swapped; // A temporary place holder for a Recursive encoding
6881  // during the expansion of RecordType's members.
6882  };
6883  std::map<const IdentifierInfo *, struct Entry> Map;
6884  unsigned IncompleteCount; // Number of Incomplete entries in the Map.
6885  unsigned IncompleteUsedCount; // Number of IncompleteUsed entries in the Map.
6886 public:
6887  TypeStringCache() : IncompleteCount(0), IncompleteUsedCount(0) {}
6888  void addIncomplete(const IdentifierInfo *ID, std::string StubEnc);
6889  bool removeIncomplete(const IdentifierInfo *ID);
6890  void addIfComplete(const IdentifierInfo *ID, StringRef Str,
6891  bool IsRecursive);
6892  StringRef lookupStr(const IdentifierInfo *ID);
6893 };
6894 
6895 /// TypeString encodings for enum & union fields must be order.
6896 /// FieldEncoding is a helper for this ordering process.
6897 class FieldEncoding {
6898  bool HasName;
6899  std::string Enc;
6900 public:
6901  FieldEncoding(bool b, SmallStringEnc &e) : HasName(b), Enc(e.c_str()) {}
6902  StringRef str() {return Enc.c_str();}
6903  bool operator<(const FieldEncoding &rhs) const {
6904  if (HasName != rhs.HasName) return HasName;
6905  return Enc < rhs.Enc;
6906  }
6907 };
6908 
6909 class XCoreABIInfo : public DefaultABIInfo {
6910 public:
6911  XCoreABIInfo(CodeGen::CodeGenTypes &CGT) : DefaultABIInfo(CGT) {}
6912  Address EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
6913  QualType Ty) const override;
6914 };
6915 
6916 class XCoreTargetCodeGenInfo : public TargetCodeGenInfo {
6917  mutable TypeStringCache TSC;
6918 public:
6919  XCoreTargetCodeGenInfo(CodeGenTypes &CGT)
6920  :TargetCodeGenInfo(new XCoreABIInfo(CGT)) {}
6921  void emitTargetMD(const Decl *D, llvm::GlobalValue *GV,
6922  CodeGen::CodeGenModule &M) const override;
6923 };
6924 
6925 } // End anonymous namespace.
6926 
6927 Address XCoreABIInfo::EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
6928  QualType Ty) const {
6929  CGBuilderTy &Builder = CGF.Builder;
6930 
6931  // Get the VAList.
6932  CharUnits SlotSize = CharUnits::fromQuantity(4);
6933  Address AP(Builder.CreateLoad(VAListAddr), SlotSize);
6934 
6935  // Handle the argument.
6936  ABIArgInfo AI = classifyArgumentType(Ty);
6937  CharUnits TypeAlign = getContext().getTypeAlignInChars(Ty);
6938  llvm::Type *ArgTy = CGT.ConvertType(Ty);
6939  if (AI.canHaveCoerceToType() && !AI.getCoerceToType())
6940  AI.setCoerceToType(ArgTy);
6941  llvm::Type *ArgPtrTy = llvm::PointerType::getUnqual(ArgTy);
6942 
6943  Address Val = Address::invalid();
6944  CharUnits ArgSize = CharUnits::Zero();
6945  switch (AI.getKind()) {
6946  case ABIArgInfo::Expand:
6947  case ABIArgInfo::InAlloca:
6948  llvm_unreachable("Unsupported ABI kind for va_arg");
6949  case ABIArgInfo::Ignore:
6950  Val = Address(llvm::UndefValue::get(ArgPtrTy), TypeAlign);
6951  ArgSize = CharUnits::Zero();
6952  break;
6953  case ABIArgInfo::Extend:
6954  case ABIArgInfo::Direct:
6955  Val = Builder.CreateBitCast(AP, ArgPtrTy);
6956  ArgSize = CharUnits::fromQuantity(
6957  getDataLayout().getTypeAllocSize(AI.getCoerceToType()));
6958  ArgSize = ArgSize.RoundUpToAlignment(SlotSize);
6959  break;
6960  case ABIArgInfo::Indirect:
6961  Val = Builder.CreateElementBitCast(AP, ArgPtrTy);
6962  Val = Address(Builder.CreateLoad(Val), TypeAlign);
6963  ArgSize = SlotSize;
6964  break;
6965  }
6966 
6967  // Increment the VAList.
6968  if (!ArgSize.isZero()) {
6969  llvm::Value *APN =
6970  Builder.CreateConstInBoundsByteGEP(AP.getPointer(), ArgSize);
6971  Builder.CreateStore(APN, VAListAddr);
6972  }
6973 
6974  return Val;
6975 }
6976 
6977 /// During the expansion of a RecordType, an incomplete TypeString is placed
6978 /// into the cache as a means to identify and break recursion.
6979 /// If there is a Recursive encoding in the cache, it is swapped out and will
6980 /// be reinserted by removeIncomplete().
6981 /// All other types of encoding should have been used rather than arriving here.
6982 void TypeStringCache::addIncomplete(const IdentifierInfo *ID,
6983  std::string StubEnc) {
6984  if (!ID)
6985  return;
6986  Entry &E = Map[ID];
6987  assert( (E.Str.empty() || E.State == Recursive) &&
6988  "Incorrectly use of addIncomplete");
6989  assert(!StubEnc.empty() && "Passing an empty string to addIncomplete()");
6990  E.Swapped.swap(E.Str); // swap out the Recursive
6991  E.Str.swap(StubEnc);
6992  E.State = Incomplete;
6993  ++IncompleteCount;
6994 }
6995 
6996 /// Once the RecordType has been expanded, the temporary incomplete TypeString
6997 /// must be removed from the cache.
6998 /// If a Recursive was swapped out by addIncomplete(), it will be replaced.
6999 /// Returns true if the RecordType was defined recursively.
7000 bool TypeStringCache::removeIncomplete(const IdentifierInfo *ID) {
7001  if (!ID)
7002  return false;
7003  auto I = Map.find(ID);
7004  assert(I != Map.end() && "Entry not present");
7005  Entry &E = I->second;
7006  assert( (E.State == Incomplete ||
7007  E.State == IncompleteUsed) &&
7008  "Entry must be an incomplete type");
7009  bool IsRecursive = false;
7010  if (E.State == IncompleteUsed) {
7011  // We made use of our Incomplete encoding, thus we are recursive.
7012  IsRecursive = true;
7013  --IncompleteUsedCount;
7014  }
7015  if (E.Swapped.empty())
7016  Map.erase(I);
7017  else {
7018  // Swap the Recursive back.
7019  E.Swapped.swap(E.Str);
7020  E.Swapped.clear();
7021  E.State = Recursive;
7022  }
7023  --IncompleteCount;
7024  return IsRecursive;
7025 }
7026 
7027 /// Add the encoded TypeString to the cache only if it is NonRecursive or
7028 /// Recursive (viz: all sub-members were expanded as fully as possible).
7029 void TypeStringCache::addIfComplete(const IdentifierInfo *ID, StringRef Str,
7030  bool IsRecursive) {
7031  if (!ID || IncompleteUsedCount)
7032  return; // No key or it is is an incomplete sub-type so don't add.
7033  Entry &E = Map[ID];
7034  if (IsRecursive && !E.Str.empty()) {
7035  assert(E.State==Recursive && E.Str.size() == Str.size() &&
7036  "This is not the same Recursive entry");
7037  // The parent container was not recursive after all, so we could have used
7038  // this Recursive sub-member entry after all, but we assumed the worse when
7039  // we started viz: IncompleteCount!=0.
7040  return;
7041  }
7042  assert(E.Str.empty() && "Entry already present");
7043  E.Str = Str.str();
7044  E.State = IsRecursive? Recursive : NonRecursive;
7045 }
7046 
7047 /// Return a cached TypeString encoding for the ID. If there isn't one, or we
7048 /// are recursively expanding a type (IncompleteCount != 0) and the cached
7049 /// encoding is Recursive, return an empty StringRef.
7050 StringRef TypeStringCache::lookupStr(const IdentifierInfo *ID) {
7051  if (!ID)
7052  return StringRef(); // We have no key.
7053  auto I = Map.find(ID);
7054  if (I == Map.end())
7055  return StringRef(); // We have no encoding.
7056  Entry &E = I->second;
7057  if (E.State == Recursive && IncompleteCount)
7058  return StringRef(); // We don't use Recursive encodings for member types.
7059 
7060  if (E.State == Incomplete) {
7061  // The incomplete type is being used to break out of recursion.
7062  E.State = IncompleteUsed;
7063  ++IncompleteUsedCount;
7064  }
7065  return E.Str.c_str();
7066 }
7067 
7068 /// The XCore ABI includes a type information section that communicates symbol
7069 /// type information to the linker. The linker uses this information to verify
7070 /// safety/correctness of things such as array bound and pointers et al.
7071 /// The ABI only requires C (and XC) language modules to emit TypeStrings.
7072 /// This type information (TypeString) is emitted into meta data for all global
7073 /// symbols: definitions, declarations, functions & variables.
7074 ///
7075 /// The TypeString carries type, qualifier, name, size & value details.
7076 /// Please see 'Tools Development Guide' section 2.16.2 for format details:
7077 /// https://www.xmos.com/download/public/Tools-Development-Guide%28X9114A%29.pdf
7078 /// The output is tested by test/CodeGen/xcore-stringtype.c.
7079 ///
7080 static bool getTypeString(SmallStringEnc &Enc, const Decl *D,
7081  CodeGen::CodeGenModule &CGM, TypeStringCache &TSC);
7082 
7083 /// XCore uses emitTargetMD to emit TypeString metadata for global symbols.
7084 void XCoreTargetCodeGenInfo::emitTargetMD(const Decl *D, llvm::GlobalValue *GV,
7085  CodeGen::CodeGenModule &CGM) const {
7086  SmallStringEnc Enc;
7087  if (getTypeString(Enc, D, CGM, TSC)) {
7088  llvm::LLVMContext &Ctx = CGM.getModule().getContext();
7090  MDVals.push_back(llvm::ConstantAsMetadata::get(GV));
7091  MDVals.push_back(llvm::MDString::get(Ctx, Enc.str()));
7092  llvm::NamedMDNode *MD =
7093  CGM.getModule().getOrInsertNamedMetadata("xcore.typestrings");
7094  MD->addOperand(llvm::MDNode::get(Ctx, MDVals));
7095  }
7096 }
7097 
7098 static bool appendType(SmallStringEnc &Enc, QualType QType,
7099  const CodeGen::CodeGenModule &CGM,
7100  TypeStringCache &TSC);
7101 
7102 /// Helper function for appendRecordType().
7103 /// Builds a SmallVector containing the encoded field types in declaration
7104 /// order.
7106  const RecordDecl *RD,
7107  const CodeGen::CodeGenModule &CGM,
7108  TypeStringCache &TSC) {
7109  for (const auto *Field : RD->fields()) {
7110  SmallStringEnc Enc;
7111  Enc += "m(";
7112  Enc += Field->getName();
7113  Enc += "){";
7114  if (Field->isBitField()) {
7115  Enc += "b(";
7116  llvm::raw_svector_ostream OS(Enc);
7117  OS << Field->getBitWidthValue(CGM.getContext());
7118  Enc += ':';
7119  }
7120  if (!appendType(Enc, Field->getType(), CGM, TSC))
7121  return false;
7122  if (Field->isBitField())
7123  Enc += ')';
7124  Enc += '}';
7125  FE.emplace_back(!Field->getName().empty(), Enc);
7126  }
7127  return true;
7128 }
7129 
7130 /// Appends structure and union types to Enc and adds encoding to cache.
7131 /// Recursively calls appendType (via extractFieldType) for each field.
7132 /// Union types have their fields ordered according to the ABI.
7133 static bool appendRecordType(SmallStringEnc &Enc, const RecordType *RT,
7134  const CodeGen::CodeGenModule &CGM,
7135  TypeStringCache &TSC, const IdentifierInfo *ID) {
7136  // Append the cached TypeString if we have one.
7137  StringRef TypeString = TSC.lookupStr(ID);
7138  if (!TypeString.empty()) {
7139  Enc += TypeString;
7140  return true;
7141  }
7142 
7143  // Start to emit an incomplete TypeString.
7144  size_t Start = Enc.size();
7145  Enc += (RT->isUnionType()? 'u' : 's');
7146  Enc += '(';
7147  if (ID)
7148  Enc += ID->getName();
7149  Enc += "){";
7150 
7151  // We collect all encoded fields and order as necessary.
7152  bool IsRecursive = false;
7153  const RecordDecl *RD = RT->getDecl()->getDefinition();
7154  if (RD && !RD->field_empty()) {
7155  // An incomplete TypeString stub is placed in the cache for this RecordType
7156  // so that recursive calls to this RecordType will use it whilst building a
7157  // complete TypeString for this RecordType.
7159  std::string StubEnc(Enc.substr(Start).str());
7160  StubEnc += '}'; // StubEnc now holds a valid incomplete TypeString.
7161  TSC.addIncomplete(ID, std::move(StubEnc));
7162  if (!extractFieldType(FE, RD, CGM, TSC)) {
7163  (void) TSC.removeIncomplete(ID);
7164  return false;
7165  }
7166  IsRecursive = TSC.removeIncomplete(ID);
7167  // The ABI requires unions to be sorted but not structures.
7168  // See FieldEncoding::operator< for sort algorithm.
7169  if (RT->isUnionType())
7170  std::sort(FE.begin(), FE.end());
7171  // We can now complete the TypeString.
7172  unsigned E = FE.size();
7173  for (unsigned I = 0; I != E; ++I) {
7174  if (I)
7175  Enc += ',';
7176  Enc += FE[I].str();
7177  }
7178  }
7179  Enc += '}';
7180  TSC.addIfComplete(ID, Enc.substr(Start), IsRecursive);
7181  return true;
7182 }
7183 
7184 /// Appends enum types to Enc and adds the encoding to the cache.
7185 static bool appendEnumType(SmallStringEnc &Enc, const EnumType *ET,
7186  TypeStringCache &TSC,
7187  const IdentifierInfo *ID) {
7188  // Append the cached TypeString if we have one.
7189  StringRef TypeString = TSC.lookupStr(ID);
7190  if (!TypeString.empty()) {
7191  Enc += TypeString;
7192  return true;
7193  }
7194 
7195  size_t Start = Enc.size();
7196  Enc += "e(";
7197  if (ID)
7198  Enc += ID->getName();
7199  Enc += "){";
7200 
7201  // We collect all encoded enumerations and order them alphanumerically.
7202  if (const EnumDecl *ED = ET->getDecl()->getDefinition()) {
7204  for (auto I = ED->enumerator_begin(), E = ED->enumerator_end(); I != E;
7205  ++I) {
7206  SmallStringEnc EnumEnc;
7207  EnumEnc += "m(";
7208  EnumEnc += I->getName();
7209  EnumEnc += "){";
7210  I->getInitVal().toString(EnumEnc);
7211  EnumEnc += '}';
7212  FE.push_back(FieldEncoding(!I->getName().empty(), EnumEnc));
7213  }
7214  std::sort(FE.begin(), FE.end());
7215  unsigned E = FE.size();
7216  for (unsigned I = 0; I != E; ++I) {
7217  if (I)
7218  Enc += ',';
7219  Enc += FE[I].str();
7220  }
7221  }
7222  Enc += '}';
7223  TSC.addIfComplete(ID, Enc.substr(Start), false);
7224  return true;
7225 }
7226 
7227 /// Appends type's qualifier to Enc.
7228 /// This is done prior to appending the type's encoding.
7229 static void appendQualifier(SmallStringEnc &Enc, QualType QT) {
7230  // Qualifiers are emitted in alphabetical order.
7231  static const char *const Table[]={"","c:","r:","cr:","v:","cv:","rv:","crv:"};
7232  int Lookup = 0;
7233  if (QT.isConstQualified())
7234  Lookup += 1<<0;
7235  if (QT.isRestrictQualified())
7236  Lookup += 1<<1;
7237  if (QT.isVolatileQualified())
7238  Lookup += 1<<2;
7239  Enc += Table[Lookup];
7240 }
7241 
7242 /// Appends built-in types to Enc.
7243 static bool appendBuiltinType(SmallStringEnc &Enc, const BuiltinType *BT) {
7244  const char *EncType;
7245  switch (BT->getKind()) {
7246  case BuiltinType::Void:
7247  EncType = "0";
7248  break;
7249  case BuiltinType::Bool:
7250  EncType = "b";
7251  break;
7252  case BuiltinType::Char_U:
7253  EncType = "uc";
7254  break;
7255  case BuiltinType::UChar:
7256  EncType = "uc";
7257  break;
7258  case BuiltinType::SChar:
7259  EncType = "sc";
7260  break;
7261  case BuiltinType::UShort:
7262  EncType = "us";
7263  break;
7264  case BuiltinType::Short:
7265  EncType = "ss";
7266  break;
7267  case BuiltinType::UInt:
7268  EncType = "ui";
7269  break;
7270  case BuiltinType::Int:
7271  EncType = "si";
7272  break;
7273  case BuiltinType::ULong:
7274  EncType = "ul";
7275  break;
7276  case BuiltinType::Long:
7277  EncType = "sl";
7278  break;
7279  case BuiltinType::ULongLong:
7280  EncType = "ull";
7281  break;
7282  case BuiltinType::LongLong:
7283  EncType = "sll";
7284  break;
7285  case BuiltinType::Float:
7286  EncType = "ft";
7287  break;
7288  case BuiltinType::Double:
7289  EncType = "d";
7290  break;
7291  case BuiltinType::LongDouble:
7292  EncType = "ld";
7293  break;
7294  default:
7295  return false;
7296  }
7297  Enc += EncType;
7298  return true;
7299 }
7300 
7301 /// Appends a pointer encoding to Enc before calling appendType for the pointee.
7302 static bool appendPointerType(SmallStringEnc &Enc, const PointerType *PT,
7303  const CodeGen::CodeGenModule &CGM,
7304  TypeStringCache &TSC) {
7305  Enc += "p(";
7306  if (!appendType(Enc, PT->getPointeeType(), CGM, TSC))
7307  return false;
7308  Enc += ')';
7309  return true;
7310 }
7311 
7312 /// Appends array encoding to Enc before calling appendType for the element.
7313 static bool appendArrayType(SmallStringEnc &Enc, QualType QT,
7314  const ArrayType *AT,
7315  const CodeGen::CodeGenModule &CGM,
7316  TypeStringCache &TSC, StringRef NoSizeEnc) {
7317  if (AT->getSizeModifier() != ArrayType::Normal)
7318  return false;
7319  Enc += "a(";
7320  if (const ConstantArrayType *CAT = dyn_cast<ConstantArrayType>(AT))
7321  CAT->getSize().toStringUnsigned(Enc);
7322  else
7323  Enc += NoSizeEnc; // Global arrays use "*", otherwise it is "".
7324  Enc += ':';
7325  // The Qualifiers should be attached to the type rather than the array.
7326  appendQualifier(Enc, QT);
7327  if (!appendType(Enc, AT->getElementType(), CGM, TSC))
7328  return false;
7329  Enc += ')';
7330  return true;
7331 }
7332 
7333 /// Appends a function encoding to Enc, calling appendType for the return type
7334 /// and the arguments.
7335 static bool appendFunctionType(SmallStringEnc &Enc, const FunctionType *FT,
7336  const CodeGen::CodeGenModule &CGM,
7337  TypeStringCache &TSC) {
7338  Enc += "f{";
7339  if (!appendType(Enc, FT->getReturnType(), CGM, TSC))
7340  return false;
7341  Enc += "}(";
7342  if (const FunctionProtoType *FPT = FT->getAs<FunctionProtoType>()) {
7343  // N.B. we are only interested in the adjusted param types.
7344  auto I = FPT->param_type_begin();
7345  auto E = FPT->param_type_end();
7346  if (I != E) {
7347  do {
7348  if (!appendType(Enc, *I, CGM, TSC))
7349  return false;
7350  ++I;
7351  if (I != E)
7352  Enc += ',';
7353  } while (I != E);
7354  if (FPT->isVariadic())
7355  Enc += ",va";
7356  } else {
7357  if (FPT->isVariadic())
7358  Enc += "va";
7359  else
7360  Enc += '0';
7361  }
7362  }
7363  Enc += ')';
7364  return true;
7365 }
7366 
7367 /// Handles the type's qualifier before dispatching a call to handle specific
7368 /// type encodings.
7369 static bool appendType(SmallStringEnc &Enc, QualType QType,
7370  const CodeGen::CodeGenModule &CGM,
7371  TypeStringCache &TSC) {
7372 
7373  QualType QT = QType.getCanonicalType();
7374 
7375  if (const ArrayType *AT = QT->getAsArrayTypeUnsafe())
7376  // The Qualifiers should be attached to the type rather than the array.
7377  // Thus we don't call appendQualifier() here.
7378  return appendArrayType(Enc, QT, AT, CGM, TSC, "");
7379 
7380  appendQualifier(Enc, QT);
7381 
7382  if (const BuiltinType *BT = QT->getAs<BuiltinType>())
7383  return appendBuiltinType(Enc, BT);
7384 
7385  if (const PointerType *PT = QT->getAs<PointerType>())
7386  return appendPointerType(Enc, PT, CGM, TSC);
7387 
7388  if (const EnumType *ET = QT->getAs<EnumType>())
7389  return appendEnumType(Enc, ET, TSC, QT.getBaseTypeIdentifier());
7390 
7391  if (const RecordType *RT = QT->getAsStructureType())
7392  return appendRecordType(Enc, RT, CGM, TSC, QT.getBaseTypeIdentifier());
7393 
7394  if (const RecordType *RT = QT->getAsUnionType())
7395  return appendRecordType(Enc, RT, CGM, TSC, QT.getBaseTypeIdentifier());
7396 
7397  if (const FunctionType *FT = QT->getAs<FunctionType>())
7398  return appendFunctionType(Enc, FT, CGM, TSC);
7399 
7400  return false;
7401 }
7402 
7403 static bool getTypeString(SmallStringEnc &Enc, const Decl *D,
7404  CodeGen::CodeGenModule &CGM, TypeStringCache &TSC) {
7405  if (!D)
7406  return false;
7407 
7408  if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) {
7409  if (FD->getLanguageLinkage() != CLanguageLinkage)
7410  return false;
7411  return appendType(Enc, FD->getType(), CGM, TSC);
7412  }
7413 
7414  if (const VarDecl *VD = dyn_cast<VarDecl>(D)) {
7415  if (VD->getLanguageLinkage() != CLanguageLinkage)
7416  return false;
7417  QualType QT = VD->getType().getCanonicalType();
7418  if (const ArrayType *AT = QT->getAsArrayTypeUnsafe()) {
7419  // Global ArrayTypes are given a size of '*' if the size is unknown.
7420  // The Qualifiers should be attached to the type rather than the array.
7421  // Thus we don't call appendQualifier() here.
7422  return appendArrayType(Enc, QT, AT, CGM, TSC, "*");
7423  }
7424  return appendType(Enc, QT, CGM, TSC);
7425  }
7426  return false;
7427 }
7428 
7429 
7430 //===----------------------------------------------------------------------===//
7431 // Driver code
7432 //===----------------------------------------------------------------------===//
7433 
7434 const llvm::Triple &CodeGenModule::getTriple() const {
7435  return getTarget().getTriple();
7436 }
7437 
7439  return !getTriple().isOSBinFormatMachO();
7440 }
7441 
7443  if (TheTargetCodeGenInfo)
7444  return *TheTargetCodeGenInfo;
7445 
7446  const llvm::Triple &Triple = getTarget().getTriple();
7447  switch (Triple.getArch()) {
7448  default:
7449  return *(TheTargetCodeGenInfo = new DefaultTargetCodeGenInfo(Types));
7450 
7451  case llvm::Triple::le32:
7452  return *(TheTargetCodeGenInfo = new PNaClTargetCodeGenInfo(Types));
7453  case llvm::Triple::mips:
7454  case llvm::Triple::mipsel:
7455  if (Triple.getOS() == llvm::Triple::NaCl)
7456  return *(TheTargetCodeGenInfo = new PNaClTargetCodeGenInfo(Types));
7457  return *(TheTargetCodeGenInfo = new MIPSTargetCodeGenInfo(Types, true));
7458 
7459  case llvm::Triple::mips64:
7460  case llvm::Triple::mips64el:
7461  return *(TheTargetCodeGenInfo = new MIPSTargetCodeGenInfo(Types, false));
7462 
7463  case llvm::Triple::aarch64:
7464  case llvm::Triple::aarch64_be: {
7465  AArch64ABIInfo::ABIKind Kind = AArch64ABIInfo::AAPCS;
7466  if (getTarget().getABI() == "darwinpcs")
7467  Kind = AArch64ABIInfo::DarwinPCS;
7468 
7469  return *(TheTargetCodeGenInfo = new AArch64TargetCodeGenInfo(Types, Kind));
7470  }
7471 
7472  case llvm::Triple::wasm32:
7473  case llvm::Triple::wasm64:
7474  return *(TheTargetCodeGenInfo = new WebAssemblyTargetCodeGenInfo(Types));
7475 
7476  case llvm::Triple::arm:
7477  case llvm::Triple::armeb:
7478  case llvm::Triple::thumb:
7479  case llvm::Triple::thumbeb:
7480  {
7481  if (Triple.getOS() == llvm::Triple::Win32) {
7482  TheTargetCodeGenInfo =
7483  new WindowsARMTargetCodeGenInfo(Types, ARMABIInfo::AAPCS_VFP);
7484  return *TheTargetCodeGenInfo;
7485  }
7486 
7487  ARMABIInfo::ABIKind Kind = ARMABIInfo::AAPCS;
7488  StringRef ABIStr = getTarget().getABI();
7489  if (ABIStr == "apcs-gnu")
7490  Kind = ARMABIInfo::APCS;
7491  else if (ABIStr == "aapcs16")
7492  Kind = ARMABIInfo::AAPCS16_VFP;
7493  else if (CodeGenOpts.FloatABI == "hard" ||
7494  (CodeGenOpts.FloatABI != "soft" &&
7495  Triple.getEnvironment() == llvm::Triple::GNUEABIHF))
7496  Kind = ARMABIInfo::AAPCS_VFP;
7497 
7498  return *(TheTargetCodeGenInfo = new ARMTargetCodeGenInfo(Types, Kind));
7499  }
7500 
7501  case llvm::Triple::ppc:
7502  return *(TheTargetCodeGenInfo =
7503  new PPC32TargetCodeGenInfo(Types, CodeGenOpts.FloatABI == "soft"));
7504  case llvm::Triple::ppc64:
7505  if (Triple.isOSBinFormatELF()) {
7506  PPC64_SVR4_ABIInfo::ABIKind Kind = PPC64_SVR4_ABIInfo::ELFv1;
7507  if (getTarget().getABI() == "elfv2")
7508  Kind = PPC64_SVR4_ABIInfo::ELFv2;
7509  bool HasQPX = getTarget().getABI() == "elfv1-qpx";
7510 
7511  return *(TheTargetCodeGenInfo =
7512  new PPC64_SVR4_TargetCodeGenInfo(Types, Kind, HasQPX));
7513  } else
7514  return *(TheTargetCodeGenInfo = new PPC64TargetCodeGenInfo(Types));
7515  case llvm::Triple::ppc64le: {
7516  assert(Triple.isOSBinFormatELF() && "PPC64 LE non-ELF not supported!");
7517  PPC64_SVR4_ABIInfo::ABIKind Kind = PPC64_SVR4_ABIInfo::ELFv2;
7518  if (getTarget().getABI() == "elfv1" || getTarget().getABI() == "elfv1-qpx")
7519  Kind = PPC64_SVR4_ABIInfo::ELFv1;
7520  bool HasQPX = getTarget().getABI() == "elfv1-qpx";
7521 
7522  return *(TheTargetCodeGenInfo =
7523  new PPC64_SVR4_TargetCodeGenInfo(Types, Kind, HasQPX));
7524  }
7525 
7526  case llvm::Triple::nvptx:
7527  case llvm::Triple::nvptx64:
7528  return *(TheTargetCodeGenInfo = new NVPTXTargetCodeGenInfo(Types));
7529 
7530  case llvm::Triple::msp430:
7531  return *(TheTargetCodeGenInfo = new MSP430TargetCodeGenInfo(Types));
7532 
7533  case llvm::Triple::systemz: {
7534  bool HasVector = getTarget().getABI() == "vector";
7535  return *(TheTargetCodeGenInfo = new SystemZTargetCodeGenInfo(Types,
7536  HasVector));
7537  }
7538 
7539  case llvm::Triple::tce:
7540  return *(TheTargetCodeGenInfo = new TCETargetCodeGenInfo(Types));
7541 
7542  case llvm::Triple::x86: {
7543  bool IsDarwinVectorABI = Triple.isOSDarwin();
7544  bool RetSmallStructInRegABI =
7545  X86_32TargetCodeGenInfo::isStructReturnInRegABI(Triple, CodeGenOpts);
7546  bool IsWin32FloatStructABI = Triple.isOSWindows() && !Triple.isOSCygMing();
7547 
7548  if (Triple.getOS() == llvm::Triple::Win32) {
7549  return *(TheTargetCodeGenInfo = new WinX86_32TargetCodeGenInfo(
7550  Types, IsDarwinVectorABI, RetSmallStructInRegABI,
7551  IsWin32FloatStructABI, CodeGenOpts.NumRegisterParameters));
7552  } else {
7553  return *(TheTargetCodeGenInfo = new X86_32TargetCodeGenInfo(
7554  Types, IsDarwinVectorABI, RetSmallStructInRegABI,
7555  IsWin32FloatStructABI, CodeGenOpts.NumRegisterParameters,
7556  CodeGenOpts.FloatABI == "soft"));
7557  }
7558  }
7559 
7560  case llvm::Triple::x86_64: {
7561  StringRef ABI = getTarget().getABI();
7562  X86AVXABILevel AVXLevel = (ABI == "avx512" ? X86AVXABILevel::AVX512 :
7563  ABI == "avx" ? X86AVXABILevel::AVX :
7565 
7566  switch (Triple.getOS()) {
7567  case llvm::Triple::Win32:
7568  return *(TheTargetCodeGenInfo =
7569  new WinX86_64TargetCodeGenInfo(Types, AVXLevel));
7570  case llvm::Triple::PS4:
7571  return *(TheTargetCodeGenInfo =
7572  new PS4TargetCodeGenInfo(Types, AVXLevel));
7573  default:
7574  return *(TheTargetCodeGenInfo =
7575  new X86_64TargetCodeGenInfo(Types, AVXLevel));
7576  }
7577  }
7578  case llvm::Triple::hexagon:
7579  return *(TheTargetCodeGenInfo = new HexagonTargetCodeGenInfo(Types));
7580  case llvm::Triple::r600:
7581  return *(TheTargetCodeGenInfo = new AMDGPUTargetCodeGenInfo(Types));
7582  case llvm::Triple::amdgcn:
7583  return *(TheTargetCodeGenInfo = new AMDGPUTargetCodeGenInfo(Types));
7584  case llvm::Triple::sparcv9:
7585  return *(TheTargetCodeGenInfo = new SparcV9TargetCodeGenInfo(Types));
7586  case llvm::Triple::xcore:
7587  return *(TheTargetCodeGenInfo = new XCoreTargetCodeGenInfo(Types));
7588  }
7589 }
Kind getKind() const
Definition: Type.h:2028
Ignore - Ignore the argument (treat as void).
FunctionDecl - An instance of this class is created to represent a function declaration or definition...
Definition: Decl.h:1483
const ABIInfo & getABIInfo() const
getABIInfo() - Returns ABI info helper for the target.
void setEffectiveCallingConvention(unsigned Value)
External linkage, which indicates that the entity can be referred to from other translation units...
Definition: Linkage.h:50
static ABIArgInfo getExtend(llvm::Type *T=nullptr)
PointerType - C99 6.7.5.1 - Pointer Declarators.
Definition: Type.h:2147
A (possibly-)qualified type.
Definition: Type.h:575
llvm::Type * ConvertTypeForMem(QualType T)
unsigned getFieldCount() const
getFieldCount - Get the number of fields in the layout.
Definition: RecordLayout.h:177
CanQualType getReturnType() const
bool hasFloatingRepresentation() const
Determine whether this type has a floating-point representation of some sort, e.g., it is a floating-point type or a vector thereof.
Definition: Type.cpp:1786
bool isBitField() const
Determines whether this field is a bitfield.
Definition: Decl.h:2277
bool isMemberPointerType() const
Definition: Type.h:5329
unsigned getInAllocaFieldIndex() const
llvm::Module & getModule() const
llvm::LLVMContext & getLLVMContext()
const TargetInfo & getTarget() const
FunctionType - C99 6.7.5.3 - Function Declarators.
Definition: Type.h:2847
llvm::ConstantInt * getSize(CharUnits N)
Definition: CGBuilder.h:69
llvm::AllocaInst * CreateTempAlloca(llvm::Type *Ty, const Twine &Name="tmp")
CreateTempAlloca - This creates a alloca and inserts it into the entry block.
Definition: CGExpr.cpp:66
Extend - Valid only for integer argument types.
QuantityType getQuantity() const
getQuantity - Get the raw integer representation of this quantity.
Definition: CharUnits.h:171
llvm::LoadInst * CreateDefaultAlignedLoad(llvm::Value *Addr, const llvm::Twine &Name="")
Definition: CGBuilder.h:135
Decl - This represents one declaration (or definition), e.g.
Definition: DeclBase.h:77
Address getAddress() const
Definition: CGValue.h:331
static bool appendEnumType(SmallStringEnc &Enc, const EnumType *ET, TypeStringCache &TSC, const IdentifierInfo *ID)
Appends enum types to Enc and adds the encoding to the cache.
Direct - Pass the argument directly using the normal converted LLVM type, or by coercing to another s...
static const Type * isSingleElementStruct(QualType T, ASTContext &Context)
isSingleElementStruct - Determine if a structure is a "single element struct", i.e.
bool hasFlexibleArrayMember() const
Definition: Decl.h:3218
bool isEnumeralType() const
Definition: Type.h:5365
const llvm::DataLayout & getDataLayout() const
The base class of the type hierarchy.
Definition: Type.h:1249
Represents an array type, per C99 6.7.5.2 - Array Declarators.
Definition: Type.h:2424
static bool appendType(SmallStringEnc &Enc, QualType QType, const CodeGen::CodeGenModule &CGM, TypeStringCache &TSC)
Handles the type's qualifier before dispatching a call to handle specific type encodings.
bool isBlockPointerType() const
Definition: Type.h:5311
llvm::IntegerType * Int8Ty
i8, i16, i32, and i64
VarDecl - An instance of this class is created to represent a variable declaration or definition...
Definition: Decl.h:699
llvm::Type * getElementType() const
Return the type of the values stored in this address.
Definition: Address.h:52
CallingConv getCallConv() const
Definition: Type.h:2985
field_iterator field_begin() const
Definition: Decl.cpp:3746
void setCoerceToType(llvm::Type *T)
uint64_t getTypeSize(QualType T) const
Return the size of the specified (complete) type T, in bits.
Definition: ASTContext.h:1793
Address CreateConstInBoundsByteGEP(Address Addr, CharUnits Offset, const llvm::Twine &Name="")
Given a pointer to i8, adjust it by a given constant offset.
Definition: CGBuilder.h:247
static ABIArgInfo getIgnore()
static bool isAggregateTypeForABI(QualType T)
static llvm::Value * getTypeSize(CodeGenFunction &CGF, QualType Ty)
bool isUnionType() const
Definition: Type.cpp:391
bool isVoidType() const
Definition: Type.h:5546
RecordDecl - Represents a struct/union/class.
Definition: Decl.h:3166
const_arg_iterator arg_end() const
One of these records is kept for each identifier that is lexed.
bool isScalarType() const
Definition: Type.h:5581
class LLVM_ALIGNAS(8) DependentTemplateSpecializationType const IdentifierInfo * Name
Represents a template specialization type whose template cannot be resolved, e.g. ...
Definition: Type.h:4381
bool hasAttr() const
Definition: DeclBase.h:498
Indirect - Pass the argument indirectly via a hidden pointer with the specified alignment (0 indicate...
CodeGenFunction - This class organizes the per-function state that is used while generating LLVM code...
Holds long-lived AST nodes (such as types and decls) that can be referred to throughout the semantic ...
Definition: ASTContext.h:91
LineState State
static llvm::Type * GetX86_64ByValArgumentPair(llvm::Type *Lo, llvm::Type *Hi, const llvm::DataLayout &TD)
GetX86_64ByValArgumentPair - Given a high and low type that can ideally be used as elements of a two ...
static Address EmitX86_64VAArgFromMemory(CodeGenFunction &CGF, Address VAListAddr, QualType Ty)
bool isReferenceType() const
Definition: Type.h:5314
bool isStructureOrClassType() const
Definition: Type.cpp:378
FieldDecl - An instance of this class is created by Sema::ActOnField to represent a member of a struc...
Definition: Decl.h:2209
static ABIArgInfo getExtendInReg(llvm::Type *T=nullptr)
const RecordType * getAsUnionType() const
NOTE: getAs*ArrayType are methods on ASTContext.
Definition: Type.cpp:450
static CharUnits Zero()
Zero - Construct a CharUnits quantity of zero.
Definition: CharUnits.h:53
llvm::Type * getCoerceToType() const
static ABIArgInfo getIndirectInReg(CharUnits Alignment, bool ByVal=true, bool Realign=false)
T * getAttr() const
Definition: DeclBase.h:495
static ABIArgInfo getDirect(llvm::Type *T=nullptr, unsigned Offset=0, llvm::Type *Padding=nullptr, bool CanBeFlattened=true)
static bool hasScalarEvaluationKind(QualType T)
static ABIArgInfo getExpandWithPadding(bool PaddingInReg, llvm::Type *Padding)
static bool appendRecordType(SmallStringEnc &Enc, const RecordType *RT, const CodeGen::CodeGenModule &CGM, TypeStringCache &TSC, const IdentifierInfo *ID)
Appends structure and union types to Enc and adds encoding to cache.
Address CreateElementBitCast(Address Addr, llvm::Type *Ty, const llvm::Twine &Name="")
Cast the element type of the given address to a different type, preserving information like the align...
Definition: CGBuilder.h:176
CharUnits - This is an opaque type for sizes expressed in character units.
Definition: CharUnits.h:38
uint32_t Offset
Definition: CacheTokens.cpp:44
QualType getReturnType() const
Definition: Type.h:2977
virtual CodeGen::Address EmitMSVAArg(CodeGen::CodeGenFunction &CGF, CodeGen::Address VAListAddr, QualType Ty) const
Emit the target dependent code to load a value of.
virtual unsigned getSizeOfUnwindException() const
Determines the size of struct _Unwind_Exception on this platform, in 8-bit units. ...
field_range fields() const
Definition: Decl.h:3295
static void rewriteInputConstraintReferences(unsigned FirstIn, unsigned NumNewOuts, std::string &AsmString)
Rewrite input constraint references after adding some output constraints.
static bool isRecordWithSSEVectorType(ASTContext &Context, QualType Ty)
RecordDecl * getDecl() const
Definition: Type.h:3553
llvm::CallInst * CreateMemCpy(Address Dest, Address Src, llvm::Value *Size, bool IsVolatile=false)
Definition: CGBuilder.h:272
ABIArgInfo - Helper class to encapsulate information about how a specific C type should be passed to ...
unsigned getCallingConvention() const
getCallingConvention - Return the user specified calling convention, which has been translated into a...
unsigned Align
Definition: ASTContext.h:82
const ASTRecordLayout & getASTRecordLayout(const RecordDecl *D) const
Get or compute information about the layout of the specified record (struct/union/class) D...
llvm::BasicBlock * createBasicBlock(const Twine &name="", llvm::Function *parent=nullptr, llvm::BasicBlock *before=nullptr)
createBasicBlock - Create an LLVM basic block.
uint64_t getFieldOffset(unsigned FieldNo) const
getFieldOffset - Get the offset of the given field index, in bits.
Definition: RecordLayout.h:181
static bool BitsContainNoUserData(QualType Ty, unsigned StartBit, unsigned EndBit, ASTContext &Context)
BitsContainNoUserData - Return true if the specified [start,end) bit range is known to either be off ...
static ABIArgInfo getExpand()
virtual StringRef getABI() const
Get the ABI currently in use.
detail::InMemoryDirectory::const_iterator I
static QualType useFirstFieldIfTransparentUnion(QualType Ty)
Pass transparent unions as if they were the type of the first element.
std::pair< CharUnits, CharUnits > getTypeInfoInChars(const Type *T) const
QualType getType() const
Definition: Decl.h:530
bool isUnnamedBitfield() const
Determines whether this is an unnamed bitfield.
Definition: Decl.h:2283
std::string FloatABI
The ABI to use for passing floating point arguments.
field_iterator field_end() const
Definition: Decl.h:3298
ABIInfo - Target specific hooks for defining how a type should be passed or returned from functions...
Definition: ABIInfo.h:44
const ArrayType * getAsArrayTypeUnsafe() const
A variant of getAs<> for array types which silently discards qualifiers from the outermost type...
Definition: Type.h:5692
EnumDecl * getDecl() const
Definition: Type.h:3576
Represents a K&R-style 'int foo()' function, which has no information available about its arguments...
Definition: Type.h:3007
unsigned getNumRequiredArgs() const
static bool ContainsFloatAtOffset(llvm::Type *IRType, unsigned IROffset, const llvm::DataLayout &TD)
ContainsFloatAtOffset - Return true if the specified LLVM IR type has a float member at the specified...
LValue MakeAddrLValue(Address Addr, QualType T, AlignmentSource AlignSource=AlignmentSource::Type)
bool isUnion() const
Definition: Decl.h:2856
CodeGen::ABIArgInfo getNaturalAlignIndirectInReg(QualType Ty, bool Realign=false) const
static CharUnits One()
One - Construct a CharUnits quantity of one.
Definition: CharUnits.h:58
Represents a prototype with parameter type info, e.g.
Definition: Type.h:3041
bool isFloatingPoint() const
Definition: Type.h:2052
const TargetCodeGenInfo & getTargetCodeGenInfo()
static bool extractFieldType(SmallVectorImpl< FieldEncoding > &FE, const RecordDecl *RD, const CodeGen::CodeGenModule &CGM, TypeStringCache &TSC)
Helper function for appendRecordType().
const TargetInfo & getTarget() const
static void AssignToArrayRange(CodeGen::CGBuilderTy &Builder, llvm::Value *Array, llvm::Value *Value, unsigned FirstIndex, unsigned LastIndex)
static bool is32Or64BitBasicType(QualType Ty, ASTContext &Context)
void setAddress(Address address)
Definition: CGValue.h:332
ASTContext * Context
ID
Defines the set of possible language-specific address spaces.
Definition: AddressSpaces.h:27
bool isRealFloatingType() const
Floating point categories.
Definition: Type.cpp:1793
ASTRecordLayout - This class contains layout information for one RecordDecl, which is a struct/union/...
Definition: RecordLayout.h:34
Exposes information about the current target.
llvm::Value * getPointer() const
Definition: Address.h:38
StringRef getName() const
Return the actual identifier string.
static Address invalid()
Definition: Address.h:35
bool isAnyComplexType() const
Definition: Type.h:5368
bool isStruct() const
Definition: Decl.h:2853
llvm::LLVMContext & getVMContext() const
static bool appendBuiltinType(SmallStringEnc &Enc, const BuiltinType *BT)
Appends built-in types to Enc.
CharUnits getIndirectAlign() const
virtual void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV, CodeGen::CodeGenModule &M) const
setTargetAttributes - Provides a convenient hook to handle extra target-specific attributes for the g...
ASTContext & getContext() const
CharUnits getBaseClassOffset(const CXXRecordDecl *Base) const
getBaseClassOffset - Get the offset, in chars, for the given base class.
Definition: RecordLayout.h:224
bool isFloatingType() const
Definition: Type.cpp:1777
static CharUnits fromQuantity(QuantityType Quantity)
fromQuantity - Construct a CharUnits quantity from a raw integer type.
Definition: CharUnits.h:63
static bool getTypeString(SmallStringEnc &Enc, const Decl *D, CodeGen::CodeGenModule &CGM, TypeStringCache &TSC)
The XCore ABI includes a type information section that communicates symbol type information to the li...
llvm::LLVMContext & getLLVMContext()
virtual void getDependentLibraryOption(llvm::StringRef Lib, llvm::SmallString< 24 > &Opt) const
Gets the linker options necessary to link a dependent library on this platform.
TargetCodeGenInfo - This class organizes various target-specific codegeneration issues, like target-specific attributes, builtins and so on.
static Address emitVoidPtrDirectVAArg(CodeGenFunction &CGF, Address VAListAddr, llvm::Type *DirectTy, CharUnits DirectSize, CharUnits DirectAlign, CharUnits SlotSize, bool AllowHigherAlign)
Emit va_arg for a platform using the common void* representation, where arguments are simply emitted ...
const IdentifierInfo * getBaseTypeIdentifier() const
Retrieves a pointer to the name of the base type.
Definition: Type.cpp:47
Represents a GCC generic vector type.
Definition: Type.h:2724
ASTContext & getContext() const
Implements C++ ABI-specific semantic analysis functions.
Definition: CXXABI.h:30
The result type of a method or function.
RecordDecl * getDefinition() const
getDefinition - Returns the RecordDecl that actually defines this struct/union/class.
Definition: Decl.h:3285
bool isUnsignedIntegerOrEnumerationType() const
Determines whether this is an integer type that is unsigned or an enumeration types whose underlying ...
Definition: Type.cpp:1756
The l-value was considered opaque, so the alignment was determined from a type.
Pass it as a pointer to temporary memory.
Definition: CGCXXABI.h:125
static void appendQualifier(SmallStringEnc &Enc, QualType QT)
Appends type's qualifier to Enc.
static Address emitMergePHI(CodeGenFunction &CGF, Address Addr1, llvm::BasicBlock *Block1, Address Addr2, llvm::BasicBlock *Block2, const llvm::Twine &Name="")
static bool isEmptyField(ASTContext &Context, const FieldDecl *FD, bool AllowArrays)
isEmptyField - Return true iff a the field is "empty", that is it is an unnamed bit-field or an (arra...
Address CreateBitCast(Address Addr, llvm::Type *Ty, const llvm::Twine &Name="")
Definition: CGBuilder.h:168
#define false
Definition: stdbool.h:33
CharUnits getTypeAlignInChars(QualType T) const
Return the ABI-specified alignment of a (complete) type T, in characters.
Kind
bool isIntegralOrEnumerationType() const
Determine whether this type is an integral or enumeration type.
Definition: Type.h:5596
virtual bool shouldSignExtUnsignedType(QualType Ty) const
ASTContext & getContext() const
A helper class that allows the use of isa/cast/dyncast to detect TagType objects of enums...
Definition: Type.h:3570
const Type * getTypePtr() const
Retrieves a pointer to the underlying (unqualified) type.
Definition: Type.h:5089
bool isComplexType() const
isComplexType() does not include complex integers (a GCC extension).
Definition: Type.cpp:397
bool isBuiltinType() const
Helper methods to distinguish type categories.
Definition: Type.h:5359
static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays)
isEmptyRecord - Return true iff a structure contains only empty fields.
virtual bool isNoProtoCallVariadic(const CodeGen::CallArgList &args, const FunctionNoProtoType *fnType) const
Determine whether a call to an unprototyped functions under the given calling convention should use t...
static bool appendFunctionType(SmallStringEnc &Enc, const FunctionType *FT, const CodeGen::CodeGenModule &CGM, TypeStringCache &TSC)
Appends a function encoding to Enc, calling appendType for the return type and the arguments...
bool isHomogeneousAggregate(QualType Ty, const Type *&Base, uint64_t &Members) const
isHomogeneousAggregate - Return true if a type is an ELFv2 homogeneous aggregate. ...
void setArgStruct(llvm::StructType *Ty, CharUnits Align)
const ConstantArrayType * getAsConstantArrayType(QualType T) const
Definition: ASTContext.h:2094
bool isMultipleOf(CharUnits N) const
Test whether this is a multiple of the other value.
Definition: CharUnits.h:137
CharUnits alignmentOfArrayElement(CharUnits elementSize) const
Given that this is the alignment of the first element of an array, return the minimum alignment of an...
Definition: CharUnits.h:190
const CodeGenOptions & getCodeGenOpts() const
An aligned address.
Definition: Address.h:25
const LangOptions & getLangOpts() const
bool operator<(DeclarationName LHS, DeclarationName RHS)
Ordering on two declaration names.
bool isVectorType() const
Definition: Type.h:5371
bool isPromotableIntegerType() const
More type predicates useful for type checking/promotion.
Definition: Type.cpp:2314
bool isMemberFunctionPointerType() const
Definition: Type.h:5332
InAlloca - Pass the argument directly using the LLVM inalloca attribute.
X86AVXABILevel
The AVX ABI level for X86 targets.
bool isVolatileQualified() const
Determine whether this type is volatile-qualified.
Definition: Type.h:5159
static llvm::Value * emitRoundPointerUpToAlignment(CodeGenFunction &CGF, llvm::Value *Ptr, CharUnits Align)
QualType getPointeeType() const
Definition: Type.h:2161
CGFunctionInfo - Class to encapsulate the information about a function definition.
static bool canExpandIndirectArgument(QualType Ty, ASTContext &Context)
canExpandIndirectArgument - Test whether an argument type which is to be passed indirectly (on the st...
CharUnits getAlignment() const
Return the alignment of this pointer.
Definition: Address.h:67
This class organizes the cross-function state that is used while generating LLVM code.
bool canHaveCoerceToType() const
static const Type * getElementType(const Expr *BaseExpr)
bool isAggregateType() const
Determines whether the type is a C++ aggregate type or C aggregate or union type. ...
Definition: Type.cpp:1862
bool isZero() const
isZero - Test whether the quantity equals zero.
Definition: CharUnits.h:116
static ABIArgInfo getDirectInReg(llvm::Type *T=nullptr)
Address CreateMemTemp(QualType T, const Twine &Name="tmp")
CreateMemTemp - Create a temporary memory object of the given type, with appropriate alignment...
Definition: CGExpr.cpp:97
const internal::VariadicAllOfMatcher< Type > type
Matches Types in the clang AST.
Definition: ASTMatchers.h:1723
Address CreateStructGEP(Address Addr, unsigned Index, CharUnits Offset, const llvm::Twine &Name="")
Definition: CGBuilder.h:191
static bool appendArrayType(SmallStringEnc &Enc, QualType QT, const ArrayType *AT, const CodeGen::CodeGenModule &CGM, TypeStringCache &TSC, StringRef NoSizeEnc)
Appends array encoding to Enc before calling appendType for the element.
std::unique_ptr< DiagnosticConsumer > create(StringRef OutputFile, DiagnosticOptions *Diags, bool MergeChildRecords=false)
Returns a DiagnosticConsumer that serializes diagnostics to a bitcode file.
llvm::LoadInst * CreateLoad(Address Addr, const llvm::Twine &Name="")
Definition: CGBuilder.h:78
const llvm::Triple & getTriple() const
Returns the target triple of the primary target.
EnumDecl - Represents an enum.
Definition: Decl.h:2930
detail::InMemoryDirectory::const_iterator E
for(auto typeArg:T->getTypeArgsAsWritten())
bool isHalfType() const
Definition: Type.h:5552
llvm::StoreInst * CreateStore(llvm::Value *Val, Address Addr, bool IsVolatile=false)
Definition: CGBuilder.h:121
const llvm::Triple & getTriple() const
bool field_empty() const
Definition: Decl.h:3304
specific_decl_iterator - Iterates over a subrange of declarations stored in a DeclContext, providing only those that are of type SpecificDecl (or a class derived from it).
Definition: DeclBase.h:1459
unsigned Map[Count]
The type of a lookup table which maps from language-specific address spaces to target-specific ones...
Definition: AddressSpaces.h:45
const RecordType * getAsStructureType() const
Definition: Type.cpp:431
llvm::PointerType * getType() const
Return the type of the pointer value.
Definition: Address.h:44
A helper class that allows the use of isa/cast/dyncast to detect TagType objects of structs/unions/cl...
Definition: Type.h:3544
Complex values, per C99 6.2.5p11.
Definition: Type.h:2087
const T * getAs() const
Member-template getAs<specific type>'.
Definition: Type.h:5675
QualType getCanonicalType() const
Definition: Type.h:5128
Pass it using the normal C aggregate rules for the ABI, potentially introducing extra copies and pass...
Definition: CGCXXABI.h:117
Address CreateConstArrayGEP(Address Addr, uint64_t Index, CharUnits EltSize, const llvm::Twine &Name="")
Given addr = [n x T]* ...
Definition: CGBuilder.h:208
void EmitStoreOfComplex(ComplexPairTy V, LValue dest, bool isInit)
EmitStoreOfComplex - Store a complex number into the specified l-value.
LanguageLinkage getLanguageLinkage() const
Compute the language linkage.
Definition: Decl.cpp:2625
Implements C++ ABI-specific code generation functions.
Definition: CGCXXABI.h:43
This class organizes the cross-module state that is used while lowering AST types to LLVM types...
Definition: CodeGenTypes.h:120
CodeGenOptions - Track various options which control how the code is optimized and passed to the back...
Expand - Only valid for aggregate argument types.
virtual bool isHomogeneousAggregateSmallEnough(const Type *Base, uint64_t Members) const
bool isRestrictQualified() const
Determine whether this type is restrict-qualified.
Definition: Type.h:5153
void EmitBlock(llvm::BasicBlock *BB, bool IsFinished=false)
EmitBlock - Emit the given block.
Definition: CGStmt.cpp:367
static bool isArgInAlloca(const ABIArgInfo &Info)
static ABIArgInfo getInAlloca(unsigned FieldIndex)
Pass it on the stack using its defined layout.
Definition: CGCXXABI.h:122
static CGCXXABI::RecordArgABI getRecordArgABI(const RecordType *RT, CGCXXABI &CXXABI)
FormatToken * Current
Address CreateConstByteGEP(Address Addr, CharUnits Offset, const llvm::Twine &Name="")
Definition: CGBuilder.h:253
Represents a C++ struct/union/class.
Definition: DeclCXX.h:285
BoundNodesTreeBuilder *const Builder
void EmitBranch(llvm::BasicBlock *Block)
EmitBranch - Emit a branch to the specified basic block from the current insert block, taking care to avoid creation of branches from dummy blocks.
Definition: CGStmt.cpp:387
llvm::Type * ConvertType(QualType T)
CodeGen::CGCXXABI & getCXXABI() const
ArraySizeModifier getSizeModifier() const
Definition: Type.h:2459
virtual RecordArgABI getRecordArgABI(const CXXRecordDecl *RD) const =0
Returns how an argument of the given record type should be passed.
This class is used for builtin types like 'int'.
Definition: Type.h:2011
static Address emitVoidPtrVAArg(CodeGenFunction &CGF, Address VAListAddr, QualType ValueTy, bool IsIndirect, std::pair< CharUnits, CharUnits > ValueInfo, CharUnits SlotSizeAndAlign, bool AllowHigherAlign)
Emit va_arg for a platform using the common void* representation, where arguments are simply emitted ...
const_arg_iterator arg_begin() const
QualType getType() const
Definition: CGValue.h:258
CodeGen::ABIArgInfo getNaturalAlignIndirect(QualType Ty, bool ByRef=true, bool Realign=false, llvm::Type *Padding=nullptr) const
A convenience method to return an indirect ABIArgInfo with an expected alignment equal to the ABI ali...
uint64_t Width
Definition: ASTContext.h:81
static bool appendPointerType(SmallStringEnc &Enc, const PointerType *PT, const CodeGen::CodeGenModule &CGM, TypeStringCache &TSC)
Appends a pointer encoding to Enc before calling appendType for the pointee.
QualType getElementType() const
Definition: Type.h:2458
llvm::StoreInst * CreateAlignedStore(llvm::Value *Val, llvm::Value *Addr, CharUnits Align, bool IsVolatile=false)
Definition: CGBuilder.h:128
bool getIndirectRealign() const
int64_t toBits(CharUnits CharSize) const
Convert a size in characters to a size in bits.
LValue - This represents an lvalue references.
Definition: CGValue.h:152
void setInAllocaSRet(bool SRet)
const llvm::DataLayout & getDataLayout() const
EnumDecl * getDefinition() const
Definition: Decl.h:2999
bool isSignedIntegerType() const
Return true if this is an integer type that is signed, according to C99 6.2.5p4 [char, signed char, short, int, long..], or an enum decl which has a signed representation.
Definition: Type.cpp:1700
bool isConstQualified() const
Determine whether this type is const-qualified.
Definition: Type.h:5148
RecordArgABI
Specify how one should pass an argument of a record type.
Definition: CGCXXABI.h:114
bool isNull() const
Return true if this QualType doesn't point to a type yet.
Definition: Type.h:642
static bool isIntegerLikeType(QualType Ty, ASTContext &Context, llvm::LLVMContext &VMContext)
static bool isSSEVectorType(ASTContext &Context, QualType Ty)
CharUnits RoundUpToAlignment(const CharUnits &Align) const
RoundUpToAlignment - Returns the next integer (mod 2**64) that is greater than or equal to this quant...
Definition: CharUnits.h:176
CallArgList - Type for representing both the value and type of arguments in a call.
Definition: CGCall.h:56
static bool PPC64_initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, llvm::Value *Address)
Represents the canonical version of C arrays with a specified constant size.
Definition: Type.h:2480
static ABIArgInfo getIndirect(CharUnits Alignment, bool ByVal=true, bool Realign=false, llvm::Type *Padding=nullptr)
virtual bool isHomogeneousAggregateBaseType(QualType Ty) const
Attr - This represents one attribute.
Definition: Attr.h:44
bool hasPointerRepresentation() const
Whether this type is represented natively as a pointer.
Definition: Type.h:5631
bool isIntegerType() const
isIntegerType() does not include complex integers (a GCC extension).
Definition: Type.h:5568
bool isPointerType() const
Definition: Type.h:5305