clang  3.7.0
pmmintrin.h
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1 /*===---- pmmintrin.h - SSE3 intrinsics ------------------------------------===
2  *
3  * Permission is hereby granted, free of charge, to any person obtaining a copy
4  * of this software and associated documentation files (the "Software"), to deal
5  * in the Software without restriction, including without limitation the rights
6  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
7  * copies of the Software, and to permit persons to whom the Software is
8  * furnished to do so, subject to the following conditions:
9  *
10  * The above copyright notice and this permission notice shall be included in
11  * all copies or substantial portions of the Software.
12  *
13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
16  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
17  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
18  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
19  * THE SOFTWARE.
20  *
21  *===-----------------------------------------------------------------------===
22  */
23 
24 #ifndef __PMMINTRIN_H
25 #define __PMMINTRIN_H
26 
27 #ifndef __SSE3__
28 #error "SSE3 instruction set not enabled"
29 #else
30 
31 #include <emmintrin.h>
32 
33 /* Define the default attributes for the functions in this file. */
34 #define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
35 
36 static __inline__ __m128i __DEFAULT_FN_ATTRS
37 _mm_lddqu_si128(__m128i const *__p)
38 {
39  return (__m128i)__builtin_ia32_lddqu((char const *)__p);
40 }
41 
42 static __inline__ __m128 __DEFAULT_FN_ATTRS
43 _mm_addsub_ps(__m128 __a, __m128 __b)
44 {
45  return __builtin_ia32_addsubps(__a, __b);
46 }
47 
48 static __inline__ __m128 __DEFAULT_FN_ATTRS
49 _mm_hadd_ps(__m128 __a, __m128 __b)
50 {
51  return __builtin_ia32_haddps(__a, __b);
52 }
53 
54 static __inline__ __m128 __DEFAULT_FN_ATTRS
55 _mm_hsub_ps(__m128 __a, __m128 __b)
56 {
57  return __builtin_ia32_hsubps(__a, __b);
58 }
59 
60 static __inline__ __m128 __DEFAULT_FN_ATTRS
61 _mm_movehdup_ps(__m128 __a)
62 {
63  return __builtin_shufflevector(__a, __a, 1, 1, 3, 3);
64 }
65 
66 static __inline__ __m128 __DEFAULT_FN_ATTRS
67 _mm_moveldup_ps(__m128 __a)
68 {
69  return __builtin_shufflevector(__a, __a, 0, 0, 2, 2);
70 }
71 
72 static __inline__ __m128d __DEFAULT_FN_ATTRS
73 _mm_addsub_pd(__m128d __a, __m128d __b)
74 {
75  return __builtin_ia32_addsubpd(__a, __b);
76 }
77 
78 static __inline__ __m128d __DEFAULT_FN_ATTRS
79 _mm_hadd_pd(__m128d __a, __m128d __b)
80 {
81  return __builtin_ia32_haddpd(__a, __b);
82 }
83 
84 static __inline__ __m128d __DEFAULT_FN_ATTRS
85 _mm_hsub_pd(__m128d __a, __m128d __b)
86 {
87  return __builtin_ia32_hsubpd(__a, __b);
88 }
89 
90 #define _mm_loaddup_pd(dp) _mm_load1_pd(dp)
91 
92 static __inline__ __m128d __DEFAULT_FN_ATTRS
93 _mm_movedup_pd(__m128d __a)
94 {
95  return __builtin_shufflevector(__a, __a, 0, 0);
96 }
97 
98 #define _MM_DENORMALS_ZERO_ON (0x0040)
99 #define _MM_DENORMALS_ZERO_OFF (0x0000)
100 
101 #define _MM_DENORMALS_ZERO_MASK (0x0040)
102 
103 #define _MM_GET_DENORMALS_ZERO_MODE() (_mm_getcsr() & _MM_DENORMALS_ZERO_MASK)
104 #define _MM_SET_DENORMALS_ZERO_MODE(x) (_mm_setcsr((_mm_getcsr() & ~_MM_DENORMALS_ZERO_MASK) | (x)))
105 
106 static __inline__ void __DEFAULT_FN_ATTRS
107 _mm_monitor(void const *__p, unsigned __extensions, unsigned __hints)
108 {
109  __builtin_ia32_monitor((void *)__p, __extensions, __hints);
110 }
111 
112 static __inline__ void __DEFAULT_FN_ATTRS
113 _mm_mwait(unsigned __extensions, unsigned __hints)
114 {
115  __builtin_ia32_mwait(__extensions, __hints);
116 }
117 
118 #undef __DEFAULT_FN_ATTRS
119 
120 #endif /* __SSE3__ */
121 
122 #endif /* __PMMINTRIN_H */
static vector float vector float __b
Definition: altivec.h:387
#define __DEFAULT_FN_ATTRS
Definition: adxintrin.h:32