22 #include "llvm/ADT/APFloat.h"
23 #include "llvm/ADT/STLExtras.h"
24 #include "llvm/ADT/StringExtras.h"
25 #include "llvm/ADT/StringRef.h"
26 #include "llvm/ADT/StringSwitch.h"
27 #include "llvm/ADT/Triple.h"
28 #include "llvm/MC/MCSectionMachO.h"
29 #include "llvm/Support/ErrorHandling.h"
30 #include "llvm/Support/TargetParser.h"
33 using namespace clang;
44 assert(MacroName[0] !=
'_' &&
"Identifier should be in the user's namespace");
71 template<
typename TgtInfo>
72 class OSTargetInfo :
public TgtInfo {
74 virtual void getOSDefines(
const LangOptions &Opts,
const llvm::Triple &Triple,
77 OSTargetInfo(
const llvm::Triple &Triple) : TgtInfo(Triple) {}
80 TgtInfo::getTargetDefines(Opts, Builder);
81 getOSDefines(Opts, TgtInfo::getTriple(), Builder);
89 const llvm::Triple &Triple,
90 StringRef &PlatformName,
100 if (!Opts.ObjCAutoRefCount) {
102 Builder.
defineMacro(
"__weak",
"__attribute__((objc_gc(weak)))");
106 Builder.
defineMacro(
"__strong",
"__attribute__((objc_gc(strong)))");
121 if (Opts.POSIXThreads)
125 unsigned Maj, Min, Rev;
126 if (Triple.isMacOSX()) {
127 Triple.getMacOSXVersion(Maj, Min, Rev);
128 PlatformName =
"macosx";
130 Triple.getOSVersion(Maj, Min, Rev);
131 PlatformName = llvm::Triple::getOSTypeName(Triple.getOS());
137 if (PlatformName ==
"win32") {
143 if (Triple.isiOS()) {
144 assert(Maj < 10 && Min < 100 && Rev < 100 &&
"Invalid version!");
147 Str[1] =
'0' + (Min / 10);
148 Str[2] =
'0' + (Min % 10);
149 Str[3] =
'0' + (Rev / 10);
150 Str[4] =
'0' + (Rev % 10);
152 Builder.
defineMacro(
"__ENVIRONMENT_IPHONE_OS_VERSION_MIN_REQUIRED__",
154 }
else if (Triple.isMacOSX()) {
159 assert(Maj < 100 && Min < 100 && Rev < 100 &&
"Invalid version!");
161 if (Maj < 10 || (Maj == 10 && Min < 10)) {
162 Str[0] =
'0' + (Maj / 10);
163 Str[1] =
'0' + (Maj % 10);
164 Str[2] =
'0' + std::min(Min, 9U);
165 Str[3] =
'0' + std::min(Rev, 9U);
169 Str[0] =
'0' + (Maj / 10);
170 Str[1] =
'0' + (Maj % 10);
171 Str[2] =
'0' + (Min / 10);
172 Str[3] =
'0' + (Min % 10);
173 Str[4] =
'0' + (Rev / 10);
174 Str[5] =
'0' + (Rev % 10);
177 Builder.
defineMacro(
"__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__", Str);
181 if (Triple.isOSDarwin())
189 template <
typename Target>
190 class CloudABITargetInfo :
public OSTargetInfo<Target> {
192 void getOSDefines(
const LangOptions &Opts,
const llvm::Triple &Triple,
198 Builder.
defineMacro(
"__STDC_ISO_10646__",
"201206L");
204 CloudABITargetInfo(
const llvm::Triple &Triple)
205 : OSTargetInfo<Target>(Triple) {
206 this->UserLabelPrefix =
"";
210 template<
typename Target>
211 class DarwinTargetInfo :
public OSTargetInfo<Target> {
213 void getOSDefines(
const LangOptions &Opts,
const llvm::Triple &Triple,
216 this->PlatformMinVersion);
220 DarwinTargetInfo(
const llvm::Triple &Triple) : OSTargetInfo<Target>(Triple) {
221 this->TLSSupported = Triple.isMacOSX() && !Triple.isMacOSXVersionLT(10, 7);
222 this->MCountName =
"\01mcount";
225 std::string isValidSectionSpecifier(StringRef SR)
const override {
227 StringRef Segment, Section;
228 unsigned TAA, StubSize;
230 return llvm::MCSectionMachO::ParseSectionSpecifier(SR, Segment, Section,
231 TAA, HasTAA, StubSize);
234 const char *getStaticInitSectionSpecifier()
const override {
236 return "__TEXT,__StaticInit,regular,pure_instructions";
242 bool hasProtectedVisibility()
const override {
249 template<
typename Target>
250 class DragonFlyBSDTargetInfo :
public OSTargetInfo<Target> {
252 void getOSDefines(
const LangOptions &Opts,
const llvm::Triple &Triple,
256 Builder.
defineMacro(
"__DragonFly_cc_version",
"100001");
263 DragonFlyBSDTargetInfo(
const llvm::Triple &Triple)
264 : OSTargetInfo<Target>(Triple) {
265 this->UserLabelPrefix =
"";
267 switch (Triple.getArch()) {
269 case llvm::Triple::x86:
270 case llvm::Triple::x86_64:
271 this->MCountName =
".mcount";
278 template<
typename Target>
279 class FreeBSDTargetInfo :
public OSTargetInfo<Target> {
281 void getOSDefines(
const LangOptions &Opts,
const llvm::Triple &Triple,
285 unsigned Release = Triple.getOSMajorVersion();
289 Builder.
defineMacro(
"__FreeBSD__", Twine(Release));
290 Builder.
defineMacro(
"__FreeBSD_cc_version", Twine(Release * 100000U + 1U));
304 Builder.
defineMacro(
"__STDC_MB_MIGHT_NEQ_WC__",
"1");
307 FreeBSDTargetInfo(
const llvm::Triple &Triple) : OSTargetInfo<Target>(Triple) {
308 this->UserLabelPrefix =
"";
310 switch (Triple.getArch()) {
312 case llvm::Triple::x86:
313 case llvm::Triple::x86_64:
314 this->MCountName =
".mcount";
316 case llvm::Triple::mips:
317 case llvm::Triple::mipsel:
318 case llvm::Triple::ppc:
319 case llvm::Triple::ppc64:
320 case llvm::Triple::ppc64le:
321 this->MCountName =
"_mcount";
323 case llvm::Triple::arm:
324 this->MCountName =
"__mcount";
331 template<
typename Target>
332 class KFreeBSDTargetInfo :
public OSTargetInfo<Target> {
334 void getOSDefines(
const LangOptions &Opts,
const llvm::Triple &Triple,
342 if (Opts.POSIXThreads)
348 KFreeBSDTargetInfo(
const llvm::Triple &Triple)
349 : OSTargetInfo<Target>(Triple) {
350 this->UserLabelPrefix =
"";
355 template<
typename Target>
356 class MinixTargetInfo :
public OSTargetInfo<Target> {
358 void getOSDefines(
const LangOptions &Opts,
const llvm::Triple &Triple,
373 MinixTargetInfo(
const llvm::Triple &Triple) : OSTargetInfo<Target>(Triple) {
374 this->UserLabelPrefix =
"";
379 template<
typename Target>
380 class LinuxTargetInfo :
public OSTargetInfo<Target> {
382 void getOSDefines(
const LangOptions &Opts,
const llvm::Triple &Triple,
389 if (Triple.getEnvironment() == llvm::Triple::Android) {
391 unsigned Maj, Min, Rev;
392 Triple.getEnvironmentVersion(Maj, Min, Rev);
393 this->PlatformName =
"android";
396 if (Opts.POSIXThreads)
402 LinuxTargetInfo(
const llvm::Triple &Triple) : OSTargetInfo<Target>(Triple) {
403 this->UserLabelPrefix =
"";
406 switch (Triple.getArch()) {
409 case llvm::Triple::ppc:
410 case llvm::Triple::ppc64:
411 case llvm::Triple::ppc64le:
412 this->MCountName =
"_mcount";
417 const char *getStaticInitSectionSpecifier()
const override {
418 return ".text.startup";
423 template<
typename Target>
424 class NetBSDTargetInfo :
public OSTargetInfo<Target> {
426 void getOSDefines(
const LangOptions &Opts,
const llvm::Triple &Triple,
432 if (Opts.POSIXThreads)
435 switch (Triple.getArch()) {
438 case llvm::Triple::arm:
439 case llvm::Triple::armeb:
440 case llvm::Triple::thumb:
441 case llvm::Triple::thumbeb:
447 NetBSDTargetInfo(
const llvm::Triple &Triple) : OSTargetInfo<Target>(Triple) {
448 this->UserLabelPrefix =
"";
449 this->MCountName =
"_mcount";
454 template<
typename Target>
455 class OpenBSDTargetInfo :
public OSTargetInfo<Target> {
457 void getOSDefines(
const LangOptions &Opts,
const llvm::Triple &Triple,
464 if (Opts.POSIXThreads)
468 OpenBSDTargetInfo(
const llvm::Triple &Triple) : OSTargetInfo<Target>(Triple) {
469 this->UserLabelPrefix =
"";
470 this->TLSSupported =
false;
472 switch (Triple.getArch()) {
474 case llvm::Triple::x86:
475 case llvm::Triple::x86_64:
476 case llvm::Triple::arm:
477 case llvm::Triple::sparc:
478 this->MCountName =
"__mcount";
480 case llvm::Triple::mips64:
481 case llvm::Triple::mips64el:
482 case llvm::Triple::ppc:
483 case llvm::Triple::sparcv9:
484 this->MCountName =
"_mcount";
491 template<
typename Target>
492 class BitrigTargetInfo :
public OSTargetInfo<Target> {
494 void getOSDefines(
const LangOptions &Opts,
const llvm::Triple &Triple,
501 if (Opts.POSIXThreads)
504 switch (Triple.getArch()) {
507 case llvm::Triple::arm:
508 case llvm::Triple::armeb:
509 case llvm::Triple::thumb:
510 case llvm::Triple::thumbeb:
516 BitrigTargetInfo(
const llvm::Triple &Triple) : OSTargetInfo<Target>(Triple) {
517 this->UserLabelPrefix =
"";
518 this->MCountName =
"__mcount";
523 template<
typename Target>
524 class PSPTargetInfo :
public OSTargetInfo<Target> {
526 void getOSDefines(
const LangOptions &Opts,
const llvm::Triple &Triple,
535 PSPTargetInfo(
const llvm::Triple &Triple) : OSTargetInfo<Target>(Triple) {
536 this->UserLabelPrefix =
"";
541 template<
typename Target>
542 class PS3PPUTargetInfo :
public OSTargetInfo<Target> {
544 void getOSDefines(
const LangOptions &Opts,
const llvm::Triple &Triple,
556 PS3PPUTargetInfo(
const llvm::Triple &Triple) : OSTargetInfo<Target>(Triple) {
557 this->UserLabelPrefix =
"";
558 this->LongWidth = this->LongAlign = 32;
559 this->PointerWidth = this->PointerAlign = 32;
563 this->DescriptionString =
"E-m:e-p:32:32-i64:64-n32:64";
567 template <
typename Target>
568 class PS4OSTargetInfo :
public OSTargetInfo<Target> {
570 void getOSDefines(
const LangOptions &Opts,
const llvm::Triple &Triple,
573 Builder.
defineMacro(
"__FreeBSD_cc_version",
"900001");
580 PS4OSTargetInfo(
const llvm::Triple &Triple) : OSTargetInfo<Target>(Triple) {
581 this->WCharType = this->UnsignedShort;
584 this->MaxTLSAlign = 256;
585 this->UserLabelPrefix =
"";
587 switch (Triple.getArch()) {
589 case llvm::Triple::x86_64:
590 this->MCountName =
".mcount";
597 template<
typename Target>
598 class SolarisTargetInfo :
public OSTargetInfo<Target> {
600 void getOSDefines(
const LangOptions &Opts,
const llvm::Triple &Triple,
623 SolarisTargetInfo(
const llvm::Triple &Triple) : OSTargetInfo<Target>(Triple) {
624 this->UserLabelPrefix =
"";
625 this->WCharType = this->SignedInt;
631 template<
typename Target>
632 class WindowsTargetInfo :
public OSTargetInfo<Target> {
634 void getOSDefines(
const LangOptions &Opts,
const llvm::Triple &Triple,
638 void getVisualStudioDefines(
const LangOptions &Opts,
640 if (Opts.CPlusPlus) {
644 if (Opts.CXXExceptions)
648 if (!Opts.CharIsSigned)
653 if (Opts.POSIXThreads)
656 if (Opts.MSCompatibilityVersion) {
658 Twine(Opts.MSCompatibilityVersion / 100000));
659 Builder.
defineMacro(
"_MSC_FULL_VER", Twine(Opts.MSCompatibilityVersion));
664 Builder.
defineMacro(
"_HAS_CHAR16_T_LANGUAGE_SUPPORT", Twine(1));
667 if (Opts.MicrosoftExt) {
670 if (Opts.CPlusPlus11) {
671 Builder.
defineMacro(
"_RVALUE_REFERENCES_V2_SUPPORTED");
672 Builder.
defineMacro(
"_RVALUE_REFERENCES_SUPPORTED");
681 WindowsTargetInfo(
const llvm::Triple &Triple)
682 : OSTargetInfo<Target>(Triple) {}
685 template <
typename Target>
686 class NaClTargetInfo :
public OSTargetInfo<Target> {
688 void getOSDefines(
const LangOptions &Opts,
const llvm::Triple &Triple,
690 if (Opts.POSIXThreads)
701 NaClTargetInfo(
const llvm::Triple &Triple) : OSTargetInfo<Target>(Triple) {
702 this->UserLabelPrefix =
"";
703 this->LongAlign = 32;
704 this->LongWidth = 32;
705 this->PointerAlign = 32;
706 this->PointerWidth = 32;
709 this->DoubleAlign = 64;
710 this->LongDoubleWidth = 64;
711 this->LongDoubleAlign = 64;
712 this->LongLongWidth = 64;
713 this->LongLongAlign = 64;
718 this->LongDoubleFormat = &llvm::APFloat::IEEEdouble;
719 if (Triple.getArch() == llvm::Triple::arm) {
721 }
else if (Triple.getArch() == llvm::Triple::x86) {
722 this->DescriptionString =
"e-m:e-p:32:32-i64:64-n8:16:32-S128";
723 }
else if (Triple.getArch() == llvm::Triple::x86_64) {
724 this->DescriptionString =
"e-m:e-p:32:32-i64:64-n8:16:32:64-S128";
725 }
else if (Triple.getArch() == llvm::Triple::mipsel) {
728 assert(Triple.getArch() == llvm::Triple::le32);
729 this->DescriptionString =
"e-p:32:32-i64:64";
741 static const char *
const GCCRegNames[];
759 PPCTargetInfo(
const llvm::Triple &Triple)
763 BigEndian = (Triple.getArch() != llvm::Triple::ppc64le);
764 SimdDefaultAlign = 128;
765 LongDoubleWidth = LongDoubleAlign = 128;
766 LongDoubleFormat = &llvm::APFloat::PPCDoubleDouble;
772 ArchDefineName = 1 << 0,
773 ArchDefinePpcgr = 1 << 1,
774 ArchDefinePpcsq = 1 << 2,
775 ArchDefine440 = 1 << 3,
776 ArchDefine603 = 1 << 4,
777 ArchDefine604 = 1 << 5,
778 ArchDefinePwr4 = 1 << 6,
779 ArchDefinePwr5 = 1 << 7,
780 ArchDefinePwr5x = 1 << 8,
781 ArchDefinePwr6 = 1 << 9,
782 ArchDefinePwr6x = 1 << 10,
783 ArchDefinePwr7 = 1 << 11,
784 ArchDefinePwr8 = 1 << 12,
785 ArchDefineA2 = 1 << 13,
786 ArchDefineA2q = 1 << 14
793 bool setCPU(
const std::string &Name)
override {
794 bool CPUKnown = llvm::StringSwitch<bool>(Name)
795 .Case(
"generic",
true)
817 .Case(
"e500mc",
true)
819 .Case(
"power3",
true)
821 .Case(
"power4",
true)
823 .Case(
"power5",
true)
825 .Case(
"power5x",
true)
827 .Case(
"power6",
true)
829 .Case(
"power6x",
true)
831 .Case(
"power7",
true)
833 .Case(
"power8",
true)
835 .Case(
"powerpc",
true)
837 .Case(
"powerpc64",
true)
839 .Case(
"powerpc64le",
true)
840 .Case(
"ppc64le",
true)
850 StringRef getABI()
const override {
return ABI; }
853 unsigned &NumRecords)
const override {
858 bool isCLZForZeroUndef()
const override {
return false; }
863 void getDefaultFeatures(llvm::StringMap<bool> &Features)
const override;
865 bool handleTargetFeatures(std::vector<std::string> &Features,
867 bool hasFeature(StringRef Feature)
const override;
868 void setFeatureEnabled(llvm::StringMap<bool> &Features, StringRef Name,
869 bool Enabled)
const override;
871 void getGCCRegNames(
const char *
const *&Names,
872 unsigned &NumNames)
const override;
873 void getGCCRegAliases(
const GCCRegAlias *&Aliases,
874 unsigned &NumAliases)
const override;
875 bool validateAsmConstraint(
const char *&Name,
878 default:
return false;
974 std::string convertConstraint(
const char *&Constraint)
const override {
976 switch (*Constraint) {
980 R = std::string(
"^") + std::string(Constraint, 2);
988 const char *getClobbers()
const override {
991 int getEHDataRegisterNumber(
unsigned RegNo)
const override {
992 if (RegNo == 0)
return 3;
993 if (RegNo == 1)
return 4;
997 bool hasSjLjLowering()
const override {
1001 bool useFloat128ManglingForLongDouble()
const override {
1002 return LongDoubleWidth == 128 &&
1003 LongDoubleFormat == &llvm::APFloat::PPCDoubleDouble &&
1004 getTriple().isOSBinFormatELF();
1009 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
1010 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
1012 #include "clang/Basic/BuiltinsPPC.def"
1017 bool PPCTargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
1019 for (
unsigned i = 0, e = Features.size(); i !=e; ++i) {
1021 if (Features[i][0] ==
'-')
1024 StringRef Feature = StringRef(Features[i]).substr(1);
1026 if (Feature ==
"vsx") {
1031 if (Feature ==
"bpermd") {
1036 if (Feature ==
"extdiv") {
1041 if (Feature ==
"power8-vector") {
1046 if (Feature ==
"crypto") {
1051 if (Feature ==
"direct-move") {
1052 HasDirectMove =
true;
1056 if (Feature ==
"qpx") {
1061 if (Feature ==
"htm") {
1069 if (!HasVSX && (HasP8Vector || HasDirectMove)) {
1071 Diags.
Report(diag::err_opt_not_valid_with_opt) <<
"-mpower8-vector" <<
1073 else if (HasDirectMove)
1074 Diags.
Report(diag::err_opt_not_valid_with_opt) <<
"-mdirect-move" <<
1084 void PPCTargetInfo::getTargetDefines(
const LangOptions &Opts,
1092 if (PointerWidth == 64) {
1100 if (getTriple().getArch() == llvm::Triple::ppc64le) {
1103 if (getTriple().getOS() != llvm::Triple::NetBSD &&
1104 getTriple().getOS() != llvm::Triple::OpenBSD)
1109 if (ABI ==
"elfv1" || ABI ==
"elfv1-qpx")
1119 if (LongDoubleWidth == 128)
1128 ArchDefineTypes defs = (ArchDefineTypes)llvm::StringSwitch<int>(CPU)
1129 .Case(
"440", ArchDefineName)
1130 .Case(
"450", ArchDefineName | ArchDefine440)
1131 .Case(
"601", ArchDefineName)
1132 .Case(
"602", ArchDefineName | ArchDefinePpcgr)
1133 .Case(
"603", ArchDefineName | ArchDefinePpcgr)
1134 .Case(
"603e", ArchDefineName | ArchDefine603 | ArchDefinePpcgr)
1135 .Case(
"603ev", ArchDefineName | ArchDefine603 | ArchDefinePpcgr)
1136 .Case(
"604", ArchDefineName | ArchDefinePpcgr)
1137 .Case(
"604e", ArchDefineName | ArchDefine604 | ArchDefinePpcgr)
1138 .Case(
"620", ArchDefineName | ArchDefinePpcgr)
1139 .Case(
"630", ArchDefineName | ArchDefinePpcgr)
1140 .Case(
"7400", ArchDefineName | ArchDefinePpcgr)
1141 .Case(
"7450", ArchDefineName | ArchDefinePpcgr)
1142 .Case(
"750", ArchDefineName | ArchDefinePpcgr)
1143 .Case(
"970", ArchDefineName | ArchDefinePwr4 | ArchDefinePpcgr
1145 .Case(
"a2", ArchDefineA2)
1146 .Case(
"a2q", ArchDefineName | ArchDefineA2 | ArchDefineA2q)
1147 .Case(
"pwr3", ArchDefinePpcgr)
1148 .Case(
"pwr4", ArchDefineName | ArchDefinePpcgr | ArchDefinePpcsq)
1149 .Case(
"pwr5", ArchDefineName | ArchDefinePwr4 | ArchDefinePpcgr
1151 .Case(
"pwr5x", ArchDefineName | ArchDefinePwr5 | ArchDefinePwr4
1152 | ArchDefinePpcgr | ArchDefinePpcsq)
1153 .Case(
"pwr6", ArchDefineName | ArchDefinePwr5x | ArchDefinePwr5
1154 | ArchDefinePwr4 | ArchDefinePpcgr | ArchDefinePpcsq)
1155 .Case(
"pwr6x", ArchDefineName | ArchDefinePwr6 | ArchDefinePwr5x
1156 | ArchDefinePwr5 | ArchDefinePwr4 | ArchDefinePpcgr
1158 .Case(
"pwr7", ArchDefineName | ArchDefinePwr6x | ArchDefinePwr6
1159 | ArchDefinePwr5x | ArchDefinePwr5 | ArchDefinePwr4
1160 | ArchDefinePpcgr | ArchDefinePpcsq)
1161 .Case(
"pwr8", ArchDefineName | ArchDefinePwr7 | ArchDefinePwr6x
1162 | ArchDefinePwr6 | ArchDefinePwr5x | ArchDefinePwr5
1163 | ArchDefinePwr4 | ArchDefinePpcgr | ArchDefinePpcsq)
1164 .Case(
"power3", ArchDefinePpcgr)
1165 .Case(
"power4", ArchDefinePwr4 | ArchDefinePpcgr | ArchDefinePpcsq)
1166 .Case(
"power5", ArchDefinePwr5 | ArchDefinePwr4 | ArchDefinePpcgr
1168 .Case(
"power5x", ArchDefinePwr5x | ArchDefinePwr5 | ArchDefinePwr4
1169 | ArchDefinePpcgr | ArchDefinePpcsq)
1170 .Case(
"power6", ArchDefinePwr6 | ArchDefinePwr5x | ArchDefinePwr5
1171 | ArchDefinePwr4 | ArchDefinePpcgr | ArchDefinePpcsq)
1172 .Case(
"power6x", ArchDefinePwr6x | ArchDefinePwr6 | ArchDefinePwr5x
1173 | ArchDefinePwr5 | ArchDefinePwr4 | ArchDefinePpcgr
1175 .Case(
"power7", ArchDefinePwr7 | ArchDefinePwr6x | ArchDefinePwr6
1176 | ArchDefinePwr5x | ArchDefinePwr5 | ArchDefinePwr4
1177 | ArchDefinePpcgr | ArchDefinePpcsq)
1178 .Case(
"power8", ArchDefinePwr8 | ArchDefinePwr7 | ArchDefinePwr6x
1179 | ArchDefinePwr6 | ArchDefinePwr5x | ArchDefinePwr5
1180 | ArchDefinePwr4 | ArchDefinePpcgr | ArchDefinePpcsq)
1181 .Default(ArchDefineNone);
1183 if (defs & ArchDefineName)
1184 Builder.
defineMacro(Twine(
"_ARCH_", StringRef(CPU).upper()));
1185 if (defs & ArchDefinePpcgr)
1187 if (defs & ArchDefinePpcsq)
1189 if (defs & ArchDefine440)
1191 if (defs & ArchDefine603)
1193 if (defs & ArchDefine604)
1195 if (defs & ArchDefinePwr4)
1197 if (defs & ArchDefinePwr5)
1199 if (defs & ArchDefinePwr5x)
1201 if (defs & ArchDefinePwr6)
1203 if (defs & ArchDefinePwr6x)
1205 if (defs & ArchDefinePwr7)
1207 if (defs & ArchDefinePwr8)
1209 if (defs & ArchDefineA2)
1211 if (defs & ArchDefineA2q) {
1216 if (getTriple().getVendor() == llvm::Triple::BGQ) {
1231 if (getTriple().getArch() == llvm::Triple::ppc64le ||
1232 (defs & ArchDefinePwr8) || (CPU ==
"pwr8")) {
1233 Builder.
defineMacro(
"__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");
1234 Builder.
defineMacro(
"__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");
1235 Builder.
defineMacro(
"__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4");
1236 if (PointerWidth == 64)
1237 Builder.
defineMacro(
"__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8");
1261 void PPCTargetInfo::getDefaultFeatures(llvm::StringMap<bool> &Features)
const {
1262 Features[
"altivec"] = llvm::StringSwitch<bool>(CPU)
1272 .Case(
"ppc64",
true)
1273 .Case(
"ppc64le",
true)
1276 Features[
"qpx"] = (CPU ==
"a2q");
1277 Features[
"crypto"] = llvm::StringSwitch<bool>(CPU)
1278 .Case(
"ppc64le",
true)
1281 Features[
"power8-vector"] = llvm::StringSwitch<bool>(CPU)
1282 .Case(
"ppc64le",
true)
1285 Features[
"bpermd"] = llvm::StringSwitch<bool>(CPU)
1286 .Case(
"ppc64le",
true)
1290 Features[
"extdiv"] = llvm::StringSwitch<bool>(CPU)
1291 .Case(
"ppc64le",
true)
1295 Features[
"direct-move"] = llvm::StringSwitch<bool>(CPU)
1296 .Case(
"ppc64le",
true)
1299 Features[
"vsx"] = llvm::StringSwitch<bool>(CPU)
1300 .Case(
"ppc64le",
true)
1307 return llvm::StringSwitch<bool>(Feature)
1308 .Case(
"powerpc",
true)
1309 .Case(
"vsx", HasVSX)
1310 .Case(
"power8-vector", HasP8Vector)
1311 .Case(
"crypto", HasP8Crypto)
1312 .Case(
"direct-move", HasDirectMove)
1313 .Case(
"qpx", HasQPX)
1314 .Case(
"htm", HasHTM)
1315 .Case(
"bpermd", HasBPERMD)
1316 .Case(
"extdiv", HasExtDiv)
1333 void PPCTargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
1334 StringRef Name,
bool Enabled)
const {
1335 static llvm::StringMap<bool> ExplicitFeatures;
1336 ExplicitFeatures[Name] = Enabled;
1340 if (!Enabled && Name ==
"vsx") {
1341 Features[
"direct-move"] = ExplicitFeatures[
"direct-move"];
1342 Features[
"power8-vector"] = ExplicitFeatures[
"power8-vector"];
1344 if ((Enabled && Name ==
"power8-vector") ||
1345 (Enabled && Name ==
"direct-move")) {
1346 if (ExplicitFeatures.find(
"vsx") == ExplicitFeatures.end()) {
1347 Features[
"vsx"] =
true;
1350 Features[Name] = Enabled;
1353 const char *
const PPCTargetInfo::GCCRegNames[] = {
1354 "r0",
"r1",
"r2",
"r3",
"r4",
"r5",
"r6",
"r7",
1355 "r8",
"r9",
"r10",
"r11",
"r12",
"r13",
"r14",
"r15",
1356 "r16",
"r17",
"r18",
"r19",
"r20",
"r21",
"r22",
"r23",
1357 "r24",
"r25",
"r26",
"r27",
"r28",
"r29",
"r30",
"r31",
1358 "f0",
"f1",
"f2",
"f3",
"f4",
"f5",
"f6",
"f7",
1359 "f8",
"f9",
"f10",
"f11",
"f12",
"f13",
"f14",
"f15",
1360 "f16",
"f17",
"f18",
"f19",
"f20",
"f21",
"f22",
"f23",
1361 "f24",
"f25",
"f26",
"f27",
"f28",
"f29",
"f30",
"f31",
1362 "mq",
"lr",
"ctr",
"ap",
1363 "cr0",
"cr1",
"cr2",
"cr3",
"cr4",
"cr5",
"cr6",
"cr7",
1365 "v0",
"v1",
"v2",
"v3",
"v4",
"v5",
"v6",
"v7",
1366 "v8",
"v9",
"v10",
"v11",
"v12",
"v13",
"v14",
"v15",
1367 "v16",
"v17",
"v18",
"v19",
"v20",
"v21",
"v22",
"v23",
1368 "v24",
"v25",
"v26",
"v27",
"v28",
"v29",
"v30",
"v31",
1370 "spe_acc",
"spefscr",
1374 void PPCTargetInfo::getGCCRegNames(
const char *
const *&Names,
1375 unsigned &NumNames)
const {
1376 Names = GCCRegNames;
1377 NumNames = llvm::array_lengthof(GCCRegNames);
1393 { {
"10" },
"r10" },
1394 { {
"11" },
"r11" },
1395 { {
"12" },
"r12" },
1396 { {
"13" },
"r13" },
1397 { {
"14" },
"r14" },
1398 { {
"15" },
"r15" },
1399 { {
"16" },
"r16" },
1400 { {
"17" },
"r17" },
1401 { {
"18" },
"r18" },
1402 { {
"19" },
"r19" },
1403 { {
"20" },
"r20" },
1404 { {
"21" },
"r21" },
1405 { {
"22" },
"r22" },
1406 { {
"23" },
"r23" },
1407 { {
"24" },
"r24" },
1408 { {
"25" },
"r25" },
1409 { {
"26" },
"r26" },
1410 { {
"27" },
"r27" },
1411 { {
"28" },
"r28" },
1412 { {
"29" },
"r29" },
1413 { {
"30" },
"r30" },
1414 { {
"31" },
"r31" },
1415 { {
"fr0" },
"f0" },
1416 { {
"fr1" },
"f1" },
1417 { {
"fr2" },
"f2" },
1418 { {
"fr3" },
"f3" },
1419 { {
"fr4" },
"f4" },
1420 { {
"fr5" },
"f5" },
1421 { {
"fr6" },
"f6" },
1422 { {
"fr7" },
"f7" },
1423 { {
"fr8" },
"f8" },
1424 { {
"fr9" },
"f9" },
1425 { {
"fr10" },
"f10" },
1426 { {
"fr11" },
"f11" },
1427 { {
"fr12" },
"f12" },
1428 { {
"fr13" },
"f13" },
1429 { {
"fr14" },
"f14" },
1430 { {
"fr15" },
"f15" },
1431 { {
"fr16" },
"f16" },
1432 { {
"fr17" },
"f17" },
1433 { {
"fr18" },
"f18" },
1434 { {
"fr19" },
"f19" },
1435 { {
"fr20" },
"f20" },
1436 { {
"fr21" },
"f21" },
1437 { {
"fr22" },
"f22" },
1438 { {
"fr23" },
"f23" },
1439 { {
"fr24" },
"f24" },
1440 { {
"fr25" },
"f25" },
1441 { {
"fr26" },
"f26" },
1442 { {
"fr27" },
"f27" },
1443 { {
"fr28" },
"f28" },
1444 { {
"fr29" },
"f29" },
1445 { {
"fr30" },
"f30" },
1446 { {
"fr31" },
"f31" },
1447 { {
"cc" },
"cr0" },
1450 void PPCTargetInfo::getGCCRegAliases(
const GCCRegAlias *&Aliases,
1451 unsigned &NumAliases)
const {
1452 Aliases = GCCRegAliases;
1453 NumAliases = llvm::array_lengthof(GCCRegAliases);
1456 class PPC32TargetInfo :
public PPCTargetInfo {
1458 PPC32TargetInfo(
const llvm::Triple &Triple) : PPCTargetInfo(Triple) {
1459 DescriptionString =
"E-m:e-p:32:32-i64:64-n32";
1461 switch (getTriple().getOS()) {
1462 case llvm::Triple::Linux:
1463 case llvm::Triple::FreeBSD:
1464 case llvm::Triple::NetBSD:
1465 SizeType = UnsignedInt;
1466 PtrDiffType = SignedInt;
1467 IntPtrType = SignedInt;
1473 if (getTriple().getOS() == llvm::Triple::FreeBSD) {
1474 LongDoubleWidth = LongDoubleAlign = 64;
1475 LongDoubleFormat = &llvm::APFloat::IEEEdouble;
1479 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 32;
1482 BuiltinVaListKind getBuiltinVaListKind()
const override {
1490 class PPC64TargetInfo :
public PPCTargetInfo {
1492 PPC64TargetInfo(
const llvm::Triple &Triple) : PPCTargetInfo(Triple) {
1493 LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
1494 IntMaxType = SignedLong;
1495 Int64Type = SignedLong;
1497 if ((Triple.getArch() == llvm::Triple::ppc64le)) {
1498 DescriptionString =
"e-m:e-i64:64-n32:64";
1501 DescriptionString =
"E-m:e-i64:64-n32:64";
1505 switch (getTriple().getOS()) {
1506 case llvm::Triple::FreeBSD:
1507 LongDoubleWidth = LongDoubleAlign = 64;
1508 LongDoubleFormat = &llvm::APFloat::IEEEdouble;
1510 case llvm::Triple::NetBSD:
1511 IntMaxType = SignedLongLong;
1512 Int64Type = SignedLongLong;
1519 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
1521 BuiltinVaListKind getBuiltinVaListKind()
const override {
1525 bool setABI(
const std::string &Name)
override {
1526 if (Name ==
"elfv1" || Name ==
"elfv1-qpx" || Name ==
"elfv2") {
1534 class DarwinPPC32TargetInfo :
1535 public DarwinTargetInfo<PPC32TargetInfo> {
1537 DarwinPPC32TargetInfo(
const llvm::Triple &Triple)
1538 : DarwinTargetInfo<PPC32TargetInfo>(Triple) {
1539 HasAlignMac68kSupport =
true;
1540 BoolWidth = BoolAlign = 32;
1541 PtrDiffType = SignedInt;
1543 SuitableAlign = 128;
1544 DescriptionString =
"E-m:o-p:32:32-f64:32:64-n32";
1546 BuiltinVaListKind getBuiltinVaListKind()
const override {
1551 class DarwinPPC64TargetInfo :
1552 public DarwinTargetInfo<PPC64TargetInfo> {
1554 DarwinPPC64TargetInfo(
const llvm::Triple &Triple)
1555 : DarwinTargetInfo<PPC64TargetInfo>(Triple) {
1556 HasAlignMac68kSupport =
true;
1557 SuitableAlign = 128;
1558 DescriptionString =
"E-m:o-i64:64-n32:64";
1562 static const unsigned NVPTXAddrSpaceMap[] = {
1573 static const char *
const GCCRegNames[];
1587 NVPTXTargetInfo(
const llvm::Triple &Triple) :
TargetInfo(Triple) {
1589 TLSSupported =
false;
1590 LongWidth = LongAlign = 64;
1591 AddrSpaceMap = &NVPTXAddrSpaceMap;
1592 UseAddrSpaceMapMangling =
true;
1595 NoAsmVariants =
true;
1603 if (Opts.CUDAIsDevice) {
1605 std::string CUDAArchCode;
1608 CUDAArchCode =
"200";
1611 CUDAArchCode =
"210";
1614 CUDAArchCode =
"300";
1617 CUDAArchCode =
"350";
1620 CUDAArchCode =
"370";
1623 llvm_unreachable(
"Unhandled target CPU");
1625 Builder.
defineMacro(
"__CUDA_ARCH__", CUDAArchCode);
1629 unsigned &NumRecords)
const override {
1633 bool hasFeature(StringRef Feature)
const override {
1634 return Feature ==
"ptx" || Feature ==
"nvptx";
1637 void getGCCRegNames(
const char *
const *&Names,
1638 unsigned &NumNames)
const override;
1639 void getGCCRegAliases(
const GCCRegAlias *&Aliases,
1640 unsigned &NumAliases)
const override {
1646 validateAsmConstraint(
const char *&Name,
1649 default:
return false;
1660 const char *getClobbers()
const override {
1664 BuiltinVaListKind getBuiltinVaListKind()
const override {
1668 bool setCPU(
const std::string &Name)
override {
1669 GPU = llvm::StringSwitch<GPUKind>(Name)
1670 .Case(
"sm_20", GK_SM20)
1671 .Case(
"sm_21", GK_SM21)
1672 .Case(
"sm_30", GK_SM30)
1673 .Case(
"sm_35", GK_SM35)
1674 .Case(
"sm_37", GK_SM37)
1677 return GPU != GK_NONE;
1682 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
1683 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
1685 #include "clang/Basic/BuiltinsNVPTX.def"
1688 const char *
const NVPTXTargetInfo::GCCRegNames[] = {
1692 void NVPTXTargetInfo::getGCCRegNames(
const char *
const *&Names,
1693 unsigned &NumNames)
const {
1694 Names = GCCRegNames;
1695 NumNames = llvm::array_lengthof(GCCRegNames);
1698 class NVPTX32TargetInfo :
public NVPTXTargetInfo {
1700 NVPTX32TargetInfo(
const llvm::Triple &Triple) : NVPTXTargetInfo(Triple) {
1701 PointerWidth = PointerAlign = 32;
1705 DescriptionString =
"e-p:32:32-i64:64-v16:16-v32:32-n16:32:64";
1709 class NVPTX64TargetInfo :
public NVPTXTargetInfo {
1711 NVPTX64TargetInfo(
const llvm::Triple &Triple) : NVPTXTargetInfo(Triple) {
1712 PointerWidth = PointerAlign = 64;
1716 DescriptionString =
"e-i64:64-v16:16-v32:32-n16:32:64";
1720 static const unsigned AMDGPUAddrSpaceMap[] = {
1733 static const char *DescriptionStringR600 =
1734 "e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128"
1735 "-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64";
1737 static const char *DescriptionStringR600DoubleOps =
1738 "e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128"
1739 "-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64";
1741 static const char *DescriptionStringSI =
1742 "e-p:32:32-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-p24:64:64"
1743 "-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128"
1744 "-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64";
1748 static const char *
const GCCRegNames[];
1758 GK_EVERGREEN_DOUBLE_OPS,
1759 GK_NORTHERN_ISLANDS,
1761 GK_SOUTHERN_ISLANDS,
1771 AMDGPUTargetInfo(
const llvm::Triple &Triple)
1774 if (Triple.getArch() == llvm::Triple::amdgcn) {
1775 DescriptionString = DescriptionStringSI;
1776 GPU = GK_SOUTHERN_ISLANDS;
1781 DescriptionString = DescriptionStringR600;
1787 AddrSpaceMap = &AMDGPUAddrSpaceMap;
1788 UseAddrSpaceMapMangling =
true;
1791 uint64_t getPointerWidthV(
unsigned AddrSpace)
const override {
1792 if (GPU <= GK_CAYMAN)
1805 const char * getClobbers()
const override {
1809 void getGCCRegNames(
const char *
const *&Names,
1810 unsigned &NumNames)
const override;
1812 void getGCCRegAliases(
const GCCRegAlias *&Aliases,
1813 unsigned &NumAliases)
const override {
1818 bool validateAsmConstraint(
const char *&Name,
1824 unsigned &NumRecords)
const override {
1836 if (hasFP64 && Opts.OpenCL) {
1841 BuiltinVaListKind getBuiltinVaListKind()
const override {
1845 bool setCPU(
const std::string &Name)
override {
1846 GPU = llvm::StringSwitch<GPUKind>(Name)
1847 .Case(
"r600" , GK_R600)
1848 .Case(
"rv610", GK_R600)
1849 .Case(
"rv620", GK_R600)
1850 .Case(
"rv630", GK_R600)
1851 .Case(
"rv635", GK_R600)
1852 .Case(
"rs780", GK_R600)
1853 .Case(
"rs880", GK_R600)
1854 .Case(
"rv670", GK_R600_DOUBLE_OPS)
1855 .Case(
"rv710", GK_R700)
1856 .Case(
"rv730", GK_R700)
1857 .Case(
"rv740", GK_R700_DOUBLE_OPS)
1858 .Case(
"rv770", GK_R700_DOUBLE_OPS)
1859 .Case(
"palm", GK_EVERGREEN)
1860 .Case(
"cedar", GK_EVERGREEN)
1861 .Case(
"sumo", GK_EVERGREEN)
1862 .Case(
"sumo2", GK_EVERGREEN)
1863 .Case(
"redwood", GK_EVERGREEN)
1864 .Case(
"juniper", GK_EVERGREEN)
1865 .Case(
"hemlock", GK_EVERGREEN_DOUBLE_OPS)
1866 .Case(
"cypress", GK_EVERGREEN_DOUBLE_OPS)
1867 .Case(
"barts", GK_NORTHERN_ISLANDS)
1868 .Case(
"turks", GK_NORTHERN_ISLANDS)
1869 .Case(
"caicos", GK_NORTHERN_ISLANDS)
1870 .Case(
"cayman", GK_CAYMAN)
1871 .Case(
"aruba", GK_CAYMAN)
1872 .Case(
"tahiti", GK_SOUTHERN_ISLANDS)
1873 .Case(
"pitcairn", GK_SOUTHERN_ISLANDS)
1874 .Case(
"verde", GK_SOUTHERN_ISLANDS)
1875 .Case(
"oland", GK_SOUTHERN_ISLANDS)
1876 .Case(
"hainan", GK_SOUTHERN_ISLANDS)
1877 .Case(
"bonaire", GK_SEA_ISLANDS)
1878 .Case(
"kabini", GK_SEA_ISLANDS)
1879 .Case(
"kaveri", GK_SEA_ISLANDS)
1880 .Case(
"hawaii", GK_SEA_ISLANDS)
1881 .Case(
"mullins", GK_SEA_ISLANDS)
1882 .Case(
"tonga", GK_VOLCANIC_ISLANDS)
1883 .Case(
"iceland", GK_VOLCANIC_ISLANDS)
1884 .Case(
"carrizo", GK_VOLCANIC_ISLANDS)
1887 if (GPU == GK_NONE) {
1897 case GK_NORTHERN_ISLANDS:
1898 DescriptionString = DescriptionStringR600;
1903 case GK_R600_DOUBLE_OPS:
1904 case GK_R700_DOUBLE_OPS:
1905 case GK_EVERGREEN_DOUBLE_OPS:
1907 DescriptionString = DescriptionStringR600DoubleOps;
1912 case GK_SOUTHERN_ISLANDS:
1913 case GK_SEA_ISLANDS:
1914 case GK_VOLCANIC_ISLANDS:
1915 DescriptionString = DescriptionStringSI;
1927 #define BUILTIN(ID, TYPE, ATTRS) \
1928 { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
1929 #include "clang/Basic/BuiltinsAMDGPU.def"
1931 const char *
const AMDGPUTargetInfo::GCCRegNames[] = {
1932 "v0",
"v1",
"v2",
"v3",
"v4",
"v5",
"v6",
"v7",
1933 "v8",
"v9",
"v10",
"v11",
"v12",
"v13",
"v14",
"v15",
1934 "v16",
"v17",
"v18",
"v19",
"v20",
"v21",
"v22",
"v23",
1935 "v24",
"v25",
"v26",
"v27",
"v28",
"v29",
"v30",
"v31",
1936 "v32",
"v33",
"v34",
"v35",
"v36",
"v37",
"v38",
"v39",
1937 "v40",
"v41",
"v42",
"v43",
"v44",
"v45",
"v46",
"v47",
1938 "v48",
"v49",
"v50",
"v51",
"v52",
"v53",
"v54",
"v55",
1939 "v56",
"v57",
"v58",
"v59",
"v60",
"v61",
"v62",
"v63",
1940 "v64",
"v65",
"v66",
"v67",
"v68",
"v69",
"v70",
"v71",
1941 "v72",
"v73",
"v74",
"v75",
"v76",
"v77",
"v78",
"v79",
1942 "v80",
"v81",
"v82",
"v83",
"v84",
"v85",
"v86",
"v87",
1943 "v88",
"v89",
"v90",
"v91",
"v92",
"v93",
"v94",
"v95",
1944 "v96",
"v97",
"v98",
"v99",
"v100",
"v101",
"v102",
"v103",
1945 "v104",
"v105",
"v106",
"v107",
"v108",
"v109",
"v110",
"v111",
1946 "v112",
"v113",
"v114",
"v115",
"v116",
"v117",
"v118",
"v119",
1947 "v120",
"v121",
"v122",
"v123",
"v124",
"v125",
"v126",
"v127",
1948 "v128",
"v129",
"v130",
"v131",
"v132",
"v133",
"v134",
"v135",
1949 "v136",
"v137",
"v138",
"v139",
"v140",
"v141",
"v142",
"v143",
1950 "v144",
"v145",
"v146",
"v147",
"v148",
"v149",
"v150",
"v151",
1951 "v152",
"v153",
"v154",
"v155",
"v156",
"v157",
"v158",
"v159",
1952 "v160",
"v161",
"v162",
"v163",
"v164",
"v165",
"v166",
"v167",
1953 "v168",
"v169",
"v170",
"v171",
"v172",
"v173",
"v174",
"v175",
1954 "v176",
"v177",
"v178",
"v179",
"v180",
"v181",
"v182",
"v183",
1955 "v184",
"v185",
"v186",
"v187",
"v188",
"v189",
"v190",
"v191",
1956 "v192",
"v193",
"v194",
"v195",
"v196",
"v197",
"v198",
"v199",
1957 "v200",
"v201",
"v202",
"v203",
"v204",
"v205",
"v206",
"v207",
1958 "v208",
"v209",
"v210",
"v211",
"v212",
"v213",
"v214",
"v215",
1959 "v216",
"v217",
"v218",
"v219",
"v220",
"v221",
"v222",
"v223",
1960 "v224",
"v225",
"v226",
"v227",
"v228",
"v229",
"v230",
"v231",
1961 "v232",
"v233",
"v234",
"v235",
"v236",
"v237",
"v238",
"v239",
1962 "v240",
"v241",
"v242",
"v243",
"v244",
"v245",
"v246",
"v247",
1963 "v248",
"v249",
"v250",
"v251",
"v252",
"v253",
"v254",
"v255",
1964 "s0",
"s1",
"s2",
"s3",
"s4",
"s5",
"s6",
"s7",
1965 "s8",
"s9",
"s10",
"s11",
"s12",
"s13",
"s14",
"s15",
1966 "s16",
"s17",
"s18",
"s19",
"s20",
"s21",
"s22",
"s23",
1967 "s24",
"s25",
"s26",
"s27",
"s28",
"s29",
"s30",
"s31",
1968 "s32",
"s33",
"s34",
"s35",
"s36",
"s37",
"s38",
"s39",
1969 "s40",
"s41",
"s42",
"s43",
"s44",
"s45",
"s46",
"s47",
1970 "s48",
"s49",
"s50",
"s51",
"s52",
"s53",
"s54",
"s55",
1971 "s56",
"s57",
"s58",
"s59",
"s60",
"s61",
"s62",
"s63",
1972 "s64",
"s65",
"s66",
"s67",
"s68",
"s69",
"s70",
"s71",
1973 "s72",
"s73",
"s74",
"s75",
"s76",
"s77",
"s78",
"s79",
1974 "s80",
"s81",
"s82",
"s83",
"s84",
"s85",
"s86",
"s87",
1975 "s88",
"s89",
"s90",
"s91",
"s92",
"s93",
"s94",
"s95",
1976 "s96",
"s97",
"s98",
"s99",
"s100",
"s101",
"s102",
"s103",
1977 "s104",
"s105",
"s106",
"s107",
"s108",
"s109",
"s110",
"s111",
1978 "s112",
"s113",
"s114",
"s115",
"s116",
"s117",
"s118",
"s119",
1979 "s120",
"s121",
"s122",
"s123",
"s124",
"s125",
"s126",
"s127"
1980 "exec",
"vcc",
"scc",
"m0",
"flat_scr",
"exec_lo",
"exec_hi",
1981 "vcc_lo",
"vcc_hi",
"flat_scr_lo",
"flat_scr_hi"
1984 void AMDGPUTargetInfo::getGCCRegNames(
const char *
const *&Names,
1985 unsigned &NumNames)
const {
1986 Names = GCCRegNames;
1987 NumNames = llvm::array_lengthof(GCCRegNames);
1992 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
1993 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
1995 #include "clang/Basic/BuiltinsX86.def"
1998 static const char*
const GCCRegNames[] = {
1999 "ax",
"dx",
"cx",
"bx",
"si",
"di",
"bp",
"sp",
2000 "st",
"st(1)",
"st(2)",
"st(3)",
"st(4)",
"st(5)",
"st(6)",
"st(7)",
2001 "argp",
"flags",
"fpcr",
"fpsr",
"dirflag",
"frame",
2002 "xmm0",
"xmm1",
"xmm2",
"xmm3",
"xmm4",
"xmm5",
"xmm6",
"xmm7",
2003 "mm0",
"mm1",
"mm2",
"mm3",
"mm4",
"mm5",
"mm6",
"mm7",
2004 "r8",
"r9",
"r10",
"r11",
"r12",
"r13",
"r14",
"r15",
2005 "xmm8",
"xmm9",
"xmm10",
"xmm11",
"xmm12",
"xmm13",
"xmm14",
"xmm15",
2006 "ymm0",
"ymm1",
"ymm2",
"ymm3",
"ymm4",
"ymm5",
"ymm6",
"ymm7",
2007 "ymm8",
"ymm9",
"ymm10",
"ymm11",
"ymm12",
"ymm13",
"ymm14",
"ymm15",
2011 { {
"al",
"ah",
"eax",
"rax" }, 0 },
2012 { {
"bl",
"bh",
"ebx",
"rbx" }, 3 },
2013 { {
"cl",
"ch",
"ecx",
"rcx" }, 2 },
2014 { {
"dl",
"dh",
"edx",
"rdx" }, 1 },
2015 { {
"esi",
"rsi" }, 4 },
2016 { {
"edi",
"rdi" }, 5 },
2017 { {
"esp",
"rsp" }, 7 },
2018 { {
"ebp",
"rbp" }, 6 },
2025 NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2, AVX512F
2028 NoMMX3DNow, MMX, AMD3DNow, AMD3DNowAthlon
2052 bool HasAVX512CD, HasAVX512ER, HasAVX512PF, HasAVX512DQ, HasAVX512BW,
2176 CK_AthlonThunderbird,
2232 X86TargetInfo(
const llvm::Triple &Triple)
2233 :
TargetInfo(Triple), SSELevel(NoSSE), MMX3DNowLevel(NoMMX3DNow),
2240 HasSHA(
false), HasCX16(
false), CPU(CK_Generic), FPMath(FP_Default) {
2242 LongDoubleFormat = &llvm::APFloat::x87DoubleExtended;
2244 unsigned getFloatEvalMethod()
const override {
2246 return SSELevel == NoSSE ? 2 : 0;
2249 unsigned &NumRecords)
const override {
2253 void getGCCRegNames(
const char *
const *&Names,
2254 unsigned &NumNames)
const override {
2255 Names = GCCRegNames;
2256 NumNames = llvm::array_lengthof(GCCRegNames);
2258 void getGCCRegAliases(
const GCCRegAlias *&Aliases,
2259 unsigned &NumAliases)
const override {
2263 void getGCCAddlRegNames(
const AddlRegName *&Names,
2264 unsigned &NumNames)
const override {
2265 Names = AddlRegNames;
2266 NumNames = llvm::array_lengthof(AddlRegNames);
2268 bool validateCpuSupports(StringRef Name)
const override;
2269 bool validateAsmConstraint(
const char *&Name,
2272 bool validateOutputSize(StringRef Constraint,
unsigned Size)
const override;
2274 bool validateInputSize(StringRef Constraint,
unsigned Size)
const override;
2276 virtual bool validateOperandSize(StringRef Constraint,
unsigned Size)
const;
2278 std::string convertConstraint(
const char *&Constraint)
const override;
2279 const char *getClobbers()
const override {
2280 return "~{dirflag},~{fpsr},~{flags}";
2284 static void setSSELevel(llvm::StringMap<bool> &Features, X86SSEEnum
Level,
2286 static void setMMXLevel(llvm::StringMap<bool> &Features, MMX3DNowEnum
Level,
2288 static void setXOPLevel(llvm::StringMap<bool> &Features, XOPEnum
Level,
2290 void setFeatureEnabled(llvm::StringMap<bool> &Features,
2291 StringRef Name,
bool Enabled)
const override {
2292 setFeatureEnabledImpl(Features, Name, Enabled);
2296 static void setFeatureEnabledImpl(llvm::StringMap<bool> &Features,
2297 StringRef Name,
bool Enabled);
2298 void getDefaultFeatures(llvm::StringMap<bool> &Features)
const override;
2299 bool hasFeature(StringRef Feature)
const override;
2300 bool handleTargetFeatures(std::vector<std::string> &Features,
2302 StringRef getABI()
const override {
2303 if (getTriple().getArch() == llvm::Triple::x86_64 && SSELevel >= AVX512F)
2305 else if (getTriple().getArch() == llvm::Triple::x86_64 && SSELevel >= AVX)
2307 else if (getTriple().getArch() == llvm::Triple::x86 &&
2308 MMX3DNowLevel == NoMMX3DNow)
2312 bool setCPU(
const std::string &Name)
override {
2313 CPU = llvm::StringSwitch<CPUKind>(Name)
2314 .Case(
"i386", CK_i386)
2315 .Case(
"i486", CK_i486)
2316 .Case(
"winchip-c6", CK_WinChipC6)
2317 .Case(
"winchip2", CK_WinChip2)
2319 .Case(
"i586", CK_i586)
2320 .Case(
"pentium", CK_Pentium)
2321 .Case(
"pentium-mmx", CK_PentiumMMX)
2322 .Case(
"i686", CK_i686)
2323 .Case(
"pentiumpro", CK_PentiumPro)
2324 .Case(
"pentium2", CK_Pentium2)
2325 .Case(
"pentium3", CK_Pentium3)
2326 .Case(
"pentium3m", CK_Pentium3M)
2327 .Case(
"pentium-m", CK_PentiumM)
2328 .Case(
"c3-2", CK_C3_2)
2329 .Case(
"yonah", CK_Yonah)
2330 .Case(
"pentium4", CK_Pentium4)
2331 .Case(
"pentium4m", CK_Pentium4M)
2332 .Case(
"prescott", CK_Prescott)
2333 .Case(
"nocona", CK_Nocona)
2334 .Case(
"core2", CK_Core2)
2335 .Case(
"penryn", CK_Penryn)
2336 .Case(
"bonnell", CK_Bonnell)
2337 .Case(
"atom", CK_Bonnell)
2338 .Case(
"silvermont", CK_Silvermont)
2339 .Case(
"slm", CK_Silvermont)
2340 .Case(
"nehalem", CK_Nehalem)
2341 .Case(
"corei7", CK_Nehalem)
2342 .Case(
"westmere", CK_Westmere)
2343 .Case(
"sandybridge", CK_SandyBridge)
2344 .Case(
"corei7-avx", CK_SandyBridge)
2345 .Case(
"ivybridge", CK_IvyBridge)
2346 .Case(
"core-avx-i", CK_IvyBridge)
2347 .Case(
"haswell", CK_Haswell)
2348 .Case(
"core-avx2", CK_Haswell)
2349 .Case(
"broadwell", CK_Broadwell)
2350 .Case(
"skylake", CK_Skylake)
2351 .Case(
"skx", CK_Skylake)
2352 .Case(
"knl", CK_KNL)
2354 .Case(
"k6-2", CK_K6_2)
2355 .Case(
"k6-3", CK_K6_3)
2356 .Case(
"athlon", CK_Athlon)
2357 .Case(
"athlon-tbird", CK_AthlonThunderbird)
2358 .Case(
"athlon-4", CK_Athlon4)
2359 .Case(
"athlon-xp", CK_AthlonXP)
2360 .Case(
"athlon-mp", CK_AthlonMP)
2361 .Case(
"athlon64", CK_Athlon64)
2362 .Case(
"athlon64-sse3", CK_Athlon64SSE3)
2363 .Case(
"athlon-fx", CK_AthlonFX)
2365 .Case(
"k8-sse3", CK_K8SSE3)
2366 .Case(
"opteron", CK_Opteron)
2367 .Case(
"opteron-sse3", CK_OpteronSSE3)
2368 .Case(
"barcelona", CK_AMDFAM10)
2369 .Case(
"amdfam10", CK_AMDFAM10)
2370 .Case(
"btver1", CK_BTVER1)
2371 .Case(
"btver2", CK_BTVER2)
2372 .Case(
"bdver1", CK_BDVER1)
2373 .Case(
"bdver2", CK_BDVER2)
2374 .Case(
"bdver3", CK_BDVER3)
2375 .Case(
"bdver4", CK_BDVER4)
2376 .Case(
"x86-64", CK_x86_64)
2377 .Case(
"geode", CK_Geode)
2378 .Default(CK_Generic);
2412 case CK_AthlonThunderbird:
2418 if (getTriple().getArch() != llvm::Triple::x86)
2429 case CK_SandyBridge:
2436 case CK_Athlon64SSE3:
2441 case CK_OpteronSSE3:
2452 llvm_unreachable(
"Unhandled CPU kind");
2455 bool setFPMath(StringRef Name)
override;
2457 CallingConvCheckResult checkCallingConvention(
CallingConv CC)
const override {
2468 CallingConv getDefaultCallingConv(CallingConvMethodType MT)
const override {
2472 bool hasSjLjLowering()
const override {
2477 bool X86TargetInfo::setFPMath(StringRef Name) {
2478 if (Name ==
"387") {
2482 if (Name ==
"sse") {
2489 void X86TargetInfo::getDefaultFeatures(llvm::StringMap<bool> &Features)
const {
2493 if (getTriple().getArch() == llvm::Triple::x86_64)
2494 setFeatureEnabledImpl(Features,
"sse2",
true);
2509 setFeatureEnabledImpl(Features,
"mmx",
true);
2514 setFeatureEnabledImpl(Features,
"sse",
true);
2520 setFeatureEnabledImpl(Features,
"sse2",
true);
2525 setFeatureEnabledImpl(Features,
"sse3",
true);
2526 setFeatureEnabledImpl(Features,
"cx16",
true);
2530 setFeatureEnabledImpl(Features,
"ssse3",
true);
2531 setFeatureEnabledImpl(Features,
"cx16",
true);
2534 setFeatureEnabledImpl(Features,
"sse4.1",
true);
2535 setFeatureEnabledImpl(Features,
"cx16",
true);
2538 setFeatureEnabledImpl(Features,
"avx512f",
true);
2539 setFeatureEnabledImpl(Features,
"avx512cd",
true);
2540 setFeatureEnabledImpl(Features,
"avx512dq",
true);
2541 setFeatureEnabledImpl(Features,
"avx512bw",
true);
2542 setFeatureEnabledImpl(Features,
"avx512vl",
true);
2545 setFeatureEnabledImpl(Features,
"rdseed",
true);
2546 setFeatureEnabledImpl(Features,
"adx",
true);
2549 setFeatureEnabledImpl(Features,
"avx2",
true);
2550 setFeatureEnabledImpl(Features,
"lzcnt",
true);
2551 setFeatureEnabledImpl(Features,
"bmi",
true);
2552 setFeatureEnabledImpl(Features,
"bmi2",
true);
2553 setFeatureEnabledImpl(Features,
"rtm",
true);
2554 setFeatureEnabledImpl(Features,
"fma",
true);
2557 setFeatureEnabledImpl(Features,
"rdrnd",
true);
2558 setFeatureEnabledImpl(Features,
"f16c",
true);
2559 setFeatureEnabledImpl(Features,
"fsgsbase",
true);
2561 case CK_SandyBridge:
2562 setFeatureEnabledImpl(Features,
"avx",
true);
2566 setFeatureEnabledImpl(Features,
"aes",
true);
2567 setFeatureEnabledImpl(Features,
"pclmul",
true);
2570 setFeatureEnabledImpl(Features,
"sse4.2",
true);
2571 setFeatureEnabledImpl(Features,
"cx16",
true);
2574 setFeatureEnabledImpl(Features,
"avx512f",
true);
2575 setFeatureEnabledImpl(Features,
"avx512cd",
true);
2576 setFeatureEnabledImpl(Features,
"avx512er",
true);
2577 setFeatureEnabledImpl(Features,
"avx512pf",
true);
2578 setFeatureEnabledImpl(Features,
"rdseed",
true);
2579 setFeatureEnabledImpl(Features,
"adx",
true);
2580 setFeatureEnabledImpl(Features,
"lzcnt",
true);
2581 setFeatureEnabledImpl(Features,
"bmi",
true);
2582 setFeatureEnabledImpl(Features,
"bmi2",
true);
2583 setFeatureEnabledImpl(Features,
"rtm",
true);
2584 setFeatureEnabledImpl(Features,
"fma",
true);
2585 setFeatureEnabledImpl(Features,
"rdrnd",
true);
2586 setFeatureEnabledImpl(Features,
"f16c",
true);
2587 setFeatureEnabledImpl(Features,
"fsgsbase",
true);
2588 setFeatureEnabledImpl(Features,
"aes",
true);
2589 setFeatureEnabledImpl(Features,
"pclmul",
true);
2590 setFeatureEnabledImpl(Features,
"cx16",
true);
2596 setFeatureEnabledImpl(Features,
"3dnow",
true);
2599 case CK_AthlonThunderbird:
2601 setFeatureEnabledImpl(Features,
"3dnowa",
true);
2606 setFeatureEnabledImpl(Features,
"sse",
true);
2607 setFeatureEnabledImpl(Features,
"3dnowa",
true);
2613 setFeatureEnabledImpl(Features,
"sse2",
true);
2614 setFeatureEnabledImpl(Features,
"3dnowa",
true);
2617 setFeatureEnabledImpl(Features,
"sse4a",
true);
2618 setFeatureEnabledImpl(Features,
"lzcnt",
true);
2619 setFeatureEnabledImpl(Features,
"popcnt",
true);
2622 case CK_OpteronSSE3:
2623 case CK_Athlon64SSE3:
2624 setFeatureEnabledImpl(Features,
"sse3",
true);
2625 setFeatureEnabledImpl(Features,
"3dnowa",
true);
2628 setFeatureEnabledImpl(Features,
"avx",
true);
2629 setFeatureEnabledImpl(Features,
"aes",
true);
2630 setFeatureEnabledImpl(Features,
"pclmul",
true);
2631 setFeatureEnabledImpl(Features,
"bmi",
true);
2632 setFeatureEnabledImpl(Features,
"f16c",
true);
2635 setFeatureEnabledImpl(Features,
"ssse3",
true);
2636 setFeatureEnabledImpl(Features,
"sse4a",
true);
2637 setFeatureEnabledImpl(Features,
"lzcnt",
true);
2638 setFeatureEnabledImpl(Features,
"popcnt",
true);
2639 setFeatureEnabledImpl(Features,
"prfchw",
true);
2640 setFeatureEnabledImpl(Features,
"cx16",
true);
2643 setFeatureEnabledImpl(Features,
"avx2",
true);
2644 setFeatureEnabledImpl(Features,
"bmi2",
true);
2647 setFeatureEnabledImpl(Features,
"fsgsbase",
true);
2650 setFeatureEnabledImpl(Features,
"bmi",
true);
2651 setFeatureEnabledImpl(Features,
"fma",
true);
2652 setFeatureEnabledImpl(Features,
"f16c",
true);
2653 setFeatureEnabledImpl(Features,
"tbm",
true);
2657 setFeatureEnabledImpl(Features,
"xop",
true);
2658 setFeatureEnabledImpl(Features,
"lzcnt",
true);
2659 setFeatureEnabledImpl(Features,
"aes",
true);
2660 setFeatureEnabledImpl(Features,
"pclmul",
true);
2661 setFeatureEnabledImpl(Features,
"prfchw",
true);
2662 setFeatureEnabledImpl(Features,
"cx16",
true);
2667 void X86TargetInfo::setSSELevel(llvm::StringMap<bool> &Features,
2668 X86SSEEnum
Level,
bool Enabled) {
2672 Features[
"avx512f"] =
true;
2674 Features[
"avx2"] =
true;
2676 Features[
"avx"] =
true;
2678 Features[
"sse4.2"] =
true;
2680 Features[
"sse4.1"] =
true;
2682 Features[
"ssse3"] =
true;
2684 Features[
"sse3"] =
true;
2686 Features[
"sse2"] =
true;
2688 Features[
"sse"] =
true;
2698 Features[
"sse"] =
false;
2700 Features[
"sse2"] = Features[
"pclmul"] = Features[
"aes"] =
2701 Features[
"sha"] =
false;
2703 Features[
"sse3"] =
false;
2704 setXOPLevel(Features, NoXOP,
false);
2706 Features[
"ssse3"] =
false;
2708 Features[
"sse4.1"] =
false;
2710 Features[
"sse4.2"] =
false;
2712 Features[
"fma"] = Features[
"avx"] = Features[
"f16c"] =
false;
2713 setXOPLevel(Features, FMA4,
false);
2715 Features[
"avx2"] =
false;
2717 Features[
"avx512f"] = Features[
"avx512cd"] = Features[
"avx512er"] =
2718 Features[
"avx512pf"] = Features[
"avx512dq"] = Features[
"avx512bw"] =
2719 Features[
"avx512vl"] =
false;
2723 void X86TargetInfo::setMMXLevel(llvm::StringMap<bool> &Features,
2724 MMX3DNowEnum Level,
bool Enabled) {
2727 case AMD3DNowAthlon:
2728 Features[
"3dnowa"] =
true;
2730 Features[
"3dnow"] =
true;
2732 Features[
"mmx"] =
true;
2742 Features[
"mmx"] =
false;
2744 Features[
"3dnow"] =
false;
2745 case AMD3DNowAthlon:
2746 Features[
"3dnowa"] =
false;
2750 void X86TargetInfo::setXOPLevel(llvm::StringMap<bool> &Features, XOPEnum Level,
2755 Features[
"xop"] =
true;
2757 Features[
"fma4"] =
true;
2758 setSSELevel(Features, AVX,
true);
2760 Features[
"sse4a"] =
true;
2761 setSSELevel(Features, SSE3,
true);
2771 Features[
"sse4a"] =
false;
2773 Features[
"fma4"] =
false;
2775 Features[
"xop"] =
false;
2779 void X86TargetInfo::setFeatureEnabledImpl(llvm::StringMap<bool> &Features,
2780 StringRef Name,
bool Enabled) {
2785 Features[Name] = Enabled;
2787 if (Name ==
"mmx") {
2788 setMMXLevel(Features, MMX, Enabled);
2789 }
else if (Name ==
"sse") {
2790 setSSELevel(Features, SSE1, Enabled);
2791 }
else if (Name ==
"sse2") {
2792 setSSELevel(Features, SSE2, Enabled);
2793 }
else if (Name ==
"sse3") {
2794 setSSELevel(Features, SSE3, Enabled);
2795 }
else if (Name ==
"ssse3") {
2796 setSSELevel(Features, SSSE3, Enabled);
2797 }
else if (Name ==
"sse4.2") {
2798 setSSELevel(Features, SSE42, Enabled);
2799 }
else if (Name ==
"sse4.1") {
2800 setSSELevel(Features, SSE41, Enabled);
2801 }
else if (Name ==
"3dnow") {
2802 setMMXLevel(Features, AMD3DNow, Enabled);
2803 }
else if (Name ==
"3dnowa") {
2804 setMMXLevel(Features, AMD3DNowAthlon, Enabled);
2805 }
else if (Name ==
"aes") {
2807 setSSELevel(Features, SSE2, Enabled);
2808 }
else if (Name ==
"pclmul") {
2810 setSSELevel(Features, SSE2, Enabled);
2811 }
else if (Name ==
"avx") {
2812 setSSELevel(Features, AVX, Enabled);
2813 }
else if (Name ==
"avx2") {
2814 setSSELevel(Features, AVX2, Enabled);
2815 }
else if (Name ==
"avx512f") {
2816 setSSELevel(Features, AVX512F, Enabled);
2817 }
else if (Name ==
"avx512cd" || Name ==
"avx512er" || Name ==
"avx512pf"
2818 || Name ==
"avx512dq" || Name ==
"avx512bw" || Name ==
"avx512vl") {
2820 setSSELevel(Features, AVX512F, Enabled);
2821 }
else if (Name ==
"fma") {
2823 setSSELevel(Features, AVX, Enabled);
2824 }
else if (Name ==
"fma4") {
2825 setXOPLevel(Features, FMA4, Enabled);
2826 }
else if (Name ==
"xop") {
2827 setXOPLevel(Features, XOP, Enabled);
2828 }
else if (Name ==
"sse4a") {
2829 setXOPLevel(Features, SSE4A, Enabled);
2830 }
else if (Name ==
"f16c") {
2832 setSSELevel(Features, AVX, Enabled);
2833 }
else if (Name ==
"sha") {
2835 setSSELevel(Features, SSE2, Enabled);
2836 }
else if (Name ==
"sse4") {
2842 setSSELevel(Features, SSE42, Enabled);
2844 setSSELevel(Features, SSE41, Enabled);
2850 bool X86TargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
2853 for (
unsigned i = 0, e = Features.size(); i !=e; ++i) {
2855 if (Features[i][0] ==
'-')
2858 StringRef Feature = StringRef(Features[i]).substr(1);
2860 if (Feature ==
"aes") {
2865 if (Feature ==
"pclmul") {
2870 if (Feature ==
"lzcnt") {
2875 if (Feature ==
"rdrnd") {
2880 if (Feature ==
"fsgsbase") {
2885 if (Feature ==
"bmi") {
2890 if (Feature ==
"bmi2") {
2895 if (Feature ==
"popcnt") {
2900 if (Feature ==
"rtm") {
2905 if (Feature ==
"prfchw") {
2910 if (Feature ==
"rdseed") {
2915 if (Feature ==
"adx") {
2920 if (Feature ==
"tbm") {
2925 if (Feature ==
"fma") {
2930 if (Feature ==
"f16c") {
2935 if (Feature ==
"avx512cd") {
2940 if (Feature ==
"avx512er") {
2945 if (Feature ==
"avx512pf") {
2950 if (Feature ==
"avx512dq") {
2955 if (Feature ==
"avx512bw") {
2960 if (Feature ==
"avx512vl") {
2965 if (Feature ==
"sha") {
2970 if (Feature ==
"cx16") {
2975 assert(Features[i][0] ==
'+' &&
"Invalid target feature!");
2976 X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Feature)
2977 .Case(
"avx512f", AVX512F)
2980 .Case(
"sse4.2", SSE42)
2981 .Case(
"sse4.1", SSE41)
2982 .Case(
"ssse3", SSSE3)
2987 SSELevel = std::max(SSELevel, Level);
2989 MMX3DNowEnum ThreeDNowLevel =
2990 llvm::StringSwitch<MMX3DNowEnum>(Feature)
2991 .Case(
"3dnowa", AMD3DNowAthlon)
2992 .Case(
"3dnow", AMD3DNow)
2994 .Default(NoMMX3DNow);
2995 MMX3DNowLevel = std::max(MMX3DNowLevel, ThreeDNowLevel);
2997 XOPEnum XLevel = llvm::StringSwitch<XOPEnum>(Feature)
3000 .Case(
"sse4a", SSE4A)
3002 XOPLevel = std::max(XOPLevel, XLevel);
3008 if (!HasPOPCNT && SSELevel >= SSE42 &&
3009 std::find(Features.begin(), Features.end(),
"-popcnt") == Features.end()){
3011 Features.push_back(
"+popcnt");
3015 if (!HasPRFCHW && MMX3DNowLevel >= AMD3DNow &&
3016 std::find(Features.begin(), Features.end(),
"-prfchw") == Features.end()){
3018 Features.push_back(
"+prfchw");
3023 if (FPMath == FP_SSE && SSELevel < SSE1) {
3024 Diags.
Report(diag::err_target_unsupported_fpmath) <<
"sse";
3026 }
else if (FPMath == FP_387 && SSELevel >= SSE1) {
3027 Diags.
Report(diag::err_target_unsupported_fpmath) <<
"387";
3035 std::vector<std::string>::iterator it;
3036 it = std::find(Features.begin(), Features.end(),
"-mmx");
3037 if (it != Features.end())
3039 else if (SSELevel > NoSSE)
3040 MMX3DNowLevel = std::max(MMX3DNowLevel, MMX);
3043 (getABI() ==
"avx512") ? 512 : (getABI() ==
"avx") ? 256 : 128;
3049 void X86TargetInfo::getTargetDefines(
const LangOptions &Opts,
3052 if (getTriple().getArch() == llvm::Triple::x86_64) {
3057 if (getTriple().getArchName() ==
"x86_64h") {
3131 case CK_SandyBridge:
3155 if (CPU != CK_K6_2) {
3167 case CK_AthlonThunderbird:
3172 if (SSELevel != NoSSE) {
3181 case CK_OpteronSSE3:
3183 case CK_Athlon64SSE3:
3294 Builder.
defineMacro(
"__GCC_HAVE_SYNC_COMPARE_AND_SWAP_16");
3322 if (Opts.MicrosoftExt && getTriple().getArch() == llvm::Triple::x86) {
3343 switch (MMX3DNowLevel) {
3344 case AMD3DNowAthlon:
3354 if (CPU >= CK_i486) {
3355 Builder.
defineMacro(
"__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");
3356 Builder.
defineMacro(
"__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");
3357 Builder.
defineMacro(
"__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4");
3360 Builder.
defineMacro(
"__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8");
3364 return llvm::StringSwitch<bool>(Feature)
3365 .Case(
"aes", HasAES)
3366 .Case(
"avx", SSELevel >= AVX)
3367 .Case(
"avx2", SSELevel >= AVX2)
3368 .Case(
"avx512f", SSELevel >= AVX512F)
3369 .Case(
"avx512cd", HasAVX512CD)
3370 .Case(
"avx512er", HasAVX512ER)
3371 .Case(
"avx512pf", HasAVX512PF)
3372 .Case(
"avx512dq", HasAVX512DQ)
3373 .Case(
"avx512bw", HasAVX512BW)
3374 .Case(
"avx512vl", HasAVX512VL)
3375 .Case(
"bmi", HasBMI)
3376 .Case(
"bmi2", HasBMI2)
3377 .Case(
"cx16", HasCX16)
3378 .Case(
"f16c", HasF16C)
3379 .Case(
"fma", HasFMA)
3380 .Case(
"fma4", XOPLevel >= FMA4)
3381 .Case(
"fsgsbase", HasFSGSBASE)
3382 .Case(
"lzcnt", HasLZCNT)
3383 .Case(
"mm3dnow", MMX3DNowLevel >= AMD3DNow)
3384 .Case(
"mm3dnowa", MMX3DNowLevel >= AMD3DNowAthlon)
3385 .Case(
"mmx", MMX3DNowLevel >= MMX)
3386 .Case(
"pclmul", HasPCLMUL)
3387 .Case(
"popcnt", HasPOPCNT)
3388 .Case(
"prfchw", HasPRFCHW)
3389 .Case(
"rdrnd", HasRDRND)
3390 .Case(
"rdseed", HasRDSEED)
3391 .Case(
"rtm", HasRTM)
3392 .Case(
"sha", HasSHA)
3393 .Case(
"sse", SSELevel >= SSE1)
3394 .Case(
"sse2", SSELevel >= SSE2)
3395 .Case(
"sse3", SSELevel >= SSE3)
3396 .Case(
"ssse3", SSELevel >= SSSE3)
3397 .Case(
"sse4.1", SSELevel >= SSE41)
3398 .Case(
"sse4.2", SSELevel >= SSE42)
3399 .Case(
"sse4a", XOPLevel >= SSE4A)
3400 .Case(
"tbm", HasTBM)
3402 .Case(
"x86_32", getTriple().getArch() == llvm::Triple::x86)
3403 .Case(
"x86_64", getTriple().getArch() == llvm::Triple::x86_64)
3404 .Case(
"xop", XOPLevel >= XOP)
3413 bool X86TargetInfo::validateCpuSupports(StringRef FeatureStr)
const {
3414 return llvm::StringSwitch<bool>(FeatureStr)
3417 .Case(
"popcnt",
true)
3421 .Case(
"sse4.1",
true)
3422 .Case(
"sse4.2",
true)
3425 .Case(
"sse4a",
true)
3429 .Case(
"avx512f",
true)
3436 X86TargetInfo::validateAsmConstraint(
const char *&Name,
3439 default:
return false;
3463 switch (*(Name+1)) {
3464 default:
return false;
3506 bool X86TargetInfo::validateOutputSize(StringRef Constraint,
3507 unsigned Size)
const {
3509 while (Constraint[0] ==
'=' ||
3510 Constraint[0] ==
'+' ||
3511 Constraint[0] ==
'&')
3512 Constraint = Constraint.substr(1);
3514 return validateOperandSize(Constraint, Size);
3517 bool X86TargetInfo::validateInputSize(StringRef Constraint,
3518 unsigned Size)
const {
3519 return validateOperandSize(Constraint, Size);
3522 bool X86TargetInfo::validateOperandSize(StringRef Constraint,
3523 unsigned Size)
const {
3524 switch (Constraint[0]) {
3534 return Size <= (SSELevel >= AVX ? 256U : 128U);
3541 X86TargetInfo::convertConstraint(
const char *&Constraint)
const {
3542 switch (*Constraint) {
3543 case 'a':
return std::string(
"{ax}");
3544 case 'b':
return std::string(
"{bx}");
3545 case 'c':
return std::string(
"{cx}");
3546 case 'd':
return std::string(
"{dx}");
3547 case 'S':
return std::string(
"{si}");
3548 case 'D':
return std::string(
"{di}");
3550 return std::string(
"im");
3552 return std::string(
"{st}");
3554 return std::string(
"{st(1)}");
3556 return std::string(1, *Constraint);
3561 class X86_32TargetInfo :
public X86TargetInfo {
3563 X86_32TargetInfo(
const llvm::Triple &Triple) : X86TargetInfo(Triple) {
3564 DoubleAlign = LongLongAlign = 32;
3565 LongDoubleWidth = 96;
3566 LongDoubleAlign = 32;
3567 SuitableAlign = 128;
3568 DescriptionString =
"e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128";
3569 SizeType = UnsignedInt;
3570 PtrDiffType = SignedInt;
3571 IntPtrType = SignedInt;
3582 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
3584 BuiltinVaListKind getBuiltinVaListKind()
const override {
3588 int getEHDataRegisterNumber(
unsigned RegNo)
const override {
3589 if (RegNo == 0)
return 0;
3590 if (RegNo == 1)
return 2;
3593 bool validateOperandSize(StringRef Constraint,
3594 unsigned Size)
const override {
3595 switch (Constraint[0]) {
3611 return X86TargetInfo::validateOperandSize(Constraint, Size);
3615 class NetBSDI386TargetInfo :
public NetBSDTargetInfo<X86_32TargetInfo> {
3617 NetBSDI386TargetInfo(
const llvm::Triple &Triple)
3618 : NetBSDTargetInfo<X86_32TargetInfo>(Triple) {}
3620 unsigned getFloatEvalMethod()
const override {
3621 unsigned Major, Minor, Micro;
3622 getTriple().getOSVersion(Major, Minor, Micro);
3624 if (Major >= 7 || (Major == 6 && Minor == 99 && Micro >= 26) || Major == 0)
3625 return X86_32TargetInfo::getFloatEvalMethod();
3631 class OpenBSDI386TargetInfo :
public OpenBSDTargetInfo<X86_32TargetInfo> {
3633 OpenBSDI386TargetInfo(
const llvm::Triple &Triple)
3634 : OpenBSDTargetInfo<X86_32TargetInfo>(Triple) {
3635 SizeType = UnsignedLong;
3636 IntPtrType = SignedLong;
3637 PtrDiffType = SignedLong;
3641 class BitrigI386TargetInfo :
public BitrigTargetInfo<X86_32TargetInfo> {
3643 BitrigI386TargetInfo(
const llvm::Triple &Triple)
3644 : BitrigTargetInfo<X86_32TargetInfo>(Triple) {
3645 SizeType = UnsignedLong;
3646 IntPtrType = SignedLong;
3647 PtrDiffType = SignedLong;
3651 class DarwinI386TargetInfo :
public DarwinTargetInfo<X86_32TargetInfo> {
3653 DarwinI386TargetInfo(
const llvm::Triple &Triple)
3654 : DarwinTargetInfo<X86_32TargetInfo>(Triple) {
3655 LongDoubleWidth = 128;
3656 LongDoubleAlign = 128;
3657 SuitableAlign = 128;
3658 MaxVectorAlign = 256;
3659 SizeType = UnsignedLong;
3660 IntPtrType = SignedLong;
3661 DescriptionString =
"e-m:o-p:32:32-f64:32:64-f80:128-n8:16:32-S128";
3662 HasAlignMac68kSupport =
true;
3668 class WindowsX86_32TargetInfo :
public WindowsTargetInfo<X86_32TargetInfo> {
3670 WindowsX86_32TargetInfo(
const llvm::Triple &Triple)
3671 : WindowsTargetInfo<X86_32TargetInfo>(Triple) {
3672 WCharType = UnsignedShort;
3673 DoubleAlign = LongLongAlign = 64;
3675 getTriple().isOSWindows() && getTriple().isOSBinFormatCOFF();
3676 DescriptionString = IsWinCOFF
3677 ?
"e-m:x-p:32:32-i64:64-f80:32-n8:16:32-a:0:32-S32"
3678 :
"e-m:e-p:32:32-i64:64-f80:32-n8:16:32-a:0:32-S32";
3682 WindowsTargetInfo<X86_32TargetInfo>::getTargetDefines(Opts, Builder);
3687 class MicrosoftX86_32TargetInfo :
public WindowsX86_32TargetInfo {
3689 MicrosoftX86_32TargetInfo(
const llvm::Triple &Triple)
3690 : WindowsX86_32TargetInfo(Triple) {
3691 LongDoubleWidth = LongDoubleAlign = 64;
3692 LongDoubleFormat = &llvm::APFloat::IEEEdouble;
3696 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
3697 WindowsX86_32TargetInfo::getVisualStudioDefines(Opts, Builder);
3710 if (Opts.MicrosoftExt)
3713 Builder.
defineMacro(
"__declspec(a)",
"__attribute__((a))");
3715 if (!Opts.MicrosoftExt) {
3719 const char *CCs[] = {
"cdecl",
"stdcall",
"fastcall",
"thiscall",
"pascal"};
3720 for (
const char *CC : CCs) {
3721 std::string GCCSpelling =
"__attribute__((__";
3723 GCCSpelling +=
"__))";
3724 Builder.
defineMacro(Twine(
"_") + CC, GCCSpelling);
3725 Builder.
defineMacro(Twine(
"__") + CC, GCCSpelling);
3738 class MinGWX86_32TargetInfo :
public WindowsX86_32TargetInfo {
3740 MinGWX86_32TargetInfo(
const llvm::Triple &Triple)
3741 : WindowsX86_32TargetInfo(Triple) {}
3744 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
3753 class CygwinX86_32TargetInfo :
public X86_32TargetInfo {
3755 CygwinX86_32TargetInfo(
const llvm::Triple &Triple)
3756 : X86_32TargetInfo(Triple) {
3757 TLSSupported =
false;
3758 WCharType = UnsignedShort;
3759 DoubleAlign = LongLongAlign = 64;
3760 DescriptionString =
"e-m:x-p:32:32-i64:64-f80:32-n8:16:32-a:0:32-S32";
3764 X86_32TargetInfo::getTargetDefines(Opts, Builder);
3776 class HaikuX86_32TargetInfo :
public X86_32TargetInfo {
3778 HaikuX86_32TargetInfo(
const llvm::Triple &Triple) : X86_32TargetInfo(Triple) {
3779 SizeType = UnsignedLong;
3780 IntPtrType = SignedLong;
3781 PtrDiffType = SignedLong;
3782 ProcessIDType = SignedLong;
3783 this->UserLabelPrefix =
"";
3784 this->TLSSupported =
false;
3788 X86_32TargetInfo::getTargetDefines(Opts, Builder);
3795 template<
typename Target>
3796 class RTEMSTargetInfo :
public OSTargetInfo<Target> {
3798 void getOSDefines(
const LangOptions &Opts,
const llvm::Triple &Triple,
3807 RTEMSTargetInfo(
const llvm::Triple &Triple) : OSTargetInfo<Target>(Triple) {
3808 this->UserLabelPrefix =
"";
3810 switch (Triple.getArch()) {
3812 case llvm::Triple::x86:
3815 case llvm::Triple::mips:
3816 case llvm::Triple::mipsel:
3817 case llvm::Triple::ppc:
3818 case llvm::Triple::ppc64:
3819 case llvm::Triple::ppc64le:
3822 case llvm::Triple::arm:
3830 class RTEMSX86_32TargetInfo :
public X86_32TargetInfo {
3832 RTEMSX86_32TargetInfo(
const llvm::Triple &Triple) : X86_32TargetInfo(Triple) {
3833 SizeType = UnsignedLong;
3834 IntPtrType = SignedLong;
3835 PtrDiffType = SignedLong;
3836 this->UserLabelPrefix =
"";
3840 X86_32TargetInfo::getTargetDefines(Opts, Builder);
3847 class X86_64TargetInfo :
public X86TargetInfo {
3849 X86_64TargetInfo(
const llvm::Triple &Triple) : X86TargetInfo(Triple) {
3850 const bool IsX32 = getTriple().getEnvironment() == llvm::Triple::GNUX32;
3852 getTriple().isOSWindows() && getTriple().isOSBinFormatCOFF();
3853 LongWidth = LongAlign = PointerWidth = PointerAlign = IsX32 ? 32 : 64;
3854 LongDoubleWidth = 128;
3855 LongDoubleAlign = 128;
3856 LargeArrayMinWidth = 128;
3857 LargeArrayAlign = 128;
3858 SuitableAlign = 128;
3859 SizeType = IsX32 ? UnsignedInt : UnsignedLong;
3860 PtrDiffType = IsX32 ? SignedInt : SignedLong;
3861 IntPtrType = IsX32 ? SignedInt : SignedLong;
3862 IntMaxType = IsX32 ? SignedLongLong : SignedLong;
3863 Int64Type = IsX32 ? SignedLongLong : SignedLong;
3867 DescriptionString = IsX32 ?
"e-m:e-p:32:32-i64:64-f80:128-n8:16:32:64-S128"
3869 ?
"e-m:w-i64:64-f80:128-n8:16:32:64-S128"
3870 :
"e-m:e-i64:64-f80:128-n8:16:32:64-S128";
3876 ComplexLongDoubleUsesFP2Ret =
true;
3879 MaxAtomicPromoteWidth = 128;
3880 MaxAtomicInlineWidth = 128;
3882 BuiltinVaListKind getBuiltinVaListKind()
const override {
3886 int getEHDataRegisterNumber(
unsigned RegNo)
const override {
3887 if (RegNo == 0)
return 0;
3888 if (RegNo == 1)
return 1;
3892 CallingConvCheckResult checkCallingConvention(
CallingConv CC)
const override {
3893 return (CC ==
CC_C ||
3899 CallingConv getDefaultCallingConv(CallingConvMethodType MT)
const override {
3904 bool hasInt128Type()
const override {
return true; }
3908 class WindowsX86_64TargetInfo :
public WindowsTargetInfo<X86_64TargetInfo> {
3910 WindowsX86_64TargetInfo(
const llvm::Triple &Triple)
3911 : WindowsTargetInfo<X86_64TargetInfo>(Triple) {
3912 WCharType = UnsignedShort;
3913 LongWidth = LongAlign = 32;
3914 DoubleAlign = LongLongAlign = 64;
3915 IntMaxType = SignedLongLong;
3916 Int64Type = SignedLongLong;
3917 SizeType = UnsignedLongLong;
3918 PtrDiffType = SignedLongLong;
3919 IntPtrType = SignedLongLong;
3920 this->UserLabelPrefix =
"";
3925 WindowsTargetInfo<X86_64TargetInfo>::getTargetDefines(Opts, Builder);
3929 BuiltinVaListKind getBuiltinVaListKind()
const override {
3933 CallingConvCheckResult checkCallingConvention(
CallingConv CC)
const override {
3945 return CCCR_Warning;
3951 class MicrosoftX86_64TargetInfo :
public WindowsX86_64TargetInfo {
3953 MicrosoftX86_64TargetInfo(
const llvm::Triple &Triple)
3954 : WindowsX86_64TargetInfo(Triple) {
3955 LongDoubleWidth = LongDoubleAlign = 64;
3956 LongDoubleFormat = &llvm::APFloat::IEEEdouble;
3960 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
3961 WindowsX86_64TargetInfo::getVisualStudioDefines(Opts, Builder);
3968 class MinGWX86_64TargetInfo :
public WindowsX86_64TargetInfo {
3970 MinGWX86_64TargetInfo(
const llvm::Triple &Triple)
3971 : WindowsX86_64TargetInfo(Triple) {}
3974 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
3980 if (!Opts.SjLjExceptions)
3985 class DarwinX86_64TargetInfo :
public DarwinTargetInfo<X86_64TargetInfo> {
3987 DarwinX86_64TargetInfo(
const llvm::Triple &Triple)
3988 : DarwinTargetInfo<X86_64TargetInfo>(Triple) {
3989 Int64Type = SignedLongLong;
3990 MaxVectorAlign = 256;
3992 llvm::Triple T = llvm::Triple(Triple);
3994 UseSignedCharForObjCBool =
false;
3995 DescriptionString =
"e-m:o-i64:64-f80:128-n8:16:32:64-S128";
3999 class OpenBSDX86_64TargetInfo :
public OpenBSDTargetInfo<X86_64TargetInfo> {
4001 OpenBSDX86_64TargetInfo(
const llvm::Triple &Triple)
4002 : OpenBSDTargetInfo<X86_64TargetInfo>(Triple) {
4003 IntMaxType = SignedLongLong;
4004 Int64Type = SignedLongLong;
4008 class BitrigX86_64TargetInfo :
public BitrigTargetInfo<X86_64TargetInfo> {
4010 BitrigX86_64TargetInfo(
const llvm::Triple &Triple)
4011 : BitrigTargetInfo<X86_64TargetInfo>(Triple) {
4012 IntMaxType = SignedLongLong;
4013 Int64Type = SignedLongLong;
4029 HWDivThumb = (1 << 0),
4033 static bool FPUModeIsVFP(FPUMode Mode) {
4034 return Mode & (VFP2FPU | VFP3FPU | VFP4FPU | NeonFPU | FPARMV8);
4038 static const char *
const GCCRegNames[];
4040 std::string ABI, CPU;
4050 unsigned IsAAPCS : 1;
4051 unsigned IsThumb : 1;
4055 unsigned SoftFloat : 1;
4056 unsigned SoftFloatABI : 1;
4059 unsigned Crypto : 1;
4063 HW_FP_HP = (1 << 1),
4064 HW_FP_SP = (1 << 2),
4065 HW_FP_DP = (1 << 3),
4071 static bool shouldUseInlineAtomic(
const llvm::Triple &T) {
4072 StringRef ArchName = T.getArchName();
4073 if (T.getArch() == llvm::Triple::arm ||
4074 T.getArch() == llvm::Triple::armeb) {
4075 StringRef VersionStr;
4076 if (ArchName.startswith(
"armv"))
4077 VersionStr = ArchName.substr(4, 1);
4078 else if (ArchName.startswith(
"armebv"))
4079 VersionStr = ArchName.substr(6, 1);
4083 if (VersionStr.getAsInteger(10, Version))
4085 return Version >= 6;
4087 assert(T.getArch() == llvm::Triple::thumb ||
4088 T.getArch() == llvm::Triple::thumbeb);
4089 StringRef VersionStr;
4090 if (ArchName.startswith(
"thumbv"))
4091 VersionStr = ArchName.substr(6, 1);
4092 else if (ArchName.startswith(
"thumbebv"))
4093 VersionStr = ArchName.substr(8, 1);
4097 if (VersionStr.getAsInteger(10, Version))
4099 return Version >= 7;
4102 void setABIAAPCS() {
4105 DoubleAlign = LongLongAlign = LongDoubleAlign = SuitableAlign = 64;
4106 const llvm::Triple &T = getTriple();
4109 if (T.isOSBinFormatMachO() || T.getOS() == llvm::Triple::NetBSD ||
4110 T.getOS() == llvm::Triple::Bitrig)
4111 SizeType = UnsignedLong;
4113 SizeType = UnsignedInt;
4115 switch (T.getOS()) {
4116 case llvm::Triple::NetBSD:
4117 WCharType = SignedInt;
4119 case llvm::Triple::Win32:
4120 WCharType = UnsignedShort;
4122 case llvm::Triple::Linux:
4125 WCharType = UnsignedInt;
4129 UseBitFieldTypeAlignment =
true;
4131 ZeroLengthBitfieldBoundary = 0;
4135 if (T.isOSBinFormatMachO()) {
4137 BigEndian ?
"E-m:o-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
4138 :
"e-m:o-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64";
4139 }
else if (T.isOSWindows()) {
4140 assert(!BigEndian &&
"Windows on ARM does not support big endian");
4141 DescriptionString =
"e"
4149 }
else if (T.isOSNaCl()) {
4150 assert(!BigEndian &&
"NaCl on ARM does not support big endian");
4151 DescriptionString =
"e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S128";
4154 BigEndian ?
"E-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
4155 :
"e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64";
4162 const llvm::Triple &T = getTriple();
4166 DoubleAlign = LongLongAlign = LongDoubleAlign = SuitableAlign = 32;
4169 if (T.getOS() == llvm::Triple::FreeBSD)
4170 SizeType = UnsignedInt;
4172 SizeType = UnsignedLong;
4175 WCharType = SignedInt;
4179 UseBitFieldTypeAlignment =
false;
4184 ZeroLengthBitfieldBoundary = 32;
4186 if (T.isOSBinFormatMachO())
4189 ?
"E-m:o-p:32:32-f64:32:64-v64:32:64-v128:32:128-a:0:32-n32-S32"
4190 :
"e-m:o-p:32:32-f64:32:64-v64:32:64-v128:32:128-a:0:32-n32-S32";
4194 ?
"E-m:e-p:32:32-f64:32:64-v64:32:64-v128:32:128-a:0:32-n32-S32"
4195 :
"e-m:e-p:32:32-f64:32:64-v64:32:64-v128:32:128-a:0:32-n32-S32";
4201 ARMTargetInfo(
const llvm::Triple &Triple,
bool IsBigEndian)
4202 :
TargetInfo(Triple), CPU(
"arm1136j-s"), FPMath(FP_Default),
4203 IsAAPCS(
true), HW_FP(0) {
4204 BigEndian = IsBigEndian;
4206 switch (getTriple().getOS()) {
4207 case llvm::Triple::NetBSD:
4208 PtrDiffType = SignedLong;
4211 PtrDiffType = SignedInt;
4217 NoAsmVariants =
true;
4220 IsThumb = getTriple().getArchName().startswith(
"thumb");
4225 if (Triple.isOSBinFormatMachO()) {
4228 if (Triple.getEnvironment() == llvm::Triple::EABI ||
4229 Triple.getOS() == llvm::Triple::UnknownOS ||
4230 StringRef(CPU).startswith(
"cortex-m")) {
4235 }
else if (Triple.isOSWindows()) {
4240 switch (Triple.getEnvironment()) {
4241 case llvm::Triple::Android:
4242 case llvm::Triple::GNUEABI:
4243 case llvm::Triple::GNUEABIHF:
4244 setABI(
"aapcs-linux");
4246 case llvm::Triple::EABIHF:
4247 case llvm::Triple::EABI:
4250 case llvm::Triple::GNU:
4254 if (Triple.getOS() == llvm::Triple::NetBSD)
4266 MaxAtomicPromoteWidth = 64;
4267 if (shouldUseInlineAtomic(getTriple()))
4268 MaxAtomicInlineWidth = 64;
4274 UseZeroLengthBitfieldAlignment =
true;
4277 StringRef getABI()
const override {
return ABI; }
4279 bool setABI(
const std::string &Name)
override {
4286 if (Name ==
"apcs-gnu") {
4290 if (Name ==
"aapcs" || Name ==
"aapcs-vfp" || Name ==
"aapcs-linux") {
4298 void getDefaultFeatures(llvm::StringMap<bool> &Features)
const override {
4299 StringRef ArchName = getTriple().getArchName();
4300 unsigned ArchKind = llvm::ARMTargetParser::parseArch(ArchName);
4301 bool IsV8 = (ArchKind == llvm::ARM::AK_ARMV8A ||
4302 ArchKind == llvm::ARM::AK_ARMV8_1A);
4304 if (CPU ==
"arm1136jf-s" || CPU ==
"arm1176jzf-s" || CPU ==
"mpcore")
4305 Features[
"vfp2"] =
true;
4306 else if (CPU ==
"cortex-a8" || CPU ==
"cortex-a9") {
4307 Features[
"vfp3"] =
true;
4308 Features[
"neon"] =
true;
4310 else if (CPU ==
"cortex-a5") {
4311 Features[
"vfp4"] =
true;
4312 Features[
"neon"] =
true;
4313 }
else if (CPU ==
"swift" || CPU ==
"cortex-a7" ||
4314 CPU ==
"cortex-a12" || CPU ==
"cortex-a15" ||
4315 CPU ==
"cortex-a17" || CPU ==
"krait") {
4316 Features[
"vfp4"] =
true;
4317 Features[
"neon"] =
true;
4318 Features[
"hwdiv"] =
true;
4319 Features[
"hwdiv-arm"] =
true;
4320 }
else if (CPU ==
"cyclone" || CPU ==
"cortex-a53" || CPU ==
"cortex-a57" ||
4321 CPU ==
"cortex-a72") {
4322 Features[
"fp-armv8"] =
true;
4323 Features[
"neon"] =
true;
4324 Features[
"hwdiv"] =
true;
4325 Features[
"hwdiv-arm"] =
true;
4326 Features[
"crc"] =
true;
4327 Features[
"crypto"] =
true;
4328 }
else if (CPU ==
"cortex-r5" || CPU ==
"cortex-r7" || IsV8) {
4329 Features[
"hwdiv"] =
true;
4330 Features[
"hwdiv-arm"] =
true;
4331 }
else if (CPU ==
"cortex-m3" || CPU ==
"cortex-m4" || CPU ==
"cortex-m7" ||
4332 CPU ==
"sc300" || CPU ==
"cortex-r4" || CPU ==
"cortex-r4f") {
4333 Features[
"hwdiv"] =
true;
4337 bool handleTargetFeatures(std::vector<std::string> &Features,
4342 SoftFloat = SoftFloatABI =
false;
4347 uint32_t HW_FP_remove = 0;
4348 for (
const auto &Feature : Features) {
4349 if (Feature ==
"+soft-float") {
4351 }
else if (Feature ==
"+soft-float-abi") {
4352 SoftFloatABI =
true;
4353 }
else if (Feature ==
"+vfp2") {
4355 HW_FP |= HW_FP_SP | HW_FP_DP;
4356 }
else if (Feature ==
"+vfp3") {
4358 HW_FP |= HW_FP_SP | HW_FP_DP;
4359 }
else if (Feature ==
"+vfp4") {
4361 HW_FP |= HW_FP_SP | HW_FP_DP | HW_FP_HP;
4362 }
else if (Feature ==
"+fp-armv8") {
4364 HW_FP |= HW_FP_SP | HW_FP_DP | HW_FP_HP;
4365 }
else if (Feature ==
"+neon") {
4367 HW_FP |= HW_FP_SP | HW_FP_DP;
4368 }
else if (Feature ==
"+hwdiv") {
4369 HWDiv |= HWDivThumb;
4370 }
else if (Feature ==
"+hwdiv-arm") {
4372 }
else if (Feature ==
"+crc") {
4374 }
else if (Feature ==
"+crypto") {
4376 }
else if (Feature ==
"+fp-only-sp") {
4377 HW_FP_remove |= HW_FP_DP | HW_FP_HP;
4380 HW_FP &= ~HW_FP_remove;
4382 if (!(FPU & NeonFPU) && FPMath == FP_Neon) {
4383 Diags.
Report(diag::err_target_unsupported_fpmath) <<
"neon";
4387 if (FPMath == FP_Neon)
4388 Features.push_back(
"+neonfp");
4389 else if (FPMath == FP_VFP)
4390 Features.push_back(
"-neonfp");
4394 std::find(Features.begin(), Features.end(),
"+soft-float-abi");
4395 if (Feature != Features.end())
4396 Features.erase(Feature);
4401 bool hasFeature(StringRef Feature)
const override {
4402 return llvm::StringSwitch<bool>(Feature)
4404 .Case(
"softfloat", SoftFloat)
4405 .Case(
"thumb", IsThumb)
4406 .Case(
"neon", (FPU & NeonFPU) && !SoftFloat)
4407 .Case(
"hwdiv", HWDiv & HWDivThumb)
4408 .Case(
"hwdiv-arm", HWDiv & HWDivARM)
4411 const char *getCPUDefineSuffix(StringRef Name)
const {
4412 if(Name ==
"generic") {
4413 auto subarch = getTriple().getSubArch();
4415 case llvm::Triple::SubArchType::ARMSubArch_v8_1a:
4422 unsigned ArchKind = llvm::ARMTargetParser::parseCPUArch(Name);
4423 if (ArchKind == llvm::ARM::AK_INVALID)
4430 return llvm::ARMTargetParser::getCPUAttr(ArchKind);
4431 case llvm::ARM::AK_ARMV6M:
4432 case llvm::ARM::AK_ARMV6SM:
4434 case llvm::ARM::AK_ARMV7:
4435 case llvm::ARM::AK_ARMV7A:
4436 case llvm::ARM::AK_ARMV7S:
4438 case llvm::ARM::AK_ARMV7R:
4440 case llvm::ARM::AK_ARMV7M:
4442 case llvm::ARM::AK_ARMV7EM:
4444 case llvm::ARM::AK_ARMV8A:
4446 case llvm::ARM::AK_ARMV8_1A:
4450 const char *getCPUProfile(StringRef Name)
const {
4451 if(Name ==
"generic") {
4452 auto subarch = getTriple().getSubArch();
4454 case llvm::Triple::SubArchType::ARMSubArch_v8_1a:
4461 unsigned CPUArch = llvm::ARMTargetParser::parseCPUArch(Name);
4462 if (CPUArch == llvm::ARM::AK_INVALID)
4465 StringRef ArchName = llvm::ARMTargetParser::getArchName(CPUArch);
4466 switch(llvm::ARMTargetParser::parseArchProfile(ArchName)) {
4467 case llvm::ARM::PK_A:
4469 case llvm::ARM::PK_R:
4471 case llvm::ARM::PK_M:
4477 bool setCPU(
const std::string &Name)
override {
4478 if (!getCPUDefineSuffix(Name))
4482 StringRef Profile = getCPUProfile(Name);
4483 if (Profile ==
"M" && MaxAtomicInlineWidth) {
4484 MaxAtomicPromoteWidth = 32;
4485 MaxAtomicInlineWidth = 32;
4491 bool setFPMath(StringRef Name)
override;
4492 bool supportsThumb(StringRef ArchName, StringRef CPUArch,
4493 unsigned CPUArchVer)
const {
4494 return CPUArchVer >= 7 || (CPUArch.find(
'T') != StringRef::npos) ||
4495 (CPUArch.find(
'M') != StringRef::npos);
4497 bool supportsThumb2(StringRef ArchName, StringRef CPUArch,
4498 unsigned CPUArchVer)
const {
4501 return ArchName.endswith(
"v6t2") || ArchName.endswith(
"v7") ||
4502 ArchName.endswith(
"v8.1a") ||
4503 ArchName.endswith(
"v8") || CPUArch ==
"6T2" || CPUArchVer >= 7;
4514 StringRef CPUArch = getCPUDefineSuffix(CPU);
4515 unsigned int CPUArchVer;
4516 if (CPUArch.substr(0, 1).getAsInteger<
unsigned int>(10, CPUArchVer))
4517 llvm_unreachable(
"Invalid char for architecture version number");
4518 Builder.
defineMacro(
"__ARM_ARCH_" + CPUArch +
"__");
4521 StringRef CPUProfile = getCPUProfile(CPU);
4522 StringRef ArchName = getTriple().getArchName();
4525 Builder.
defineMacro(
"__ARM_ARCH", CPUArch.substr(0, 1));
4526 if (CPUArch[0] >=
'8') {
4527 Builder.
defineMacro(
"__ARM_FEATURE_NUMERIC_MAXMIN");
4528 Builder.
defineMacro(
"__ARM_FEATURE_DIRECTED_ROUNDING");
4534 if (CPUProfile.empty() || CPUProfile !=
"M")
4540 if (supportsThumb2(ArchName, CPUArch, CPUArchVer))
4542 else if (supportsThumb(ArchName, CPUArch, CPUArchVer))
4552 if (!CPUProfile.empty())
4553 Builder.
defineMacro(
"__ARM_ARCH_PROFILE",
"'" + CPUProfile +
"'");
4557 Builder.
defineMacro(
"__ARM_FP",
"0x" + llvm::utohexstr(HW_FP));
4567 if (5 <= CPUArchVer && CPUArchVer <= 8 && !getTriple().isOSWindows())
4570 if (ABI ==
"aapcs" || ABI ==
"aapcs-linux" || ABI ==
"aapcs-vfp") {
4573 if (!getTriple().isOSDarwin() && !getTriple().isOSWindows())
4577 if ((!SoftFloat && !SoftFloatABI) || ABI ==
"aapcs-vfp")
4584 if (CPU ==
"xscale")
4590 if (supportsThumb2(ArchName, CPUArch, CPUArchVer))
4593 if (((HWDiv & HWDivThumb) && IsThumb) || ((HWDiv & HWDivARM) && !IsThumb))
4594 Builder.
defineMacro(
"__ARM_ARCH_EXT_IDIV__",
"1");
4599 if (FPUModeIsVFP((FPUMode) FPU)) {
4613 if ((FPU & NeonFPU) && !SoftFloat && CPUArchVer >= 7) {
4619 Opts.ShortWChar ?
"2" :
"4");
4622 Opts.ShortEnums ?
"1" :
"4");
4630 if (CPUArchVer >= 6 && CPUArch !=
"6M") {
4631 Builder.
defineMacro(
"__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");
4632 Builder.
defineMacro(
"__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");
4633 Builder.
defineMacro(
"__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4");
4634 Builder.
defineMacro(
"__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8");
4637 bool is5EOrAbove = (CPUArchVer >= 6 ||
4639 CPUArch.find(
'E') != StringRef::npos));
4640 bool is32Bit = (!IsThumb || supportsThumb2(ArchName, CPUArch, CPUArchVer));
4641 if (is5EOrAbove && is32Bit && (CPUProfile !=
"M" || CPUArch ==
"7EM"))
4645 unsigned &NumRecords)
const override {
4649 bool isCLZForZeroUndef()
const override {
return false; }
4650 BuiltinVaListKind getBuiltinVaListKind()
const override {
4653 void getGCCRegNames(
const char *
const *&Names,
4654 unsigned &NumNames)
const override;
4655 void getGCCRegAliases(
const GCCRegAlias *&Aliases,
4656 unsigned &NumAliases)
const override;
4657 bool validateAsmConstraint(
const char *&Name,
4695 std::string convertConstraint(
const char *&Constraint)
const override {
4697 switch (*Constraint) {
4699 R = std::string(
"^") + std::string(Constraint, 2);
4703 R = std::string(
"r");
4706 return std::string(1, *Constraint);
4711 validateConstraintModifier(StringRef Constraint,
char Modifier,
unsigned Size,
4712 std::string &SuggestedModifier)
const override {
4713 bool isOutput = (Constraint[0] ==
'=');
4714 bool isInOut = (Constraint[0] ==
'+');
4717 while (Constraint[0] ==
'=' ||
4718 Constraint[0] ==
'+' ||
4719 Constraint[0] ==
'&')
4720 Constraint = Constraint.substr(1);
4722 switch (Constraint[0]) {
4727 return (isInOut || isOutput || Size <= 64);
4737 const char *getClobbers()
const override {
4742 CallingConvCheckResult checkCallingConvention(
CallingConv CC)
const override {
4746 int getEHDataRegisterNumber(
unsigned RegNo)
const override {
4747 if (RegNo == 0)
return 0;
4748 if (RegNo == 1)
return 1;
4753 bool ARMTargetInfo::setFPMath(StringRef Name) {
4754 if (Name ==
"neon") {
4757 }
else if (Name ==
"vfp" || Name ==
"vfp2" || Name ==
"vfp3" ||
4765 const char *
const ARMTargetInfo::GCCRegNames[] = {
4767 "r0",
"r1",
"r2",
"r3",
"r4",
"r5",
"r6",
"r7",
4768 "r8",
"r9",
"r10",
"r11",
"r12",
"sp",
"lr",
"pc",
4771 "s0",
"s1",
"s2",
"s3",
"s4",
"s5",
"s6",
"s7",
4772 "s8",
"s9",
"s10",
"s11",
"s12",
"s13",
"s14",
"s15",
4773 "s16",
"s17",
"s18",
"s19",
"s20",
"s21",
"s22",
"s23",
4774 "s24",
"s25",
"s26",
"s27",
"s28",
"s29",
"s30",
"s31",
4777 "d0",
"d1",
"d2",
"d3",
"d4",
"d5",
"d6",
"d7",
4778 "d8",
"d9",
"d10",
"d11",
"d12",
"d13",
"d14",
"d15",
4779 "d16",
"d17",
"d18",
"d19",
"d20",
"d21",
"d22",
"d23",
4780 "d24",
"d25",
"d26",
"d27",
"d28",
"d29",
"d30",
"d31",
4783 "q0",
"q1",
"q2",
"q3",
"q4",
"q5",
"q6",
"q7",
4784 "q8",
"q9",
"q10",
"q11",
"q12",
"q13",
"q14",
"q15"
4787 void ARMTargetInfo::getGCCRegNames(
const char *
const *&Names,
4788 unsigned &NumNames)
const {
4789 Names = GCCRegNames;
4790 NumNames = llvm::array_lengthof(GCCRegNames);
4803 { {
"v6",
"rfp" },
"r9" },
4804 { {
"sl" },
"r10" },
4805 { {
"fp" },
"r11" },
4806 { {
"ip" },
"r12" },
4807 { {
"r13" },
"sp" },
4808 { {
"r14" },
"lr" },
4809 { {
"r15" },
"pc" },
4814 void ARMTargetInfo::getGCCRegAliases(
const GCCRegAlias *&Aliases,
4815 unsigned &NumAliases)
const {
4816 Aliases = GCCRegAliases;
4817 NumAliases = llvm::array_lengthof(GCCRegAliases);
4821 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
4822 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
4824 #include "clang/Basic/BuiltinsNEON.def"
4826 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
4827 #define LANGBUILTIN(ID, TYPE, ATTRS, LANG) { #ID, TYPE, ATTRS, 0, LANG },
4828 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
4830 #include "clang/Basic/BuiltinsARM.def"
4833 class ARMleTargetInfo :
public ARMTargetInfo {
4835 ARMleTargetInfo(
const llvm::Triple &Triple)
4836 : ARMTargetInfo(Triple,
false) { }
4840 ARMTargetInfo::getTargetDefines(Opts, Builder);
4844 class ARMbeTargetInfo :
public ARMTargetInfo {
4846 ARMbeTargetInfo(
const llvm::Triple &Triple)
4847 : ARMTargetInfo(Triple,
true) { }
4852 ARMTargetInfo::getTargetDefines(Opts, Builder);
4856 class WindowsARMTargetInfo :
public WindowsTargetInfo<ARMleTargetInfo> {
4857 const llvm::Triple Triple;
4859 WindowsARMTargetInfo(
const llvm::Triple &Triple)
4860 : WindowsTargetInfo<ARMleTargetInfo>(Triple), Triple(Triple) {
4861 TLSSupported =
false;
4862 WCharType = UnsignedShort;
4863 SizeType = UnsignedInt;
4864 UserLabelPrefix =
"";
4866 void getVisualStudioDefines(
const LangOptions &Opts,
4868 WindowsTargetInfo<ARMleTargetInfo>::getVisualStudioDefines(Opts, Builder);
4875 assert((Triple.getArch() == llvm::Triple::arm ||
4876 Triple.getArch() == llvm::Triple::thumb) &&
4877 "invalid architecture for Windows ARM target info");
4878 unsigned Offset = Triple.getArch() == llvm::Triple::arm ? 4 : 6;
4879 Builder.
defineMacro(
"_M_ARM", Triple.getArchName().substr(Offset));
4885 BuiltinVaListKind getBuiltinVaListKind()
const override {
4891 class ItaniumWindowsARMleTargetInfo :
public WindowsARMTargetInfo {
4893 ItaniumWindowsARMleTargetInfo(
const llvm::Triple &Triple)
4894 : WindowsARMTargetInfo(Triple) {
4900 WindowsARMTargetInfo::getTargetDefines(Opts, Builder);
4902 if (Opts.MSVCCompat)
4903 WindowsARMTargetInfo::getVisualStudioDefines(Opts, Builder);
4908 class MicrosoftARMleTargetInfo :
public WindowsARMTargetInfo {
4910 MicrosoftARMleTargetInfo(
const llvm::Triple &Triple)
4911 : WindowsARMTargetInfo(Triple) {
4917 WindowsARMTargetInfo::getTargetDefines(Opts, Builder);
4918 WindowsARMTargetInfo::getVisualStudioDefines(Opts, Builder);
4922 class DarwinARMTargetInfo :
4923 public DarwinTargetInfo<ARMleTargetInfo> {
4925 void getOSDefines(
const LangOptions &Opts,
const llvm::Triple &Triple,
4931 DarwinARMTargetInfo(
const llvm::Triple &Triple)
4932 : DarwinTargetInfo<ARMleTargetInfo>(Triple) {
4933 HasAlignMac68kSupport =
true;
4937 MaxAtomicInlineWidth = 64;
4944 class AArch64TargetInfo :
public TargetInfo {
4945 virtual void setDescriptionString() = 0;
4947 static const char *
const GCCRegNames[];
4963 AArch64TargetInfo(
const llvm::Triple &Triple)
4966 if (getTriple().getOS() == llvm::Triple::NetBSD) {
4967 WCharType = SignedInt;
4971 Int64Type = SignedLongLong;
4972 IntMaxType = SignedLongLong;
4974 WCharType = UnsignedInt;
4975 Int64Type = SignedLong;
4976 IntMaxType = SignedLong;
4979 LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
4980 MaxVectorAlign = 128;
4981 MaxAtomicInlineWidth = 128;
4982 MaxAtomicPromoteWidth = 128;
4984 LongDoubleWidth = LongDoubleAlign = SuitableAlign = 128;
4985 LongDoubleFormat = &llvm::APFloat::IEEEquad;
4989 NoAsmVariants =
true;
4995 UseBitFieldTypeAlignment =
true;
4996 UseZeroLengthBitfieldAlignment =
true;
5002 StringRef getABI()
const override {
return ABI; }
5003 bool setABI(
const std::string &Name)
override {
5004 if (Name !=
"aapcs" && Name !=
"darwinpcs")
5011 bool setCPU(
const std::string &Name)
override {
5012 bool CPUKnown = llvm::StringSwitch<bool>(Name)
5013 .Case(
"generic",
true)
5014 .Cases(
"cortex-a53",
"cortex-a57",
"cortex-a72",
true)
5015 .Case(
"cyclone",
true)
5044 Builder.
defineMacro(
"__ARM_FEATURE_NUMERIC_MAXMIN");
5045 Builder.
defineMacro(
"__ARM_FEATURE_DIRECTED_ROUNDING");
5047 Builder.
defineMacro(
"__ARM_ALIGN_MAX_STACK_PWR",
"4");
5056 if (Opts.FastMath || Opts.FiniteMathOnly)
5059 if (Opts.C99 && !Opts.Freestanding)
5062 Builder.
defineMacro(
"__ARM_SIZEOF_WCHAR_T", Opts.ShortWChar ?
"2" :
"4");
5065 Opts.ShortEnums ?
"1" :
"4");
5067 if (FPU == NeonMode) {
5080 Builder.
defineMacro(
"__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");
5081 Builder.
defineMacro(
"__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");
5082 Builder.
defineMacro(
"__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4");
5083 Builder.
defineMacro(
"__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8");
5087 unsigned &NumRecords)
const override {
5092 bool hasFeature(StringRef Feature)
const override {
5093 return Feature ==
"aarch64" ||
5094 Feature ==
"arm64" ||
5095 (Feature ==
"neon" && FPU == NeonMode);
5098 bool handleTargetFeatures(std::vector<std::string> &Features,
5103 for (
unsigned i = 0, e = Features.size(); i != e; ++i) {
5104 if (Features[i] ==
"+neon")
5106 if (Features[i] ==
"+crc")
5108 if (Features[i] ==
"+crypto")
5112 setDescriptionString();
5117 bool isCLZForZeroUndef()
const override {
return false; }
5119 BuiltinVaListKind getBuiltinVaListKind()
const override {
5123 void getGCCRegNames(
const char *
const *&Names,
5124 unsigned &NumNames)
const override;
5125 void getGCCRegAliases(
const GCCRegAlias *&Aliases,
5126 unsigned &NumAliases)
const override;
5128 bool validateAsmConstraint(
const char *&Name,
5156 llvm_unreachable(
"FIXME: Unimplemented support for U* constraints.");
5168 validateConstraintModifier(StringRef Constraint,
char Modifier,
unsigned Size,
5169 std::string &SuggestedModifier)
const override {
5171 while (Constraint[0] ==
'=' || Constraint[0] ==
'+' || Constraint[0] ==
'&')
5172 Constraint = Constraint.substr(1);
5174 switch (Constraint[0]) {
5191 SuggestedModifier =
"w";
5198 const char *getClobbers()
const override {
return ""; }
5200 int getEHDataRegisterNumber(
unsigned RegNo)
const override {
5209 const char *
const AArch64TargetInfo::GCCRegNames[] = {
5211 "w0",
"w1",
"w2",
"w3",
"w4",
"w5",
"w6",
"w7",
"w8",
"w9",
"w10",
5212 "w11",
"w12",
"w13",
"w14",
"w15",
"w16",
"w17",
"w18",
"w19",
"w20",
"w21",
5213 "w22",
"w23",
"w24",
"w25",
"w26",
"w27",
"w28",
"w29",
"w30",
"wsp",
5216 "x0",
"x1",
"x2",
"x3",
"x4",
"x5",
"x6",
"x7",
"x8",
"x9",
"x10",
5217 "x11",
"x12",
"x13",
"x14",
"x15",
"x16",
"x17",
"x18",
"x19",
"x20",
"x21",
5218 "x22",
"x23",
"x24",
"x25",
"x26",
"x27",
"x28",
"fp",
"lr",
"sp",
5221 "s0",
"s1",
"s2",
"s3",
"s4",
"s5",
"s6",
"s7",
"s8",
"s9",
"s10",
5222 "s11",
"s12",
"s13",
"s14",
"s15",
"s16",
"s17",
"s18",
"s19",
"s20",
"s21",
5223 "s22",
"s23",
"s24",
"s25",
"s26",
"s27",
"s28",
"s29",
"s30",
"s31",
5226 "d0",
"d1",
"d2",
"d3",
"d4",
"d5",
"d6",
"d7",
"d8",
"d9",
"d10",
5227 "d11",
"d12",
"d13",
"d14",
"d15",
"d16",
"d17",
"d18",
"d19",
"d20",
"d21",
5228 "d22",
"d23",
"d24",
"d25",
"d26",
"d27",
"d28",
"d29",
"d30",
"d31",
5231 "v0",
"v1",
"v2",
"v3",
"v4",
"v5",
"v6",
"v7",
"v8",
"v9",
"v10",
5232 "v11",
"v12",
"v13",
"v14",
"v15",
"v16",
"v17",
"v18",
"v19",
"v20",
"v21",
5233 "v22",
"v23",
"v24",
"v25",
"v26",
"v27",
"v28",
"v29",
"v30",
"v31"
5236 void AArch64TargetInfo::getGCCRegNames(
const char *
const *&Names,
5237 unsigned &NumNames)
const {
5238 Names = GCCRegNames;
5239 NumNames = llvm::array_lengthof(GCCRegNames);
5243 { {
"w31" },
"wsp" },
5244 { {
"x29" },
"fp" },
5245 { {
"x30" },
"lr" },
5246 { {
"x31" },
"sp" },
5251 void AArch64TargetInfo::getGCCRegAliases(
const GCCRegAlias *&Aliases,
5252 unsigned &NumAliases)
const {
5253 Aliases = GCCRegAliases;
5254 NumAliases = llvm::array_lengthof(GCCRegAliases);
5258 #define BUILTIN(ID, TYPE, ATTRS) \
5259 { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
5260 #include "clang/Basic/BuiltinsNEON.def"
5262 #define BUILTIN(ID, TYPE, ATTRS) \
5263 { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
5264 #include "clang/Basic/BuiltinsAArch64.def"
5267 class AArch64leTargetInfo :
public AArch64TargetInfo {
5268 void setDescriptionString()
override {
5269 if (getTriple().isOSBinFormatMachO())
5270 DescriptionString =
"e-m:o-i64:64-i128:128-n32:64-S128";
5272 DescriptionString =
"e-m:e-i64:64-i128:128-n32:64-S128";
5276 AArch64leTargetInfo(
const llvm::Triple &Triple)
5277 : AArch64TargetInfo(Triple) {
5283 AArch64TargetInfo::getTargetDefines(Opts, Builder);
5287 class AArch64beTargetInfo :
public AArch64TargetInfo {
5288 void setDescriptionString()
override {
5289 assert(!getTriple().isOSBinFormatMachO());
5290 DescriptionString =
"E-m:e-i64:64-i128:128-n32:64-S128";
5294 AArch64beTargetInfo(
const llvm::Triple &Triple)
5295 : AArch64TargetInfo(Triple) { }
5301 AArch64TargetInfo::getTargetDefines(Opts, Builder);
5305 class DarwinAArch64TargetInfo :
public DarwinTargetInfo<AArch64leTargetInfo> {
5307 void getOSDefines(
const LangOptions &Opts,
const llvm::Triple &Triple,
5321 DarwinAArch64TargetInfo(
const llvm::Triple &Triple)
5322 : DarwinTargetInfo<AArch64leTargetInfo>(Triple) {
5323 Int64Type = SignedLongLong;
5324 WCharType = SignedInt;
5325 UseSignedCharForObjCBool =
false;
5327 LongDoubleWidth = LongDoubleAlign = SuitableAlign = 64;
5328 LongDoubleFormat = &llvm::APFloat::IEEEdouble;
5333 BuiltinVaListKind getBuiltinVaListKind()
const override {
5339 class HexagonTargetInfo :
public TargetInfo {
5341 static const char *
const GCCRegNames[];
5345 HexagonTargetInfo(
const llvm::Triple &Triple) :
TargetInfo(Triple) {
5347 DescriptionString =
"e-m:e-p:32:32-i1:32-i64:64-a:0-n32";
5351 NoAsmVariants =
true;
5355 unsigned &NumRecords)
const override {
5360 bool validateAsmConstraint(
const char *&Name,
5368 bool hasFeature(StringRef Feature)
const override {
5369 return Feature ==
"hexagon";
5372 BuiltinVaListKind getBuiltinVaListKind()
const override {
5375 void getGCCRegNames(
const char *
const *&Names,
5376 unsigned &NumNames)
const override;
5377 void getGCCRegAliases(
const GCCRegAlias *&Aliases,
5378 unsigned &NumAliases)
const override;
5379 const char *getClobbers()
const override {
5383 static const char *getHexagonCPUSuffix(StringRef Name) {
5384 return llvm::StringSwitch<const char*>(Name)
5385 .Case(
"hexagonv4",
"4")
5386 .Case(
"hexagonv5",
"5")
5390 bool setCPU(
const std::string &Name)
override {
5391 if (!getHexagonCPUSuffix(Name))
5399 void HexagonTargetInfo::getTargetDefines(
const LangOptions &Opts,
5409 if(CPU ==
"hexagonv1") {
5412 if(Opts.HexagonQdsp6Compat) {
5417 else if(CPU ==
"hexagonv2") {
5420 if(Opts.HexagonQdsp6Compat) {
5425 else if(CPU ==
"hexagonv3") {
5428 if(Opts.HexagonQdsp6Compat) {
5433 else if(CPU ==
"hexagonv4") {
5436 if(Opts.HexagonQdsp6Compat) {
5441 else if(CPU ==
"hexagonv5") {
5444 if(Opts.HexagonQdsp6Compat) {
5451 const char *
const HexagonTargetInfo::GCCRegNames[] = {
5452 "r0",
"r1",
"r2",
"r3",
"r4",
"r5",
"r6",
"r7",
5453 "r8",
"r9",
"r10",
"r11",
"r12",
"r13",
"r14",
"r15",
5454 "r16",
"r17",
"r18",
"r19",
"r20",
"r21",
"r22",
"r23",
5455 "r24",
"r25",
"r26",
"r27",
"r28",
"r29",
"r30",
"r31",
5456 "p0",
"p1",
"p2",
"p3",
5457 "sa0",
"lc0",
"sa1",
"lc1",
"m0",
"m1",
"usr",
"ugp"
5460 void HexagonTargetInfo::getGCCRegNames(
const char *
const *&Names,
5461 unsigned &NumNames)
const {
5462 Names = GCCRegNames;
5463 NumNames = llvm::array_lengthof(GCCRegNames);
5468 { {
"sp" },
"r29" },
5469 { {
"fp" },
"r30" },
5470 { {
"lr" },
"r31" },
5473 void HexagonTargetInfo::getGCCRegAliases(
const GCCRegAlias *&Aliases,
5474 unsigned &NumAliases)
const {
5475 Aliases = GCCRegAliases;
5476 NumAliases = llvm::array_lengthof(GCCRegAliases);
5481 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
5482 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
5484 #include "clang/Basic/BuiltinsHexagon.def"
5490 static const char *
const GCCRegNames[];
5493 SparcTargetInfo(
const llvm::Triple &Triple)
5496 bool handleTargetFeatures(std::vector<std::string> &Features,
5500 auto Feature = std::find(Features.begin(), Features.end(),
"+soft-float");
5501 if (Feature != Features.end()) {
5503 Features.erase(Feature);
5516 bool hasFeature(StringRef Feature)
const override {
5517 return llvm::StringSwitch<bool>(Feature)
5518 .Case(
"softfloat", SoftFloat)
5519 .Case(
"sparc",
true)
5524 unsigned &NumRecords)
const override {
5527 BuiltinVaListKind getBuiltinVaListKind()
const override {
5530 void getGCCRegNames(
const char *
const *&Names,
5531 unsigned &NumNames)
const override;
5532 void getGCCRegAliases(
const GCCRegAlias *&Aliases,
5533 unsigned &NumAliases)
const override;
5534 bool validateAsmConstraint(
const char *&Name,
5549 const char *getClobbers()
const override {
5555 const char *
const SparcTargetInfo::GCCRegNames[] = {
5556 "r0",
"r1",
"r2",
"r3",
"r4",
"r5",
"r6",
"r7",
5557 "r8",
"r9",
"r10",
"r11",
"r12",
"r13",
"r14",
"r15",
5558 "r16",
"r17",
"r18",
"r19",
"r20",
"r21",
"r22",
"r23",
5559 "r24",
"r25",
"r26",
"r27",
"r28",
"r29",
"r30",
"r31"
5562 void SparcTargetInfo::getGCCRegNames(
const char *
const *&Names,
5563 unsigned &NumNames)
const {
5564 Names = GCCRegNames;
5565 NumNames = llvm::array_lengthof(GCCRegNames);
5579 { {
"o2" },
"r10" },
5580 { {
"o3" },
"r11" },
5581 { {
"o4" },
"r12" },
5582 { {
"o5" },
"r13" },
5583 { {
"o6",
"sp" },
"r14" },
5584 { {
"o7" },
"r15" },
5585 { {
"l0" },
"r16" },
5586 { {
"l1" },
"r17" },
5587 { {
"l2" },
"r18" },
5588 { {
"l3" },
"r19" },
5589 { {
"l4" },
"r20" },
5590 { {
"l5" },
"r21" },
5591 { {
"l6" },
"r22" },
5592 { {
"l7" },
"r23" },
5593 { {
"i0" },
"r24" },
5594 { {
"i1" },
"r25" },
5595 { {
"i2" },
"r26" },
5596 { {
"i3" },
"r27" },
5597 { {
"i4" },
"r28" },
5598 { {
"i5" },
"r29" },
5599 { {
"i6",
"fp" },
"r30" },
5600 { {
"i7" },
"r31" },
5603 void SparcTargetInfo::getGCCRegAliases(
const GCCRegAlias *&Aliases,
5604 unsigned &NumAliases)
const {
5605 Aliases = GCCRegAliases;
5606 NumAliases = llvm::array_lengthof(GCCRegAliases);
5610 class SparcV8TargetInfo :
public SparcTargetInfo {
5612 SparcV8TargetInfo(
const llvm::Triple &Triple) : SparcTargetInfo(Triple) {
5613 DescriptionString =
"E-m:e-p:32:32-i64:64-f128:64-n32-S64";
5615 if (getTriple().getOS() == llvm::Triple::NetBSD) {
5616 SizeType = UnsignedLong;
5617 IntPtrType = SignedLong;
5618 PtrDiffType = SignedLong;
5620 SizeType = UnsignedInt;
5621 IntPtrType = SignedInt;
5622 PtrDiffType = SignedInt;
5628 SparcTargetInfo::getTargetDefines(Opts, Builder);
5634 class SparcV8elTargetInfo :
public SparcV8TargetInfo {
5636 SparcV8elTargetInfo(
const llvm::Triple &Triple) : SparcV8TargetInfo(Triple) {
5637 DescriptionString =
"e-m:e-p:32:32-i64:64-f128:64-n32-S64";
5643 class SparcV9TargetInfo :
public SparcTargetInfo {
5645 SparcV9TargetInfo(
const llvm::Triple &Triple) : SparcTargetInfo(Triple) {
5647 DescriptionString =
"E-m:e-i64:64-n32:64-S128";
5649 LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
5652 if (getTriple().getOS() == llvm::Triple::OpenBSD)
5653 IntMaxType = SignedLongLong;
5655 IntMaxType = SignedLong;
5656 Int64Type = IntMaxType;
5660 LongDoubleWidth = 128;
5661 LongDoubleAlign = 128;
5662 LongDoubleFormat = &llvm::APFloat::IEEEquad;
5663 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
5668 SparcTargetInfo::getTargetDefines(Opts, Builder);
5672 if (getTriple().getOS() != llvm::Triple::Solaris) {
5679 bool setCPU(
const std::string &Name)
override {
5680 bool CPUKnown = llvm::StringSwitch<bool>(Name)
5682 .Case(
"ultrasparc",
true)
5683 .Case(
"ultrasparc3",
true)
5684 .Case(
"niagara",
true)
5685 .Case(
"niagara2",
true)
5686 .Case(
"niagara3",
true)
5687 .Case(
"niagara4",
true)
5696 class SystemZTargetInfo :
public TargetInfo {
5698 static const char *
const GCCRegNames[];
5700 bool HasTransactionalExecution;
5704 SystemZTargetInfo(
const llvm::Triple &Triple)
5706 IntMaxType = SignedLong;
5707 Int64Type = SignedLong;
5708 TLSSupported =
true;
5709 IntWidth = IntAlign = 32;
5710 LongWidth = LongLongWidth = LongAlign = LongLongAlign = 64;
5711 PointerWidth = PointerAlign = 64;
5712 LongDoubleWidth = 128;
5713 LongDoubleAlign = 64;
5714 LongDoubleFormat = &llvm::APFloat::IEEEquad;
5715 DefaultAlignForAttributeAligned = 64;
5716 MinGlobalAlign = 16;
5717 DescriptionString =
"E-m:e-i1:8:16-i8:8:16-i64:64-f128:64-a:8:16-n32:64";
5718 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
5726 if (HasTransactionalExecution)
5732 unsigned &NumRecords)
const override {
5737 void getGCCRegNames(
const char *
const *&Names,
5738 unsigned &NumNames)
const override;
5739 void getGCCRegAliases(
const GCCRegAlias *&Aliases,
5740 unsigned &NumAliases)
const override {
5745 bool validateAsmConstraint(
const char *&Name,
5747 const char *getClobbers()
const override {
5751 BuiltinVaListKind getBuiltinVaListKind()
const override {
5754 bool setCPU(
const std::string &Name)
override {
5756 bool CPUKnown = llvm::StringSwitch<bool>(Name)
5759 .Case(
"zEC12",
true)
5765 void getDefaultFeatures(llvm::StringMap<bool> &Features)
const override {
5767 Features[
"transactional-execution"] =
true;
5769 Features[
"transactional-execution"] =
true;
5770 Features[
"vector"] =
true;
5774 bool handleTargetFeatures(std::vector<std::string> &Features,
5776 HasTransactionalExecution =
false;
5777 for (
unsigned i = 0, e = Features.size(); i != e; ++i) {
5778 if (Features[i] ==
"+transactional-execution")
5779 HasTransactionalExecution =
true;
5780 if (Features[i] ==
"+vector")
5785 MaxVectorAlign = 64;
5786 DescriptionString =
"E-m:e-i1:8:16-i8:8:16-i64:64-f128:64"
5787 "-v128:64-a:8:16-n32:64";
5792 bool hasFeature(StringRef Feature)
const override {
5793 return llvm::StringSwitch<bool>(Feature)
5794 .Case(
"systemz",
true)
5795 .Case(
"htm", HasTransactionalExecution)
5796 .Case(
"vx", HasVector)
5800 StringRef getABI()
const override {
5806 bool useFloat128ManglingForLongDouble()
const override {
5812 #define BUILTIN(ID, TYPE, ATTRS) \
5813 { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
5814 #include "clang/Basic/BuiltinsSystemZ.def"
5817 const char *
const SystemZTargetInfo::GCCRegNames[] = {
5818 "r0",
"r1",
"r2",
"r3",
"r4",
"r5",
"r6",
"r7",
5819 "r8",
"r9",
"r10",
"r11",
"r12",
"r13",
"r14",
"r15",
5820 "f0",
"f2",
"f4",
"f6",
"f1",
"f3",
"f5",
"f7",
5821 "f8",
"f10",
"f12",
"f14",
"f9",
"f11",
"f13",
"f15"
5824 void SystemZTargetInfo::getGCCRegNames(
const char *
const *&Names,
5825 unsigned &NumNames)
const {
5826 Names = GCCRegNames;
5827 NumNames = llvm::array_lengthof(GCCRegNames);
5830 bool SystemZTargetInfo::
5831 validateAsmConstraint(
const char *&Name,
5860 static const char *
const GCCRegNames[];
5862 MSP430TargetInfo(
const llvm::Triple &Triple) :
TargetInfo(Triple) {
5864 TLSSupported =
false;
5865 IntWidth = 16; IntAlign = 16;
5866 LongWidth = 32; LongLongWidth = 64;
5867 LongAlign = LongLongAlign = 16;
5868 PointerWidth = 16; PointerAlign = 16;
5870 SizeType = UnsignedInt;
5871 IntMaxType = SignedLongLong;
5872 IntPtrType = SignedInt;
5873 PtrDiffType = SignedInt;
5874 SigAtomicType = SignedLong;
5875 DescriptionString =
"e-m:e-p:16:16-i32:16:32-a:16-n8:16";
5884 unsigned &NumRecords)
const override {
5889 bool hasFeature(StringRef Feature)
const override {
5890 return Feature ==
"msp430";
5892 void getGCCRegNames(
const char *
const *&Names,
5893 unsigned &NumNames)
const override;
5894 void getGCCRegAliases(
const GCCRegAlias *&Aliases,
5895 unsigned &NumAliases)
const override {
5901 validateAsmConstraint(
const char *&Name,
5913 const char *getClobbers()
const override {
5917 BuiltinVaListKind getBuiltinVaListKind()
const override {
5923 const char *
const MSP430TargetInfo::GCCRegNames[] = {
5924 "r0",
"r1",
"r2",
"r3",
"r4",
"r5",
"r6",
"r7",
5925 "r8",
"r9",
"r10",
"r11",
"r12",
"r13",
"r14",
"r15"
5928 void MSP430TargetInfo::getGCCRegNames(
const char *
const *&Names,
5929 unsigned &NumNames)
const {
5930 Names = GCCRegNames;
5931 NumNames = llvm::array_lengthof(GCCRegNames);
5942 static const unsigned TCEOpenCLAddrSpaceMap[] = {
5955 TCETargetInfo(
const llvm::Triple &Triple) :
TargetInfo(Triple) {
5956 TLSSupported =
false;
5958 LongWidth = LongLongWidth = 32;
5961 LongAlign = LongLongAlign = 32;
5964 SizeType = UnsignedInt;
5965 IntMaxType = SignedLong;
5966 IntPtrType = SignedInt;
5967 PtrDiffType = SignedInt;
5972 LongDoubleWidth = 32;
5973 LongDoubleAlign = 32;
5974 FloatFormat = &llvm::APFloat::IEEEsingle;
5975 DoubleFormat = &llvm::APFloat::IEEEsingle;
5976 LongDoubleFormat = &llvm::APFloat::IEEEsingle;
5977 DescriptionString =
"E-p:32:32-i8:8:32-i16:16:32-i64:32"
5978 "-f64:32-v64:32-v128:32-a:0:32-n32";
5979 AddrSpaceMap = &TCEOpenCLAddrSpaceMap;
5980 UseAddrSpaceMapMangling =
true;
5989 bool hasFeature(StringRef Feature)
const override {
5990 return Feature ==
"tce";
5994 unsigned &NumRecords)
const override {}
5995 const char *getClobbers()
const override {
5998 BuiltinVaListKind getBuiltinVaListKind()
const override {
6001 void getGCCRegNames(
const char *
const *&Names,
6002 unsigned &NumNames)
const override {}
6003 bool validateAsmConstraint(
const char *&Name,
6007 void getGCCRegAliases(
const GCCRegAlias *&Aliases,
6008 unsigned &NumAliases)
const override {}
6013 BPFTargetInfo(
const llvm::Triple &Triple) :
TargetInfo(Triple) {
6014 LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
6015 SizeType = UnsignedLong;
6016 PtrDiffType = SignedLong;
6017 IntPtrType = SignedLong;
6018 IntMaxType = SignedLong;
6019 Int64Type = SignedLong;
6021 if (Triple.getArch() == llvm::Triple::bpfeb) {
6023 DescriptionString =
"E-m:e-p:64:64-i64:64-n32:64-S128";
6026 DescriptionString =
"e-m:e-p:64:64-i64:64-n32:64-S128";
6028 MaxAtomicPromoteWidth = 64;
6029 MaxAtomicInlineWidth = 64;
6030 TLSSupported =
false;
6037 bool hasFeature(StringRef Feature)
const override {
6038 return Feature ==
"bpf";
6042 unsigned &NumRecords)
const override {}
6043 const char *getClobbers()
const override {
6046 BuiltinVaListKind getBuiltinVaListKind()
const override {
6049 void getGCCRegNames(
const char *
const *&Names,
6050 unsigned &NumNames)
const override {
6054 bool validateAsmConstraint(
const char *&Name,
6058 void getGCCRegAliases(
const GCCRegAlias *&Aliases,
6059 unsigned &NumAliases)
const override {
6065 class MipsTargetInfoBase :
public TargetInfo {
6066 virtual void setDescriptionString() = 0;
6075 HardFloat, SoftFloat
6087 MipsTargetInfoBase(
const llvm::Triple &Triple,
const std::string &ABIStr,
6088 const std::string &CPUStr)
6090 IsNan2008(
false), IsSingleFloat(
false), FloatABI(HardFloat),
6091 DspRev(NoDSP), HasMSA(
false), HasFP64(
false), ABI(ABIStr) {
6095 bool isNaN2008Default()
const {
6096 return CPU ==
"mips32r6" || CPU ==
"mips64r6";
6099 bool isFP64Default()
const {
6100 return CPU ==
"mips32r6" || ABI ==
"n32" || ABI ==
"n64" || ABI ==
"64";
6103 bool isNan2008()
const override {
6107 StringRef getABI()
const override {
return ABI; }
6108 bool setCPU(
const std::string &Name)
override {
6109 bool IsMips32 = getTriple().getArch() == llvm::Triple::mips ||
6110 getTriple().getArch() == llvm::Triple::mipsel;
6112 return llvm::StringSwitch<bool>(Name)
6113 .Case(
"mips1", IsMips32)
6114 .Case(
"mips2", IsMips32)
6115 .Case(
"mips3",
true)
6116 .Case(
"mips4",
true)
6117 .Case(
"mips5",
true)
6118 .Case(
"mips32", IsMips32)
6119 .Case(
"mips32r2", IsMips32)
6120 .Case(
"mips32r3", IsMips32)
6121 .Case(
"mips32r5", IsMips32)
6122 .Case(
"mips32r6", IsMips32)
6123 .Case(
"mips64",
true)
6124 .Case(
"mips64r2",
true)
6125 .Case(
"mips64r3",
true)
6126 .Case(
"mips64r5",
true)
6127 .Case(
"mips64r6",
true)
6128 .Case(
"octeon",
true)
6131 const std::string& getCPU()
const {
return CPU; }
6132 void getDefaultFeatures(llvm::StringMap<bool> &Features)
const override {
6133 if (CPU ==
"octeon")
6134 Features[
"mips64r2"] = Features[
"cnmips"] =
true;
6136 Features[CPU] =
true;
6150 Builder.
defineMacro(
"__mips_hard_float", Twine(1));
6153 Builder.
defineMacro(
"__mips_soft_float", Twine(1));
6158 Builder.
defineMacro(
"__mips_single_float", Twine(1));
6160 Builder.
defineMacro(
"__mips_fpr", HasFP64 ? Twine(64) : Twine(32));
6162 Twine(32 / (HasFP64 || IsSingleFloat ? 1 : 2)));
6168 Builder.
defineMacro(
"__mips_micromips", Twine(1));
6190 Builder.
defineMacro(
"_MIPS_SZPTR", Twine(getPointerWidth(0)));
6191 Builder.
defineMacro(
"_MIPS_SZINT", Twine(getIntWidth()));
6192 Builder.
defineMacro(
"_MIPS_SZLONG", Twine(getLongWidth()));
6194 Builder.
defineMacro(
"_MIPS_ARCH",
"\"" + CPU +
"\"");
6195 Builder.
defineMacro(
"_MIPS_ARCH_" + StringRef(CPU).upper());
6199 unsigned &NumRecords)
const override {
6203 bool hasFeature(StringRef Feature)
const override {
6204 return llvm::StringSwitch<bool>(Feature)
6206 .Case(
"fp64", HasFP64)
6209 BuiltinVaListKind getBuiltinVaListKind()
const override {
6212 void getGCCRegNames(
const char *
const *&Names,
6213 unsigned &NumNames)
const override {
6214 static const char *
const GCCRegNames[] = {
6217 "$0",
"$1",
"$2",
"$3",
"$4",
"$5",
"$6",
"$7",
6218 "$8",
"$9",
"$10",
"$11",
"$12",
"$13",
"$14",
"$15",
6219 "$16",
"$17",
"$18",
"$19",
"$20",
"$21",
"$22",
"$23",
6220 "$24",
"$25",
"$26",
"$27",
"$28",
"$29",
"$30",
"$31",
6222 "$f0",
"$f1",
"$f2",
"$f3",
"$f4",
"$f5",
"$f6",
"$f7",
6223 "$f8",
"$f9",
"$f10",
"$f11",
"$f12",
"$f13",
"$f14",
"$f15",
6224 "$f16",
"$f17",
"$f18",
"$f19",
"$f20",
"$f21",
"$f22",
"$f23",
6225 "$f24",
"$f25",
"$f26",
"$f27",
"$f28",
"$f29",
"$f30",
"$f31",
6227 "hi",
"lo",
"",
"$fcc0",
"$fcc1",
"$fcc2",
"$fcc3",
"$fcc4",
6228 "$fcc5",
"$fcc6",
"$fcc7",
6230 "$w0",
"$w1",
"$w2",
"$w3",
"$w4",
"$w5",
"$w6",
"$w7",
6231 "$w8",
"$w9",
"$w10",
"$w11",
"$w12",
"$w13",
"$w14",
"$w15",
6232 "$w16",
"$w17",
"$w18",
"$w19",
"$w20",
"$w21",
"$w22",
"$w23",
6233 "$w24",
"$w25",
"$w26",
"$w27",
"$w28",
"$w29",
"$w30",
"$w31",
6235 "$msair",
"$msacsr",
"$msaaccess",
"$msasave",
"$msamodify",
6236 "$msarequest",
"$msamap",
"$msaunmap"
6238 Names = GCCRegNames;
6239 NumNames = llvm::array_lengthof(GCCRegNames);
6241 void getGCCRegAliases(
const GCCRegAlias *&Aliases,
6242 unsigned &NumAliases)
const override = 0;
6243 bool validateAsmConstraint(
const char *&Name,
6270 if (Name[1] ==
'C') {
6279 std::string convertConstraint(
const char *&Constraint)
const override {
6281 switch (*Constraint) {
6283 if (Constraint[1] ==
'C') {
6284 R = std::string(
"^") + std::string(Constraint, 2);
6293 const char *getClobbers()
const override {
6318 bool handleTargetFeatures(std::vector<std::string> &Features,
6321 IsMicromips =
false;
6322 IsNan2008 = isNaN2008Default();
6323 IsSingleFloat =
false;
6324 FloatABI = HardFloat;
6326 HasFP64 = isFP64Default();
6328 for (std::vector<std::string>::iterator it = Features.begin(),
6329 ie = Features.end(); it != ie; ++it) {
6330 if (*it ==
"+single-float")
6331 IsSingleFloat =
true;
6332 else if (*it ==
"+soft-float")
6333 FloatABI = SoftFloat;
6334 else if (*it ==
"+mips16")
6336 else if (*it ==
"+micromips")
6338 else if (*it ==
"+dsp")
6339 DspRev = std::max(DspRev, DSP1);
6340 else if (*it ==
"+dspr2")
6341 DspRev = std::max(DspRev, DSP2);
6342 else if (*it ==
"+msa")
6344 else if (*it ==
"+fp64")
6346 else if (*it ==
"-fp64")
6348 else if (*it ==
"+nan2008")
6350 else if (*it ==
"-nan2008")
6354 setDescriptionString();
6359 int getEHDataRegisterNumber(
unsigned RegNo)
const override {
6360 if (RegNo == 0)
return 4;
6361 if (RegNo == 1)
return 5;
6365 bool isCLZForZeroUndef()
const override {
return false; }
6369 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
6370 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
6372 #include "clang/Basic/BuiltinsMips.def"
6375 class Mips32TargetInfoBase :
public MipsTargetInfoBase {
6377 Mips32TargetInfoBase(
const llvm::Triple &Triple)
6378 : MipsTargetInfoBase(Triple,
"o32",
"mips32r2") {
6379 SizeType = UnsignedInt;
6380 PtrDiffType = SignedInt;
6381 Int64Type = SignedLongLong;
6382 IntMaxType = Int64Type;
6383 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 32;
6385 bool setABI(
const std::string &Name)
override {
6386 if (Name ==
"o32" || Name ==
"eabi") {
6394 MipsTargetInfoBase::getTargetDefines(Opts, Builder);
6397 Builder.
defineMacro(
"_MIPS_ISA",
"_MIPS_ISA_MIPS32");
6399 const std::string& CPUStr = getCPU();
6400 if (CPUStr ==
"mips32")
6402 else if (CPUStr ==
"mips32r2")
6404 else if (CPUStr ==
"mips32r3")
6406 else if (CPUStr ==
"mips32r5")
6408 else if (CPUStr ==
"mips32r6")
6416 else if (ABI ==
"eabi")
6419 llvm_unreachable(
"Invalid ABI for Mips32.");
6421 void getGCCRegAliases(
const GCCRegAlias *&Aliases,
6422 unsigned &NumAliases)
const override {
6433 { {
"t2" },
"$10" },
6434 { {
"t3" },
"$11" },
6435 { {
"t4" },
"$12" },
6436 { {
"t5" },
"$13" },
6437 { {
"t6" },
"$14" },
6438 { {
"t7" },
"$15" },
6439 { {
"s0" },
"$16" },
6440 { {
"s1" },
"$17" },
6441 { {
"s2" },
"$18" },
6442 { {
"s3" },
"$19" },
6443 { {
"s4" },
"$20" },
6444 { {
"s5" },
"$21" },
6445 { {
"s6" },
"$22" },
6446 { {
"s7" },
"$23" },
6447 { {
"t8" },
"$24" },
6448 { {
"t9" },
"$25" },
6449 { {
"k0" },
"$26" },
6450 { {
"k1" },
"$27" },
6451 { {
"gp" },
"$28" },
6452 { {
"sp",
"$sp" },
"$29" },
6453 { {
"fp",
"$fp" },
"$30" },
6456 Aliases = GCCRegAliases;
6457 NumAliases = llvm::array_lengthof(GCCRegAliases);
6461 class Mips32EBTargetInfo :
public Mips32TargetInfoBase {
6462 void setDescriptionString()
override {
6463 DescriptionString =
"E-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64";
6467 Mips32EBTargetInfo(
const llvm::Triple &Triple)
6468 : Mips32TargetInfoBase(Triple) {
6474 Mips32TargetInfoBase::getTargetDefines(Opts, Builder);
6478 class Mips32ELTargetInfo :
public Mips32TargetInfoBase {
6479 void setDescriptionString()
override {
6480 DescriptionString =
"e-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64";
6484 Mips32ELTargetInfo(
const llvm::Triple &Triple)
6485 : Mips32TargetInfoBase(Triple) {
6492 Mips32TargetInfoBase::getTargetDefines(Opts, Builder);
6496 class Mips64TargetInfoBase :
public MipsTargetInfoBase {
6498 Mips64TargetInfoBase(
const llvm::Triple &Triple)
6499 : MipsTargetInfoBase(Triple,
"n64",
"mips64r2") {
6500 LongDoubleWidth = LongDoubleAlign = 128;
6501 LongDoubleFormat = &llvm::APFloat::IEEEquad;
6502 if (getTriple().getOS() == llvm::Triple::FreeBSD) {
6503 LongDoubleWidth = LongDoubleAlign = 64;
6504 LongDoubleFormat = &llvm::APFloat::IEEEdouble;
6507 SuitableAlign = 128;
6508 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
6511 void setN64ABITypes() {
6512 LongWidth = LongAlign = 64;
6513 PointerWidth = PointerAlign = 64;
6514 SizeType = UnsignedLong;
6515 PtrDiffType = SignedLong;
6516 Int64Type = SignedLong;
6517 IntMaxType = Int64Type;
6520 void setN32ABITypes() {
6521 LongWidth = LongAlign = 32;
6522 PointerWidth = PointerAlign = 32;
6523 SizeType = UnsignedInt;
6524 PtrDiffType = SignedInt;
6525 Int64Type = SignedLongLong;
6526 IntMaxType = Int64Type;
6529 bool setABI(
const std::string &Name)
override {
6530 if (Name ==
"n32") {
6535 if (Name ==
"n64") {
6545 MipsTargetInfoBase::getTargetDefines(Opts, Builder);
6550 Builder.
defineMacro(
"_MIPS_ISA",
"_MIPS_ISA_MIPS64");
6552 const std::string& CPUStr = getCPU();
6553 if (CPUStr ==
"mips64")
6555 else if (CPUStr ==
"mips64r2")
6557 else if (CPUStr ==
"mips64r3")
6559 else if (CPUStr ==
"mips64r5")
6561 else if (CPUStr ==
"mips64r6")
6569 else if (ABI ==
"n64") {
6575 llvm_unreachable(
"Invalid ABI for Mips64.");
6577 void getGCCRegAliases(
const GCCRegAlias *&Aliases,
6578 unsigned &NumAliases)
const override {
6589 { {
"a6" },
"$10" },
6590 { {
"a7" },
"$11" },
6591 { {
"t0" },
"$12" },
6592 { {
"t1" },
"$13" },
6593 { {
"t2" },
"$14" },
6594 { {
"t3" },
"$15" },
6595 { {
"s0" },
"$16" },
6596 { {
"s1" },
"$17" },
6597 { {
"s2" },
"$18" },
6598 { {
"s3" },
"$19" },
6599 { {
"s4" },
"$20" },
6600 { {
"s5" },
"$21" },
6601 { {
"s6" },
"$22" },
6602 { {
"s7" },
"$23" },
6603 { {
"t8" },
"$24" },
6604 { {
"t9" },
"$25" },
6605 { {
"k0" },
"$26" },
6606 { {
"k1" },
"$27" },
6607 { {
"gp" },
"$28" },
6608 { {
"sp",
"$sp" },
"$29" },
6609 { {
"fp",
"$fp" },
"$30" },
6612 Aliases = GCCRegAliases;
6613 NumAliases = llvm::array_lengthof(GCCRegAliases);
6616 bool hasInt128Type()
const override {
return true; }
6619 class Mips64EBTargetInfo :
public Mips64TargetInfoBase {
6620 void setDescriptionString()
override {
6622 DescriptionString =
"E-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32:64-S128";
6624 DescriptionString =
"E-m:m-i8:8:32-i16:16:32-i64:64-n32:64-S128";
6629 Mips64EBTargetInfo(
const llvm::Triple &Triple)
6630 : Mips64TargetInfoBase(Triple) {}
6635 Mips64TargetInfoBase::getTargetDefines(Opts, Builder);
6639 class Mips64ELTargetInfo :
public Mips64TargetInfoBase {
6640 void setDescriptionString()
override {
6642 DescriptionString =
"e-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32:64-S128";
6644 DescriptionString =
"e-m:m-i8:8:32-i16:16:32-i64:64-n32:64-S128";
6647 Mips64ELTargetInfo(
const llvm::Triple &Triple)
6648 : Mips64TargetInfoBase(Triple) {
6656 Mips64TargetInfoBase::getTargetDefines(Opts, Builder);
6662 PNaClTargetInfo(
const llvm::Triple &Triple) :
TargetInfo(Triple) {
6664 this->UserLabelPrefix =
"";
6665 this->LongAlign = 32;
6666 this->LongWidth = 32;
6667 this->PointerAlign = 32;
6668 this->PointerWidth = 32;
6671 this->DoubleAlign = 64;
6672 this->LongDoubleWidth = 64;
6673 this->LongDoubleAlign = 64;
6677 this->RegParmMax = 0;
6680 void getDefaultFeatures(llvm::StringMap<bool> &Features)
const override {
6688 getArchDefines(Opts, Builder);
6690 bool hasFeature(StringRef Feature)
const override {
6691 return Feature ==
"pnacl";
6694 unsigned &NumRecords)
const override {
6696 BuiltinVaListKind getBuiltinVaListKind()
const override {
6699 void getGCCRegNames(
const char *
const *&Names,
6700 unsigned &NumNames)
const override;
6701 void getGCCRegAliases(
const GCCRegAlias *&Aliases,
6702 unsigned &NumAliases)
const override;
6703 bool validateAsmConstraint(
const char *&Name,
6708 const char *getClobbers()
const override {
6713 void PNaClTargetInfo::getGCCRegNames(
const char *
const *&Names,
6714 unsigned &NumNames)
const {
6719 void PNaClTargetInfo::getGCCRegAliases(
const GCCRegAlias *&Aliases,
6720 unsigned &NumAliases)
const {
6726 class NaClMips32ELTargetInfo :
public Mips32ELTargetInfo {
6728 NaClMips32ELTargetInfo(
const llvm::Triple &Triple) :
6729 Mips32ELTargetInfo(Triple) {
6730 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 0;
6733 BuiltinVaListKind getBuiltinVaListKind()
const override {
6742 Le64TargetInfo(
const llvm::Triple &Triple) :
TargetInfo(Triple) {
6744 NoAsmVariants =
true;
6745 LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
6746 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
6748 "e-m:e-v128:32-v16:16-v32:32-v96:32-n8:16:32:64-S128";
6758 unsigned &NumRecords)
const override {
6762 BuiltinVaListKind getBuiltinVaListKind()
const override {
6765 const char *getClobbers()
const override {
return ""; }
6766 void getGCCRegNames(
const char *
const *&Names,
6767 unsigned &NumNames)
const override {
6771 void getGCCRegAliases(
const GCCRegAlias *&Aliases,
6772 unsigned &NumAliases)
const override {
6776 bool validateAsmConstraint(
const char *&Name,
6781 bool hasProtectedVisibility()
const override {
return false; }
6786 #define BUILTIN(ID, TYPE, ATTRS) \
6787 { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
6788 #include "clang/Basic/BuiltinsLe64.def"
6792 static const unsigned SPIRAddrSpaceMap[] = {
6803 SPIRTargetInfo(
const llvm::Triple &Triple) :
TargetInfo(Triple) {
6804 assert(getTriple().getOS() == llvm::Triple::UnknownOS &&
6805 "SPIR target must use unknown OS");
6806 assert(getTriple().getEnvironment() == llvm::Triple::UnknownEnvironment &&
6807 "SPIR target must use unknown environment type");
6809 TLSSupported =
false;
6810 LongWidth = LongAlign = 64;
6811 AddrSpaceMap = &SPIRAddrSpaceMap;
6812 UseAddrSpaceMapMangling =
true;
6815 NoAsmVariants =
true;
6821 bool hasFeature(StringRef Feature)
const override {
6822 return Feature ==
"spir";
6826 unsigned &NumRecords)
const override {}
6827 const char *getClobbers()
const override {
6830 void getGCCRegNames(
const char *
const *&Names,
6831 unsigned &NumNames)
const override {}
6833 validateAsmConstraint(
const char *&Name,
6837 void getGCCRegAliases(
const GCCRegAlias *&Aliases,
6838 unsigned &NumAliases)
const override {}
6839 BuiltinVaListKind getBuiltinVaListKind()
const override {
6843 CallingConvCheckResult checkCallingConvention(
CallingConv CC)
const override {
6848 CallingConv getDefaultCallingConv(CallingConvMethodType MT)
const override {
6854 class SPIR32TargetInfo :
public SPIRTargetInfo {
6856 SPIR32TargetInfo(
const llvm::Triple &Triple) : SPIRTargetInfo(Triple) {
6857 PointerWidth = PointerAlign = 32;
6861 =
"e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-"
6862 "v96:128-v192:256-v256:256-v512:512-v1024:1024";
6870 class SPIR64TargetInfo :
public SPIRTargetInfo {
6872 SPIR64TargetInfo(
const llvm::Triple &Triple) : SPIRTargetInfo(Triple) {
6873 PointerWidth = PointerAlign = 64;
6876 DescriptionString =
"e-i64:64-v16:16-v24:32-v32:32-v48:64-"
6877 "v96:128-v192:256-v256:256-v512:512-v1024:1024";
6888 XCoreTargetInfo(
const llvm::Triple &Triple) :
TargetInfo(Triple) {
6890 NoAsmVariants =
true;
6893 DoubleAlign = LongDoubleAlign = 32;
6894 SizeType = UnsignedInt;
6895 PtrDiffType = SignedInt;
6896 IntPtrType = SignedInt;
6897 WCharType = UnsignedChar;
6898 WIntType = UnsignedInt;
6899 UseZeroLengthBitfieldAlignment =
true;
6900 DescriptionString =
"e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i64:32"
6901 "-f64:32-a:0:32-n32";
6908 unsigned &NumRecords)
const override {
6912 BuiltinVaListKind getBuiltinVaListKind()
const override {
6915 const char *getClobbers()
const override {
6918 void getGCCRegNames(
const char *
const *&Names,
6919 unsigned &NumNames)
const override {
6920 static const char *
const GCCRegNames[] = {
6921 "r0",
"r1",
"r2",
"r3",
"r4",
"r5",
"r6",
"r7",
6922 "r8",
"r9",
"r10",
"r11",
"cp",
"dp",
"sp",
"lr"
6924 Names = GCCRegNames;
6925 NumNames = llvm::array_lengthof(GCCRegNames);
6927 void getGCCRegAliases(
const GCCRegAlias *&Aliases,
6928 unsigned &NumAliases)
const override {
6932 bool validateAsmConstraint(
const char *&Name,
6936 int getEHDataRegisterNumber(
unsigned RegNo)
const override {
6938 return (RegNo < 2)? RegNo : -1;
6943 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
6944 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
6946 #include "clang/Basic/BuiltinsXCore.def"
6952 class AndroidX86_32TargetInfo :
public LinuxTargetInfo<X86_32TargetInfo> {
6954 AndroidX86_32TargetInfo(
const llvm::Triple &Triple)
6955 : LinuxTargetInfo<X86_32TargetInfo>(Triple) {
6957 LongDoubleWidth = 64;
6958 LongDoubleFormat = &llvm::APFloat::IEEEdouble;
6965 class AndroidX86_64TargetInfo :
public LinuxTargetInfo<X86_64TargetInfo> {
6967 AndroidX86_64TargetInfo(
const llvm::Triple &Triple)
6968 : LinuxTargetInfo<X86_64TargetInfo>(Triple) {
6969 LongDoubleFormat = &llvm::APFloat::IEEEquad;
6972 bool useFloat128ManglingForLongDouble()
const override {
6984 llvm::Triple::OSType os = Triple.getOS();
6986 switch (Triple.getArch()) {
6990 case llvm::Triple::xcore:
6991 return new XCoreTargetInfo(Triple);
6993 case llvm::Triple::hexagon:
6994 return new HexagonTargetInfo(Triple);
6996 case llvm::Triple::aarch64:
6997 if (Triple.isOSDarwin())
6998 return new DarwinAArch64TargetInfo(Triple);
7001 case llvm::Triple::FreeBSD:
7002 return new FreeBSDTargetInfo<AArch64leTargetInfo>(Triple);
7003 case llvm::Triple::Linux:
7004 return new LinuxTargetInfo<AArch64leTargetInfo>(Triple);
7005 case llvm::Triple::NetBSD:
7006 return new NetBSDTargetInfo<AArch64leTargetInfo>(Triple);
7008 return new AArch64leTargetInfo(Triple);
7011 case llvm::Triple::aarch64_be:
7013 case llvm::Triple::FreeBSD:
7014 return new FreeBSDTargetInfo<AArch64beTargetInfo>(Triple);
7015 case llvm::Triple::Linux:
7016 return new LinuxTargetInfo<AArch64beTargetInfo>(Triple);
7017 case llvm::Triple::NetBSD:
7018 return new NetBSDTargetInfo<AArch64beTargetInfo>(Triple);
7020 return new AArch64beTargetInfo(Triple);
7023 case llvm::Triple::arm:
7024 case llvm::Triple::thumb:
7025 if (Triple.isOSBinFormatMachO())
7026 return new DarwinARMTargetInfo(Triple);
7029 case llvm::Triple::Linux:
7030 return new LinuxTargetInfo<ARMleTargetInfo>(Triple);
7031 case llvm::Triple::FreeBSD:
7032 return new FreeBSDTargetInfo<ARMleTargetInfo>(Triple);
7033 case llvm::Triple::NetBSD:
7034 return new NetBSDTargetInfo<ARMleTargetInfo>(Triple);
7035 case llvm::Triple::OpenBSD:
7036 return new OpenBSDTargetInfo<ARMleTargetInfo>(Triple);
7037 case llvm::Triple::Bitrig:
7038 return new BitrigTargetInfo<ARMleTargetInfo>(Triple);
7039 case llvm::Triple::RTEMS:
7040 return new RTEMSTargetInfo<ARMleTargetInfo>(Triple);
7041 case llvm::Triple::NaCl:
7042 return new NaClTargetInfo<ARMleTargetInfo>(Triple);
7043 case llvm::Triple::Win32:
7044 switch (Triple.getEnvironment()) {
7045 case llvm::Triple::Itanium:
7046 return new ItaniumWindowsARMleTargetInfo(Triple);
7047 case llvm::Triple::MSVC:
7049 return new MicrosoftARMleTargetInfo(Triple);
7052 return new ARMleTargetInfo(Triple);
7055 case llvm::Triple::armeb:
7056 case llvm::Triple::thumbeb:
7057 if (Triple.isOSDarwin())
7058 return new DarwinARMTargetInfo(Triple);
7061 case llvm::Triple::Linux:
7062 return new LinuxTargetInfo<ARMbeTargetInfo>(Triple);
7063 case llvm::Triple::FreeBSD:
7064 return new FreeBSDTargetInfo<ARMbeTargetInfo>(Triple);
7065 case llvm::Triple::NetBSD:
7066 return new NetBSDTargetInfo<ARMbeTargetInfo>(Triple);
7067 case llvm::Triple::OpenBSD:
7068 return new OpenBSDTargetInfo<ARMbeTargetInfo>(Triple);
7069 case llvm::Triple::Bitrig:
7070 return new BitrigTargetInfo<ARMbeTargetInfo>(Triple);
7071 case llvm::Triple::RTEMS:
7072 return new RTEMSTargetInfo<ARMbeTargetInfo>(Triple);
7073 case llvm::Triple::NaCl:
7074 return new NaClTargetInfo<ARMbeTargetInfo>(Triple);
7076 return new ARMbeTargetInfo(Triple);
7079 case llvm::Triple::bpfeb:
7080 case llvm::Triple::bpfel:
7081 return new BPFTargetInfo(Triple);
7083 case llvm::Triple::msp430:
7084 return new MSP430TargetInfo(Triple);
7086 case llvm::Triple::mips:
7088 case llvm::Triple::Linux:
7089 return new LinuxTargetInfo<Mips32EBTargetInfo>(Triple);
7090 case llvm::Triple::RTEMS:
7091 return new RTEMSTargetInfo<Mips32EBTargetInfo>(Triple);
7092 case llvm::Triple::FreeBSD:
7093 return new FreeBSDTargetInfo<Mips32EBTargetInfo>(Triple);
7094 case llvm::Triple::NetBSD:
7095 return new NetBSDTargetInfo<Mips32EBTargetInfo>(Triple);
7097 return new Mips32EBTargetInfo(Triple);
7100 case llvm::Triple::mipsel:
7102 case llvm::Triple::Linux:
7103 return new LinuxTargetInfo<Mips32ELTargetInfo>(Triple);
7104 case llvm::Triple::RTEMS:
7105 return new RTEMSTargetInfo<Mips32ELTargetInfo>(Triple);
7106 case llvm::Triple::FreeBSD:
7107 return new FreeBSDTargetInfo<Mips32ELTargetInfo>(Triple);
7108 case llvm::Triple::NetBSD:
7109 return new NetBSDTargetInfo<Mips32ELTargetInfo>(Triple);
7110 case llvm::Triple::NaCl:
7111 return new NaClTargetInfo<NaClMips32ELTargetInfo>(Triple);
7113 return new Mips32ELTargetInfo(Triple);
7116 case llvm::Triple::mips64:
7118 case llvm::Triple::Linux:
7119 return new LinuxTargetInfo<Mips64EBTargetInfo>(Triple);
7120 case llvm::Triple::RTEMS:
7121 return new RTEMSTargetInfo<Mips64EBTargetInfo>(Triple);
7122 case llvm::Triple::FreeBSD:
7123 return new FreeBSDTargetInfo<Mips64EBTargetInfo>(Triple);
7124 case llvm::Triple::NetBSD:
7125 return new NetBSDTargetInfo<Mips64EBTargetInfo>(Triple);
7126 case llvm::Triple::OpenBSD:
7127 return new OpenBSDTargetInfo<Mips64EBTargetInfo>(Triple);
7129 return new Mips64EBTargetInfo(Triple);
7132 case llvm::Triple::mips64el:
7134 case llvm::Triple::Linux:
7135 return new LinuxTargetInfo<Mips64ELTargetInfo>(Triple);
7136 case llvm::Triple::RTEMS:
7137 return new RTEMSTargetInfo<Mips64ELTargetInfo>(Triple);
7138 case llvm::Triple::FreeBSD:
7139 return new FreeBSDTargetInfo<Mips64ELTargetInfo>(Triple);
7140 case llvm::Triple::NetBSD:
7141 return new NetBSDTargetInfo<Mips64ELTargetInfo>(Triple);
7142 case llvm::Triple::OpenBSD:
7143 return new OpenBSDTargetInfo<Mips64ELTargetInfo>(Triple);
7145 return new Mips64ELTargetInfo(Triple);
7148 case llvm::Triple::le32:
7150 case llvm::Triple::NaCl:
7151 return new NaClTargetInfo<PNaClTargetInfo>(Triple);
7156 case llvm::Triple::le64:
7157 return new Le64TargetInfo(Triple);
7159 case llvm::Triple::ppc:
7160 if (Triple.isOSDarwin())
7161 return new DarwinPPC32TargetInfo(Triple);
7163 case llvm::Triple::Linux:
7164 return new LinuxTargetInfo<PPC32TargetInfo>(Triple);
7165 case llvm::Triple::FreeBSD:
7166 return new FreeBSDTargetInfo<PPC32TargetInfo>(Triple);
7167 case llvm::Triple::NetBSD:
7168 return new NetBSDTargetInfo<PPC32TargetInfo>(Triple);
7169 case llvm::Triple::OpenBSD:
7170 return new OpenBSDTargetInfo<PPC32TargetInfo>(Triple);
7171 case llvm::Triple::RTEMS:
7172 return new RTEMSTargetInfo<PPC32TargetInfo>(Triple);
7174 return new PPC32TargetInfo(Triple);
7177 case llvm::Triple::ppc64:
7178 if (Triple.isOSDarwin())
7179 return new DarwinPPC64TargetInfo(Triple);
7181 case llvm::Triple::Linux:
7182 return new LinuxTargetInfo<PPC64TargetInfo>(Triple);
7183 case llvm::Triple::Lv2:
7184 return new PS3PPUTargetInfo<PPC64TargetInfo>(Triple);
7185 case llvm::Triple::FreeBSD:
7186 return new FreeBSDTargetInfo<PPC64TargetInfo>(Triple);
7187 case llvm::Triple::NetBSD:
7188 return new NetBSDTargetInfo<PPC64TargetInfo>(Triple);
7190 return new PPC64TargetInfo(Triple);
7193 case llvm::Triple::ppc64le:
7195 case llvm::Triple::Linux:
7196 return new LinuxTargetInfo<PPC64TargetInfo>(Triple);
7197 case llvm::Triple::NetBSD:
7198 return new NetBSDTargetInfo<PPC64TargetInfo>(Triple);
7200 return new PPC64TargetInfo(Triple);
7203 case llvm::Triple::nvptx:
7204 return new NVPTX32TargetInfo(Triple);
7205 case llvm::Triple::nvptx64:
7206 return new NVPTX64TargetInfo(Triple);
7208 case llvm::Triple::amdgcn:
7209 case llvm::Triple::r600:
7210 return new AMDGPUTargetInfo(Triple);
7212 case llvm::Triple::sparc:
7214 case llvm::Triple::Linux:
7215 return new LinuxTargetInfo<SparcV8TargetInfo>(Triple);
7216 case llvm::Triple::Solaris:
7217 return new SolarisTargetInfo<SparcV8TargetInfo>(Triple);
7218 case llvm::Triple::NetBSD:
7219 return new NetBSDTargetInfo<SparcV8TargetInfo>(Triple);
7220 case llvm::Triple::OpenBSD:
7221 return new OpenBSDTargetInfo<SparcV8TargetInfo>(Triple);
7222 case llvm::Triple::RTEMS:
7223 return new RTEMSTargetInfo<SparcV8TargetInfo>(Triple);
7225 return new SparcV8TargetInfo(Triple);
7229 case llvm::Triple::sparcel:
7231 case llvm::Triple::Linux:
7232 return new LinuxTargetInfo<SparcV8elTargetInfo>(Triple);
7233 case llvm::Triple::NetBSD:
7234 return new NetBSDTargetInfo<SparcV8elTargetInfo>(Triple);
7235 case llvm::Triple::OpenBSD:
7236 return new OpenBSDTargetInfo<SparcV8elTargetInfo>(Triple);
7237 case llvm::Triple::RTEMS:
7238 return new RTEMSTargetInfo<SparcV8elTargetInfo>(Triple);
7240 return new SparcV8elTargetInfo(Triple);
7243 case llvm::Triple::sparcv9:
7245 case llvm::Triple::Linux:
7246 return new LinuxTargetInfo<SparcV9TargetInfo>(Triple);
7247 case llvm::Triple::Solaris:
7248 return new SolarisTargetInfo<SparcV9TargetInfo>(Triple);
7249 case llvm::Triple::NetBSD:
7250 return new NetBSDTargetInfo<SparcV9TargetInfo>(Triple);
7251 case llvm::Triple::OpenBSD:
7252 return new OpenBSDTargetInfo<SparcV9TargetInfo>(Triple);
7253 case llvm::Triple::FreeBSD:
7254 return new FreeBSDTargetInfo<SparcV9TargetInfo>(Triple);
7256 return new SparcV9TargetInfo(Triple);
7259 case llvm::Triple::systemz:
7261 case llvm::Triple::Linux:
7262 return new LinuxTargetInfo<SystemZTargetInfo>(Triple);
7264 return new SystemZTargetInfo(Triple);
7267 case llvm::Triple::tce:
7268 return new TCETargetInfo(Triple);
7270 case llvm::Triple::x86:
7271 if (Triple.isOSDarwin())
7272 return new DarwinI386TargetInfo(Triple);
7275 case llvm::Triple::CloudABI:
7276 return new CloudABITargetInfo<X86_32TargetInfo>(Triple);
7277 case llvm::Triple::Linux: {
7278 switch (Triple.getEnvironment()) {
7280 return new LinuxTargetInfo<X86_32TargetInfo>(Triple);
7281 case llvm::Triple::Android:
7282 return new AndroidX86_32TargetInfo(Triple);
7285 case llvm::Triple::DragonFly:
7286 return new DragonFlyBSDTargetInfo<X86_32TargetInfo>(Triple);
7287 case llvm::Triple::NetBSD:
7288 return new NetBSDI386TargetInfo(Triple);
7289 case llvm::Triple::OpenBSD:
7290 return new OpenBSDI386TargetInfo(Triple);
7291 case llvm::Triple::Bitrig:
7292 return new BitrigI386TargetInfo(Triple);
7293 case llvm::Triple::FreeBSD:
7294 return new FreeBSDTargetInfo<X86_32TargetInfo>(Triple);
7295 case llvm::Triple::KFreeBSD:
7296 return new KFreeBSDTargetInfo<X86_32TargetInfo>(Triple);
7297 case llvm::Triple::Minix:
7298 return new MinixTargetInfo<X86_32TargetInfo>(Triple);
7299 case llvm::Triple::Solaris:
7300 return new SolarisTargetInfo<X86_32TargetInfo>(Triple);
7301 case llvm::Triple::Win32: {
7302 switch (Triple.getEnvironment()) {
7303 case llvm::Triple::Cygnus:
7304 return new CygwinX86_32TargetInfo(Triple);
7305 case llvm::Triple::GNU:
7306 return new MinGWX86_32TargetInfo(Triple);
7307 case llvm::Triple::Itanium:
7308 case llvm::Triple::MSVC:
7310 return new MicrosoftX86_32TargetInfo(Triple);
7313 case llvm::Triple::Haiku:
7314 return new HaikuX86_32TargetInfo(Triple);
7315 case llvm::Triple::RTEMS:
7316 return new RTEMSX86_32TargetInfo(Triple);
7317 case llvm::Triple::NaCl:
7318 return new NaClTargetInfo<X86_32TargetInfo>(Triple);
7320 return new X86_32TargetInfo(Triple);
7323 case llvm::Triple::x86_64:
7324 if (Triple.isOSDarwin() || Triple.isOSBinFormatMachO())
7325 return new DarwinX86_64TargetInfo(Triple);
7328 case llvm::Triple::CloudABI:
7329 return new CloudABITargetInfo<X86_64TargetInfo>(Triple);
7330 case llvm::Triple::Linux: {
7331 switch (Triple.getEnvironment()) {
7333 return new LinuxTargetInfo<X86_64TargetInfo>(Triple);
7334 case llvm::Triple::Android:
7335 return new AndroidX86_64TargetInfo(Triple);
7338 case llvm::Triple::DragonFly:
7339 return new DragonFlyBSDTargetInfo<X86_64TargetInfo>(Triple);
7340 case llvm::Triple::NetBSD:
7341 return new NetBSDTargetInfo<X86_64TargetInfo>(Triple);
7342 case llvm::Triple::OpenBSD:
7343 return new OpenBSDX86_64TargetInfo(Triple);
7344 case llvm::Triple::Bitrig:
7345 return new BitrigX86_64TargetInfo(Triple);
7346 case llvm::Triple::FreeBSD:
7347 return new FreeBSDTargetInfo<X86_64TargetInfo>(Triple);
7348 case llvm::Triple::KFreeBSD:
7349 return new KFreeBSDTargetInfo<X86_64TargetInfo>(Triple);
7350 case llvm::Triple::Solaris:
7351 return new SolarisTargetInfo<X86_64TargetInfo>(Triple);
7352 case llvm::Triple::Win32: {
7353 switch (Triple.getEnvironment()) {
7354 case llvm::Triple::GNU:
7355 return new MinGWX86_64TargetInfo(Triple);
7356 case llvm::Triple::MSVC:
7358 return new MicrosoftX86_64TargetInfo(Triple);
7361 case llvm::Triple::NaCl:
7362 return new NaClTargetInfo<X86_64TargetInfo>(Triple);
7363 case llvm::Triple::PS4:
7364 return new PS4OSTargetInfo<X86_64TargetInfo>(Triple);
7366 return new X86_64TargetInfo(Triple);
7369 case llvm::Triple::spir: {
7370 if (Triple.getOS() != llvm::Triple::UnknownOS ||
7371 Triple.getEnvironment() != llvm::Triple::UnknownEnvironment)
7373 return new SPIR32TargetInfo(Triple);
7375 case llvm::Triple::spir64: {
7376 if (Triple.getOS() != llvm::Triple::UnknownOS ||
7377 Triple.getEnvironment() != llvm::Triple::UnknownEnvironment)
7379 return new SPIR64TargetInfo(Triple);
7388 const std::shared_ptr<TargetOptions> &Opts) {
7389 llvm::Triple Triple(Opts->Triple);
7394 Diags.
Report(diag::err_target_unknown_triple) << Triple.str();
7397 Target->TargetOpts = Opts;
7400 if (!Opts->CPU.empty() && !Target->setCPU(Opts->CPU)) {
7401 Diags.
Report(diag::err_target_unknown_cpu) << Opts->CPU;
7406 if (!Opts->ABI.empty() && !Target->setABI(Opts->ABI)) {
7407 Diags.
Report(diag::err_target_unknown_abi) << Opts->ABI;
7412 if (!Opts->FPMath.empty() && !Target->setFPMath(Opts->FPMath)) {
7413 Diags.
Report(diag::err_target_unknown_fpmath) << Opts->FPMath;
7419 llvm::StringMap<bool> Features;
7420 Target->getDefaultFeatures(Features);
7423 for (
unsigned I = 0, N = Opts->FeaturesAsWritten.size();
7425 const char *Name = Opts->FeaturesAsWritten[I].c_str();
7427 bool Enabled = Name[0] ==
'+';
7428 Target->setFeatureEnabled(Features, Name + 1, Enabled);
7435 Opts->Features.clear();
7436 for (llvm::StringMap<bool>::const_iterator it = Features.begin(),
7437 ie = Features.end(); it != ie; ++it)
7438 Opts->Features.push_back((it->second ?
"+" :
"-") + it->first().str());
7439 if (!Target->handleTargetFeatures(Opts->Features, Diags))
7442 return Target.release();
Defines the clang::MacroBuilder utility class.
static void addCygMingDefines(const LangOptions &Opts, MacroBuilder &Builder)
Represents a version number in the form major[.minor[.subminor[.build]]].
SanitizerSet Sanitize
Set of enabled sanitizers.
static const Builtin::Info BuiltinInfo[]
static bool hasFeature(StringRef Feature, const LangOptions &LangOpts, const TargetInfo &Target)
Determine whether a translation unit built using the current language options has the given feature...
DiagnosticBuilder Report(SourceLocation Loc, unsigned DiagID)
Issue the message to the client.
static void getDarwinDefines(MacroBuilder &Builder, const LangOptions &Opts, const llvm::Triple &Triple, StringRef &PlatformName, VersionTuple &PlatformMinVersion)
void setRequiresImmediate(int Min, int Max)
Keeps track of the various options that can be enabled, which controls the dialect of C or C++ that i...
static void DefineStd(MacroBuilder &Builder, StringRef MacroName, const LangOptions &Opts)
Concrete class used by the front-end to report problems and issues.
static TargetInfo * AllocateTarget(const llvm::Triple &Triple)
virtual std::string convertConstraint(const char *&Constraint) const
typedef void* __builtin_va_list;
static void defineCPUMacros(MacroBuilder &Builder, StringRef CPUName, bool Tuning=true)
Exposes information about the current target.
Defines the clang::LangOptions interface.
std::string ConstraintStr
static TargetInfo * CreateTargetInfo(DiagnosticsEngine &Diags, const std::shared_ptr< TargetOptions > &Opts)
Construct a target for the given options.
CallingConv
CallingConv - Specifies the calling convention that a function uses.
Enumerates target-specific builtins in their own namespaces within namespace clang.
Defines the clang::TargetOptions class.
typedef char* __builtin_va_list;
Defines the Diagnostic-related interfaces.
static void addMinGWDefines(const LangOptions &Opts, MacroBuilder &Builder)
bool has(SanitizerMask K) const
Check if a certain (single) sanitizer is enabled.
bool isCompatibleWithMSVC(MSVCMajorVersion MajorVersion) const
BoundNodesTreeBuilder *const Builder
Defines the clang::TargetInfo interface.
void defineMacro(const Twine &Name, const Twine &Value="1")
Append a #define line for macro of the form "\#define Name Value\n".
Defines enum values for all the target-independent builtin functions.