clang  3.7.0
xmmintrin.h
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1 /*===---- xmmintrin.h - SSE intrinsics -------------------------------------===
2  *
3  * Permission is hereby granted, free of charge, to any person obtaining a copy
4  * of this software and associated documentation files (the "Software"), to deal
5  * in the Software without restriction, including without limitation the rights
6  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
7  * copies of the Software, and to permit persons to whom the Software is
8  * furnished to do so, subject to the following conditions:
9  *
10  * The above copyright notice and this permission notice shall be included in
11  * all copies or substantial portions of the Software.
12  *
13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
16  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
17  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
18  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
19  * THE SOFTWARE.
20  *
21  *===-----------------------------------------------------------------------===
22  */
23 
24 #ifndef __XMMINTRIN_H
25 #define __XMMINTRIN_H
26 
27 #ifndef __SSE__
28 #error "SSE instruction set not enabled"
29 #else
30 
31 #include <mmintrin.h>
32 
33 typedef int __v4si __attribute__((__vector_size__(16)));
34 typedef float __v4sf __attribute__((__vector_size__(16)));
35 typedef float __m128 __attribute__((__vector_size__(16)));
36 
37 /* This header should only be included in a hosted environment as it depends on
38  * a standard library to provide allocation routines. */
39 #if __STDC_HOSTED__
40 #include <mm_malloc.h>
41 #endif
42 
43 /* Define the default attributes for the functions in this file. */
44 #define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
45 
46 static __inline__ __m128 __DEFAULT_FN_ATTRS
47 _mm_add_ss(__m128 __a, __m128 __b)
48 {
49  __a[0] += __b[0];
50  return __a;
51 }
52 
53 static __inline__ __m128 __DEFAULT_FN_ATTRS
54 _mm_add_ps(__m128 __a, __m128 __b)
55 {
56  return __a + __b;
57 }
58 
59 static __inline__ __m128 __DEFAULT_FN_ATTRS
60 _mm_sub_ss(__m128 __a, __m128 __b)
61 {
62  __a[0] -= __b[0];
63  return __a;
64 }
65 
66 static __inline__ __m128 __DEFAULT_FN_ATTRS
67 _mm_sub_ps(__m128 __a, __m128 __b)
68 {
69  return __a - __b;
70 }
71 
72 static __inline__ __m128 __DEFAULT_FN_ATTRS
73 _mm_mul_ss(__m128 __a, __m128 __b)
74 {
75  __a[0] *= __b[0];
76  return __a;
77 }
78 
79 static __inline__ __m128 __DEFAULT_FN_ATTRS
80 _mm_mul_ps(__m128 __a, __m128 __b)
81 {
82  return __a * __b;
83 }
84 
85 static __inline__ __m128 __DEFAULT_FN_ATTRS
86 _mm_div_ss(__m128 __a, __m128 __b)
87 {
88  __a[0] /= __b[0];
89  return __a;
90 }
91 
92 static __inline__ __m128 __DEFAULT_FN_ATTRS
93 _mm_div_ps(__m128 __a, __m128 __b)
94 {
95  return __a / __b;
96 }
97 
98 static __inline__ __m128 __DEFAULT_FN_ATTRS
99 _mm_sqrt_ss(__m128 __a)
100 {
101  __m128 __c = __builtin_ia32_sqrtss(__a);
102  return (__m128) { __c[0], __a[1], __a[2], __a[3] };
103 }
104 
105 static __inline__ __m128 __DEFAULT_FN_ATTRS
106 _mm_sqrt_ps(__m128 __a)
107 {
108  return __builtin_ia32_sqrtps(__a);
109 }
110 
111 static __inline__ __m128 __DEFAULT_FN_ATTRS
112 _mm_rcp_ss(__m128 __a)
113 {
114  __m128 __c = __builtin_ia32_rcpss(__a);
115  return (__m128) { __c[0], __a[1], __a[2], __a[3] };
116 }
117 
118 static __inline__ __m128 __DEFAULT_FN_ATTRS
119 _mm_rcp_ps(__m128 __a)
120 {
121  return __builtin_ia32_rcpps(__a);
122 }
123 
124 static __inline__ __m128 __DEFAULT_FN_ATTRS
125 _mm_rsqrt_ss(__m128 __a)
126 {
127  __m128 __c = __builtin_ia32_rsqrtss(__a);
128  return (__m128) { __c[0], __a[1], __a[2], __a[3] };
129 }
130 
131 static __inline__ __m128 __DEFAULT_FN_ATTRS
132 _mm_rsqrt_ps(__m128 __a)
133 {
134  return __builtin_ia32_rsqrtps(__a);
135 }
136 
137 static __inline__ __m128 __DEFAULT_FN_ATTRS
138 _mm_min_ss(__m128 __a, __m128 __b)
139 {
140  return __builtin_ia32_minss(__a, __b);
141 }
142 
143 static __inline__ __m128 __DEFAULT_FN_ATTRS
144 _mm_min_ps(__m128 __a, __m128 __b)
145 {
146  return __builtin_ia32_minps(__a, __b);
147 }
148 
149 static __inline__ __m128 __DEFAULT_FN_ATTRS
150 _mm_max_ss(__m128 __a, __m128 __b)
151 {
152  return __builtin_ia32_maxss(__a, __b);
153 }
154 
155 static __inline__ __m128 __DEFAULT_FN_ATTRS
156 _mm_max_ps(__m128 __a, __m128 __b)
157 {
158  return __builtin_ia32_maxps(__a, __b);
159 }
160 
161 static __inline__ __m128 __DEFAULT_FN_ATTRS
162 _mm_and_ps(__m128 __a, __m128 __b)
163 {
164  return (__m128)((__v4si)__a & (__v4si)__b);
165 }
166 
167 static __inline__ __m128 __DEFAULT_FN_ATTRS
168 _mm_andnot_ps(__m128 __a, __m128 __b)
169 {
170  return (__m128)(~(__v4si)__a & (__v4si)__b);
171 }
172 
173 static __inline__ __m128 __DEFAULT_FN_ATTRS
174 _mm_or_ps(__m128 __a, __m128 __b)
175 {
176  return (__m128)((__v4si)__a | (__v4si)__b);
177 }
178 
179 static __inline__ __m128 __DEFAULT_FN_ATTRS
180 _mm_xor_ps(__m128 __a, __m128 __b)
181 {
182  return (__m128)((__v4si)__a ^ (__v4si)__b);
183 }
184 
185 static __inline__ __m128 __DEFAULT_FN_ATTRS
186 _mm_cmpeq_ss(__m128 __a, __m128 __b)
187 {
188  return (__m128)__builtin_ia32_cmpeqss(__a, __b);
189 }
190 
191 static __inline__ __m128 __DEFAULT_FN_ATTRS
192 _mm_cmpeq_ps(__m128 __a, __m128 __b)
193 {
194  return (__m128)__builtin_ia32_cmpeqps(__a, __b);
195 }
196 
197 static __inline__ __m128 __DEFAULT_FN_ATTRS
198 _mm_cmplt_ss(__m128 __a, __m128 __b)
199 {
200  return (__m128)__builtin_ia32_cmpltss(__a, __b);
201 }
202 
203 static __inline__ __m128 __DEFAULT_FN_ATTRS
204 _mm_cmplt_ps(__m128 __a, __m128 __b)
205 {
206  return (__m128)__builtin_ia32_cmpltps(__a, __b);
207 }
208 
209 static __inline__ __m128 __DEFAULT_FN_ATTRS
210 _mm_cmple_ss(__m128 __a, __m128 __b)
211 {
212  return (__m128)__builtin_ia32_cmpless(__a, __b);
213 }
214 
215 static __inline__ __m128 __DEFAULT_FN_ATTRS
216 _mm_cmple_ps(__m128 __a, __m128 __b)
217 {
218  return (__m128)__builtin_ia32_cmpleps(__a, __b);
219 }
220 
221 static __inline__ __m128 __DEFAULT_FN_ATTRS
222 _mm_cmpgt_ss(__m128 __a, __m128 __b)
223 {
224  return (__m128)__builtin_shufflevector(__a,
225  __builtin_ia32_cmpltss(__b, __a),
226  4, 1, 2, 3);
227 }
228 
229 static __inline__ __m128 __DEFAULT_FN_ATTRS
230 _mm_cmpgt_ps(__m128 __a, __m128 __b)
231 {
232  return (__m128)__builtin_ia32_cmpltps(__b, __a);
233 }
234 
235 static __inline__ __m128 __DEFAULT_FN_ATTRS
236 _mm_cmpge_ss(__m128 __a, __m128 __b)
237 {
238  return (__m128)__builtin_shufflevector(__a,
239  __builtin_ia32_cmpless(__b, __a),
240  4, 1, 2, 3);
241 }
242 
243 static __inline__ __m128 __DEFAULT_FN_ATTRS
244 _mm_cmpge_ps(__m128 __a, __m128 __b)
245 {
246  return (__m128)__builtin_ia32_cmpleps(__b, __a);
247 }
248 
249 static __inline__ __m128 __DEFAULT_FN_ATTRS
250 _mm_cmpneq_ss(__m128 __a, __m128 __b)
251 {
252  return (__m128)__builtin_ia32_cmpneqss(__a, __b);
253 }
254 
255 static __inline__ __m128 __DEFAULT_FN_ATTRS
256 _mm_cmpneq_ps(__m128 __a, __m128 __b)
257 {
258  return (__m128)__builtin_ia32_cmpneqps(__a, __b);
259 }
260 
261 static __inline__ __m128 __DEFAULT_FN_ATTRS
262 _mm_cmpnlt_ss(__m128 __a, __m128 __b)
263 {
264  return (__m128)__builtin_ia32_cmpnltss(__a, __b);
265 }
266 
267 static __inline__ __m128 __DEFAULT_FN_ATTRS
268 _mm_cmpnlt_ps(__m128 __a, __m128 __b)
269 {
270  return (__m128)__builtin_ia32_cmpnltps(__a, __b);
271 }
272 
273 static __inline__ __m128 __DEFAULT_FN_ATTRS
274 _mm_cmpnle_ss(__m128 __a, __m128 __b)
275 {
276  return (__m128)__builtin_ia32_cmpnless(__a, __b);
277 }
278 
279 static __inline__ __m128 __DEFAULT_FN_ATTRS
280 _mm_cmpnle_ps(__m128 __a, __m128 __b)
281 {
282  return (__m128)__builtin_ia32_cmpnleps(__a, __b);
283 }
284 
285 static __inline__ __m128 __DEFAULT_FN_ATTRS
286 _mm_cmpngt_ss(__m128 __a, __m128 __b)
287 {
288  return (__m128)__builtin_shufflevector(__a,
289  __builtin_ia32_cmpnltss(__b, __a),
290  4, 1, 2, 3);
291 }
292 
293 static __inline__ __m128 __DEFAULT_FN_ATTRS
294 _mm_cmpngt_ps(__m128 __a, __m128 __b)
295 {
296  return (__m128)__builtin_ia32_cmpnltps(__b, __a);
297 }
298 
299 static __inline__ __m128 __DEFAULT_FN_ATTRS
300 _mm_cmpnge_ss(__m128 __a, __m128 __b)
301 {
302  return (__m128)__builtin_shufflevector(__a,
303  __builtin_ia32_cmpnless(__b, __a),
304  4, 1, 2, 3);
305 }
306 
307 static __inline__ __m128 __DEFAULT_FN_ATTRS
308 _mm_cmpnge_ps(__m128 __a, __m128 __b)
309 {
310  return (__m128)__builtin_ia32_cmpnleps(__b, __a);
311 }
312 
313 static __inline__ __m128 __DEFAULT_FN_ATTRS
314 _mm_cmpord_ss(__m128 __a, __m128 __b)
315 {
316  return (__m128)__builtin_ia32_cmpordss(__a, __b);
317 }
318 
319 static __inline__ __m128 __DEFAULT_FN_ATTRS
320 _mm_cmpord_ps(__m128 __a, __m128 __b)
321 {
322  return (__m128)__builtin_ia32_cmpordps(__a, __b);
323 }
324 
325 static __inline__ __m128 __DEFAULT_FN_ATTRS
326 _mm_cmpunord_ss(__m128 __a, __m128 __b)
327 {
328  return (__m128)__builtin_ia32_cmpunordss(__a, __b);
329 }
330 
331 static __inline__ __m128 __DEFAULT_FN_ATTRS
332 _mm_cmpunord_ps(__m128 __a, __m128 __b)
333 {
334  return (__m128)__builtin_ia32_cmpunordps(__a, __b);
335 }
336 
337 static __inline__ int __DEFAULT_FN_ATTRS
338 _mm_comieq_ss(__m128 __a, __m128 __b)
339 {
340  return __builtin_ia32_comieq(__a, __b);
341 }
342 
343 static __inline__ int __DEFAULT_FN_ATTRS
344 _mm_comilt_ss(__m128 __a, __m128 __b)
345 {
346  return __builtin_ia32_comilt(__a, __b);
347 }
348 
349 static __inline__ int __DEFAULT_FN_ATTRS
350 _mm_comile_ss(__m128 __a, __m128 __b)
351 {
352  return __builtin_ia32_comile(__a, __b);
353 }
354 
355 static __inline__ int __DEFAULT_FN_ATTRS
356 _mm_comigt_ss(__m128 __a, __m128 __b)
357 {
358  return __builtin_ia32_comigt(__a, __b);
359 }
360 
361 static __inline__ int __DEFAULT_FN_ATTRS
362 _mm_comige_ss(__m128 __a, __m128 __b)
363 {
364  return __builtin_ia32_comige(__a, __b);
365 }
366 
367 static __inline__ int __DEFAULT_FN_ATTRS
368 _mm_comineq_ss(__m128 __a, __m128 __b)
369 {
370  return __builtin_ia32_comineq(__a, __b);
371 }
372 
373 static __inline__ int __DEFAULT_FN_ATTRS
374 _mm_ucomieq_ss(__m128 __a, __m128 __b)
375 {
376  return __builtin_ia32_ucomieq(__a, __b);
377 }
378 
379 static __inline__ int __DEFAULT_FN_ATTRS
380 _mm_ucomilt_ss(__m128 __a, __m128 __b)
381 {
382  return __builtin_ia32_ucomilt(__a, __b);
383 }
384 
385 static __inline__ int __DEFAULT_FN_ATTRS
386 _mm_ucomile_ss(__m128 __a, __m128 __b)
387 {
388  return __builtin_ia32_ucomile(__a, __b);
389 }
390 
391 static __inline__ int __DEFAULT_FN_ATTRS
392 _mm_ucomigt_ss(__m128 __a, __m128 __b)
393 {
394  return __builtin_ia32_ucomigt(__a, __b);
395 }
396 
397 static __inline__ int __DEFAULT_FN_ATTRS
398 _mm_ucomige_ss(__m128 __a, __m128 __b)
399 {
400  return __builtin_ia32_ucomige(__a, __b);
401 }
402 
403 static __inline__ int __DEFAULT_FN_ATTRS
404 _mm_ucomineq_ss(__m128 __a, __m128 __b)
405 {
406  return __builtin_ia32_ucomineq(__a, __b);
407 }
408 
409 static __inline__ int __DEFAULT_FN_ATTRS
410 _mm_cvtss_si32(__m128 __a)
411 {
412  return __builtin_ia32_cvtss2si(__a);
413 }
414 
415 static __inline__ int __DEFAULT_FN_ATTRS
416 _mm_cvt_ss2si(__m128 __a)
417 {
418  return _mm_cvtss_si32(__a);
419 }
420 
421 #ifdef __x86_64__
422 
423 static __inline__ long long __DEFAULT_FN_ATTRS
424 _mm_cvtss_si64(__m128 __a)
425 {
426  return __builtin_ia32_cvtss2si64(__a);
427 }
428 
429 #endif
430 
431 static __inline__ __m64 __DEFAULT_FN_ATTRS
432 _mm_cvtps_pi32(__m128 __a)
433 {
434  return (__m64)__builtin_ia32_cvtps2pi(__a);
435 }
436 
437 static __inline__ __m64 __DEFAULT_FN_ATTRS
438 _mm_cvt_ps2pi(__m128 __a)
439 {
440  return _mm_cvtps_pi32(__a);
441 }
442 
443 static __inline__ int __DEFAULT_FN_ATTRS
444 _mm_cvttss_si32(__m128 __a)
445 {
446  return __a[0];
447 }
448 
449 static __inline__ int __DEFAULT_FN_ATTRS
450 _mm_cvtt_ss2si(__m128 __a)
451 {
452  return _mm_cvttss_si32(__a);
453 }
454 
455 static __inline__ long long __DEFAULT_FN_ATTRS
456 _mm_cvttss_si64(__m128 __a)
457 {
458  return __a[0];
459 }
460 
461 static __inline__ __m64 __DEFAULT_FN_ATTRS
462 _mm_cvttps_pi32(__m128 __a)
463 {
464  return (__m64)__builtin_ia32_cvttps2pi(__a);
465 }
466 
467 static __inline__ __m64 __DEFAULT_FN_ATTRS
468 _mm_cvtt_ps2pi(__m128 __a)
469 {
470  return _mm_cvttps_pi32(__a);
471 }
472 
473 static __inline__ __m128 __DEFAULT_FN_ATTRS
474 _mm_cvtsi32_ss(__m128 __a, int __b)
475 {
476  __a[0] = __b;
477  return __a;
478 }
479 
480 static __inline__ __m128 __DEFAULT_FN_ATTRS
481 _mm_cvt_si2ss(__m128 __a, int __b)
482 {
483  return _mm_cvtsi32_ss(__a, __b);
484 }
485 
486 #ifdef __x86_64__
487 
488 static __inline__ __m128 __DEFAULT_FN_ATTRS
489 _mm_cvtsi64_ss(__m128 __a, long long __b)
490 {
491  __a[0] = __b;
492  return __a;
493 }
494 
495 #endif
496 
497 static __inline__ __m128 __DEFAULT_FN_ATTRS
498 _mm_cvtpi32_ps(__m128 __a, __m64 __b)
499 {
500  return __builtin_ia32_cvtpi2ps(__a, (__v2si)__b);
501 }
502 
503 static __inline__ __m128 __DEFAULT_FN_ATTRS
504 _mm_cvt_pi2ps(__m128 __a, __m64 __b)
505 {
506  return _mm_cvtpi32_ps(__a, __b);
507 }
508 
509 static __inline__ float __DEFAULT_FN_ATTRS
510 _mm_cvtss_f32(__m128 __a)
511 {
512  return __a[0];
513 }
514 
515 static __inline__ __m128 __DEFAULT_FN_ATTRS
516 _mm_loadh_pi(__m128 __a, const __m64 *__p)
517 {
518  typedef float __mm_loadh_pi_v2f32 __attribute__((__vector_size__(8)));
519  struct __mm_loadh_pi_struct {
520  __mm_loadh_pi_v2f32 __u;
521  } __attribute__((__packed__, __may_alias__));
522  __mm_loadh_pi_v2f32 __b = ((struct __mm_loadh_pi_struct*)__p)->__u;
523  __m128 __bb = __builtin_shufflevector(__b, __b, 0, 1, 0, 1);
524  return __builtin_shufflevector(__a, __bb, 0, 1, 4, 5);
525 }
526 
527 static __inline__ __m128 __DEFAULT_FN_ATTRS
528 _mm_loadl_pi(__m128 __a, const __m64 *__p)
529 {
530  typedef float __mm_loadl_pi_v2f32 __attribute__((__vector_size__(8)));
531  struct __mm_loadl_pi_struct {
532  __mm_loadl_pi_v2f32 __u;
533  } __attribute__((__packed__, __may_alias__));
534  __mm_loadl_pi_v2f32 __b = ((struct __mm_loadl_pi_struct*)__p)->__u;
535  __m128 __bb = __builtin_shufflevector(__b, __b, 0, 1, 0, 1);
536  return __builtin_shufflevector(__a, __bb, 4, 5, 2, 3);
537 }
538 
539 static __inline__ __m128 __DEFAULT_FN_ATTRS
540 _mm_load_ss(const float *__p)
541 {
542  struct __mm_load_ss_struct {
543  float __u;
544  } __attribute__((__packed__, __may_alias__));
545  float __u = ((struct __mm_load_ss_struct*)__p)->__u;
546  return (__m128){ __u, 0, 0, 0 };
547 }
548 
549 static __inline__ __m128 __DEFAULT_FN_ATTRS
550 _mm_load1_ps(const float *__p)
551 {
552  struct __mm_load1_ps_struct {
553  float __u;
554  } __attribute__((__packed__, __may_alias__));
555  float __u = ((struct __mm_load1_ps_struct*)__p)->__u;
556  return (__m128){ __u, __u, __u, __u };
557 }
558 
559 #define _mm_load_ps1(p) _mm_load1_ps(p)
560 
561 static __inline__ __m128 __DEFAULT_FN_ATTRS
562 _mm_load_ps(const float *__p)
563 {
564  return *(__m128*)__p;
565 }
566 
567 static __inline__ __m128 __DEFAULT_FN_ATTRS
568 _mm_loadu_ps(const float *__p)
569 {
570  struct __loadu_ps {
571  __m128 __v;
572  } __attribute__((__packed__, __may_alias__));
573  return ((struct __loadu_ps*)__p)->__v;
574 }
575 
576 static __inline__ __m128 __DEFAULT_FN_ATTRS
577 _mm_loadr_ps(const float *__p)
578 {
579  __m128 __a = _mm_load_ps(__p);
580  return __builtin_shufflevector(__a, __a, 3, 2, 1, 0);
581 }
582 
583 static __inline__ __m128 __DEFAULT_FN_ATTRS
584 _mm_set_ss(float __w)
585 {
586  return (__m128){ __w, 0, 0, 0 };
587 }
588 
589 static __inline__ __m128 __DEFAULT_FN_ATTRS
590 _mm_set1_ps(float __w)
591 {
592  return (__m128){ __w, __w, __w, __w };
593 }
594 
595 /* Microsoft specific. */
596 static __inline__ __m128 __DEFAULT_FN_ATTRS
597 _mm_set_ps1(float __w)
598 {
599  return _mm_set1_ps(__w);
600 }
601 
602 static __inline__ __m128 __DEFAULT_FN_ATTRS
603 _mm_set_ps(float __z, float __y, float __x, float __w)
604 {
605  return (__m128){ __w, __x, __y, __z };
606 }
607 
608 static __inline__ __m128 __DEFAULT_FN_ATTRS
609 _mm_setr_ps(float __z, float __y, float __x, float __w)
610 {
611  return (__m128){ __z, __y, __x, __w };
612 }
613 
614 static __inline__ __m128 __DEFAULT_FN_ATTRS
615 _mm_setzero_ps(void)
616 {
617  return (__m128){ 0, 0, 0, 0 };
618 }
619 
620 static __inline__ void __DEFAULT_FN_ATTRS
621 _mm_storeh_pi(__m64 *__p, __m128 __a)
622 {
623  __builtin_ia32_storehps((__v2si *)__p, __a);
624 }
625 
626 static __inline__ void __DEFAULT_FN_ATTRS
627 _mm_storel_pi(__m64 *__p, __m128 __a)
628 {
629  __builtin_ia32_storelps((__v2si *)__p, __a);
630 }
631 
632 static __inline__ void __DEFAULT_FN_ATTRS
633 _mm_store_ss(float *__p, __m128 __a)
634 {
635  struct __mm_store_ss_struct {
636  float __u;
637  } __attribute__((__packed__, __may_alias__));
638  ((struct __mm_store_ss_struct*)__p)->__u = __a[0];
639 }
640 
641 static __inline__ void __DEFAULT_FN_ATTRS
642 _mm_storeu_ps(float *__p, __m128 __a)
643 {
644  __builtin_ia32_storeups(__p, __a);
645 }
646 
647 static __inline__ void __DEFAULT_FN_ATTRS
648 _mm_store1_ps(float *__p, __m128 __a)
649 {
650  __a = __builtin_shufflevector(__a, __a, 0, 0, 0, 0);
651  _mm_storeu_ps(__p, __a);
652 }
653 
654 static __inline__ void __DEFAULT_FN_ATTRS
655 _mm_store_ps1(float *__p, __m128 __a)
656 {
657  return _mm_store1_ps(__p, __a);
658 }
659 
660 static __inline__ void __DEFAULT_FN_ATTRS
661 _mm_store_ps(float *__p, __m128 __a)
662 {
663  *(__m128 *)__p = __a;
664 }
665 
666 static __inline__ void __DEFAULT_FN_ATTRS
667 _mm_storer_ps(float *__p, __m128 __a)
668 {
669  __a = __builtin_shufflevector(__a, __a, 3, 2, 1, 0);
670  _mm_store_ps(__p, __a);
671 }
672 
673 #define _MM_HINT_T0 3
674 #define _MM_HINT_T1 2
675 #define _MM_HINT_T2 1
676 #define _MM_HINT_NTA 0
677 
678 #ifndef _MSC_VER
679 /* FIXME: We have to #define this because "sel" must be a constant integer, and
680  Sema doesn't do any form of constant propagation yet. */
681 
682 #define _mm_prefetch(a, sel) (__builtin_prefetch((void *)(a), 0, (sel)))
683 #endif
684 
685 static __inline__ void __DEFAULT_FN_ATTRS
686 _mm_stream_pi(__m64 *__p, __m64 __a)
687 {
688  __builtin_ia32_movntq(__p, __a);
689 }
690 
691 static __inline__ void __DEFAULT_FN_ATTRS
692 _mm_stream_ps(float *__p, __m128 __a)
693 {
694  __builtin_ia32_movntps(__p, __a);
695 }
696 
697 static __inline__ void __DEFAULT_FN_ATTRS
698 _mm_sfence(void)
699 {
700  __builtin_ia32_sfence();
701 }
702 
703 static __inline__ int __DEFAULT_FN_ATTRS
704 _mm_extract_pi16(__m64 __a, int __n)
705 {
706  __v4hi __b = (__v4hi)__a;
707  return (unsigned short)__b[__n & 3];
708 }
709 
710 static __inline__ __m64 __DEFAULT_FN_ATTRS
711 _mm_insert_pi16(__m64 __a, int __d, int __n)
712 {
713  __v4hi __b = (__v4hi)__a;
714  __b[__n & 3] = __d;
715  return (__m64)__b;
716 }
717 
718 static __inline__ __m64 __DEFAULT_FN_ATTRS
719 _mm_max_pi16(__m64 __a, __m64 __b)
720 {
721  return (__m64)__builtin_ia32_pmaxsw((__v4hi)__a, (__v4hi)__b);
722 }
723 
724 static __inline__ __m64 __DEFAULT_FN_ATTRS
725 _mm_max_pu8(__m64 __a, __m64 __b)
726 {
727  return (__m64)__builtin_ia32_pmaxub((__v8qi)__a, (__v8qi)__b);
728 }
729 
730 static __inline__ __m64 __DEFAULT_FN_ATTRS
731 _mm_min_pi16(__m64 __a, __m64 __b)
732 {
733  return (__m64)__builtin_ia32_pminsw((__v4hi)__a, (__v4hi)__b);
734 }
735 
736 static __inline__ __m64 __DEFAULT_FN_ATTRS
737 _mm_min_pu8(__m64 __a, __m64 __b)
738 {
739  return (__m64)__builtin_ia32_pminub((__v8qi)__a, (__v8qi)__b);
740 }
741 
742 static __inline__ int __DEFAULT_FN_ATTRS
743 _mm_movemask_pi8(__m64 __a)
744 {
745  return __builtin_ia32_pmovmskb((__v8qi)__a);
746 }
747 
748 static __inline__ __m64 __DEFAULT_FN_ATTRS
749 _mm_mulhi_pu16(__m64 __a, __m64 __b)
750 {
751  return (__m64)__builtin_ia32_pmulhuw((__v4hi)__a, (__v4hi)__b);
752 }
753 
754 #define _mm_shuffle_pi16(a, n) __extension__ ({ \
755  __m64 __a = (a); \
756  (__m64)__builtin_ia32_pshufw((__v4hi)__a, (n)); })
757 
758 static __inline__ void __DEFAULT_FN_ATTRS
759 _mm_maskmove_si64(__m64 __d, __m64 __n, char *__p)
760 {
761  __builtin_ia32_maskmovq((__v8qi)__d, (__v8qi)__n, __p);
762 }
763 
764 static __inline__ __m64 __DEFAULT_FN_ATTRS
765 _mm_avg_pu8(__m64 __a, __m64 __b)
766 {
767  return (__m64)__builtin_ia32_pavgb((__v8qi)__a, (__v8qi)__b);
768 }
769 
770 static __inline__ __m64 __DEFAULT_FN_ATTRS
771 _mm_avg_pu16(__m64 __a, __m64 __b)
772 {
773  return (__m64)__builtin_ia32_pavgw((__v4hi)__a, (__v4hi)__b);
774 }
775 
776 static __inline__ __m64 __DEFAULT_FN_ATTRS
777 _mm_sad_pu8(__m64 __a, __m64 __b)
778 {
779  return (__m64)__builtin_ia32_psadbw((__v8qi)__a, (__v8qi)__b);
780 }
781 
782 static __inline__ unsigned int __DEFAULT_FN_ATTRS
783 _mm_getcsr(void)
784 {
785  return __builtin_ia32_stmxcsr();
786 }
787 
788 static __inline__ void __DEFAULT_FN_ATTRS
789 _mm_setcsr(unsigned int __i)
790 {
791  __builtin_ia32_ldmxcsr(__i);
792 }
793 
794 #define _mm_shuffle_ps(a, b, mask) __extension__ ({ \
795  __m128 __a = (a); \
796  __m128 __b = (b); \
797  (__m128)__builtin_shufflevector((__v4sf)__a, (__v4sf)__b, \
798  (mask) & 0x3, ((mask) & 0xc) >> 2, \
799  (((mask) & 0x30) >> 4) + 4, \
800  (((mask) & 0xc0) >> 6) + 4); })
801 
802 static __inline__ __m128 __DEFAULT_FN_ATTRS
803 _mm_unpackhi_ps(__m128 __a, __m128 __b)
804 {
805  return __builtin_shufflevector(__a, __b, 2, 6, 3, 7);
806 }
807 
808 static __inline__ __m128 __DEFAULT_FN_ATTRS
809 _mm_unpacklo_ps(__m128 __a, __m128 __b)
810 {
811  return __builtin_shufflevector(__a, __b, 0, 4, 1, 5);
812 }
813 
814 static __inline__ __m128 __DEFAULT_FN_ATTRS
815 _mm_move_ss(__m128 __a, __m128 __b)
816 {
817  return __builtin_shufflevector(__a, __b, 4, 1, 2, 3);
818 }
819 
820 static __inline__ __m128 __DEFAULT_FN_ATTRS
821 _mm_movehl_ps(__m128 __a, __m128 __b)
822 {
823  return __builtin_shufflevector(__a, __b, 6, 7, 2, 3);
824 }
825 
826 static __inline__ __m128 __DEFAULT_FN_ATTRS
827 _mm_movelh_ps(__m128 __a, __m128 __b)
828 {
829  return __builtin_shufflevector(__a, __b, 0, 1, 4, 5);
830 }
831 
832 static __inline__ __m128 __DEFAULT_FN_ATTRS
833 _mm_cvtpi16_ps(__m64 __a)
834 {
835  __m64 __b, __c;
836  __m128 __r;
837 
838  __b = _mm_setzero_si64();
839  __b = _mm_cmpgt_pi16(__b, __a);
840  __c = _mm_unpackhi_pi16(__a, __b);
841  __r = _mm_setzero_ps();
842  __r = _mm_cvtpi32_ps(__r, __c);
843  __r = _mm_movelh_ps(__r, __r);
844  __c = _mm_unpacklo_pi16(__a, __b);
845  __r = _mm_cvtpi32_ps(__r, __c);
846 
847  return __r;
848 }
849 
850 static __inline__ __m128 __DEFAULT_FN_ATTRS
851 _mm_cvtpu16_ps(__m64 __a)
852 {
853  __m64 __b, __c;
854  __m128 __r;
855 
856  __b = _mm_setzero_si64();
857  __c = _mm_unpackhi_pi16(__a, __b);
858  __r = _mm_setzero_ps();
859  __r = _mm_cvtpi32_ps(__r, __c);
860  __r = _mm_movelh_ps(__r, __r);
861  __c = _mm_unpacklo_pi16(__a, __b);
862  __r = _mm_cvtpi32_ps(__r, __c);
863 
864  return __r;
865 }
866 
867 static __inline__ __m128 __DEFAULT_FN_ATTRS
868 _mm_cvtpi8_ps(__m64 __a)
869 {
870  __m64 __b;
871 
872  __b = _mm_setzero_si64();
873  __b = _mm_cmpgt_pi8(__b, __a);
874  __b = _mm_unpacklo_pi8(__a, __b);
875 
876  return _mm_cvtpi16_ps(__b);
877 }
878 
879 static __inline__ __m128 __DEFAULT_FN_ATTRS
880 _mm_cvtpu8_ps(__m64 __a)
881 {
882  __m64 __b;
883 
884  __b = _mm_setzero_si64();
885  __b = _mm_unpacklo_pi8(__a, __b);
886 
887  return _mm_cvtpi16_ps(__b);
888 }
889 
890 static __inline__ __m128 __DEFAULT_FN_ATTRS
891 _mm_cvtpi32x2_ps(__m64 __a, __m64 __b)
892 {
893  __m128 __c;
894 
895  __c = _mm_setzero_ps();
896  __c = _mm_cvtpi32_ps(__c, __b);
897  __c = _mm_movelh_ps(__c, __c);
898 
899  return _mm_cvtpi32_ps(__c, __a);
900 }
901 
902 static __inline__ __m64 __DEFAULT_FN_ATTRS
903 _mm_cvtps_pi16(__m128 __a)
904 {
905  __m64 __b, __c;
906 
907  __b = _mm_cvtps_pi32(__a);
908  __a = _mm_movehl_ps(__a, __a);
909  __c = _mm_cvtps_pi32(__a);
910 
911  return _mm_packs_pi32(__b, __c);
912 }
913 
914 static __inline__ __m64 __DEFAULT_FN_ATTRS
915 _mm_cvtps_pi8(__m128 __a)
916 {
917  __m64 __b, __c;
918 
919  __b = _mm_cvtps_pi16(__a);
920  __c = _mm_setzero_si64();
921 
922  return _mm_packs_pi16(__b, __c);
923 }
924 
925 static __inline__ int __DEFAULT_FN_ATTRS
926 _mm_movemask_ps(__m128 __a)
927 {
928  return __builtin_ia32_movmskps(__a);
929 }
930 
931 #define _MM_SHUFFLE(z, y, x, w) (((z) << 6) | ((y) << 4) | ((x) << 2) | (w))
932 
933 #define _MM_EXCEPT_INVALID (0x0001)
934 #define _MM_EXCEPT_DENORM (0x0002)
935 #define _MM_EXCEPT_DIV_ZERO (0x0004)
936 #define _MM_EXCEPT_OVERFLOW (0x0008)
937 #define _MM_EXCEPT_UNDERFLOW (0x0010)
938 #define _MM_EXCEPT_INEXACT (0x0020)
939 #define _MM_EXCEPT_MASK (0x003f)
940 
941 #define _MM_MASK_INVALID (0x0080)
942 #define _MM_MASK_DENORM (0x0100)
943 #define _MM_MASK_DIV_ZERO (0x0200)
944 #define _MM_MASK_OVERFLOW (0x0400)
945 #define _MM_MASK_UNDERFLOW (0x0800)
946 #define _MM_MASK_INEXACT (0x1000)
947 #define _MM_MASK_MASK (0x1f80)
948 
949 #define _MM_ROUND_NEAREST (0x0000)
950 #define _MM_ROUND_DOWN (0x2000)
951 #define _MM_ROUND_UP (0x4000)
952 #define _MM_ROUND_TOWARD_ZERO (0x6000)
953 #define _MM_ROUND_MASK (0x6000)
954 
955 #define _MM_FLUSH_ZERO_MASK (0x8000)
956 #define _MM_FLUSH_ZERO_ON (0x8000)
957 #define _MM_FLUSH_ZERO_OFF (0x0000)
958 
959 #define _MM_GET_EXCEPTION_MASK() (_mm_getcsr() & _MM_MASK_MASK)
960 #define _MM_GET_EXCEPTION_STATE() (_mm_getcsr() & _MM_EXCEPT_MASK)
961 #define _MM_GET_FLUSH_ZERO_MODE() (_mm_getcsr() & _MM_FLUSH_ZERO_MASK)
962 #define _MM_GET_ROUNDING_MODE() (_mm_getcsr() & _MM_ROUND_MASK)
963 
964 #define _MM_SET_EXCEPTION_MASK(x) (_mm_setcsr((_mm_getcsr() & ~_MM_MASK_MASK) | (x)))
965 #define _MM_SET_EXCEPTION_STATE(x) (_mm_setcsr((_mm_getcsr() & ~_MM_EXCEPT_MASK) | (x)))
966 #define _MM_SET_FLUSH_ZERO_MODE(x) (_mm_setcsr((_mm_getcsr() & ~_MM_FLUSH_ZERO_MASK) | (x)))
967 #define _MM_SET_ROUNDING_MODE(x) (_mm_setcsr((_mm_getcsr() & ~_MM_ROUND_MASK) | (x)))
968 
969 #define _MM_TRANSPOSE4_PS(row0, row1, row2, row3) \
970 do { \
971  __m128 tmp3, tmp2, tmp1, tmp0; \
972  tmp0 = _mm_unpacklo_ps((row0), (row1)); \
973  tmp2 = _mm_unpacklo_ps((row2), (row3)); \
974  tmp1 = _mm_unpackhi_ps((row0), (row1)); \
975  tmp3 = _mm_unpackhi_ps((row2), (row3)); \
976  (row0) = _mm_movelh_ps(tmp0, tmp2); \
977  (row1) = _mm_movehl_ps(tmp2, tmp0); \
978  (row2) = _mm_movelh_ps(tmp1, tmp3); \
979  (row3) = _mm_movehl_ps(tmp3, tmp1); \
980 } while (0)
981 
982 /* Aliases for compatibility. */
983 #define _m_pextrw _mm_extract_pi16
984 #define _m_pinsrw _mm_insert_pi16
985 #define _m_pmaxsw _mm_max_pi16
986 #define _m_pmaxub _mm_max_pu8
987 #define _m_pminsw _mm_min_pi16
988 #define _m_pminub _mm_min_pu8
989 #define _m_pmovmskb _mm_movemask_pi8
990 #define _m_pmulhuw _mm_mulhi_pu16
991 #define _m_pshufw _mm_shuffle_pi16
992 #define _m_maskmovq _mm_maskmove_si64
993 #define _m_pavgb _mm_avg_pu8
994 #define _m_pavgw _mm_avg_pu16
995 #define _m_psadbw _mm_sad_pu8
996 #define _m_ _mm_
997 #define _m_ _mm_
998 
999 #undef __DEFAULT_FN_ATTRS
1000 
1001 /* Ugly hack for backwards-compatibility (compatible with gcc) */
1002 #if defined(__SSE2__) && !__has_feature(modules)
1003 #include <emmintrin.h>
1004 #endif
1005 
1006 #endif /* __SSE__ */
1007 
1008 #endif /* __XMMINTRIN_H */
char __v64qi __attribute__((__vector_size__(64)))
static vector float vector float __b
Definition: altivec.h:387
#define __DEFAULT_FN_ATTRS
Definition: adxintrin.h:32
static void int int __c
Definition: altivec.h:1911