clang  3.7.0
immintrin.h
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1 /*===---- immintrin.h - Intel intrinsics -----------------------------------===
2  *
3  * Permission is hereby granted, free of charge, to any person obtaining a copy
4  * of this software and associated documentation files (the "Software"), to deal
5  * in the Software without restriction, including without limitation the rights
6  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
7  * copies of the Software, and to permit persons to whom the Software is
8  * furnished to do so, subject to the following conditions:
9  *
10  * The above copyright notice and this permission notice shall be included in
11  * all copies or substantial portions of the Software.
12  *
13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
16  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
17  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
18  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
19  * THE SOFTWARE.
20  *
21  *===-----------------------------------------------------------------------===
22  */
23 
24 #ifndef __IMMINTRIN_H
25 #define __IMMINTRIN_H
26 
27 #ifdef __MMX__
28 #include <mmintrin.h>
29 #endif
30 
31 #ifdef __SSE__
32 #include <xmmintrin.h>
33 #endif
34 
35 #ifdef __SSE2__
36 #include <emmintrin.h>
37 #endif
38 
39 #ifdef __SSE3__
40 #include <pmmintrin.h>
41 #endif
42 
43 #ifdef __SSSE3__
44 #include <tmmintrin.h>
45 #endif
46 
47 #if defined (__SSE4_2__) || defined (__SSE4_1__)
48 #include <smmintrin.h>
49 #endif
50 
51 #if defined (__AES__) || defined (__PCLMUL__)
52 #include <wmmintrin.h>
53 #endif
54 
55 #ifdef __AVX__
56 #include <avxintrin.h>
57 #endif
58 
59 #ifdef __AVX2__
60 #include <avx2intrin.h>
61 #endif
62 
63 #ifdef __BMI__
64 #include <bmiintrin.h>
65 #endif
66 
67 #ifdef __BMI2__
68 #include <bmi2intrin.h>
69 #endif
70 
71 #ifdef __LZCNT__
72 #include <lzcntintrin.h>
73 #endif
74 
75 #ifdef __FMA__
76 #include <fmaintrin.h>
77 #endif
78 
79 #ifdef __AVX512F__
80 #include <avx512fintrin.h>
81 #endif
82 
83 #ifdef __AVX512VL__
84 #include <avx512vlintrin.h>
85 #endif
86 
87 #ifdef __AVX512BW__
88 #include <avx512bwintrin.h>
89 #endif
90 
91 #ifdef __AVX512CD__
92 #include <avx512cdintrin.h>
93 #endif
94 
95 #ifdef __AVX512DQ__
96 #include <avx512dqintrin.h>
97 #endif
98 
99 #if defined (__AVX512VL__) && defined (__AVX512BW__)
100 #include <avx512vlbwintrin.h>
101 #endif
102 
103 #if defined (__AVX512VL__) && defined (__AVX512DQ__)
104 #include <avx512vldqintrin.h>
105 #endif
106 
107 #ifdef __AVX512ER__
108 #include <avx512erintrin.h>
109 #endif
110 
111 #ifdef __RDRND__
112 static __inline__ int __attribute__((__always_inline__, __nodebug__))
113 _rdrand16_step(unsigned short *__p)
114 {
115  return __builtin_ia32_rdrand16_step(__p);
116 }
117 
118 static __inline__ int __attribute__((__always_inline__, __nodebug__))
119 _rdrand32_step(unsigned int *__p)
120 {
121  return __builtin_ia32_rdrand32_step(__p);
122 }
123 
124 #ifdef __x86_64__
125 static __inline__ int __attribute__((__always_inline__, __nodebug__))
126 _rdrand64_step(unsigned long long *__p)
127 {
128  return __builtin_ia32_rdrand64_step(__p);
129 }
130 #endif
131 #endif /* __RDRND__ */
132 
133 #ifdef __FSGSBASE__
134 #ifdef __x86_64__
135 static __inline__ unsigned int __attribute__((__always_inline__, __nodebug__))
136 _readfsbase_u32(void)
137 {
138  return __builtin_ia32_rdfsbase32();
139 }
140 
141 static __inline__ unsigned long long __attribute__((__always_inline__, __nodebug__))
142 _readfsbase_u64(void)
143 {
144  return __builtin_ia32_rdfsbase64();
145 }
146 
147 static __inline__ unsigned int __attribute__((__always_inline__, __nodebug__))
148 _readgsbase_u32(void)
149 {
150  return __builtin_ia32_rdgsbase32();
151 }
152 
153 static __inline__ unsigned long long __attribute__((__always_inline__, __nodebug__))
154 _readgsbase_u64(void)
155 {
156  return __builtin_ia32_rdgsbase64();
157 }
158 
159 static __inline__ void __attribute__((__always_inline__, __nodebug__))
160 _writefsbase_u32(unsigned int __V)
161 {
162  return __builtin_ia32_wrfsbase32(__V);
163 }
164 
165 static __inline__ void __attribute__((__always_inline__, __nodebug__))
166 _writefsbase_u64(unsigned long long __V)
167 {
168  return __builtin_ia32_wrfsbase64(__V);
169 }
170 
171 static __inline__ void __attribute__((__always_inline__, __nodebug__))
172 _writegsbase_u32(unsigned int __V)
173 {
174  return __builtin_ia32_wrgsbase32(__V);
175 }
176 
177 static __inline__ void __attribute__((__always_inline__, __nodebug__))
178 _writegsbase_u64(unsigned long long __V)
179 {
180  return __builtin_ia32_wrgsbase64(__V);
181 }
182 #endif
183 #endif /* __FSGSBASE__ */
184 
185 #ifdef __RTM__
186 #include <rtmintrin.h>
187 #endif
188 
189 #ifdef __RTM__
190 #include <xtestintrin.h>
191 #endif
192 
193 #ifdef __SHA__
194 #include <shaintrin.h>
195 #endif
196 
197 #include <fxsrintrin.h>
198 
199 /* Some intrinsics inside adxintrin.h are available only on processors with ADX,
200  * whereas others are also available at all times. */
201 #include <adxintrin.h>
202 
203 #endif /* __IMMINTRIN_H */
char __v64qi __attribute__((__vector_size__(64)))