LLVM Language Reference Manual

Abstract

This document is a reference manual for the LLVM assembly language. LLVM is a Static Single Assignment (SSA) based representation that provides type safety, low-level operations, flexibility, and the capability of representing ‘all’ high-level languages cleanly. It is the common code representation used throughout all phases of the LLVM compilation strategy.

Introduction

The LLVM code representation is designed to be used in three different forms: as an in-memory compiler IR, as an on-disk bitcode representation (suitable for fast loading by a Just-In-Time compiler), and as a human readable assembly language representation. This allows LLVM to provide a powerful intermediate representation for efficient compiler transformations and analysis, while providing a natural means to debug and visualize the transformations. The three different forms of LLVM are all equivalent. This document describes the human readable representation and notation.

The LLVM representation aims to be light-weight and low-level while being expressive, typed, and extensible at the same time. It aims to be a “universal IR” of sorts, by being at a low enough level that high-level ideas may be cleanly mapped to it (similar to how microprocessors are “universal IR’s”, allowing many source languages to be mapped to them). By providing type information, LLVM can be used as the target of optimizations: for example, through pointer analysis, it can be proven that a C automatic variable is never accessed outside of the current function, allowing it to be promoted to a simple SSA value instead of a memory location.

Well-Formedness

It is important to note that this document describes ‘well formed’ LLVM assembly language. There is a difference between what the parser accepts and what is considered ‘well formed’. For example, the following instruction is syntactically okay, but not well formed:

%x = add i32 1, %x

because the definition of %x does not dominate all of its uses. The LLVM infrastructure provides a verification pass that may be used to verify that an LLVM module is well formed. This pass is automatically run by the parser after parsing input assembly and by the optimizer before it outputs bitcode. The violations pointed out by the verifier pass indicate bugs in transformation passes or input to the parser.

Syntax

Identifiers

LLVM identifiers come in two basic types: global and local. Global identifiers (functions, global variables) begin with the '@' character. Local identifiers (register names, types) begin with the '%' character. Additionally, there are three different formats for identifiers, for different purposes:

1. Named values are represented as a string of characters with their prefix. For example, %foo, @DivisionByZero, %a.really.long.identifier. The actual regular expression used is ‘[%@][-a-zA-Z$._][-a-zA-Z$._0-9]*’. Identifiers that require other characters in their names can be surrounded with quotes. Special characters may be escaped using "\xx" where xx is the ASCII code for the character in hexadecimal. In this way, any character can be used in a name value, even quotes themselves. The "\01" prefix can be used on global values to suppress mangling.

2. Unnamed values are represented as an unsigned numeric value with their prefix. For example, %12, @2, %44.

3. Constants, which are described in the section Constants below.

LLVM requires that values start with a prefix for two reasons: Compilers don’t need to worry about name clashes with reserved words, and the set of reserved words may be expanded in the future without penalty. Additionally, unnamed identifiers allow a compiler to quickly come up with a temporary variable without having to avoid symbol table conflicts.

Reserved words in LLVM are very similar to reserved words in other languages. There are keywords for different opcodes (’add’, ‘bitcast’, ‘ret’, etc…), for primitive type names (’void’, ‘i32’, etc…), and others. These reserved words cannot conflict with variable names, because none of them start with a prefix character ('%' or '@').

Here is an example of LLVM code to multiply the integer variable ‘%X’ by 8:

The easy way:

%result = mul i32 %X, 8

After strength reduction:

%result = shl i32 %X, 3

And the hard way:

%0 = add i32 %X, %X           ; yields i32:%0
%1 = add i32 %0, %0           /* yields i32:%1 */
%result = add i32 %1, %1

This last way of multiplying %X by 8 illustrates several important lexical features of LLVM:

1. Comments are delimited with a ‘;’ and go until the end of line. Alternatively, comments can start with /* and terminate with */.

2. Unnamed temporaries are created when the result of a computation is not assigned to a named value.

3. By default, unnamed temporaries are numbered sequentially (using a per-function incrementing counter, starting with 0). However, when explicitly specifying temporary numbers, it is allowed to skip over numbers.

   Note that basic blocks and unnamed function parameters are included in this numbering. For example, if the entry basic block is not given a label name and all function parameters are named, then it will get number 0.

It also shows a convention that we follow in this document. When demonstrating instructions, we will follow an instruction with a comment that defines the type and name of value produced.

String constants

Strings in LLVM programs are delimited by " characters. Within a string, all bytes are treated literally with the exception of \ characters, which start escapes, and the first " character, which ends the string.

There are two kinds of escapes.

• \\ represents a single \ character.

• \ followed by two hexadecimal characters (0-9, a-f, or A-F) represents the byte with the given value (e.g. x00 represents a null byte).

To represent a " character, use \22. (\" will end the string with a trailing \.)

Newlines do not terminate string constants; strings can span multiple lines.

The interpretation of string constants (e.g. their character encoding) depends on context.

High Level Structure

Module Structure

LLVM programs are composed of Module’s, each of which is a translation unit of the input programs. Each module consists of functions, global variables, and symbol table entries. Modules may be combined together with the LLVM linker, which merges function (and global variable) definitions, resolves forward declarations, and merges symbol table entries. Here is an example of the “hello world” module:

; Declare the string constant as a global constant.
@.str = private unnamed_addr constant [13 x i8] c"hello world\0A\00"

; External declaration of the puts function
declare i32 @puts(ptr nocapture) nounwind

; Definition of main function
define i32 @main() {
  ; Call puts function to write out the string to stdout.
  call i32 @puts(ptr @.str)
  ret i32 0
}

; Named metadata
!0 = !{i32 42, null, !"string"}
!foo = !{!0}

This example is made up of a global variable named “.str”, an external declaration of the “puts” function, a function definition for “main” and named metadata “foo”.

In general, a module is made up of a list of global values (where both functions and global variables are global values). Global values are represented by a pointer to a memory location (in this case, a pointer to an array of char, and a pointer to a function), and have one of the following linkage types.

Linkage Types

All Global Variables and Functions have one of the following types of linkage:

private

Global values with “private” linkage are only directly accessible by objects in the current module. In particular, linking code into a module with a private global value may cause the private to be renamed as necessary to avoid collisions. Because the symbol is private to the module, all references can be updated. This doesn’t show up in any symbol table in the object file.

internal

Similar to private, but the value shows as a local symbol (STB_LOCAL in the case of ELF) in the object file. This corresponds to the notion of the ‘static’ keyword in C.

available_externally

Globals with “available_externally” linkage are never emitted into the object file corresponding to the LLVM module. From the linker’s perspective, an available_externally global is equivalent to an external declaration. They exist to allow inlining and other optimizations to take place given knowledge of the definition of the global, which is known to be somewhere outside the module. Globals with available_externally linkage are allowed to be discarded at will, and allow inlining and other optimizations. This linkage type is only allowed on definitions, not declarations.

linkonce

Globals with “linkonce” linkage are merged with other globals of the same name when linkage occurs. This can be used to implement some forms of inline functions, templates, or other code which must be generated in each translation unit that uses it, but where the body may be overridden with a more definitive definition later. Unreferenced linkonce globals are allowed to be discarded. Note that linkonce linkage does not actually allow the optimizer to inline the body of this function into callers because it doesn’t know if this definition of the function is the definitive definition within the program or whether it will be overridden by a stronger definition. To enable inlining and other optimizations, use “linkonce_odr” linkage.

weak

“weak” linkage has the same merging semantics as linkonce linkage, except that unreferenced globals with weak linkage may not be discarded. This is used for globals that are declared “weak” in C source code.

common

“common” linkage is most similar to “weak” linkage, but they are used for tentative definitions in C, such as “int X;” at global scope. Symbols with “common” linkage are merged in the same way as weak symbols, and they may not be deleted if unreferenced. common symbols may not have an explicit section, must have a zero initializer, and may not be marked ‘constant’. Functions and aliases may not have common linkage.

appending

“appending” linkage may only be applied to global variables of pointer to array type. When two global variables with appending linkage are linked together, the two global arrays are appended together. This is the LLVM, typesafe, equivalent of having the system linker append together “sections” with identical names when .o files are linked.

Unfortunately this doesn’t correspond to any feature in .o files, so it can only be used for variables like llvm.global_ctors which llvm interprets specially.

extern_weak

The semantics of this linkage follow the ELF object file model: the symbol is weak until linked, if not linked, the symbol becomes null instead of being an undefined reference.

linkonce_odr, weak_odr

The odr suffix indicates that all globals defined with the given name are equivalent, along the lines of the C++ “one definition rule” (“ODR”). Informally, this means we can inline functions and fold loads of constants.

Formally, use the following definition: when an odr function is called, one of the definitions is non-deterministically chosen to run. For odr variables, if any byte in the value is not equal in all initializers, that byte is a poison value. For aliases and ifuncs, apply the rule for the underlying function or variable.

These linkage types are otherwise the same as their non-odr versions.

external

If none of the above identifiers are used, the global is externally visible, meaning that it participates in linkage and can be used to resolve external symbol references.

It is illegal for a global variable or function declaration to have any linkage type other than external or extern_weak.

Calling Conventions

LLVM functions, calls and invokes can all have an optional calling convention specified for the call. The calling convention of any pair of dynamic caller/callee must match, or the behavior of the program is undefined. The following calling conventions are supported by LLVM, and more may be added in the future:

“ccc” - The C calling convention

This calling convention (the default if no other calling convention is specified) matches the target C calling conventions. This calling convention supports varargs function calls and tolerates some mismatch in the declared prototype and implemented declaration of the function (as does normal C).

“fastcc” - The fast calling convention

This calling convention attempts to make calls as fast as possible (e.g. by passing things in registers). This calling convention allows the target to use whatever tricks it wants to produce fast code for the target, without having to conform to an externally specified ABI (Application Binary Interface). Tail calls can only be optimized when this, the tailcc, the GHC or the HiPE convention is used. This calling convention does not support varargs and requires the prototype of all callees to exactly match the prototype of the function definition.

“coldcc” - The cold calling convention

This calling convention attempts to make code in the caller as efficient as possible under the assumption that the call is not commonly executed. As such, these calls often preserve all registers so that the call does not break any live ranges in the caller side. This calling convention does not support varargs and requires the prototype of all callees to exactly match the prototype of the function definition. Furthermore the inliner doesn’t consider such function calls for inlining.

“ghccc” - GHC convention

This calling convention has been implemented specifically for use by the Glasgow Haskell Compiler (GHC). It passes everything in registers, going to extremes to achieve this by disabling callee save registers. This calling convention should not be used lightly but only for specific situations such as an alternative to the register pinning performance technique often used when implementing functional programming languages. At the moment only X86, AArch64, and RISCV support this convention. The following limitations exist:

• On X86-32 only up to 4 bit type parameters are supported. No floating-point types are supported.

• On X86-64 only up to 10 bit type parameters and 6 floating-point parameters are supported.

• On AArch64 only up to 4 32-bit floating-point parameters, 4 64-bit floating-point parameters, and 10 bit type parameters are supported.

• RISCV64 only supports up to 11 bit type parameters, 4 32-bit floating-point parameters, and 4 64-bit floating-point parameters.

This calling convention supports tail call optimization but requires both the caller and callee are using it.

“cc 11” - The HiPE calling convention

This calling convention has been implemented specifically for use by the High-Performance Erlang (HiPE) compiler, the native code compiler of the Ericsson’s Open Source Erlang/OTP system. It uses more registers for argument passing than the ordinary C calling convention and defines no callee-saved registers. The calling convention properly supports tail call optimization but requires that both the caller and the callee use it. It uses a register pinning mechanism, similar to GHC’s convention, for keeping frequently accessed runtime components pinned to specific hardware registers. At the moment only X86 supports this convention (both 32 and 64 bit).

“anyregcc” - Dynamic calling convention for code patching

This is a special convention that supports patching an arbitrary code sequence in place of a call site. This convention forces the call arguments into registers but allows them to be dynamically allocated. This can currently only be used with calls to llvm.experimental.patchpoint because only this intrinsic records the location of its arguments in a side table. See Stack maps and patch points in LLVM.

“preserve_mostcc” - The PreserveMost calling convention

This calling convention attempts to make the code in the caller as unintrusive as possible. This convention behaves identically to the C calling convention on how arguments and return values are passed, but it uses a different set of caller/callee-saved registers. This alleviates the burden of saving and recovering a large register set before and after the call in the caller. If the arguments are passed in callee-saved registers, then they will be preserved by the callee across the call. This doesn’t apply for values returned in callee-saved registers.

• On X86-64 the callee preserves all general purpose registers, except for R11 and return registers, if any. R11 can be used as a scratch register. The treatment of floating-point registers (XMMs/YMMs) matches the OS’s C calling convention: on most platforms, they are not preserved and need to be saved by the caller, but on Windows, xmm6-xmm15 are preserved.

• On AArch64 the callee preserve all general purpose registers, except X0-X8 and X16-X18.

The idea behind this convention is to support calls to runtime functions that have a hot path and a cold path. The hot path is usually a small piece of code that doesn’t use many registers. The cold path might need to call out to another function and therefore only needs to preserve the caller-saved registers, which haven’t already been saved by the caller. The PreserveMost calling convention is very similar to the cold calling convention in terms of caller/callee-saved registers, but they are used for different types of function calls. coldcc is for function calls that are rarely executed, whereas preserve_mostcc function calls are intended to be on the hot path and definitely executed a lot. Furthermore preserve_mostcc doesn’t prevent the inliner from inlining the function call.

This calling convention will be used by a future version of the ObjectiveC runtime and should therefore still be considered experimental at this time. Although this convention was created to optimize certain runtime calls to the ObjectiveC runtime, it is not limited to this runtime and might be used by other runtimes in the future too. The current implementation only supports X86-64, but the intention is to support more architectures in the future.

“preserve_allcc” - The PreserveAll calling convention

This calling convention attempts to make the code in the caller even less intrusive than the PreserveMost calling convention. This calling convention also behaves identical to the C calling convention on how arguments and return values are passed, but it uses a different set of caller/callee-saved registers. This removes the burden of saving and recovering a large register set before and after the call in the caller. If the arguments are passed in callee-saved registers, then they will be preserved by the callee across the call. This doesn’t apply for values returned in callee-saved registers.

• On X86-64 the callee preserves all general purpose registers, except for R11. R11 can be used as a scratch register. Furthermore it also preserves all floating-point registers (XMMs/YMMs).

• On AArch64 the callee preserve all general purpose registers, except X0-X8 and X16-X18. Furthermore it also preserves lower 128 bits of V8-V31 SIMD - floating point registers.

The idea behind this convention is to support calls to runtime functions that don’t need to call out to any other functions.

This calling convention, like the PreserveMost calling convention, will be used by a future version of the ObjectiveC runtime and should be considered experimental at this time.

“preserve_nonecc” - The PreserveNone calling convention

This calling convention doesn’t preserve any general registers. So all general registers are caller saved registers. It also uses all general registers to pass arguments. This attribute doesn’t impact non-general purpose registers (e.g. floating point registers, on X86 XMMs/YMMs). Non-general purpose registers still follow the standard c calling convention. Currently it is for x86_64 and AArch64 only.

“cxx_fast_tlscc” - The CXX_FAST_TLS calling convention for access functions

Clang generates an access function to access C++-style TLS. The access function generally has an entry block, an exit block and an initialization block that is run at the first time. The entry and exit blocks can access a few TLS IR variables, each access will be lowered to a platform-specific sequence.

This calling convention aims to minimize overhead in the caller by preserving as many registers as possible (all the registers that are preserved on the fast path, composed of the entry and exit blocks).

This calling convention behaves identical to the C calling convention on how arguments and return values are passed, but it uses a different set of caller/callee-saved registers.

Given that each platform has its own lowering sequence, hence its own set of preserved registers, we can’t use the existing PreserveMost.

• On X86-64 the callee preserves all general purpose registers, except for RDI and RAX.

“tailcc” - Tail callable calling convention

This calling convention ensures that calls in tail position will always be tail call optimized. This calling convention is equivalent to fastcc, except for an additional guarantee that tail calls will be produced whenever possible. Tail calls can only be optimized when this, the fastcc, the GHC or the HiPE convention is used. This calling convention does not support varargs and requires the prototype of all callees to exactly match the prototype of the function definition.

“swiftcc” - This calling convention is used for Swift language.

• On X86-64 RCX and R8 are available for additional integer returns, and XMM2 and XMM3 are available for additional FP/vector returns.

• On iOS platforms, we use AAPCS-VFP calling convention.

“swifttailcc”

This calling convention is like swiftcc in most respects, but also the callee pops the argument area of the stack so that mandatory tail calls are possible as in tailcc.

“cfguard_checkcc” - Windows Control Flow Guard (Check mechanism)

This calling convention is used for the Control Flow Guard check function, calls to which can be inserted before indirect calls to check that the call target is a valid function address. The check function has no return value, but it will trigger an OS-level error if the address is not a valid target. The set of registers preserved by the check function, and the register containing the target address are architecture-specific.

• On X86 the target address is passed in ECX.

• On ARM the target address is passed in R0.

• On AArch64 the target address is passed in X15.

“cc <n>” - Numbered convention

Any calling convention may be specified by number, allowing target-specific calling conventions to be used. Target specific calling conventions start at 64.

More calling conventions can be added/defined on an as-needed basis, to support Pascal conventions or any other well-known target-independent convention.

Visibility Styles

All Global Variables and Functions have one of the following visibility styles:

“default” - Default style

On targets that use the ELF object file format, default visibility means that the declaration is visible to other modules and, in shared libraries, means that the declared entity may be overridden. On Darwin, default visibility means that the declaration is visible to other modules. On XCOFF, default visibility means no explicit visibility bit will be set and whether the symbol is visible (i.e “exported”) to other modules depends primarily on export lists provided to the linker. Default visibility corresponds to “external linkage” in the language.

“hidden” - Hidden style

Two declarations of an object with hidden visibility refer to the same object if they are in the same shared object. Usually, hidden visibility indicates that the symbol will not be placed into the dynamic symbol table, so no other module (executable or shared library) can reference it directly.

“protected” - Protected style

On ELF, protected visibility indicates that the symbol will be placed in the dynamic symbol table, but that references within the defining module will bind to the local symbol. That is, the symbol cannot be overridden by another module.

A symbol with internal or private linkage must have default visibility.

DLL Storage Classes

All Global Variables, Functions and Aliases can have one of the following DLL storage class:

dllimport

“dllimport” causes the compiler to reference a function or variable via a global pointer to a pointer that is set up by the DLL exporting the symbol. On Microsoft Windows targets, the pointer name is formed by combining __imp_ and the function or variable name.

dllexport

On Microsoft Windows targets, “dllexport” causes the compiler to provide a global pointer to a pointer in a DLL, so that it can be referenced with the dllimport attribute. the pointer name is formed by combining __imp_ and the function or variable name. On XCOFF targets, dllexport indicates that the symbol will be made visible to other modules using “exported” visibility and thus placed by the linker in the loader section symbol table. Since this storage class exists for defining a dll interface, the compiler, assembler and linker know it is externally referenced and must refrain from deleting the symbol.

A symbol with internal or private linkage cannot have a DLL storage class.

Thread Local Storage Models

A variable may be defined as thread_local, which means that it will not be shared by threads (each thread will have a separated copy of the variable). Not all targets support thread-local variables. Optionally, a TLS model may be specified:

localdynamic

For variables that are only used within the current shared library.

initialexec

For variables in modules that will not be loaded dynamically.

localexec

For variables defined in the executable and only used within it.

If no explicit model is given, the “general dynamic” model is used.

The models correspond to the ELF TLS models; see ELF Handling For Thread-Local Storage for more information on under which circumstances the different models may be used. The target may choose a different TLS model if the specified model is not supported, or if a better choice of model can be made.

A model can also be specified in an alias, but then it only governs how the alias is accessed. It will not have any effect in the aliasee.

For platforms without linker support of ELF TLS model, the -femulated-tls flag can be used to generate GCC compatible emulated TLS code.

Runtime Preemption Specifiers

Global variables, functions and aliases may have an optional runtime preemption specifier. If a preemption specifier isn’t given explicitly, then a symbol is assumed to be dso_preemptable.

dso_preemptable

Indicates that the function or variable may be replaced by a symbol from outside the linkage unit at runtime.

dso_local

The compiler may assume that a function or variable marked as dso_local will resolve to a symbol within the same linkage unit. Direct access will be generated even if the definition is not within this compilation unit.

Structure Types

LLVM IR allows you to specify both “identified” and “literal” structure types. Literal types are uniqued structurally, but identified types are never uniqued. An opaque structural type can also be used to forward declare a type that is not yet available.

An example of an identified structure specification is:

%mytype = type { %mytype*, i32 }

Prior to the LLVM 3.0 release, identified types were structurally uniqued. Only literal types are uniqued in recent versions of LLVM.

Non-Integral Pointer Type

Note: non-integral pointer types are a work in progress, and they should be considered experimental at this time.

LLVM IR optionally allows the frontend to denote pointers in certain address spaces as “non-integral” via the datalayout string. Non-integral pointer types represent pointers that have an unspecified bitwise representation; that is, the integral representation may be target dependent or unstable (not backed by a fixed integer).

inttoptr and ptrtoint instructions have the same semantics as for integral (i.e. normal) pointers in that they convert integers to and from corresponding pointer types, but there are additional implications to be aware of. Because the bit-representation of a non-integral pointer may not be stable, two identical casts of the same operand may or may not return the same value. Said differently, the conversion to or from the non-integral type depends on environmental state in an implementation defined manner.

If the frontend wishes to observe a particular value following a cast, the generated IR must fence with the underlying environment in an implementation defined manner. (In practice, this tends to require noinline routines for such operations.)

From the perspective of the optimizer, inttoptr and ptrtoint for non-integral types are analogous to ones on integral types with one key exception: the optimizer may not, in general, insert new dynamic occurrences of such casts. If a new cast is inserted, the optimizer would need to either ensure that a) all possible values are valid, or b) appropriate fencing is inserted. Since the appropriate fencing is implementation defined, the optimizer can’t do the latter. The former is challenging as many commonly expected properties, such as ptrtoint(v)-ptrtoint(v) == 0, don’t hold for non-integral types. Similar restrictions apply to intrinsics that might examine the pointer bits, such as llvm.ptrmask.

The alignment information provided by the frontend for a non-integral pointer (typically using attributes or metadata) must be valid for every possible representation of the pointer.

Global Variables

Global variables define regions of memory allocated at compilation time instead of run-time.

Global variable definitions must be initialized.

Global variables in other translation units can also be declared, in which case they don’t have an initializer.

Global variables can optionally specify a linkage type.

Either global variable definitions or declarations may have an explicit section to be placed in and may have an optional explicit alignment specified. If there is a mismatch between the explicit or inferred section information for the variable declaration and its definition the resulting behavior is undefined.

A variable may be defined as a global constant, which indicates that the contents of the variable will never be modified (enabling better optimization, allowing the global data to be placed in the read-only section of an executable, etc). Note that variables that need runtime initialization cannot be marked constant as there is a store to the variable.

LLVM explicitly allows declarations of global variables to be marked constant, even if the final definition of the global is not. This capability can be used to enable slightly better optimization of the program, but requires the language definition to guarantee that optimizations based on the ‘constantness’ are valid for the translation units that do not include the definition.

As SSA values, global variables define pointer values that are in scope (i.e. they dominate) all basic blocks in the program. Global variables always define a pointer to their “content” type because they describe a region of memory, and all memory objects in LLVM are accessed through pointers.

Global variables can be marked with unnamed_addr which indicates that the address is not significant, only the content. Constants marked like this can be merged with other constants if they have the same initializer. Note that a constant with significant address can be merged with a unnamed_addr constant, the result being a constant whose address is significant.

If the local_unnamed_addr attribute is given, the address is known to not be significant within the module.

A global variable may be declared to reside in a target-specific numbered address space. For targets that support them, address spaces may affect how optimizations are performed and/or what target instructions are used to access the variable. The default address space is zero. The address space qualifier must precede any other attributes.

LLVM allows an explicit section to be specified for globals. If the target supports it, it will emit globals to the section specified. Additionally, the global can placed in a comdat if the target has the necessary support.

External declarations may have an explicit section specified. Section information is retained in LLVM IR for targets that make use of this information. Attaching section information to an external declaration is an assertion that its definition is located in the specified section. If the definition is located in a different section, the behavior is undefined.

LLVM allows an explicit code model to be specified for globals. If the target supports it, it will emit globals in the code model specified, overriding the code model used to compile the translation unit. The allowed values are “tiny”, “small”, “kernel”, “medium”, “large”. This may be extended in the future to specify global data layout that doesn’t cleanly fit into a specific code model.

By default, global initializers are optimized by assuming that global variables defined within the module are not modified from their initial values before the start of the global initializer. This is true even for variables potentially accessible from outside the module, including those with external linkage or appearing in @llvm.used or dllexported variables. This assumption may be suppressed by marking the variable with externally_initialized.

An explicit alignment may be specified for a global, which must be a power of 2. If not present, or if the alignment is set to zero, the alignment of the global is set by the target to whatever it feels convenient. If an explicit alignment is specified, the global is forced to have exactly that alignment. Targets and optimizers are not allowed to over-align the global if the global has an assigned section. In this case, the extra alignment could be observable: for example, code could assume that the globals are densely packed in their section and try to iterate over them as an array, alignment padding would break this iteration. For TLS variables, the module flag MaxTLSAlign, if present, limits the alignment to the given value. Optimizers are not allowed to impose a stronger alignment on these variables. The maximum alignment is 1 << 32.

For global variable declarations, as well as definitions that may be replaced at link time (linkonce, weak, extern_weak and common linkage types), the allocation size and alignment of the definition it resolves to must be greater than or equal to that of the declaration or replaceable definition, otherwise the behavior is undefined.

Globals can also have a DLL storage class, an optional runtime preemption specifier, an optional global attributes and an optional list of attached metadata.

Variables and aliases can have a Thread Local Storage Model.

Globals cannot be or contain Scalable vectors because their size is unknown at compile time. They are allowed in structs to facilitate intrinsics returning multiple values. Generally, structs containing scalable vectors are not considered “sized” and cannot be used in loads, stores, allocas, or GEPs. The only exception to this rule is for structs that contain scalable vectors of the same type (e.g. {<vscale x 2 x i32>, <vscale x 2 x i32>} contains the same type while {<vscale x 2 x i32>, <vscale x 2 x i64>} doesn’t). These kinds of structs (we may call them homogeneous scalable vector structs) are considered sized and can be used in loads, stores, allocas, but not GEPs.

Globals with toc-data attribute set are stored in TOC of XCOFF. Their alignments are not larger than that of a TOC entry. Optimizations should not increase their alignments to mitigate TOC overflow.

Syntax:

@<GlobalVarName> = [Linkage] [PreemptionSpecifier] [Visibility]
                   [DLLStorageClass] [ThreadLocal]
                   [(unnamed_addr|local_unnamed_addr)] [AddrSpace]
                   [ExternallyInitialized]
                   <global | constant> <Type> [<InitializerConstant>]
                   [, section "name"] [, partition "name"]
                   [, comdat [($name)]] [, align <Alignment>]
                   [, code_model "model"]
                   [, no_sanitize_address] [, no_sanitize_hwaddress]
                   [, sanitize_address_dyninit] [, sanitize_memtag]
                   (, !name !N)*

For example, the following defines a global in a numbered address space with an initializer, section, and alignment:

@G = addrspace(5) constant float 1.0, section "foo", align 4

The following example just declares a global variable

@G = external global i32

The following example defines a global variable with the large code model:

@G = internal global i32 0, code_model "large"

The following example defines a thread-local global with the initialexec TLS model:

@G = thread_local(initialexec) global i32 0, align 4

Functions

LLVM function definitions consist of the “define” keyword, an optional linkage type, an optional runtime preemption specifier, an optional visibility style, an optional DLL storage class, an optional calling convention, an optional unnamed_addr attribute, a return type, an optional parameter attribute for the return type, a function name, a (possibly empty) argument list (each with optional parameter attributes), optional function attributes, an optional address space, an optional section, an optional partition, an optional alignment, an optional comdat, an optional garbage collector name, an optional prefix, an optional prologue, an optional personality, an optional list of attached metadata, an opening curly brace, a list of basic blocks, and a closing curly brace.

Syntax:

define [linkage] [PreemptionSpecifier] [visibility] [DLLStorageClass]
       [cconv] [ret attrs]
       <ResultType> @<FunctionName> ([argument list])
       [(unnamed_addr|local_unnamed_addr)] [AddrSpace] [fn Attrs]
       [section "name"] [partition "name"] [comdat [($name)]] [align N]
       [gc] [prefix Constant] [prologue Constant] [personality Constant]
       (!name !N)* { ... }

The argument list is a comma separated sequence of arguments where each argument is of the following form:

Syntax:

<type> [parameter Attrs] [name]

LLVM function declarations consist of the “declare” keyword, an optional linkage type, an optional visibility style, an optional DLL storage class, an optional calling convention, an optional unnamed_addr or local_unnamed_addr attribute, an optional address space, a return type, an optional parameter attribute for the return type, a function name, a possibly empty list of arguments, an optional alignment, an optional garbage collector name, an optional prefix, and an optional prologue.

Syntax:

declare [linkage] [visibility] [DLLStorageClass]
        [cconv] [ret attrs]
        <ResultType> @<FunctionName> ([argument list])
        [(unnamed_addr|local_unnamed_addr)] [align N] [gc]
        [prefix Constant] [prologue Constant]

A function definition contains a list of basic blocks, forming the CFG (Control Flow Graph) for the function. Each basic block may optionally start with a label (giving the basic block a symbol table entry), contains a list of instructions and debug records, and ends with a terminator instruction (such as a branch or function return). If an explicit label name is not provided, a block is assigned an implicit numbered label, using the next value from the same counter as used for unnamed temporaries (see above). For example, if a function entry block does not have an explicit label, it will be assigned label “%0”, then the first unnamed temporary in that block will be “%1”, etc. If a numeric label is explicitly specified, it must match the numeric label that would be used implicitly.

The first basic block in a function is special in two ways: it is immediately executed on entrance to the function, and it is not allowed to have predecessor basic blocks (i.e. there can not be any branches to the entry block of a function). Because the block can have no predecessors, it also cannot have any PHI nodes.

LLVM allows an explicit section to be specified for functions. If the target supports it, it will emit functions to the section specified. Additionally, the function can be placed in a COMDAT.

An explicit alignment may be specified for a function. If not present, or if the alignment is set to zero, the alignment of the function is set by the target to whatever it feels convenient. If an explicit alignment is specified, the function is forced to have at least that much alignment. All alignments must be a power of 2.

If the unnamed_addr attribute is given, the address is known to not be significant and two identical functions can be merged.

If the local_unnamed_addr attribute is given, the address is known to not be significant within the module.

If an explicit address space is not given, it will default to the program address space from the datalayout string.

Aliases

Aliases, unlike function or variables, don’t create any new data. They are just a new symbol and metadata for an existing position.

Aliases have a name and an aliasee that is either a global value or a constant expression.

Aliases may have an optional linkage type, an optional runtime preemption specifier, an optional visibility style, an optional DLL storage class and an optional tls model.

Syntax:

@<Name> = [Linkage] [PreemptionSpecifier] [Visibility] [DLLStorageClass] [ThreadLocal] [(unnamed_addr|local_unnamed_addr)] alias <AliaseeTy>, <AliaseeTy>* @<Aliasee>
          [, partition "name"]

The linkage must be one of private, internal, linkonce, weak, linkonce_odr, weak_odr, external, available_externally. Note that some system linkers might not correctly handle dropping a weak symbol that is aliased.

Aliases that are not unnamed_addr are guaranteed to have the same address as the aliasee expression. unnamed_addr ones are only guaranteed to point to the same content.

If the local_unnamed_addr attribute is given, the address is known to not be significant within the module.

Since aliases are only a second name, some restrictions apply, of which some can only be checked when producing an object file:

• The expression defining the aliasee must be computable at assembly time. Since it is just a name, no relocations can be used.

• No alias in the expression can be weak as the possibility of the intermediate alias being overridden cannot be represented in an object file.

• If the alias has the available_externally linkage, the aliasee must be an available_externally global value; otherwise the aliasee can be an expression but no global value in the expression can be a declaration, since that would require a relocation, which is not possible.

• If either the alias or the aliasee may be replaced by a symbol outside the module at link time or runtime, any optimization cannot replace the alias with the aliasee, since the behavior may be different. The alias may be used as a name guaranteed to point to the content in the current module.

IFuncs

IFuncs, like as aliases, don’t create any new data or func. They are just a new symbol that is resolved at runtime by calling a resolver function.

On ELF platforms, IFuncs are resolved by the dynamic linker at load time. On Mach-O platforms, they are lowered in terms of .symbol_resolver functions, which lazily resolve the callee the first time they are called.

IFunc may have an optional linkage type and an optional visibility style.

Syntax:

@<Name> = [Linkage] [PreemptionSpecifier] [Visibility] ifunc <IFuncTy>, <ResolverTy>* @<Resolver>
          [, partition "name"]

Comdats

Comdat IR provides access to object file COMDAT/section group functionality which represents interrelated sections.

Comdats have a name which represents the COMDAT key and a selection kind to provide input on how the linker deduplicates comdats with the same key in two different object files. A comdat must be included or omitted as a unit. Discarding the whole comdat is allowed but discarding a subset is not.

A global object may be a member of at most one comdat. Aliases are placed in the same COMDAT that their aliasee computes to, if any.

Syntax:

$<Name> = comdat SelectionKind

For selection kinds other than nodeduplicate, only one of the duplicate comdats may be retained by the linker and the members of the remaining comdats must be discarded. The following selection kinds are supported:

any

The linker may choose any COMDAT key, the choice is arbitrary.

exactmatch

The linker may choose any COMDAT key but the sections must contain the same data.

largest

The linker will choose the section containing the largest COMDAT key.

nodeduplicate

No deduplication is performed.

samesize

The linker may choose any COMDAT key but the sections must contain the same amount of data.

• XCOFF and Mach-O don’t support COMDATs.

• COFF supports all selection kinds. Non-nodeduplicate selection kinds need a non-local linkage COMDAT symbol.

• ELF supports any and nodeduplicate.

• WebAssembly only supports any.

Here is an example of a COFF COMDAT where a function will only be selected if the COMDAT key’s section is the largest:

$foo = comdat largest
@foo = global i32 2, comdat($foo)

define void @bar() comdat($foo) {
  ret void
}

In a COFF object file, this will create a COMDAT section with selection kind IMAGE_COMDAT_SELECT_LARGEST containing the contents of the @foo symbol and another COMDAT section with selection kind IMAGE_COMDAT_SELECT_ASSOCIATIVE which is associated with the first COMDAT section and contains the contents of the @bar symbol.

As a syntactic sugar the $name can be omitted if the name is the same as the global name:

$foo = comdat any
@foo = global i32 2, comdat
@bar = global i32 3, comdat($foo)

There are some restrictions on the properties of the global object. It, or an alias to it, must have the same name as the COMDAT group when targeting COFF. The contents and size of this object may be used during link-time to determine which COMDAT groups get selected depending on the selection kind. Because the name of the object must match the name of the COMDAT group, the linkage of the global object must not be local; local symbols can get renamed if a collision occurs in the symbol table.

The combined use of COMDATS and section attributes may yield surprising results. For example:

$foo = comdat any
$bar = comdat any
@g1 = global i32 42, section "sec", comdat($foo)
@g2 = global i32 42, section "sec", comdat($bar)

From the object file perspective, this requires the creation of two sections with the same name. This is necessary because both globals belong to different COMDAT groups and COMDATs, at the object file level, are represented by sections.

Note that certain IR constructs like global variables and functions may create COMDATs in the object file in addition to any which are specified using COMDAT IR. This arises when the code generator is configured to emit globals in individual sections (e.g. when -data-sections or -function-sections is supplied to llc).

Named Metadata

Named metadata is a collection of metadata. Metadata nodes (but not metadata strings) are the only valid operands for a named metadata.

1. Named metadata are represented as a string of characters with the metadata prefix. The rules for metadata names are the same as for identifiers, but quoted names are not allowed. "\xx" type escapes are still valid, which allows any character to be part of a name.

Syntax:

; Some unnamed metadata nodes, which are referenced by the named metadata.
!0 = !{!"zero"}
!1 = !{!"one"}
!2 = !{!"two"}
; A named metadata.
!name = !{!0, !1, !2}

Parameter Attributes

The return type and each parameter of a function type may have a set of parameter attributes associated with them. Parameter attributes are used to communicate additional information about the result or parameters of a function. Parameter attributes are considered to be part of the function, not of the function type, so functions with different parameter attributes can have the same function type.

Parameter attributes are either simple keywords or strings that follow the specified type. Multiple parameter attributes, when required, are separated by spaces. For example:

declare i32 @printf(ptr noalias nocapture, ...)
declare i32 @atoi(i8 zeroext)
declare signext i8 @returns_signed_char()
define void @baz(i32 "amdgpu-flat-work-group-size"="1,256" %x)

Note that any attributes for the function result (nonnull, signext) come before the result type.

If an integer argument to a function is not marked signext/zeroext/noext, the kind of extension used is target-specific. Some targets depend for correctness on the kind of extension to be explicitly specified.

Currently, only the following parameter attributes are defined:

zeroext

This indicates to the code generator that the parameter or return value should be zero-extended to the extent required by the target’s ABI by the caller (for a parameter) or the callee (for a return value).

signext

This indicates to the code generator that the parameter or return value should be sign-extended to the extent required by the target’s ABI (which is usually 32-bits) by the caller (for a parameter) or the callee (for a return value).

noext

This indicates to the code generator that the parameter or return value has the high bits undefined, as for a struct in register, and therefore does not need to be sign or zero extended. This is the same as default behavior and is only actually used (by some targets) to validate that one of the attributes is always present.

inreg

This indicates that this parameter or return value should be treated in a special target-dependent fashion while emitting code for a function call or return (usually, by putting it in a register as opposed to memory, though some targets use it to distinguish between two different kinds of registers). Use of this attribute is target-specific.

byval(<ty>)

This indicates that the pointer parameter should really be passed by value to the function. The attribute implies that a hidden copy of the pointee is made between the caller and the callee, so the callee is unable to modify the value in the caller. This attribute is only valid on LLVM pointer arguments. It is generally used to pass structs and arrays by value, but is also valid on pointers to scalars. The copy is considered to belong to the caller not the callee (for example, readonly functions should not write to byval parameters). This is not a valid attribute for return values.

The byval type argument indicates the in-memory value type, and must be the same as the pointee type of the argument.

The byval attribute also supports specifying an alignment with the align attribute. It indicates the alignment of the stack slot to form and the known alignment of the pointer specified to the call site. If the alignment is not specified, then the code generator makes a target-specific assumption.

byref(<ty>)

The byref argument attribute allows specifying the pointee memory type of an argument. This is similar to byval, but does not imply a copy is made anywhere, or that the argument is passed on the stack. This implies the pointer is dereferenceable up to the storage size of the type.

It is not generally permissible to introduce a write to an byref pointer. The pointer may have any address space and may be read only.

This is not a valid attribute for return values.

The alignment for an byref parameter can be explicitly specified by combining it with the align attribute, similar to byval. If the alignment is not specified, then the code generator makes a target-specific assumption.

This is intended for representing ABI constraints, and is not intended to be inferred for optimization use.

preallocated(<ty>)

This indicates that the pointer parameter should really be passed by value to the function, and that the pointer parameter’s pointee has already been initialized before the call instruction. This attribute is only valid on LLVM pointer arguments. The argument must be the value returned by the appropriate llvm.call.preallocated.arg on non musttail calls, or the corresponding caller parameter in musttail calls, although it is ignored during codegen.

A non musttail function call with a preallocated attribute in any parameter must have a "preallocated" operand bundle. A musttail function call cannot have a "preallocated" operand bundle.

The preallocated attribute requires a type argument, which must be the same as the pointee type of the argument.

The preallocated attribute also supports specifying an alignment with the align attribute. It indicates the alignment of the stack slot to form and the known alignment of the pointer specified to the call site. If the alignment is not specified, then the code generator makes a target-specific assumption.

inalloca(<ty>)

The inalloca argument attribute allows the caller to take the address of outgoing stack arguments. An inalloca argument must be a pointer to stack memory produced by an alloca instruction. The alloca, or argument allocation, must also be tagged with the inalloca keyword. Only the last argument may have the inalloca attribute, and that argument is guaranteed to be passed in memory.

An argument allocation may be used by a call at most once because the call may deallocate it. The inalloca attribute cannot be used in conjunction with other attributes that affect argument storage, like inreg, nest, sret, or byval. The inalloca attribute also disables LLVM’s implicit lowering of large aggregate return values, which means that frontend authors must lower them with sret pointers.

When the call site is reached, the argument allocation must have been the most recent stack allocation that is still live, or the behavior is undefined. It is possible to allocate additional stack space after an argument allocation and before its call site, but it must be cleared off with llvm.stackrestore.

The inalloca attribute requires a type argument, which must be the same as the pointee type of the argument.

See Design and Usage of the InAlloca Attribute for more information on how to use this attribute.

sret(<ty>)

This indicates that the pointer parameter specifies the address of a structure that is the return value of the function in the source program. This pointer must be guaranteed by the caller to be valid: loads and stores to the structure may be assumed by the callee not to trap and to be properly aligned.

The sret type argument specifies the in memory type, which must be the same as the pointee type of the argument.

A function that accepts an sret argument must return void. A return value may not be sret.

elementtype(<ty>)

The elementtype argument attribute can be used to specify a pointer element type in a way that is compatible with opaque pointers.

The elementtype attribute by itself does not carry any specific semantics. However, certain intrinsics may require this attribute to be present and assign it particular semantics. This will be documented on individual intrinsics.

The attribute may only be applied to pointer typed arguments of intrinsic calls. It cannot be applied to non-intrinsic calls, and cannot be applied to parameters on function declarations. For non-opaque pointers, the type passed to elementtype must match the pointer element type.

align <n> or align(<n>)

This indicates that the pointer value or vector of pointers has the specified alignment. If applied to a vector of pointers, all pointers (elements) have the specified alignment. If the pointer value does not have the specified alignment, poison value is returned or passed instead. The align attribute should be combined with the noundef attribute to ensure a pointer is aligned, or otherwise the behavior is undefined. Note that align 1 has no effect on non-byval, non-preallocated arguments.

Note that this attribute has additional semantics when combined with the byval or preallocated attribute, which are documented there.

noalias

This indicates that memory locations accessed via pointer values based on the argument or return value are not also accessed, during the execution of the function, via pointer values not based on the argument or return value. This guarantee only holds for memory locations that are modified, by any means, during the execution of the function. If there are other accesses not based on the argument or return value, the behavior is undefined. The attribute on a return value also has additional semantics described below. The caller shares the responsibility with the callee for described below. The caller shares the responsibility with the callee for ensuring that these requirements are met. For further details, please see the discussion of the NoAlias response in alias analysis.

Note that this definition of noalias is intentionally similar to the definition of restrict in C99 for function arguments.

For function return values, C99’s restrict is not meaningful, while LLVM’s noalias is. Furthermore, the semantics of the noalias attribute on return values are stronger than the semantics of the attribute when used on function arguments. On function return values, the noalias attribute indicates that the function acts like a system memory allocation function, returning a pointer to allocated storage disjoint from the storage for any other object accessible to the caller.

nocapture

This indicates that the callee does not capture the pointer. This is not a valid attribute for return values. This attribute applies only to the particular copy of the pointer passed in this argument. A caller could pass two copies of the same pointer with one being annotated nocapture and the other not, and the callee could validly capture through the non annotated parameter.

define void @f(ptr nocapture %a, ptr %b) {
  ; (capture %b)
}

call void @f(ptr @glb, ptr @glb) ; well-defined

nofree

This indicates that callee does not free the pointer argument. This is not a valid attribute for return values.

nest

This indicates that the pointer parameter can be excised using the trampoline intrinsics. This is not a valid attribute for return values and can only be applied to one parameter.

returned

This indicates that the function always returns the argument as its return value. This is a hint to the optimizer and code generator used when generating the caller, allowing value propagation, tail call optimization, and omission of register saves and restores in some cases; it is not checked or enforced when generating the callee. The parameter and the function return type must be valid operands for the bitcast instruction. This is not a valid attribute for return values and can only be applied to one parameter.

nonnull

This indicates that the parameter or return pointer is not null. This attribute may only be applied to pointer typed parameters. This is not checked or enforced by LLVM; if the parameter or return pointer is null, poison value is returned or passed instead. The nonnull attribute should be combined with the noundef attribute to ensure a pointer is not null or otherwise the behavior is undefined.

dereferenceable(<n>)

This indicates that the parameter or return pointer is dereferenceable. This attribute may only be applied to pointer typed parameters. A pointer that is dereferenceable can be loaded from speculatively without a risk of trapping. The number of bytes known to be dereferenceable must be provided in parentheses. It is legal for the number of bytes to be less than the size of the pointee type. The nonnull attribute does not imply dereferenceability (consider a pointer to one element past the end of an array), however dereferenceable(<n>) does imply nonnull in addrspace(0) (which is the default address space), except if the null_pointer_is_valid function attribute is present. n should be a positive number. The pointer should be well defined, otherwise it is undefined behavior. This means dereferenceable(<n>) implies noundef.

dereferenceable_or_null(<n>)

This indicates that the parameter or return value isn’t both non-null and non-dereferenceable (up to <n> bytes) at the same time. All non-null pointers tagged with dereferenceable_or_null(<n>) are dereferenceable(<n>). For address space 0 dereferenceable_or_null(<n>) implies that a pointer is exactly one of dereferenceable(<n>) or null, and in other address spaces dereferenceable_or_null(<n>) implies that a pointer is at least one of dereferenceable(<n>) or null (i.e. it may be both null and dereferenceable(<n>)). This attribute may only be applied to pointer typed parameters.

swiftself

This indicates that the parameter is the self/context parameter. This is not a valid attribute for return values and can only be applied to one parameter.

swiftasync

This indicates that the parameter is the asynchronous context parameter and triggers the creation of a target-specific extended frame record to store this pointer. This is not a valid attribute for return values and can only be applied to one parameter.

swifterror

This attribute is motivated to model and optimize Swift error handling. It can be applied to a parameter with pointer to pointer type or a pointer-sized alloca. At the call site, the actual argument that corresponds to a swifterror parameter has to come from a swifterror alloca or the swifterror parameter of the caller. A swifterror value (either the parameter or the alloca) can only be loaded and stored from, or used as a swifterror argument. This is not a valid attribute for return values and can only be applied to one parameter.

These constraints allow the calling convention to optimize access to swifterror variables by associating them with a specific register at call boundaries rather than placing them in memory. Since this does change the calling convention, a function which uses the swifterror attribute on a parameter is not ABI-compatible with one which does not.

These constraints also allow LLVM to assume that a swifterror argument does not alias any other memory visible within a function and that a swifterror alloca passed as an argument does not escape.

immarg

This indicates the parameter is required to be an immediate value. This must be a trivial immediate integer or floating-point constant. Undef or constant expressions are not valid. This is only valid on intrinsic declarations and cannot be applied to a call site or arbitrary function.

noundef

This attribute applies to parameters and return values. If the value representation contains any undefined or poison bits, the behavior is undefined. Note that this does not refer to padding introduced by the type’s storage representation.

nofpclass(<test mask>)

This attribute applies to parameters and return values with floating-point and vector of floating-point types, as well as supported aggregates of such types (matching the supported types for fast-math flags). The test mask has the same format as the second argument to the llvm.is.fpclass, and indicates which classes of floating-point values are not permitted for the value. For example a bitmask of 3 indicates the parameter may not be a NaN.

If the value is a floating-point class indicated by the nofpclass test mask, a poison value is passed or returned instead.

Listing 19 The following invariants hold

     @llvm.is.fpclass(nofpclass(test_mask) %x, test_mask) => false
     @llvm.is.fpclass(nofpclass(test_mask) %x, ~test_mask) => true
     nofpclass(all) => poison

In textual IR, various string names are supported for readability and can be combined. For example nofpclass(nan pinf nzero) evaluates to a mask of 547.

This does not depend on the floating-point environment. For example, a function parameter marked nofpclass(zero) indicates no zero inputs. If this is applied to an argument in a function marked with “denormal-fp-math” indicating zero treatment of input denormals, it does not imply the value cannot be a denormal value which would compare equal to 0.

Table 1 Recognized test mask names

Name	floating-point class	Bitmask value
nan	Any NaN	3
inf	+/- infinity	516
norm	+/- normal	264
sub	+/- subnormal	144
zero	+/- 0	96
all	All values	1023
snan	Signaling NaN	1
qnan	Quiet NaN	2
ninf	Negative infinity	4
nnorm	Negative normal	8
nsub	Negative subnormal	16
nzero	Negative zero	32
pzero	Positive zero	64
psub	Positive subnormal	128
pnorm	Positive normal	256
pinf	Positive infinity	512

alignstack(<n>)

This indicates the alignment that should be considered by the backend when assigning this parameter to a stack slot during calling convention lowering. The enforcement of the specified alignment is target-dependent, as target-specific calling convention rules may override this value. This attribute serves the purpose of carrying language specific alignment information that is not mapped to base types in the backend (for example, over-alignment specification through language attributes).

allocalign

The function parameter marked with this attribute is the alignment in bytes of the newly allocated block returned by this function. The returned value must either have the specified alignment or be the null pointer. The return value MAY be more aligned than the requested alignment, but not less aligned. Invalid (e.g. non-power-of-2) alignments are permitted for the allocalign parameter, so long as the returned pointer is null. This attribute may only be applied to integer parameters.

allocptr

The function parameter marked with this attribute is the pointer that will be manipulated by the allocator. For a realloc-like function the pointer will be invalidated upon success (but the same address may be returned), for a free-like function the pointer will always be invalidated.

readnone

This attribute indicates that the function does not dereference that pointer argument, even though it may read or write the memory that the pointer points to if accessed through other pointers.

If a function reads from or writes to a readnone pointer argument, the behavior is undefined.

readonly

This attribute indicates that the function does not write through this pointer argument, even though it may write to the memory that the pointer points to.

If a function writes to a readonly pointer argument, the behavior is undefined.

writeonly

This attribute indicates that the function may write to, but does not read through this pointer argument (even though it may read from the memory that the pointer points to).

This attribute is understood in the same way as the memory(write) attribute. That is, the pointer may still be read as long as the read is not observable outside the function. See the memory documentation for precise semantics.

writable

This attribute is only meaningful in conjunction with dereferenceable(N) or another attribute that implies the first N bytes of the pointer argument are dereferenceable.

In that case, the attribute indicates that the first N bytes will be (non-atomically) loaded and stored back on entry to the function.

This implies that it’s possible to introduce spurious stores on entry to the function without introducing traps or data races. This does not necessarily hold throughout the whole function, as the pointer may escape to a different thread during the execution of the function. See also the atomic optimization guide

The “other attributes” that imply dereferenceability are dereferenceable_or_null (if the pointer is non-null) and the sret, byval, byref, inalloca, preallocated family of attributes. Note that not all of these combinations are useful, e.g. byval arguments are known to be writable even without this attribute.

The writable attribute cannot be combined with readnone, readonly or a memory attribute that does not contain argmem: write.

initializes((Lo1, Hi1), ...)

This attribute indicates that the function initializes the ranges of the pointer parameter’s memory, [%p+LoN, %p+HiN). Initialization of memory means the first memory access is a non-volatile, non-atomic write. The write must happen before the function returns. If the function unwinds, the write may not happen.

This attribute only holds for the memory accessed via this pointer parameter. Other arbitrary accesses to the same memory via other pointers are allowed.

The writable or dereferenceable attribute do not imply the initializes attribute. The initializes attribute does not imply writeonly since initializes allows reading from the pointer after writing.

This attribute is a list of constant ranges in ascending order with no overlapping or consecutive list elements. LoN/HiN are 64-bit integers, and negative values are allowed in case the argument points partway into an allocation. An empty list is not allowed.

dead_on_unwind

At a high level, this attribute indicates that the pointer argument is dead if the call unwinds, in the sense that the caller will not depend on the contents of the memory. Stores that would only be visible on the unwind path can be elided.

More precisely, the behavior is as-if any memory written through the pointer during the execution of the function is overwritten with a poison value on unwind. This includes memory written by the implicit write implied by the writable attribute. The caller is allowed to access the affected memory, but all loads that are not preceded by a store will return poison.

This attribute cannot be applied to return values.

range(<ty> <a>, <b>)

This attribute expresses the possible range of the parameter or return value. If the value is not in the specified range, it is converted to poison. The arguments passed to range have the following properties:

• The type must match the scalar type of the parameter or return value.

• The pair a,b represents the range [a,b).

• Both a and b are constants.

• The range is allowed to wrap.

• The empty range is represented using 0,0.

• Otherwise, a and b are not allowed to be equal.

This attribute may only be applied to parameters or return values with integer or vector of integer types.

For vector-typed parameters, the range is applied element-wise.

Garbage Collector Strategy Names

Each function may specify a garbage collector strategy name, which is simply a string:

define void @f() gc "name" { ... }

The supported values of name includes those built in to LLVM and any provided by loaded plugins. Specifying a GC strategy will cause the compiler to alter its output in order to support the named garbage collection algorithm. Note that LLVM itself does not contain a garbage collector, this functionality is restricted to generating machine code which can interoperate with a collector provided externally.

Prefix Data

Prefix data is data associated with a function which the code generator will emit immediately before the function’s entrypoint. The purpose of this feature is to allow frontends to associate language-specific runtime metadata with specific functions and make it available through the function pointer while still allowing the function pointer to be called.

To access the data for a given function, a program may bitcast the function pointer to a pointer to the constant’s type and dereference index -1. This implies that the IR symbol points just past the end of the prefix data. For instance, take the example of a function annotated with a single i32,

define void @f() prefix i32 123 { ... }

The prefix data can be referenced as,

%a = getelementptr inbounds i32, ptr @f, i32 -1
%b = load i32, ptr %a

Prefix data is laid out as if it were an initializer for a global variable of the prefix data’s type. The function will be placed such that the beginning of the prefix data is aligned. This means that if the size of the prefix data is not a multiple of the alignment size, the function’s entrypoint will not be aligned. If alignment of the function’s entrypoint is desired, padding must be added to the prefix data.

A function may have prefix data but no body. This has similar semantics to the available_externally linkage in that the data may be used by the optimizers but will not be emitted in the object file.

Prologue Data

The prologue attribute allows arbitrary code (encoded as bytes) to be inserted prior to the function body. This can be used for enabling function hot-patching and instrumentation.

To maintain the semantics of ordinary function calls, the prologue data must have a particular format. Specifically, it must begin with a sequence of bytes which decode to a sequence of machine instructions, valid for the module’s target, which transfer control to the point immediately succeeding the prologue data, without performing any other visible action. This allows the inliner and other passes to reason about the semantics of the function definition without needing to reason about the prologue data. Obviously this makes the format of the prologue data highly target dependent.

A trivial example of valid prologue data for the x86 architecture is i8 144, which encodes the nop instruction:

define void @f() prologue i8 144 { ... }

Generally prologue data can be formed by encoding a relative branch instruction which skips the metadata, as in this example of valid prologue data for the x86_64 architecture, where the first two bytes encode jmp .+10:

%0 = type <{ i8, i8, ptr }>

define void @f() prologue %0 <{ i8 235, i8 8, ptr @md}> { ... }

A function may have prologue data but no body. This has similar semantics to the available_externally linkage in that the data may be used by the optimizers but will not be emitted in the object file.

Personality Function

The personality attribute permits functions to specify what function to use for exception handling.

Attribute Groups

Attribute groups are groups of attributes that are referenced by objects within the IR. They are important for keeping .ll files readable, because a lot of functions will use the same set of attributes. In the degenerative case of a .ll file that corresponds to a single .c file, the single attribute group will capture the important command line flags used to build that file.

An attribute group is a module-level object. To use an attribute group, an object references the attribute group’s ID (e.g. #37). An object may refer to more than one attribute group. In that situation, the attributes from the different groups are merged.

Here is an example of attribute groups for a function that should always be inlined, has a stack alignment of 4, and which shouldn’t use SSE instructions:

; Target-independent attributes:
attributes #0 = { alwaysinline alignstack=4 }

; Target-dependent attributes:
attributes #1 = { "no-sse" }

; Function @f has attributes: alwaysinline, alignstack=4, and "no-sse".
define void @f() #0 #1 { ... }

Function Attributes

Function attributes are set to communicate additional information about a function. Function attributes are considered to be part of the function, not of the function type, so functions with different function attributes can have the same function type.

Function attributes are simple keywords or strings that follow the specified type. Multiple attributes, when required, are separated by spaces. For example:

define void @f() noinline { ... }
define void @f() alwaysinline { ... }
define void @f() alwaysinline optsize { ... }
define void @f() optsize { ... }
define void @f() "no-sse" { ... }

alignstack(<n>)

This attribute indicates that, when emitting the prologue and epilogue, the backend should forcibly align the stack pointer. Specify the desired alignment, which must be a power of two, in parentheses.

"alloc-family"="FAMILY"

This indicates which “family” an allocator function is part of. To avoid collisions, the family name should match the mangled name of the primary allocator function, that is “malloc” for malloc/calloc/realloc/free, “_Znwm” for ::operator::new and ::operator::delete, and “_ZnwmSt11align_val_t” for aligned ::operator::new and ::operator::delete. Matching malloc/realloc/free calls within a family can be optimized, but mismatched ones will be left alone.

allockind("KIND")

Describes the behavior of an allocation function. The KIND string contains comma separated entries from the following options:

• “alloc”: the function returns a new block of memory or null.

• “realloc”: the function returns a new block of memory or null. If the result is non-null the memory contents from the start of the block up to the smaller of the original allocation size and the new allocation size will match that of the allocptr argument and the allocptr argument is invalidated, even if the function returns the same address.

• “free”: the function frees the block of memory specified by allocptr. Functions marked as “free” allockind must return void.

• “uninitialized”: Any newly-allocated memory (either a new block from a “alloc” function or the enlarged capacity from a “realloc” function) will be uninitialized.

• “zeroed”: Any newly-allocated memory (either a new block from a “alloc” function or the enlarged capacity from a “realloc” function) will be zeroed.

• “aligned”: the function returns memory aligned according to the allocalign parameter.

The first three options are mutually exclusive, and the remaining options describe more details of how the function behaves. The remaining options are invalid for “free”-type functions.

allocsize(<EltSizeParam>[, <NumEltsParam>])

This attribute indicates that the annotated function will always return at least a given number of bytes (or null). Its arguments are zero-indexed parameter numbers; if one argument is provided, then it’s assumed that at least CallSite.Args[EltSizeParam] bytes will be available at the returned pointer. If two are provided, then it’s assumed that CallSite.Args[EltSizeParam] * CallSite.Args[NumEltsParam] bytes are available. The referenced parameters must be integer types. No assumptions are made about the contents of the returned block of memory.

alwaysinline

This attribute indicates that the inliner should attempt to inline this function into callers whenever possible, ignoring any active inlining size threshold for this caller.

builtin

This indicates that the callee function at a call site should be recognized as a built-in function, even though the function’s declaration uses the nobuiltin attribute. This is only valid at call sites for direct calls to functions that are declared with the nobuiltin attribute.

cold

This attribute indicates that this function is rarely called. When computing edge weights, basic blocks post-dominated by a cold function call are also considered to be cold; and, thus, given low weight.

convergent

This attribute indicates that this function is convergent. When it appears on a call/invoke, the convergent attribute indicates that we should treat the call as though we’re calling a convergent function. This is particularly useful on indirect calls; without this we may treat such calls as though the target is non-convergent.

See Convergent Operation Semantics for further details.

It is an error to call llvm.experimental.convergence.entry from a function that does not have this attribute.

disable_sanitizer_instrumentation

When instrumenting code with sanitizers, it can be important to skip certain functions to ensure no instrumentation is applied to them.

This attribute is not always similar to absent sanitize_<name> attributes: depending on the specific sanitizer, code can be inserted into functions regardless of the sanitize_<name> attribute to prevent false positive reports.

disable_sanitizer_instrumentation disables all kinds of instrumentation, taking precedence over the sanitize_<name> attributes and other compiler flags.

"dontcall-error"

This attribute denotes that an error diagnostic should be emitted when a call of a function with this attribute is not eliminated via optimization. Front ends can provide optional srcloc metadata nodes on call sites of such callees to attach information about where in the source language such a call came from. A string value can be provided as a note.

"dontcall-warn"

This attribute denotes that a warning diagnostic should be emitted when a call of a function with this attribute is not eliminated via optimization. Front ends can provide optional srcloc metadata nodes on call sites of such callees to attach information about where in the source language such a call came from. A string value can be provided as a note.

fn_ret_thunk_extern

This attribute tells the code generator that returns from functions should be replaced with jumps to externally-defined architecture-specific symbols. For X86, this symbol’s identifier is __x86_return_thunk.

"frame-pointer"

This attribute tells the code generator whether the function should keep the frame pointer. The code generator may emit the frame pointer even if this attribute says the frame pointer can be eliminated. The allowed string values are:

• "none" (default) - the frame pointer can be eliminated, and it’s register can be used for other purposes.

• "reserved" - the frame pointer register must either be updated to point to a valid frame record for the current function, or not be modified.

• "non-leaf" - the frame pointer should be kept if the function calls other functions.

• "all" - the frame pointer should be kept.

hot

This attribute indicates that this function is a hot spot of the program execution. The function will be optimized more aggressively and will be placed into special subsection of the text section to improving locality.

When profile feedback is enabled, this attribute has the precedence over the profile information. By marking a function hot, users can work around the cases where the training input does not have good coverage on all the hot functions.

inlinehint

This attribute indicates that the source code contained a hint that inlining this function is desirable (such as the “inline” keyword in C/C++). It is just a hint; it imposes no requirements on the inliner.

jumptable

This attribute indicates that the function should be added to a jump-instruction table at code-generation time, and that all address-taken references to this function should be replaced with a reference to the appropriate jump-instruction-table function pointer. Note that this creates a new pointer for the original function, which means that code that depends on function-pointer identity can break. So, any function annotated with jumptable must also be unnamed_addr.

memory(...)

This attribute specifies the possible memory effects of the call-site or function. It allows specifying the possible access kinds (none, read, write, or readwrite) for the possible memory location kinds (argmem, inaccessiblemem, as well as a default). It is best understood by example:

• memory(none): Does not access any memory.

• memory(read): May read (but not write) any memory.

• memory(write): May write (but not read) any memory.

• memory(readwrite): May read or write any memory.

• memory(argmem: read): May only read argument memory.

• memory(argmem: read, inaccessiblemem: write): May only read argument memory and only write inaccessible memory.

• memory(read, argmem: readwrite): May read any memory (default mode) and additionally write argument memory.

• memory(readwrite, argmem: none): May access any memory apart from argument memory.

The supported access kinds are:

• readwrite: Any kind of access to the location is allowed.

• read: The location is only read. Writing to the location is immediate undefined behavior. This includes the case where the location is read from and then the same value is written back.

• write: Only writes to the location are observable outside the function call. However, the function may still internally read the location after writing it, as this is not observable. Reading the location prior to writing it results in a poison value.

• none: No reads or writes to the location are observed outside the function. It is always valid to read and write allocas, and to read global constants, even if memory(none) is used, as these effects are not externally observable.

The supported memory location kinds are:

• argmem: This refers to accesses that are based on pointer arguments to the function.

• inaccessiblemem: This refers to accesses to memory which is not accessible by the current module (before return from the function – an allocator function may return newly accessible memory while only accessing inaccessible memory itself). Inaccessible memory is often used to model control dependencies of intrinsics.

• The default access kind (specified without a location prefix) applies to all locations that haven’t been specified explicitly, including those that don’t currently have a dedicated location kind (e.g. accesses to globals or captured pointers).

If the memory attribute is not specified, then memory(readwrite) is implied (all memory effects are possible).

The memory effects of a call can be computed as CallSiteEffects & (FunctionEffects | OperandBundleEffects). Thus, the call-site annotation takes precedence over the potential effects described by either the function annotation or the operand bundles.

minsize

This attribute suggests that optimization passes and code generator passes make choices that keep the code size of this function as small as possible and perform optimizations that may sacrifice runtime performance in order to minimize the size of the generated code. This attribute is incompatible with the optdebug and optnone attributes.

naked

This attribute disables prologue / epilogue emission for the function. This can have very system-specific consequences. The arguments of a naked function can not be referenced through IR values.

"no-inline-line-tables"

When this attribute is set to true, the inliner discards source locations when inlining code and instead uses the source location of the call site. Breakpoints set on code that was inlined into the current function will not fire during the execution of the inlined call sites. If the debugger stops inside an inlined call site, it will appear to be stopped at the outermost inlined call site.

no-jump-tables

When this attribute is set to true, the jump tables and lookup tables that can be generated from a switch case lowering are disabled.

nobuiltin

This indicates that the callee function at a call site is not recognized as a built-in function. LLVM will retain the original call and not replace it with equivalent code based on the semantics of the built-in function, unless the call site uses the builtin attribute. This is valid at call sites and on function declarations and definitions.

nocallback

This attribute indicates that the function is only allowed to jump back into caller’s module by a return or an exception, and is not allowed to jump back by invoking a callback function, a direct, possibly transitive, external function call, use of longjmp, or other means. It is a compiler hint that is used at module level to improve dataflow analysis, dropped during linking, and has no effect on functions defined in the current module.

nodivergencesource

A call to this function is not a source of divergence. In uniformity analysis, a source of divergence is an instruction that generates divergence even if its inputs are uniform. A call with no further information would normally be considered a source of divergence; setting this attribute on a function means that a call to it is not a source of divergence.

noduplicate

This attribute indicates that calls to the function cannot be duplicated. A call to a noduplicate function may be moved within its parent function, but may not be duplicated within its parent function.

A function containing a noduplicate call may still be an inlining candidate, provided that the call is not duplicated by inlining. That implies that the function has internal linkage and only has one call site, so the original call is dead after inlining.

nofree

This function attribute indicates that the function does not, directly or transitively, call a memory-deallocation function (free, for example) on a memory allocation which existed before the call.

As a result, uncaptured pointers that are known to be dereferenceable prior to a call to a function with the nofree attribute are still known to be dereferenceable after the call. The capturing condition is necessary in environments where the function might communicate the pointer to another thread which then deallocates the memory. Alternatively, nosync would ensure such communication cannot happen and even captured pointers cannot be freed by the function.

A nofree function is explicitly allowed to free memory which it allocated or (if not nosync) arrange for another thread to free memory on it’s behalf. As a result, perhaps surprisingly, a nofree function can return a pointer to a previously deallocated memory object.

noimplicitfloat

Disallows implicit floating-point code. This inhibits optimizations that use floating-point code and floating-point registers for operations that are not nominally floating-point. LLVM instructions that perform floating-point operations or require access to floating-point registers may still cause floating-point code to be generated.

Also inhibits optimizations that create SIMD/vector code and registers from scalar code such as vectorization or memcpy/memset optimization. This includes integer vectors. Vector instructions present in IR may still cause vector code to be generated.

noinline

This attribute indicates that the inliner should never inline this function in any situation. This attribute may not be used together with the alwaysinline attribute.

nomerge

This attribute indicates that calls to this function should never be merged during optimization. For example, it will prevent tail merging otherwise identical code sequences that raise an exception or terminate the program. Tail merging normally reduces the precision of source location information, making stack traces less useful for debugging. This attribute gives the user control over the tradeoff between code size and debug information precision.

nonlazybind

This attribute suppresses lazy symbol binding for the function. This may make calls to the function faster, at the cost of extra program startup time if the function is not called during program startup.

noprofile

This function attribute prevents instrumentation based profiling, used for coverage or profile based optimization, from being added to a function. It also blocks inlining if the caller and callee have different values of this attribute.

skipprofile

This function attribute prevents instrumentation based profiling, used for coverage or profile based optimization, from being added to a function. This attribute does not restrict inlining, so instrumented instruction could end up in this function.

noredzone

This attribute indicates that the code generator should not use a red zone, even if the target-specific ABI normally permits it.

indirect-tls-seg-refs

This attribute indicates that the code generator should not use direct TLS access through segment registers, even if the target-specific ABI normally permits it.

noreturn

This function attribute indicates that the function never returns normally, hence through a return instruction. This produces undefined behavior at runtime if the function ever does dynamically return. Annotated functions may still raise an exception, i.a., nounwind is not implied.

norecurse

This function attribute indicates that the function does not call itself either directly or indirectly down any possible call path. This produces undefined behavior at runtime if the function ever does recurse.

willreturn

This function attribute indicates that a call of this function will either exhibit undefined behavior or comes back and continues execution at a point in the existing call stack that includes the current invocation. Annotated functions may still raise an exception, i.a., nounwind is not implied. If an invocation of an annotated function does not return control back to a point in the call stack, the behavior is undefined.

nosync

This function attribute indicates that the function does not communicate (synchronize) with another thread through memory or other well-defined means. Synchronization is considered possible in the presence of atomic accesses that enforce an order, thus not “unordered” and “monotonic”, volatile accesses, as well as convergent function calls.

Note that convergent operations can involve communication that is considered to be not through memory and does not necessarily imply an ordering between threads for the purposes of the memory model. Therefore, an operation can be both convergent and nosync.

If a nosync function does ever synchronize with another thread, the behavior is undefined.

nounwind

This function attribute indicates that the function never raises an exception. If the function does raise an exception, its runtime behavior is undefined. However, functions marked nounwind may still trap or generate asynchronous exceptions. Exception handling schemes that are recognized by LLVM to handle asynchronous exceptions, such as SEH, will still provide their implementation defined semantics.

nosanitize_bounds

This attribute indicates that bounds checking sanitizer instrumentation is disabled for this function.

nosanitize_coverage

This attribute indicates that SanitizerCoverage instrumentation is disabled for this function.

null_pointer_is_valid

If null_pointer_is_valid is set, then the null address in address-space 0 is considered to be a valid address for memory loads and stores. Any analysis or optimization should not treat dereferencing a pointer to null as undefined behavior in this function. Note: Comparing address of a global variable to null may still evaluate to false because of a limitation in querying this attribute inside constant expressions.

optdebug

This attribute suggests that optimization passes and code generator passes should make choices that try to preserve debug info without significantly degrading runtime performance. This attribute is incompatible with the minsize, optsize, and optnone attributes.

optforfuzzing

This attribute indicates that this function should be optimized for maximum fuzzing signal.

optnone

This function attribute indicates that most optimization passes will skip this function, with the exception of interprocedural optimization passes. Code generation defaults to the “fast” instruction selector. This attribute cannot be used together with the alwaysinline attribute; this attribute is also incompatible with the minsize, optsize, and optdebug attributes.

This attribute requires the noinline attribute to be specified on the function as well, so the function is never inlined into any caller. Only functions with the alwaysinline attribute are valid candidates for inlining into the body of this function.

optsize

This attribute suggests that optimization passes and code generator passes make choices that keep the code size of this function low, and otherwise do optimizations specifically to reduce code size as long as they do not significantly impact runtime performance. This attribute is incompatible with the optdebug and optnone attributes.

"patchable-function"

This attribute tells the code generator that the code generated for this function needs to follow certain conventions that make it possible for a runtime function to patch over it later. The exact effect of this attribute depends on its string value, for which there currently is one legal possibility:

• "prologue-short-redirect" - This style of patchable function is intended to support patching a function prologue to redirect control away from the function in a thread safe manner. It guarantees that the first instruction of the function will be large enough to accommodate a short jump instruction, and will be sufficiently aligned to allow being fully changed via an atomic compare-and-swap instruction. While the first requirement can be satisfied by inserting large enough NOP, LLVM can and will try to re-purpose an existing instruction (i.e. one that would have to be emitted anyway) as the patchable instruction larger than a short jump.

  "prologue-short-redirect" is currently only supported on x86-64.

This attribute by itself does not imply restrictions on inter-procedural optimizations. All of the semantic effects the patching may have to be separately conveyed via the linkage type.

"probe-stack"

This attribute indicates that the function will trigger a guard region in the end of the stack. It ensures that accesses to the stack must be no further apart than the size of the guard region to a previous access of the stack. It takes one required string value, the name of the stack probing function that will be called.

If a function that has a "probe-stack" attribute is inlined into a function with another "probe-stack" attribute, the resulting function has the "probe-stack" attribute of the caller. If a function that has a "probe-stack" attribute is inlined into a function that has no "probe-stack" attribute at all, the resulting function has the "probe-stack" attribute of the callee.

"stack-probe-size"

This attribute controls the behavior of stack probes: either the "probe-stack" attribute, or ABI-required stack probes, if any. It defines the size of the guard region. It ensures that if the function may use more stack space than the size of the guard region, stack probing sequence will be emitted. It takes one required integer value, which is 4096 by default.

If a function that has a "stack-probe-size" attribute is inlined into a function with another "stack-probe-size" attribute, the resulting function has the "stack-probe-size" attribute that has the lower numeric value. If a function that has a "stack-probe-size" attribute is inlined into a function that has no "stack-probe-size" attribute at all, the resulting function has the "stack-probe-size" attribute of the callee.

"no-stack-arg-probe"

This attribute disables ABI-required stack probes, if any.

returns_twice

This attribute indicates that this function can return twice. The C setjmp is an example of such a function. The compiler disables some optimizations (like tail calls) in the caller of these functions.

safestack

This attribute indicates that SafeStack protection is enabled for this function.

If a function that has a safestack attribute is inlined into a function that doesn’t have a safestack attribute or which has an ssp, sspstrong or sspreq attribute, then the resulting function will have a safestack attribute.

sanitize_address

This attribute indicates that AddressSanitizer checks (dynamic address safety analysis) are enabled for this function.

sanitize_memory

This attribute indicates that MemorySanitizer checks (dynamic detection of accesses to uninitialized memory) are enabled for this function.

sanitize_thread

This attribute indicates that ThreadSanitizer checks (dynamic thread safety analysis) are enabled for this function.

sanitize_hwaddress

This attribute indicates that HWAddressSanitizer checks (dynamic address safety analysis based on tagged pointers) are enabled for this function.

sanitize_memtag

This attribute indicates that MemTagSanitizer checks (dynamic address safety analysis based on Armv8 MTE) are enabled for this function.

sanitize_realtime

This attribute indicates that RealtimeSanitizer checks (realtime safety analysis - no allocations, syscalls or exceptions) are enabled for this function.

sanitize_realtime_blocking

This attribute indicates that RealtimeSanitizer should error immediately if the attributed function is called during invocation of a function attributed with sanitize_realtime. This attribute is incompatible with the sanitize_realtime attribute.

speculative_load_hardening

This attribute indicates that Speculative Load Hardening should be enabled for the function body.

Speculative Load Hardening is a best-effort mitigation against information leak attacks that make use of control flow miss-speculation - specifically miss-speculation of whether a branch is taken or not. Typically vulnerabilities enabling such attacks are classified as “Spectre variant #1”. Notably, this does not attempt to mitigate against miss-speculation of branch target, classified as “Spectre variant #2” vulnerabilities.

When inlining, the attribute is sticky. Inlining a function that carries this attribute will cause the caller to gain the attribute. This is intended to provide a maximally conservative model where the code in a function annotated with this attribute will always (even after inlining) end up hardened.

speculatable

This function attribute indicates that the function does not have any effects besides calculating its result and does not have undefined behavior. Note that speculatable is not enough to conclude that along any particular execution path the number of calls to this function will not be externally observable. This attribute is only valid on functions and declarations, not on individual call sites. If a function is incorrectly marked as speculatable and really does exhibit undefined behavior, the undefined behavior may be observed even if the call site is dead code.

ssp

This attribute indicates that the function should emit a stack smashing protector. It is in the form of a “canary” — a random value placed on the stack before the local variables that’s checked upon return from the function to see if it has been overwritten. A heuristic is used to determine if a function needs stack protectors or not. The heuristic used will enable protectors for functions with:

• Character arrays larger than ssp-buffer-size (default 8).

• Aggregates containing character arrays larger than ssp-buffer-size.

• Calls to alloca() with variable sizes or constant sizes greater than ssp-buffer-size.

Variables that are identified as requiring a protector will be arranged on the stack such that they are adjacent to the stack protector guard.

If a function with an ssp attribute is inlined into a calling function, the attribute is not carried over to the calling function.

sspstrong

This attribute indicates that the function should emit a stack smashing protector. This attribute causes a strong heuristic to be used when determining if a function needs stack protectors. The strong heuristic will enable protectors for functions with:

• Arrays of any size and type

• Aggregates containing an array of any size and type.

• Calls to alloca().

• Local variables that have had their address taken.

Variables that are identified as requiring a protector will be arranged on the stack such that they are adjacent to the stack protector guard. The specific layout rules are:

1. Large arrays and structures containing large arrays (>= ssp-buffer-size) are closest to the stack protector.

2. Small arrays and structures containing small arrays (< ssp-buffer-size) are 2nd closest to the protector.

3. Variables that have had their address taken are 3rd closest to the protector.

This overrides the ssp function attribute.

If a function with an sspstrong attribute is inlined into a calling function which has an ssp attribute, the calling function’s attribute will be upgraded to sspstrong.

sspreq

This attribute indicates that the function should always emit a stack smashing protector. This overrides the ssp and sspstrong function attributes.

Variables that are identified as requiring a protector will be arranged on the stack such that they are adjacent to the stack protector guard. The specific layout rules are:

1. Large arrays and structures containing large arrays (>= ssp-buffer-size) are closest to the stack protector.

2. Small arrays and structures containing small arrays (< ssp-buffer-size) are 2nd closest to the protector.

3. Variables that have had their address taken are 3rd closest to the protector.

If a function with an sspreq attribute is inlined into a calling function which has an ssp or sspstrong attribute, the calling function’s attribute will be upgraded to sspreq.

strictfp

This attribute indicates that the function was called from a scope that requires strict floating-point semantics. LLVM will not attempt any optimizations that require assumptions about the floating-point rounding mode or that might alter the state of floating-point status flags that might otherwise be set or cleared by calling this function. LLVM will not introduce any new floating-point instructions that may trap.

"denormal-fp-math"

This indicates the denormal (subnormal) handling that may be assumed for the default floating-point environment. This is a comma separated pair. The elements may be one of "ieee", "preserve-sign", "positive-zero", or "dynamic". The first entry indicates the flushing mode for the result of floating point operations. The second indicates the handling of denormal inputs to floating point instructions. For compatibility with older bitcode, if the second value is omitted, both input and output modes will assume the same mode.

If this is attribute is not specified, the default is "ieee,ieee".

If the output mode is "preserve-sign", or "positive-zero", denormal outputs may be flushed to zero by standard floating-point operations. It is not mandated that flushing to zero occurs, but if a denormal output is flushed to zero, it must respect the sign mode. Not all targets support all modes.

If the mode is "dynamic", the behavior is derived from the dynamic state of the floating-point environment. Transformations which depend on the behavior of denormal values should not be performed.

While this indicates the expected floating point mode the function will be executed with, this does not make any attempt to ensure the mode is consistent. User or platform code is expected to set the floating point mode appropriately before function entry.

If the input mode is "preserve-sign", or "positive-zero", a floating-point operation must treat any input denormal value as zero. In some situations, if an instruction does not respect this mode, the input may need to be converted to 0 as if by @llvm.canonicalize during lowering for correctness.

"denormal-fp-math-f32"

Same as "denormal-fp-math", but only controls the behavior of the 32-bit float type (or vectors of 32-bit floats). If both are are present, this overrides "denormal-fp-math". Not all targets support separately setting the denormal mode per type, and no attempt is made to diagnose unsupported uses. Currently this attribute is respected by the AMDGPU and NVPTX backends.

"thunk"

This attribute indicates that the function will delegate to some other function with a tail call. The prototype of a thunk should not be used for optimization purposes. The caller is expected to cast the thunk prototype to match the thunk target prototype.

uwtable[(sync|async)]

This attribute indicates that the ABI being targeted requires that an unwind table entry be produced for this function even if we can show that no exceptions passes by it. This is normally the case for the ELF x86-64 abi, but it can be disabled for some compilation units. The optional parameter describes what kind of unwind tables to generate: sync for normal unwind tables, async for asynchronous (instruction precise) unwind tables. Without the parameter, the attribute uwtable is equivalent to uwtable(async).

nocf_check

This attribute indicates that no control-flow check will be performed on the attributed entity. It disables -fcf-protection=<> for a specific entity to fine grain the HW control flow protection mechanism. The flag is target independent and currently appertains to a function or function pointer.

shadowcallstack

This attribute indicates that the ShadowCallStack checks are enabled for the function. The instrumentation checks that the return address for the function has not changed between the function prolog and epilog. It is currently x86_64-specific.

mustprogress

This attribute indicates that the function is required to return, unwind, or interact with the environment in an observable way e.g. via a volatile memory access, I/O, or other synchronization. The mustprogress attribute is intended to model the requirements of the first section of [intro.progress] of the C++ Standard. As a consequence, a loop in a function with the mustprogress attribute can be assumed to terminate if it does not interact with the environment in an observable way, and terminating loops without side-effects can be removed. If a mustprogress function does not satisfy this contract, the behavior is undefined. If a mustprogress function calls a function not marked mustprogress, and that function never returns, the program is well-defined even if there isn’t any other observable progress. Note that willreturn implies mustprogress.

"warn-stack-size"="<threshold>"

This attribute sets a threshold to emit diagnostics once the frame size is known should the frame size exceed the specified value. It takes one required integer value, which should be a non-negative integer, and less than UINT_MAX. It’s unspecified which threshold will be used when duplicate definitions are linked together with differing values.

vscale_range(<min>[, <max>])

This function attribute indicates vscale is a power-of-two within a specified range. min must be a power-of-two that is greater than 0. When specified, max must be a power-of-two greater-than-or-equal to min or 0 to signify an unbounded maximum. The syntax vscale_range(<val>) can be used to set both min and max to the same value. Functions that don’t include this attribute make no assumptions about the value of vscale.

"nooutline"

This attribute indicates that outlining passes should not modify the function.

Call Site Attributes

In addition to function attributes the following call site only attributes are supported:

vector-function-abi-variant

This attribute can be attached to a call to list the vector functions associated to the function. Notice that the attribute cannot be attached to a invoke or a callbr instruction. The attribute consists of a comma separated list of mangled names. The order of the list does not imply preference (it is logically a set). The compiler is free to pick any listed vector function of its choosing.

The syntax for the mangled names is as follows::

_ZGV<isa><mask><vlen><parameters>_<scalar_name>[(<vector_redirection>)]

When present, the attribute informs the compiler that the function <scalar_name> has a corresponding vector variant that can be used to perform the concurrent invocation of <scalar_name> on vectors. The shape of the vector function is described by the tokens between the prefix _ZGV and the <scalar_name> token. The standard name of the vector function is _ZGV<isa><mask><vlen><parameters>_<scalar_name>. When present, the optional token (<vector_redirection>) informs the compiler that a custom name is provided in addition to the standard one (custom names can be provided for example via the use of declare variant in OpenMP 5.0). The declaration of the variant must be present in the IR Module. The signature of the vector variant is determined by the rules of the Vector Function ABI (VFABI) specifications of the target. For Arm and X86, the VFABI can be found at https://github.com/ARM-software/abi-aa and https://software.intel.com/content/www/us/en/develop/download/vector-simd-function-abi.html, respectively.

For X86 and Arm targets, the values of the tokens in the standard name are those that are defined in the VFABI. LLVM has an internal <isa> token that can be used to create scalar-to-vector mappings for functions that are not directly associated to any of the target ISAs (for example, some of the mappings stored in the TargetLibraryInfo). Valid values for the <isa> token are::

<isa>:= b | c | d | e  -> X86 SSE, AVX, AVX2, AVX512
      | n | s          -> Armv8 Advanced SIMD, SVE
      | __LLVM__       -> Internal LLVM Vector ISA

For all targets currently supported (x86, Arm and Internal LLVM), the remaining tokens can have the following values::

<mask>:= M | N         -> mask | no mask

<vlen>:= number        -> number of lanes
       | x             -> VLA (Vector Length Agnostic)

<parameters>:= v              -> vector
             | l | l <number> -> linear
             | R | R <number> -> linear with ref modifier
             | L | L <number> -> linear with val modifier
             | U | U <number> -> linear with uval modifier
             | ls <pos>       -> runtime linear
             | Rs <pos>       -> runtime linear with ref modifier
             | Ls <pos>       -> runtime linear with val modifier
             | Us <pos>       -> runtime linear with uval modifier
             | u              -> uniform

<scalar_name>:= name of the scalar function

<vector_redirection>:= optional, custom name of the vector function

preallocated(<ty>)

This attribute is required on calls to llvm.call.preallocated.arg and cannot be used on any other call. See llvm.call.preallocated.arg for more details.

Global Attributes

Attributes may be set to communicate additional information about a global variable. Unlike function attributes, attributes on a global variable are grouped into a single attribute group.

no_sanitize_address

This attribute indicates that the global variable should not have AddressSanitizer instrumentation applied to it, because it was annotated with __attribute__((no_sanitize(“address”))), __attribute__((disable_sanitizer_instrumentation)), or included in the -fsanitize-ignorelist file.

no_sanitize_hwaddress

This attribute indicates that the global variable should not have HWAddressSanitizer instrumentation applied to it, because it was annotated with __attribute__((no_sanitize(“hwaddress”))), __attribute__((disable_sanitizer_instrumentation)), or included in the -fsanitize-ignorelist file.

sanitize_memtag

This attribute indicates that the global variable should have AArch64 memory tags (MTE) instrumentation applied to it. This attribute causes the suppression of certain optimizations, like GlobalMerge, as well as ensuring extra directives are emitted in the assembly and extra bits of metadata are placed in the object file so that the linker can ensure the accesses are protected by MTE. This attribute is added by clang when -fsanitize=memtag-globals is provided, as long as the global is not marked with __attribute__((no_sanitize(“memtag”))), __attribute__((disable_sanitizer_instrumentation)), or included in the -fsanitize-ignorelist file. The AArch64 Globals Tagging pass may remove this attribute when it’s not possible to tag the global (e.g. it’s a TLS variable).

sanitize_address_dyninit

This attribute indicates that the global variable, when instrumented with AddressSanitizer, should be checked for ODR violations. This attribute is applied to global variables that are dynamically initialized according to C++ rules.

Operand Bundles

Operand bundles are tagged sets of SSA values or metadata strings that can be associated with certain LLVM instructions (currently only call s and invoke s). In a way they are like metadata, but dropping them is incorrect and will change program semantics.

Syntax:

operand bundle set ::= '[' operand bundle (, operand bundle )* ']'
operand bundle ::= tag '(' [ bundle operand ] (, bundle operand )* ')'
bundle operand ::= SSA value | metadata string
tag ::= string constant

Operand bundles are not part of a function’s signature, and a given function may be called from multiple places with different kinds of operand bundles. This reflects the fact that the operand bundles are conceptually a part of the call (or invoke), not the callee being dispatched to.

Operand bundles are a generic mechanism intended to support runtime-introspection-like functionality for managed languages. While the exact semantics of an operand bundle depend on the bundle tag, there are certain limitations to how much the presence of an operand bundle can influence the semantics of a program. These restrictions are described as the semantics of an “unknown” operand bundle. As long as the behavior of an operand bundle is describable within these restrictions, LLVM does not need to have special knowledge of the operand bundle to not miscompile programs containing it.

• The bundle operands for an unknown operand bundle escape in unknown ways before control is transferred to the callee or invokee.

• Calls and invokes with operand bundles have unknown read / write effect on the heap on entry and exit (even if the call target specifies a memory attribute), unless they’re overridden with callsite specific attributes.

• An operand bundle at a call site cannot change the implementation of the called function. Inter-procedural optimizations work as usual as long as they take into account the first two properties.

More specific types of operand bundles are described below.

Deoptimization Operand Bundles

Deoptimization operand bundles are characterized by the "deopt" operand bundle tag. These operand bundles represent an alternate “safe” continuation for the call site they’re attached to, and can be used by a suitable runtime to deoptimize the compiled frame at the specified call site. There can be at most one "deopt" operand bundle attached to a call site. Exact details of deoptimization is out of scope for the language reference, but it usually involves rewriting a compiled frame into a set of interpreted frames.

From the compiler’s perspective, deoptimization operand bundles make the call sites they’re attached to at least readonly. They read through all of their pointer typed operands (even if they’re not otherwise escaped) and the entire visible heap. Deoptimization operand bundles do not capture their operands except during deoptimization, in which case control will not be returned to the compiled frame.

The inliner knows how to inline through calls that have deoptimization operand bundles. Just like inlining through a normal call site involves composing the normal and exceptional continuations, inlining through a call site with a deoptimization operand bundle needs to appropriately compose the “safe” deoptimization continuation. The inliner does this by prepending the parent’s deoptimization continuation to every deoptimization continuation in the inlined body. E.g. inlining @f into @g in the following example

define void @f() {
  call void @x()  ;; no deopt state
  call void @y() [ "deopt"(i32 10) ]
  call void @y() [ "deopt"(i32 10), "unknown"(ptr null) ]
  ret void
}

define void @g() {
  call void @f() [ "deopt"(i32 20) ]
  ret void
}

will result in

define void @g() {
  call void @x()  ;; still no deopt state
  call void @y() [ "deopt"(i32 20, i32 10) ]
  call void @y() [ "deopt"(i32 20, i32 10), "unknown"(ptr null) ]
  ret void
}

It is the frontend’s responsibility to structure or encode the deoptimization state in a way that syntactically prepending the caller’s deoptimization state to the callee’s deoptimization state is semantically equivalent to composing the caller’s deoptimization continuation after the callee’s deoptimization continuation.

Funclet Operand Bundles

Funclet operand bundles are characterized by the "funclet" operand bundle tag. These operand bundles indicate that a call site is within a particular funclet. There can be at most one "funclet" operand bundle attached to a call site and it must have exactly one bundle operand.

If any funclet EH pads have been “entered” but not “exited” (per the description in the EH doc), it is undefined behavior to execute a call or invoke which:

• does not have a "funclet" bundle and is not a call to a nounwind intrinsic, or

• has a "funclet" bundle whose operand is not the most-recently-entered not-yet-exited funclet EH pad.

Similarly, if no funclet EH pads have been entered-but-not-yet-exited, executing a call or invoke with a "funclet" bundle is undefined behavior.

GC Transition Operand Bundles

GC transition operand bundles are characterized by the "gc-transition" operand bundle tag. These operand bundles mark a call as a transition between a function with one GC strategy to a function with a different GC strategy. If coordinating the transition between GC strategies requires additional code generation at the call site, these bundles may contain any values that are needed by the generated code. For more details, see GC Transitions.

The bundle contain an arbitrary list of Values which need to be passed to GC transition code. They will be lowered and passed as operands to the appropriate GC_TRANSITION nodes in the selection DAG. It is assumed that these arguments must be available before and after (but not necessarily during) the execution of the callee.

Assume Operand Bundles

Operand bundles on an llvm.assume allows representing assumptions, such as that a parameter attribute or a function attribute holds for a certain value at a certain location. Operand bundles enable assumptions that are either hard or impossible to represent as a boolean argument of an llvm.assume.

An assume operand bundle has the form:

"<tag>"([ <arguments>] ])

In the case of function or parameter attributes, the operand bundle has the restricted form:

"<tag>"([ <holds for value> [, <attribute argument>] ])

• The tag of the operand bundle is usually the name of attribute that can be assumed to hold. It can also be ignore, this tag doesn’t contain any information and should be ignored.

• The first argument if present is the value for which the attribute hold.

• The second argument if present is an argument of the attribute.

If there are no arguments the attribute is a property of the call location.

For example:

call void @llvm.assume(i1 true) ["align"(ptr %val, i32 8)]

allows the optimizer to assume that at location of call to llvm.assume %val has an alignment of at least 8.

call void @llvm.assume(i1 %cond) ["cold"(), "nonnull"(ptr %val)]

allows the optimizer to assume that the llvm.assume call location is cold and that %val may not be null.

Just like for the argument of llvm.assume, if any of the provided guarantees are violated at runtime the behavior is undefined.

While attributes expect constant arguments, assume operand bundles may be provided a dynamic value, for example:

call void @llvm.assume(i1 true) ["align"(ptr %val, i32 %align)]

If the operand bundle value violates any requirements on the attribute value, the behavior is undefined, unless one of the following exceptions applies:

• "align" operand bundles may specify a non-power-of-two alignment (including a zero alignment). If this is the case, then the pointer value must be a null pointer, otherwise the behavior is undefined.

In addition to allowing operand bundles encoding function and parameter attributes, an assume operand bundle my also encode a separate_storage operand bundle. This has the form:

separate_storage(<val1>, <val2>)``

This indicates that no pointer based on one of its arguments can alias any pointer based on the other.

Even if the assumed property can be encoded as a boolean value, like nonnull, using operand bundles to express the property can still have benefits:

• Attributes that can be expressed via operand bundles are directly the property that the optimizer uses and cares about. Encoding attributes as operand bundles removes the need for an instruction sequence that represents the property (e.g., icmp ne ptr %p, null for nonnull) and for the optimizer to deduce the property from that instruction sequence.

• Expressing the property using operand bundles makes it easy to identify the use of the value as a use in an llvm.assume. This then simplifies and improves heuristics, e.g., for use “use-sensitive” optimizations.

Preallocated Operand Bundles

Preallocated operand bundles are characterized by the "preallocated" operand bundle tag. These operand bundles allow separation of the allocation of the call argument memory from the call site. This is necessary to pass non-trivially copyable objects by value in a way that is compatible with MSVC on some targets. There can be at most one "preallocated" operand bundle attached to a call site and it must have exactly one bundle operand, which is a token generated by @llvm.call.preallocated.setup. A call with this operand bundle should not adjust the stack before entering the function, as that will have been done by one of the @llvm.call.preallocated.* intrinsics.

%foo = type { i64, i32 }

...

%t = call token @llvm.call.preallocated.setup(i32 1)
%a = call ptr @llvm.call.preallocated.arg(token %t, i32 0) preallocated(%foo)
; initialize %b
call void @bar(i32 42, ptr preallocated(%foo) %a) ["preallocated"(token %t)]

GC Live Operand Bundles

A “gc-live” operand bundle is only valid on a gc.statepoint intrinsic. The operand bundle must contain every pointer to a garbage collected object which potentially needs to be updated by the garbage collector.

When lowered, any relocated value will be recorded in the corresponding stackmap entry. See the intrinsic description for further details.

ObjC ARC Attached Call Operand Bundles

A "clang.arc.attachedcall" operand bundle on a call indicates the call is implicitly followed by a marker instruction and a call to an ObjC runtime function that uses the result of the call. The operand bundle takes a mandatory pointer to the runtime function (@objc_retainAutoreleasedReturnValue or @objc_unsafeClaimAutoreleasedReturnValue). The return value of a call with this bundle is used by a call to @llvm.objc.clang.arc.noop.use unless the called function’s return type is void, in which case the operand bundle is ignored.

; The marker instruction and a runtime function call are inserted after the call
; to @foo.
call ptr @foo() [ "clang.arc.attachedcall"(ptr @objc_retainAutoreleasedReturnValue) ]
call ptr @foo() [ "clang.arc.attachedcall"(ptr @objc_unsafeClaimAutoreleasedReturnValue) ]

The operand bundle is needed to ensure the call is immediately followed by the marker instruction and the ObjC runtime call in the final output.

Pointer Authentication Operand Bundles

Pointer Authentication operand bundles are characterized by the "ptrauth" operand bundle tag. They are described in the Pointer Authentication document.

KCFI Operand Bundles

A "kcfi" operand bundle on an indirect call indicates that the call will be preceded by a runtime type check, which validates that the call target is prefixed with a type identifier that matches the operand bundle attribute. For example:

call void %0() ["kcfi"(i32 1234)]

Clang emits KCFI operand bundles and the necessary metadata with -fsanitize=kcfi.

Convergence Control Operand Bundles

A “convergencectrl” operand bundle is only valid on a convergent operation. When present, the operand bundle must contain exactly one value of token type. See the Convergent Operation Semantics document for details.

Module-Level Inline Assembly

Modules may contain “module-level inline asm” blocks, which corresponds to the GCC “file scope inline asm” blocks. These blocks are internally concatenated by LLVM and treated as a single unit, but may be separated in the .ll file if desired. The syntax is very simple:

module asm "inline asm code goes here"
module asm "more can go here"

The strings can contain any character by escaping non-printable characters. The escape sequence used is simply “\xx” where “xx” is the two digit hex code for the number.

Note that the assembly string must be parseable by LLVM’s integrated assembler (unless it is disabled), even when emitting a .s file.

Data Layout

A module may specify a target specific data layout string that specifies how data is to be laid out in memory. The syntax for the data layout is simply:

target datalayout = "layout specification"

The layout specification consists of a list of specifications separated by the minus sign character (‘-‘). Each specification starts with a letter and may include other information after the letter to define some aspect of the data layout. The specifications accepted are as follows:

E

Specifies that the target lays out data in big-endian form. That is, the bits with the most significance have the lowest address location.

e

Specifies that the target lays out data in little-endian form. That is, the bits with the least significance have the lowest address location.

S<size>

Specifies the natural alignment of the stack in bits. Alignment promotion of stack variables is limited to the natural stack alignment to avoid dynamic stack realignment. The stack alignment must be a multiple of 8-bits. If omitted, the natural stack alignment defaults to “unspecified”, which does not prevent any alignment promotions.

P<address space>

Specifies the address space that corresponds to program memory. Harvard architectures can use this to specify what space LLVM should place things such as functions into. If omitted, the program memory space defaults to the default address space of 0, which corresponds to a Von Neumann architecture that has code and data in the same space.

G<address space>

Specifies the address space to be used by default when creating global variables. If omitted, the globals address space defaults to the default address space 0. Note: variable declarations without an address space are always created in address space 0, this property only affects the default value to be used when creating globals without additional contextual information (e.g. in LLVM passes).

A<address space>

Specifies the address space of objects created by ‘alloca’. Defaults to the default address space of 0.

p[n]:<size>:<abi>[:<pref>][:<idx>]

This specifies the size of a pointer and its <abi> and <pref>erred alignments for address space n. <pref> is optional and defaults to <abi>. The fourth parameter <idx> is the size of the index that used for address calculation, which must be less than or equal to the pointer size. If not specified, the default index size is equal to the pointer size. All sizes are in bits. The address space, n, is optional, and if not specified, denotes the default address space 0. The value of n must be in the range [1,2^24).

i<size>:<abi>[:<pref>]

This specifies the alignment for an integer type of a given bit <size>. The value of <size> must be in the range [1,2^24). <pref> is optional and defaults to <abi>. For i8, the <abi> value must equal 8, that is, i8 must be naturally aligned.

v<size>:<abi>[:<pref>]

This specifies the alignment for a vector type of a given bit <size>. The value of <size> must be in the range [1,2^24). <pref> is optional and defaults to <abi>.

f<size>:<abi>[:<pref>]

This specifies the alignment for a floating-point type of a given bit <size>. Only values of <size> that are supported by the target will work. 32 (float) and 64 (double) are supported on all targets; 80 or 128 (different flavors of long double) are also supported on some targets. The value of <size> must be in the range [1,2^24). <pref> is optional and defaults to <abi>.

a:<abi>[:<pref>]

This specifies the alignment for an object of aggregate type. <pref> is optional and defaults to <abi>.

F<type><abi>

This specifies the alignment for function pointers. The options for <type> are:

• i: The alignment of function pointers is independent of the alignment of functions, and is a multiple of <abi>.

• n: The alignment of function pointers is a multiple of the explicit alignment specified on the function, and is a multiple of <abi>.

m:<mangling>

If present, specifies that llvm names are mangled in the output. Symbols prefixed with the mangling escape character \01 are passed through directly to the assembler without the escape character. The mangling style options are

• e: ELF mangling: Private symbols get a .L prefix.

• l: GOFF mangling: Private symbols get a @ prefix.

• m: Mips mangling: Private symbols get a $ prefix.

• o: Mach-O mangling: Private symbols get L prefix. Other symbols get a _ prefix.

• x: Windows x86 COFF mangling: Private symbols get the usual prefix. Regular C symbols get a _ prefix. Functions with __stdcall, __fastcall, and __vectorcall have custom mangling that appends @N where N is the number of bytes used to pass parameters. C++ symbols starting with ? are not mangled in any way.

• w: Windows COFF mangling: Similar to x, except that normal C symbols do not receive a _ prefix.

• a: XCOFF mangling: Private symbols get a L.. prefix.

n<size1>:<size2>:<size3>...

This specifies a set of native integer widths for the target CPU in bits. For example, it might contain n32 for 32-bit PowerPC, n32:64 for PowerPC 64, or n8:16:32:64 for X86-64. Elements of this set are considered to support most general arithmetic operations efficiently.

ni:<address space0>:<address space1>:<address space2>...

This specifies pointer types with the specified address spaces as Non-Integral Pointer Type s. The 0 address space cannot be specified as non-integral.

On every specification that takes a <abi>:<pref>, specifying the <pref> alignment is optional. If omitted, the preceding : should be omitted too and <pref> will be equal to <abi>.

When constructing the data layout for a given target, LLVM starts with a default set of specifications which are then (possibly) overridden by the specifications in the datalayout keyword. The default specifications are given in this list:

• e - little endian

• p:64:64:64 - 64-bit pointers with 64-bit alignment.

• p[n]:64:64:64 - Other address spaces are assumed to be the same as the default address space.

• S0 - natural stack alignment is unspecified

• i1:8:8 - i1 is 8-bit (byte) aligned

• i8:8:8 - i8 is 8-bit (byte) aligned as mandated

• i16:16:16 - i16 is 16-bit aligned

• i32:32:32 - i32 is 32-bit aligned

• i64:32:64 - i64 has ABI alignment of 32-bits but preferred alignment of 64-bits

• f16:16:16 - half is 16-bit aligned

• f32:32:32 - float is 32-bit aligned

• f64:64:64 - double is 64-bit aligned

• f128:128:128 - quad is 128-bit aligned

• v64:64:64 - 64-bit vector is 64-bit aligned

• v128:128:128 - 128-bit vector is 128-bit aligned

• a:0:64 - aggregates are 64-bit aligned

When LLVM is determining the alignment for a given type, it uses the following rules:

1. If the type sought is an exact match for one of the specifications, that specification is used.

2. If no match is found, and the type sought is an integer type, then the smallest integer type that is larger than the bitwidth of the sought type is used. If none of the specifications are larger than the bitwidth then the largest integer type is used. For example, given the default specifications above, the i7 type will use the alignment of i8 (next largest) while both i65 and i256 will use the alignment of i64 (largest specified).

The function of the data layout string may not be what you expect. Notably, this is not a specification from the frontend of what alignment the code generator should use.

Instead, if specified, the target data layout is required to match what the ultimate code generator expects. This string is used by the mid-level optimizers to improve code, and this only works if it matches what the ultimate code generator uses. There is no way to generate IR that does not embed this target-specific detail into the IR. If you don’t specify the string, the default specifications will be used to generate a Data Layout and the optimization phases will operate accordingly and introduce target specificity into the IR with respect to these default specifications.

Target Triple

A module may specify a target triple string that describes the target host. The syntax for the target triple is simply:

target triple = "x86_64-apple-macosx10.7.0"

The target triple string consists of a series of identifiers delimited by the minus sign character (‘-‘). The canonical forms are:

ARCHITECTURE-VENDOR-OPERATING_SYSTEM
ARCHITECTURE-VENDOR-OPERATING_SYSTEM-ENVIRONMENT

This information is passed along to the backend so that it generates code for the proper architecture. It’s possible to override this on the command line with the -mtriple command line option.

Object Lifetime

A memory object, or simply object, is a region of a memory space that is reserved by a memory allocation such as alloca, heap allocation calls, and global variable definitions. Once it is allocated, the bytes stored in the region can only be read or written through a pointer that is based on the allocation value. If a pointer that is not based on the object tries to read or write to the object, it is undefined behavior.

A lifetime of a memory object is a property that decides its accessibility. Unless stated otherwise, a memory object is alive since its allocation, and dead after its deallocation. It is undefined behavior to access a memory object that isn’t alive, but operations that don’t dereference it such as getelementptr, ptrtoint and icmp return a valid result. This explains code motion of these instructions across operations that impact the object’s lifetime. A stack object’s lifetime can be explicitly specified using llvm.lifetime.start and llvm.lifetime.end intrinsic function calls.

Pointer Aliasing Rules

Any memory access must be done through a pointer value associated with an address range of the memory access, otherwise the behavior is undefined. Pointer values are associated with address ranges according to the following rules:

• A pointer value is associated with the addresses associated with any value it is based on.

• An address of a global variable is associated with the address range of the variable’s storage.

• The result value of an allocation instruction is associated with the address range of the allocated storage.

• A null pointer in the default address-space is associated with no address.

• An undef value in any address-space is associated with no address.

• An integer constant other than zero or a pointer value returned from a function not defined within LLVM may be associated with address ranges allocated through mechanisms other than those provided by LLVM. Such ranges shall not overlap with any ranges of addresses allocated by mechanisms provided by LLVM.

A pointer value is based on another pointer value according to the following rules:

• A pointer value formed from a scalar getelementptr operation is based on the pointer-typed operand of the getelementptr.

• The pointer in lane l of the result of a vector getelementptr operation is based on the pointer in lane l of the vector-of-pointers-typed operand of the getelementptr.

• The result value of a bitcast is based on the operand of the bitcast.

• A pointer value formed by an inttoptr is based on all pointer values that contribute (directly or indirectly) to the computation of the pointer’s value.

• The “based on” relationship is transitive.

Note that this definition of “based” is intentionally similar to the definition of “based” in C99, though it is slightly weaker.

LLVM IR does not associate types with memory. The result type of a load merely indicates the size and alignment of the memory from which to load, as well as the interpretation of the value. The first operand type of a store similarly only indicates the size and alignment of the store.

Consequently, type-based alias analysis, aka TBAA, aka -fstrict-aliasing, is not applicable to general unadorned LLVM IR. Metadata may be used to encode additional information which specialized optimization passes may use to implement type-based alias analysis.

Pointer Capture

Given a function call and a pointer that is passed as an argument or stored in the memory before the call, a pointer is captured by the call if it makes a copy of any part of the pointer that outlives the call. To be precise, a pointer is captured if one or more of the following conditions hold:

1. The call stores any bit of the pointer carrying information into a place, and the stored bits can be read from the place by the caller after this call exits.

@glb  = global ptr null
@glb2 = global ptr null
@glb3 = global ptr null
@glbi = global i32 0

define ptr @f(ptr %a, ptr %b, ptr %c, ptr %d, ptr %e) {
  store ptr %a, ptr @glb ; %a is captured by this call

  store ptr %b,   ptr @glb2 ; %b isn't captured because the stored value is overwritten by the store below
  store ptr null, ptr @glb2

  store ptr %c,   ptr @glb3
  call void @g() ; If @g makes a copy of %c that outlives this call (@f), %c is captured
  store ptr null, ptr @glb3

  %i = ptrtoint ptr %d to i64
  %j = trunc i64 %i to i32
  store i32 %j, ptr @glbi ; %d is captured

  ret ptr %e ; %e is captured
}

2. The call stores any bit of the pointer carrying information into a place, and the stored bits can be safely read from the place by another thread via synchronization.

@lock = global i1 true

define void @f(ptr %a) {
  store ptr %a, ptr* @glb
  store atomic i1 false, ptr @lock release ; %a is captured because another thread can safely read @glb
  store ptr null, ptr @glb
  ret void
}

3. The call’s behavior depends on any bit of the pointer carrying information.

@glb = global i8 0

define void @f(ptr %a) {
  %c = icmp eq ptr %a, @glb
  br i1 %c, label %BB_EXIT, label %BB_CONTINUE ; escapes %a
BB_EXIT:
  call void @exit()
  unreachable
BB_CONTINUE:
  ret void
}

4. The pointer is used in a volatile access as its address.

Volatile Memory Accesses

Certain memory accesses, such as load’s, store’s, and llvm.memcpy’s may be marked volatile. The optimizers must not change the number of volatile operations or change their order of execution relative to other volatile operations. The optimizers may change the order of volatile operations relative to non-volatile operations. This is not Java’s “volatile” and has no cross-thread synchronization behavior.

A volatile load or store may have additional target-specific semantics. Any volatile operation can have side effects, and any volatile operation can read and/or modify state which is not accessible via a regular load or store in this module. Volatile operations may use addresses which do not point to memory (like MMIO registers). This means the compiler may not use a volatile operation to prove a non-volatile access to that address has defined behavior.

The allowed side-effects for volatile accesses are limited. If a non-volatile store to a given address would be legal, a volatile operation may modify the memory at that address. A volatile operation may not modify any other memory accessible by the module being compiled. A volatile operation may not call any code in the current module.

In general (without target specific context), the address space of a volatile operation may not be changed. Different address spaces may have different trapping behavior when dereferencing an invalid pointer.

The compiler may assume execution will continue after a volatile operation, so operations which modify memory or may have undefined behavior can be hoisted past a volatile operation.

As an exception to the preceding rule, the compiler may not assume execution will continue after a volatile store operation. This restriction is necessary to support the somewhat common pattern in C of intentionally storing to an invalid pointer to crash the program. In the future, it might make sense to allow frontends to control this behavior.

IR-level volatile loads and stores cannot safely be optimized into llvm.memcpy or llvm.memmove intrinsics even when those intrinsics are flagged volatile. Likewise, the backend should never split or merge target-legal volatile load/store instructions. Similarly, IR-level volatile loads and stores cannot change from integer to floating-point or vice versa.

Rationale

Platforms may rely on volatile loads and stores of natively supported data width to be executed as single instruction. For example, in C this holds for an l-value of volatile primitive type with native hardware support, but not necessarily for aggregate types. The frontend upholds these expectations, which are intentionally unspecified in the IR. The rules above ensure that IR transformations do not violate the frontend’s contract with the language.

Memory Model for Concurrent Operations

The LLVM IR does not define any way to start parallel threads of execution or to register signal handlers. Nonetheless, there are platform-specific ways to create them, and we define LLVM IR’s behavior in their presence. This model is inspired by the C++ memory model.

For a more informal introduction to this model, see the LLVM Atomic Instructions and Concurrency Guide.

We define a happens-before partial order as the least partial order that

• Is a superset of single-thread program order, and

• When a synchronizes-with b, includes an edge from a to b. Synchronizes-with pairs are introduced by platform-specific techniques, like pthread locks, thread creation, thread joining, etc., and by atomic instructions. (See also Atomic Memory Ordering Constraints).

Note that program order does not introduce happens-before edges between a thread and signals executing inside that thread.

Every (defined) read operation (load instructions, memcpy, atomic loads/read-modify-writes, etc.) R reads a series of bytes written by (defined) write operations (store instructions, atomic stores/read-modify-writes, memcpy, etc.). For the purposes of this section, initialized globals are considered to have a write of the initializer which is atomic and happens before any other read or write of the memory in question. For each byte of a read R, R_byte may see any write to the same byte, except:

• If write₁ happens before write₂, and write₂ happens before R_byte, then R_byte does not see write₁.

• If R_byte happens before write₃, then R_byte does not see write₃.

Given that definition, R_byte is defined as follows:

• If R is volatile, the result is target-dependent. (Volatile is supposed to give guarantees which can support sig_atomic_t in C/C++, and may be used for accesses to addresses that do not behave like normal memory. It does not generally provide cross-thread synchronization.)

• Otherwise, if there is no write to the same byte that happens before R_byte, R_byte returns undef for that byte.

• Otherwise, if R_byte may see exactly one write, R_byte returns the value written by that write.

• Otherwise, if R is atomic, and all the writes R_byte may see are atomic, it chooses one of the values written. See the Atomic Memory Ordering Constraints section for additional constraints on how the choice is made.

• Otherwise R_byte returns undef.

R returns the value composed of the series of bytes it read. This implies that some bytes within the value may be undef without the entire value being undef. Note that this only defines the semantics of the operation; it doesn’t mean that targets will emit more than one instruction to read the series of bytes.

Note that in cases where none of the atomic intrinsics are used, this model places only one restriction on IR transformations on top of what is required for single-threaded execution: introducing a store to a byte which might not otherwise be stored is not allowed in general. (Specifically, in the case where another thread might write to and read from an address, introducing a store can change a load that may see exactly one write into a load that may see multiple writes.)

Atomic Memory Ordering Constraints

Atomic instructions (cmpxchg, atomicrmw, fence, atomic load, and atomic store) take ordering parameters that determine which other atomic instructions on the same address they synchronize with. These semantics implement the Java or C++ memory models; if these descriptions aren’t precise enough, check those specs (see spec references in the atomics guide). fence instructions treat these orderings somewhat differently since they don’t take an address. See that instruction’s documentation for details.

For a simpler introduction to the ordering constraints, see the LLVM Atomic Instructions and Concurrency Guide.

unordered

The set of values that can be read is governed by the happens-before partial order. A value cannot be read unless some operation wrote it. This is intended to provide a guarantee strong enough to model Java’s non-volatile shared variables. This ordering cannot be specified for read-modify-write operations; it is not strong enough to make them atomic in any interesting way.

monotonic

In addition to the guarantees of unordered, there is a single total order for modifications by monotonic operations on each address. All modification orders must be compatible with the happens-before order. There is no guarantee that the modification orders can be combined to a global total order for the whole program (and this often will not be possible). The read in an atomic read-modify-write operation (cmpxchg and atomicrmw) reads the value in the modification order immediately before the value it writes. If one atomic read happens before another atomic read of the same address, the later read must see the same value or a later value in the address’s modification order. This disallows reordering of monotonic (or stronger) operations on the same address. If an address is written monotonic-ally by one thread, and other threads monotonic-ally read that address repeatedly, the other threads must eventually see the write. This corresponds to the C/C++ memory_order_relaxed.

acquire

In addition to the guarantees of monotonic, a synchronizes-with edge may be formed with a release operation. This is intended to model C/C++’s memory_order_acquire.

release

In addition to the guarantees of monotonic, if this operation writes a value which is subsequently read by an acquire operation, it synchronizes-with that operation. Furthermore, this occurs even if the value written by a release operation has been modified by a read-modify-write operation before being read. (Such a set of operations comprises a release sequence). This corresponds to the C/C++ memory_order_release.

acq_rel (acquire+release)

Acts as both an acquire and release operation on its address. This corresponds to the C/C++ memory_order_acq_rel.

seq_cst (sequentially consistent)

In addition to the guarantees of acq_rel (acquire for an operation that only reads, release for an operation that only writes), there is a global total order on all sequentially-consistent operations on all addresses. Each sequentially-consistent read sees the last preceding write to the same address in this global order. This corresponds to the C/C++ memory_order_seq_cst and Java volatile.

Note: this global total order is not guaranteed to be fully consistent with the happens-before partial order if non-seq_cst accesses are involved. See the C++ standard [atomics.order] section for more details on the exact guarantees.

If an atomic operation is marked syncscope("singlethread"), it only synchronizes with and only participates in the seq_cst total orderings of other operations running in the same thread (for example, in signal handlers).

If an atomic operation is marked syncscope("<target-scope>"), where <target-scope> is a target specific synchronization scope, then it is target dependent if it synchronizes with and participates in the seq_cst total orderings of other operations.

Otherwise, an atomic operation that is not marked syncscope("singlethread") or syncscope("<target-scope>") synchronizes with and participates in the seq_cst total orderings of other operations that are not marked syncscope("singlethread") or syncscope("<target-scope>").

Floating-Point Environment

The default LLVM floating-point environment assumes that traps are disabled and status flags are not observable. Therefore, floating-point math operations do not have side effects and may be speculated freely. Results assume the round-to-nearest rounding mode, and subnormals are assumed to be preserved.

Running LLVM code in an environment where these assumptions are not met typically leads to undefined behavior. The strictfp and denormal-fp-math attributes as well as Constrained Floating-Point Intrinsics can be used to weaken LLVM’s assumptions and ensure defined behavior in non-default floating-point environments; see their respective documentation for details.

Behavior of Floating-Point NaN values

A floating-point NaN value consists of a sign bit, a quiet/signaling bit, and a payload (which makes up the rest of the mantissa except for the quiet/signaling bit). LLVM assumes that the quiet/signaling bit being set to 1 indicates a quiet NaN (QNaN), and a value of 0 indicates a signaling NaN (SNaN). In the following we will hence just call it the “quiet bit”.

The representation bits of a floating-point value do not mutate arbitrarily; in particular, if there is no floating-point operation being performed, NaN signs, quiet bits, and payloads are preserved.

For the purpose of this section, bitcast as well as the following operations are not “floating-point math operations”: fneg, llvm.fabs, and llvm.copysign. These operations act directly on the underlying bit representation and never change anything except possibly for the sign bit.

Floating-point math operations that return a NaN are an exception from the general principle that LLVM implements IEEE-754 semantics. Unless specified otherwise, the following rules apply whenever the IEEE-754 semantics say that a NaN value is returned: the result has a non-deterministic sign; the quiet bit and payload are non-deterministically chosen from the following set of options:

• The quiet bit is set and the payload is all-zero. (“Preferred NaN” case)

• The quiet bit is set and the payload is copied from any input operand that is a NaN. (“Quieting NaN propagation” case)

• The quiet bit and payload are copied from any input operand that is a NaN. (“Unchanged NaN propagation” case)

• The quiet bit is set and the payload is picked from a target-specific set of “extra” possible NaN payloads. The set can depend on the input operand values. This set is empty on x86 and ARM, but can be non-empty on other architectures. (For instance, on wasm, if any input NaN does not have the preferred all-zero payload or any input NaN is an SNaN, then this set contains all possible payloads; otherwise, it is empty. On SPARC, this set consists of the all-one payload.)

In particular, if all input NaNs are quiet (or if there are no input NaNs), then the output NaN is definitely quiet. Signaling NaN outputs can only occur if they are provided as an input value. For example, “fmul SNaN, 1.0” may be simplified to SNaN rather than QNaN. Similarly, if all input NaNs are preferred (or if there are no input NaNs) and the target does not have any “extra” NaN payloads, then the output NaN is guaranteed to be preferred.

Floating-point math operations are allowed to treat all NaNs as if they were quiet NaNs. For example, “pow(1.0, SNaN)” may be simplified to 1.0.

Code that requires different behavior than this should use the Constrained Floating-Point Intrinsics. In particular, constrained intrinsics rule out the “Unchanged NaN propagation” case; they are guaranteed to return a QNaN.

Unfortunately, due to hard-or-impossible-to-fix issues, LLVM violates its own specification on some architectures:

• x86-32 without SSE2 enabled may convert floating-point values to x86_fp80 and back when performing floating-point math operations; this can lead to results with different precision than expected and it can alter NaN values. Since optimizations can make contradicting assumptions, this can lead to arbitrary miscompilations. See issue #44218.

• x86-32 (even with SSE2 enabled) may implicitly perform such a conversion on values returned from a function for some calling conventions. See issue #66803.

• Older MIPS versions use the opposite polarity for the quiet/signaling bit, and LLVM does not correctly represent this. See issue #60796.

Floating-Point Semantics

This section defines the semantics for core floating-point operations on types that use a format specified by IEEE-745. These types are: half, float, double, and fp128, which correspond to the binary16, binary32, binary64, and binary128 formats, respectively. The “core” operations are those defined in section 5 of IEEE-745, which all have corresponding LLVM operations.

The value returned by those operations matches that of the corresponding IEEE-754 operation executed in the default LLVM floating-point environment, except that the behavior of NaN results is instead as specified here. In particular, such a floating-point instruction returning a non-NaN value is guaranteed to always return the same bit-identical result on all machines and optimization levels.

This means that optimizations and backends may not change the observed bitwise result of these operations in any way (unless NaNs are returned), and frontends can rely on these operations providing correctly rounded results as described in the standard.

(Note that this is only about the value returned by these operations; see the floating-point environment section regarding flags and exceptions.)

Various flags, attributes, and metadata can alter the behavior of these operations and thus make them not bit-identical across machines and optimization levels any more: most notably, the fast-math flags as well as the strictfp and denormal-fp-math attributes and fpmath metadata <fpmath-metadata>. See their corresponding documentation for details.

Fast-Math Flags

LLVM IR floating-point operations (fneg, fadd, fsub, fmul, fdiv, frem, fcmp, fptrunc, fpext), and phi, select, or call instructions that return floating-point types may use the following flags to enable otherwise unsafe floating-point transformations.

fast

This flag is a shorthand for specifying all fast-math flags at once, and imparts no additional semantics from using all of them.

nnan

No NaNs - Allow optimizations to assume the arguments and result are not NaN. If an argument is a nan, or the result would be a nan, it produces a poison value instead.

ninf

No Infs - Allow optimizations to assume the arguments and result are not +/-Inf. If an argument is +/-Inf, or the result would be +/-Inf, it produces a poison value instead.

nsz

No Signed Zeros - Allow optimizations to treat the sign of a zero argument or zero result as insignificant. This does not imply that -0.0 is poison and/or guaranteed to not exist in the operation.

Note: For phi, select, and call instructions, the following return types are considered to be floating-point types:

• Floating-point scalar or vector types

• Array types (nested to any depth) of floating-point scalar or vector types

• Homogeneous literal struct types of floating-point scalar or vector types

Rewrite-based flags

The following flags have rewrite-based semantics. These flags allow expressions, potentially containing multiple non-consecutive instructions, to be rewritten into alternative instructions. When multiple instructions are involved in an expression, it is necessary that all of the instructions have the necessary rewrite-based flag present on them, and the rewritten instructions will generally have the intersection of the flags present on the input instruction.

In the following example, the floating-point expression in the body of @orig has contract and reassoc in common, and thus if it is rewritten into the expression in the body of @target, all of the new instructions get those two flags and only those flags as a result. Since the arcp is present on only one of the instructions in the expression, it is not present in the transformed expression. Furthermore, this reassociation here is only legal because both the instructions had the reassoc flag; if only one had it, it would not be legal to make the transformation.

define double @orig(double %a, double %b, double %c) {
  %t1 = fmul contract reassoc double %a, %b
  %val = fmul contract reassoc arcp double %t1, %c
  ret double %val
}

define double @target(double %a, double %b, double %c) {
  %t1 = fmul contract reassoc double %b, %c
  %val = fmul contract reassoc double %a, %t1
  ret double %val
}

These rules do not apply to the other fast-math flags. Whether or not a flag like nnan is present on any or all of the rewritten instructions is based on whether or not it is possible for said instruction to have a NaN input or output, given the original flags.

arcp

Allows division to be treated as a multiplication by a reciprocal. Specifically, this permits a / b to be considered equivalent to a * (1.0 / b) (which may subsequently be susceptible to code motion), and it also permits a / (b / c) to be considered equivalent to a * (c / b). Both of these rewrites can be applied in either direction: a * (c / b) can be rewritten into a / (b / c).

contract

Allow floating-point contraction (e.g. fusing a multiply followed by an addition into a fused multiply-and-add). This does not enable reassociation to form arbitrary contractions. For example, (a*b) + (c*d) + e can not be transformed into (a*b) + ((c*d) + e) to create two fma operations.

afn

Approximate functions - Allow substitution of approximate calculations for functions (sin, log, sqrt, etc). See floating-point intrinsic definitions for places where this can apply to LLVM’s intrinsic math functions.

reassoc

Allow reassociation transformations for floating-point instructions. This may dramatically change results in floating-point.

Use-list Order Directives

Use-list directives encode the in-memory order of each use-list, allowing the order to be recreated. <order-indexes> is a comma-separated list of indexes that are assigned to the referenced value’s uses. The referenced value’s use-list is immediately sorted by these indexes.

Use-list directives may appear at function scope or global scope. They are not instructions, and have no effect on the semantics of the IR. When they’re at function scope, they must appear after the terminator of the final basic block.

If basic blocks have their address taken via blockaddress() expressions, uselistorder_bb can be used to reorder their use-lists from outside their function’s scope.

Syntax:

uselistorder <ty> <value>, { <order-indexes> }
uselistorder_bb @function, %block { <order-indexes> }

Examples:

define void @foo(i32 %arg1, i32 %arg2) {
entry:
  ; ... instructions ...
bb:
  ; ... instructions ...

  ; At function scope.
  uselistorder i32 %arg1, { 1, 0, 2 }
  uselistorder label %bb, { 1, 0 }
}

; At global scope.
uselistorder ptr @global, { 1, 2, 0 }
uselistorder i32 7, { 1, 0 }
uselistorder i32 (i32) @bar, { 1, 0 }
uselistorder_bb @foo, %bb, { 5, 1, 3, 2, 0, 4 }

Source Filename

The source filename string is set to the original module identifier, which will be the name of the compiled source file when compiling from source through the clang front end, for example. It is then preserved through the IR and bitcode.

This is currently necessary to generate a consistent unique global identifier for local functions used in profile data, which prepends the source file name to the local function name.

The syntax for the source file name is simply:

source_filename = "/path/to/source.c"

Type System

The LLVM type system is one of the most important features of the intermediate representation. Being typed enables a number of optimizations to be performed on the intermediate representation directly, without having to do extra analyses on the side before the transformation. A strong type system makes it easier to read the generated code and enables novel analyses and transformations that are not feasible to perform on normal three address code representations.

Void Type

Overview:

The void type does not represent any value and has no size.

Syntax:

void

Function Type

Overview:

The function type can be thought of as a function signature. It consists of a return type and a list of formal parameter types. The return type of a function type is a void type or first class type — except for label and metadata types.

Syntax:

<returntype> (<parameter list>)

…where ‘<parameter list>’ is a comma-separated list of type specifiers. Optionally, the parameter list may include a type ..., which indicates that the function takes a variable number of arguments. Variable argument functions can access their arguments with the variable argument handling intrinsic functions. ‘<returntype>’ is any type except label and metadata.

Examples:

i32 (i32)	function taking an i32, returning an i32
i32 (ptr, ...)	A vararg function that takes at least one pointer argument and returns an integer. This is the signature for printf in LLVM.
{i32, i32} (i32)	A function taking an i32, returning a structure containing two i32 values

First Class Types

The first class types are perhaps the most important. Values of these types are the only ones which can be produced by instructions.

Single Value Types

These are the types that are valid in registers from CodeGen’s perspective.

Integer Type

Overview:

The integer type is a very simple type that simply specifies an arbitrary bit width for the integer type desired. Any bit width from 1 bit to 2²³(about 8 million) can be specified.

Syntax:

iN

The number of bits the integer will occupy is specified by the N value.

Examples:

i1	a single-bit integer.
i32	a 32-bit integer.
i1942652	a really big integer of over 1 million bits.

Floating-Point Types

Type	Description
half	16-bit floating-point value (IEEE-754 binary16)
bfloat	16-bit “brain” floating-point value (7-bit significand). Provides the same number of exponent bits as float, so that it matches its dynamic range, but with greatly reduced precision. Used in Intel’s AVX-512 BF16 extensions and Arm’s ARMv8.6-A extensions, among others.
float	32-bit floating-point value (IEEE-754 binary32)
double	64-bit floating-point value (IEEE-754 binary64)
fp128	128-bit floating-point value (IEEE-754 binary128)
x86_fp80	80-bit floating-point value (X87)
ppc_fp128	128-bit floating-point value (two 64-bits)

X86_amx Type

Overview:

The x86_amx type represents a value held in an AMX tile register on an x86 machine. The operations allowed on it are quite limited. Only few intrinsics are allowed: stride load and store, zero and dot product. No instruction is allowed for this type. There are no arguments, arrays, pointers, vectors or constants of this type.

Syntax:

x86_amx

Pointer Type

Overview:

The pointer type ptr is used to specify memory locations. Pointers are commonly used to reference objects in memory.

Pointer types may have an optional address space attribute defining the numbered address space where the pointed-to object resides. For example, ptr addrspace(5) is a pointer to address space 5. In addition to integer constants, addrspace can also reference one of the address spaces defined in the datalayout string. addrspace("A") will use the alloca address space, addrspace("G") the default globals address space and addrspace("P") the program address space.

The default address space is number zero.

The semantics of non-zero address spaces are target-specific. Memory access through a non-dereferenceable pointer is undefined behavior in any address space. Pointers with the bit-value 0 are only assumed to be non-dereferenceable in address space 0, unless the function is marked with the null_pointer_is_valid attribute.

If an object can be proven accessible through a pointer with a different address space, the access may be modified to use that address space. Exceptions apply if the operation is volatile.

Prior to LLVM 15, pointer types also specified a pointee type, such as i8*, [4 x i32]* or i32 (i32*)*. In LLVM 15, such “typed pointers” are still supported under non-default options. See the opaque pointers document for more information.

Target Extension Type

Overview:

Target extension types represent types that must be preserved through optimization, but are otherwise generally opaque to the compiler. They may be used as function parameters or arguments, and in phi or select instructions. Some types may be also used in alloca instructions or as global values, and correspondingly it is legal to use load and store instructions on them. Full semantics for these types are defined by the target.

The only constants that target extension types may have are zeroinitializer, undef, and poison. Other possible values for target extension types may arise from target-specific intrinsics and functions.

These types cannot be converted to other types. As such, it is not legal to use them in bitcast instructions (as a source or target type), nor is it legal to use them in ptrtoint or inttoptr instructions. Similarly, they are not legal to use in an icmp instruction.

Target extension types have a name and optional type or integer parameters. The meanings of name and parameters are defined by the target. When being defined in LLVM IR, all of the type parameters must precede all of the integer parameters.

Specific target extension types are registered with LLVM as having specific properties. These properties can be used to restrict the type from appearing in certain contexts, such as being the type of a global variable or having a zeroinitializer constant be valid. A complete list of type properties may be found in the documentation for llvm::TargetExtType::Property (doxygen).

Syntax:

target("label")
target("label", void)
target("label", void, i32)
target("label", 0, 1, 2)
target("label", void, i32, 0, 1, 2)

Vector Type

Overview:

A vector type is a simple derived type that represents a vector of elements. Vector types are used when multiple primitive data are operated in parallel using a single instruction (SIMD). A vector type requires a size (number of elements), an underlying primitive data type, and a scalable property to represent vectors where the exact hardware vector length is unknown at compile time. Vector types are considered first class.

Memory Layout:

In general vector elements are laid out in memory in the same way as array types. Such an analogy works fine as long as the vector elements are byte sized. However, when the elements of the vector aren’t byte sized it gets a bit more complicated. One way to describe the layout is by describing what happens when a vector such as <N x iM> is bitcasted to an integer type with N*M bits, and then following the rules for storing such an integer to memory.

A bitcast from a vector type to a scalar integer type will see the elements being packed together (without padding). The order in which elements are inserted in the integer depends on endianness. For little endian element zero is put in the least significant bits of the integer, and for big endian element zero is put in the most significant bits.

Using a vector such as <i4 1, i4 2, i4 3, i4 5> as an example, together with the analogy that we can replace a vector store by a bitcast followed by an integer store, we get this for big endian:

%val = bitcast <4 x i4> <i4 1, i4 2, i4 3, i4 5> to i16

; Bitcasting from a vector to an integral type can be seen as
; concatenating the values:
;   %val now has the hexadecimal value 0x1235.

store i16 %val, ptr %ptr

; In memory the content will be (8-bit addressing):
;
;    [%ptr + 0]: 00010010  (0x12)
;    [%ptr + 1]: 00110101  (0x35)

The same example for little endian:

%val = bitcast <4 x i4> <i4 1, i4 2, i4 3, i4 5> to i16

; Bitcasting from a vector to an integral type can be seen as
; concatenating the values:
;   %val now has the hexadecimal value 0x5321.

store i16 %val, ptr %ptr

; In memory the content will be (8-bit addressing):
;
;    [%ptr + 0]: 00100001  (0x21)
;    [%ptr + 1]: 01010011  (0x53)

When <N*M> isn’t evenly divisible by the byte size the exact memory layout is unspecified (just like it is for an integral type of the same size). This is because different targets could put the padding at different positions when the type size is smaller than the type’s store size.

Syntax:

< <# elements> x <elementtype> >          ; Fixed-length vector
< vscale x <# elements> x <elementtype> > ; Scalable vector

The number of elements is a constant integer value larger than 0; elementtype may be any integer, floating-point or pointer type. Vectors of size zero are not allowed. For scalable vectors, the total number of elements is a constant multiple (called vscale) of the specified number of elements; vscale is a positive integer that is unknown at compile time and the same hardware-dependent constant for all scalable vectors at run time. The size of a specific scalable vector type is thus constant within IR, even if the exact size in bytes cannot be determined until run time.

Examples:

<4 x i32>	Vector of 4 32-bit integer values.
<8 x float>	Vector of 8 32-bit floating-point values.
<2 x i64>	Vector of 2 64-bit integer values.
<4 x ptr>	Vector of 4 pointers
<vscale x 4 x i32>	Vector with a multiple of 4 32-bit integer values.

Label Type

Overview:

The label type represents code labels.

Syntax:

label

Token Type

Overview:

The token type is used when a value is associated with an instruction but all uses of the value must not attempt to introspect or obscure it. As such, it is not appropriate to have a phi or select of type token.

Syntax:

token

Metadata Type

Overview:

The metadata type represents embedded metadata. No derived types may be created from metadata except for function arguments.

Syntax:

metadata

Aggregate Types

Aggregate Types are a subset of derived types that can contain multiple member types. Arrays and structs are aggregate types. Vectors are not considered to be aggregate types.

Array Type

Overview:

The array type is a very simple derived type that arranges elements sequentially in memory. The array type requires a size (number of elements) and an underlying data type.

Syntax:

[<# elements> x <elementtype>]

The number of elements is a constant integer value; elementtype may be any type with a size.

Examples:

[40 x i32]	Array of 40 32-bit integer values.
[41 x i32]	Array of 41 32-bit integer values.
[4 x i8]	Array of 4 8-bit integer values.

Here are some examples of multidimensional arrays:

[3 x [4 x i32]]	3x4 array of 32-bit integer values.
[12 x [10 x float]]	12x10 array of single precision floating-point values.
[2 x [3 x [4 x i16]]]	2x3x4 array of 16-bit integer values.

There is no restriction on indexing beyond the end of the array implied by a static type (though there are restrictions on indexing beyond the bounds of an allocated object in some cases). This means that single-dimension ‘variable sized array’ addressing can be implemented in LLVM with a zero length array type. An implementation of ‘pascal style arrays’ in LLVM could use the type “{ i32, [0 x float]}”, for example.

Structure Type

Overview:

The structure type is used to represent a collection of data members together in memory. The elements of a structure may be any type that has a size.

Structures in memory are accessed using ‘load’ and ‘store’ by getting a pointer to a field with the ‘getelementptr’ instruction. Structures in registers are accessed using the ‘extractvalue’ and ‘insertvalue’ instructions.

Structures may optionally be “packed” structures, which indicate that the alignment of the struct is one byte, and that there is no padding between the elements. In non-packed structs, padding between field types is inserted as defined by the DataLayout string in the module, which is required to match what the underlying code generator expects.

Structures can either be “literal” or “identified”. A literal structure is defined inline with other types (e.g. [2 x {i32, i32}]) whereas identified types are always defined at the top level with a name. Literal types are uniqued by their contents and can never be recursive or opaque since there is no way to write one. Identified types can be opaqued and are never uniqued. Identified types must not be recursive.

Syntax:

%T1 = type { <type list> }     ; Identified normal struct type
%T2 = type <{ <type list> }>   ; Identified packed struct type

Examples:

{ i32, i32, i32 }	A triple of three i32 values (this is a “homogeneous” struct as all element types are the same)
{ float, ptr }	A pair, where the first element is a float and the second element is a pointer.
<{ i8, i32 }>	A packed struct known to be 5 bytes in size.

Opaque Structure Types

Overview:

Opaque structure types are used to represent structure types that do not have a body specified. This corresponds (for example) to the C notion of a forward declared structure. They can be named (%X) or unnamed (%52).

Syntax:

%X = type opaque
%52 = type opaque

Examples:

opaque

An opaque type.

Constants

LLVM has several different basic types of constants. This section describes them all and their syntax.

Simple Constants

Boolean constants

The two strings ‘true’ and ‘false’ are both valid constants of the i1 type.

Integer constants

Standard integers (such as ‘4’) are constants of the integer type. They can be either decimal or hexadecimal. Decimal integers can be prefixed with - to represent negative integers, e.g. ‘-1234’. Hexadecimal integers must be prefixed with either u or s to indicate whether they are unsigned or signed respectively. e.g ‘u0x8000’ gives 32768, whilst ‘s0x8000’ gives -32768.

Note that hexadecimal integers are sign extended from the number of active bits, i.e. the bit width minus the number of leading zeros. So ‘s0x0001’ of type ‘i16’ will be -1, not 1.

Floating-point constants

Floating-point constants use standard decimal notation (e.g. 123.421), exponential notation (e.g. 1.23421e+2), or a more precise hexadecimal notation (see below). The assembler requires the exact decimal value of a floating-point constant. For example, the assembler accepts 1.25 but rejects 1.3 because 1.3 is a repeating decimal in binary. Floating-point constants must have a floating-point type.

Null pointer constants

The identifier ‘null’ is recognized as a null pointer constant and must be of pointer type.

Token constants

The identifier ‘none’ is recognized as an empty token constant and must be of token type.

The one non-intuitive notation for constants is the hexadecimal form of floating-point constants. For example, the form ‘double    0x432ff973cafa8000’ is equivalent to (but harder to read than) ‘double 4.5e+15’. The only time hexadecimal floating-point constants are required (and the only time that they are generated by the disassembler) is when a floating-point constant must be emitted but it cannot be represented as a decimal floating-point number in a reasonable number of digits. For example, NaN’s, infinities, and other special values are represented in their IEEE hexadecimal format so that assembly and disassembly do not cause any bits to change in the constants.

When using the hexadecimal form, constants of types bfloat, half, float, and double are represented using the 16-digit form shown above (which matches the IEEE754 representation for double); bfloat, half and float values must, however, be exactly representable as bfloat, IEEE 754 half, and IEEE 754 single precision respectively. Hexadecimal format is always used for long double, and there are three forms of long double. The 80-bit format used by x86 is represented as 0xK followed by 20 hexadecimal digits. The 128-bit format used by PowerPC (two adjacent doubles) is represented by 0xM followed by 32 hexadecimal digits. The IEEE 128-bit format is represented by 0xL followed by 32 hexadecimal digits. Long doubles will only work if they match the long double format on your target. The IEEE 16-bit format (half precision) is represented by 0xH followed by 4 hexadecimal digits. The bfloat 16-bit format is represented by 0xR followed by 4 hexadecimal digits. All hexadecimal formats are big-endian (sign bit at the left).

There are no constants of type x86_amx.

Complex Constants

Complex constants are a (potentially recursive) combination of simple constants and smaller complex constants.

Structure constants

Structure constants are represented with notation similar to structure type definitions (a comma separated list of elements, surrounded by braces ({})). For example: “{ i32 4, float 17.0, ptr @G }”, where “@G” is declared as “@G = external global i32”. Structure constants must have structure type, and the number and types of elements must match those specified by the type.

Array constants

Array constants are represented with notation similar to array type definitions (a comma separated list of elements, surrounded by square brackets ([])). For example: “[ i32 42, i32 11, i32 74 ]”. Array constants must have array type, and the number and types of elements must match those specified by the type. As a special case, character array constants may also be represented as a double-quoted string using the c prefix. For example: “c"Hello World\0A\00"”.

Vector constants

Vector constants are represented with notation similar to vector type definitions (a comma separated list of elements, surrounded by less-than/greater-than’s (<>)). For example: “< i32 42, i32 11, i32 74, i32 100 >”. Vector constants must have vector type, and the number and types of elements must match those specified by the type.

When creating a vector whose elements have the same constant value, the preferred syntax is splat (<Ty> Val). For example: “splat (i32 11)”. These vector constants must have vector type with an element type that matches the splat operand.

Zero initialization

The string ‘zeroinitializer’ can be used to zero initialize a value to zero of any type, including scalar and aggregate types. This is often used to avoid having to print large zero initializers (e.g. for large arrays) and is always exactly equivalent to using explicit zero initializers.

Metadata node

A metadata node is a constant tuple without types. For example: “!{!0, !{!2, !0}, !"test"}”. Metadata can reference constant values, for example: “!{!0, i32 0, ptr @global, ptr @function, !"str"}”. Unlike other typed constants that are meant to be interpreted as part of the instruction stream, metadata is a place to attach additional information such as debug info.

Global Variable and Function Addresses

The addresses of global variables and functions are always implicitly valid (link-time) constants. These constants are explicitly referenced when the identifier for the global is used and always have pointer type. For example, the following is a legal LLVM file:

@X = global i32 17
@Y = global i32 42
@Z = global [2 x ptr] [ ptr @X, ptr @Y ]

Undefined Values

The string ‘undef’ can be used anywhere a constant is expected, and indicates that the user of the value may receive an unspecified bit-pattern. Undefined values may be of any type (other than ‘label’ or ‘void’) and be used anywhere a constant is permitted.

Note

A ‘poison’ value (described in the next section) should be used instead of ‘undef’ whenever possible. Poison values are stronger than undef, and enable more optimizations. Just the existence of ‘undef’ blocks certain optimizations (see the examples below).

Undefined values are useful because they indicate to the compiler that the program is well defined no matter what value is used. This gives the compiler more freedom to optimize. Here are some examples of (potentially surprising) transformations that are valid (in pseudo IR):

  %A = add %X, undef
  %B = sub %X, undef
  %C = xor %X, undef
Safe:
  %A = undef
  %B = undef
  %C = undef

This is safe because all of the output bits are affected by the undef bits. Any output bit can have a zero or one depending on the input bits.

  %A = or %X, undef
  %B = and %X, undef
Safe:
  %A = -1
  %B = 0
Safe:
  %A = %X  ;; By choosing undef as 0
  %B = %X  ;; By choosing undef as -1
Unsafe:
  %A = undef
  %B = undef

These logical operations have bits that are not always affected by the input. For example, if %X has a zero bit, then the output of the ‘and’ operation will always be a zero for that bit, no matter what the corresponding bit from the ‘undef’ is. As such, it is unsafe to optimize or assume that the result of the ‘and’ is ‘undef’. However, it is safe to assume that all bits of the ‘undef’ could be 0, and optimize the ‘and’ to 0. Likewise, it is safe to assume that all the bits of the ‘undef’ operand to the ‘or’ could be set, allowing the ‘or’ to be folded to -1.

  %A = select undef, %X, %Y
  %B = select undef, 42, %Y
  %C = select %X, %Y, undef
Safe:
  %A = %X     (or %Y)
  %B = 42     (or %Y)
  %C = %Y     (if %Y is provably not poison; unsafe otherwise)
Unsafe:
  %A = undef
  %B = undef
  %C = undef

This set of examples shows that undefined ‘select’ (and conditional branch) conditions can go either way, but they have to come from one of the two operands. In the %A example, if %X and %Y were both known to have a clear low bit, then %A would have to have a cleared low bit. However, in the %C example, the optimizer is allowed to assume that the ‘undef’ operand could be the same as %Y if %Y is provably not ‘poison’, allowing the whole ‘select’ to be eliminated. This is because ‘poison’ is stronger than ‘undef’.

  %A = xor undef, undef

  %B = undef
  %C = xor %B, %B

  %D = undef
  %E = icmp slt %D, 4
  %F = icmp gte %D, 4

Safe:
  %A = undef
  %B = undef
  %C = undef
  %D = undef
  %E = undef
  %F = undef

This example points out that two ‘undef’ operands are not necessarily the same. This can be surprising to people (and also matches C semantics) where they assume that “X^X” is always zero, even if X is undefined. This isn’t true for a number of reasons, but the short answer is that an ‘undef’ “variable” can arbitrarily change its value over its “live range”. This is true because the variable doesn’t actually have a live range. Instead, the value is logically read from arbitrary registers that happen to be around when needed, so the value is not necessarily consistent over time. In fact, %A and %C need to have the same semantics or the core LLVM “replace all uses with” concept would not hold.

To ensure all uses of a given register observe the same value (even if ‘undef’), the freeze instruction can be used.

  %A = sdiv undef, %X
  %B = sdiv %X, undef
Safe:
  %A = 0
b: unreachable

These examples show the crucial difference between an undefined value and undefined behavior. An undefined value (like ‘undef’) is allowed to have an arbitrary bit-pattern. This means that the %A operation can be constant folded to ‘0’, because the ‘undef’ could be zero, and zero divided by any value is zero. However, in the second example, we can make a more aggressive assumption: because the undef is allowed to be an arbitrary value, we are allowed to assume that it could be zero. Since a divide by zero has undefined behavior, we are allowed to assume that the operation does not execute at all. This allows us to delete the divide and all code after it. Because the undefined operation “can’t happen”, the optimizer can assume that it occurs in dead code.

a:  store undef -> %X
b:  store %X -> undef
Safe:
a: <deleted>     (if the stored value in %X is provably not poison)
b: unreachable

A store of an undefined value can be assumed to not have any effect; we can assume that the value is overwritten with bits that happen to match what was already there. This argument is only valid if the stored value is provably not poison. However, a store to an undefined location could clobber arbitrary memory, therefore, it has undefined behavior.

Branching on an undefined value is undefined behavior. This explains optimizations that depend on branch conditions to construct predicates, such as Correlated Value Propagation and Global Value Numbering. In case of switch instruction, the branch condition should be frozen, otherwise it is undefined behavior.

Unsafe:
  br undef, BB1, BB2 ; UB

  %X = and i32 undef, 255
  switch %X, label %ret [ .. ] ; UB

  store undef, ptr %ptr
  %X = load ptr %ptr ; %X is undef
  switch i8 %X, label %ret [ .. ] ; UB

Safe:
  %X = or i8 undef, 255 ; always 255
  switch i8 %X, label %ret [ .. ] ; Well-defined

  %X = freeze i1 undef
  br %X, BB1, BB2 ; Well-defined (non-deterministic jump)

Poison Values

A poison value is a result of an erroneous operation. In order to facilitate speculative execution, many instructions do not invoke immediate undefined behavior when provided with illegal operands, and return a poison value instead. The string ‘poison’ can be used anywhere a constant is expected, and operations such as add with the nsw flag can produce a poison value.

Most instructions return ‘poison’ when one of their arguments is ‘poison’. A notable exception is the select instruction. Propagation of poison can be stopped with the freeze instruction.

It is correct to replace a poison value with an undef value or any value of the type.

This means that immediate undefined behavior occurs if a poison value is used as an instruction operand that has any values that trigger undefined behavior. Notably this includes (but is not limited to):

• The pointer operand of a load, store or any other pointer dereferencing instruction (independent of address space).

• The divisor operand of a udiv, sdiv, urem or srem instruction.

• The condition operand of a br instruction.

• The callee operand of a call or invoke instruction.

• The parameter operand of a call or invoke instruction, when the function or invoking call site has a noundef attribute in the corresponding position.

• The operand of a ret instruction if the function or invoking call site has a noundef attribute in the return value position.

Here are some examples:

entry:
  %poison = sub nuw i32 0, 1           ; Results in a poison value.
  %poison2 = sub i32 poison, 1         ; Also results in a poison value.
  %still_poison = and i32 %poison, 0   ; 0, but also poison.
  %poison_yet_again = getelementptr i32, ptr @h, i32 %still_poison
  store i32 0, ptr %poison_yet_again   ; Undefined behavior due to
                                       ; store to poison.

  store i32 %poison, ptr @g            ; Poison value stored to memory.
  %poison3 = load i32, ptr @g          ; Poison value loaded back from memory.

  %poison4 = load i16, ptr @g          ; Returns a poison value.
  %poison5 = load i64, ptr @g          ; Returns a poison value.

  %cmp = icmp slt i32 %poison, 0       ; Returns a poison value.
  br i1 %cmp, label %end, label %end   ; undefined behavior

end:

Well-Defined Values

Given a program execution, a value is well defined if the value does not have an undef bit and is not poison in the execution. An aggregate value or vector is well defined if its elements are well defined. The padding of an aggregate isn’t considered, since it isn’t visible without storing it into memory and loading it with a different type.

A constant of a single value, non-vector type is well defined if it is neither ‘undef’ constant nor ‘poison’ constant. The result of freeze instruction is well defined regardless of its operand.

Addresses of Basic Blocks

blockaddress(@function, %block)

The ‘blockaddress’ constant computes the address of the specified basic block in the specified function.

It always has an ptr addrspace(P) type, where P is the address space of the function containing %block (usually addrspace(0)).

Taking the address of the entry block is illegal.

This value only has defined behavior when used as an operand to the ‘indirectbr’ or for comparisons against null. Pointer equality tests between labels addresses results in undefined behavior — though, again, comparison against null is ok, and no label is equal to the null pointer. This may be passed around as an opaque pointer sized value as long as the bits are not inspected. This allows ptrtoint and arithmetic to be performed on these values so long as the original value is reconstituted before the indirectbr instruction.

Finally, some targets may provide defined semantics when using the value as the operand to an inline assembly, but that is target specific.

DSO Local Equivalent

dso_local_equivalent @func

A ‘dso_local_equivalent’ constant represents a function which is functionally equivalent to a given function, but is always defined in the current linkage unit. The resulting pointer has the same type as the underlying function. The resulting pointer is permitted, but not required, to be different from a pointer to the function, and it may have different values in different translation units.

The target function may not have extern_weak linkage.

dso_local_equivalent can be implemented as such:

• If the function has local linkage, hidden visibility, or is dso_local, dso_local_equivalent can be implemented as simply a pointer to the function.

• dso_local_equivalent can be implemented with a stub that tail-calls the function. Many targets support relocations that resolve at link time to either a function or a stub for it, depending on if the function is defined within the linkage unit; LLVM will use this when available. (This is commonly called a “PLT stub”.) On other targets, the stub may need to be emitted explicitly.

This can be used wherever a dso_local instance of a function is needed without needing to explicitly make the original function dso_local. An instance where this can be used is for static offset calculations between a function and some other dso_local symbol. This is especially useful for the Relative VTables C++ ABI, where dynamic relocations for function pointers in VTables can be replaced with static relocations for offsets between the VTable and virtual functions which may not be dso_local.

This is currently only supported for ELF binary formats.

No CFI

no_cfi @func

With Control-Flow Integrity (CFI), a ‘no_cfi’ constant represents a function reference that does not get replaced with a reference to the CFI jump table in the LowerTypeTests pass. These constants may be useful in low-level programs, such as operating system kernels, which need to refer to the actual function body.

Pointer Authentication Constants

ptrauth (ptr CST, i32 KEY[, i64 DISC[, ptr ADDRDISC]?]?)

A ‘ptrauth’ constant represents a pointer with a cryptographic authentication signature embedded into some bits, as described in the Pointer Authentication document.

A ‘ptrauth’ constant is simply a constant equivalent to the llvm.ptrauth.sign intrinsic, potentially fed by a discriminator llvm.ptrauth.blend if needed.

Its type is the same as the first argument. An integer constant discriminator and an address discriminator may be optionally specified. Otherwise, they have values i64 0 and ptr null.

If the address discriminator is null then the expression is equivalent to

%tmp = call i64 @llvm.ptrauth.sign(i64 ptrtoint (ptr CST to i64), i32 KEY, i64 DISC)
%val = inttoptr i64 %tmp to ptr

Otherwise, the expression is equivalent to:

%tmp1 = call i64 @llvm.ptrauth.blend(i64 ptrtoint (ptr ADDRDISC to i64), i64 DISC)
%tmp2 = call i64 @llvm.ptrauth.sign(i64 ptrtoint (ptr CST to i64), i32 KEY, i64 %tmp1)
%val = inttoptr i64 %tmp2 to ptr

Constant Expressions

Constant expressions are used to allow expressions involving other constants to be used as constants. Constant expressions may be of any first class type and may involve any LLVM operation that does not have side effects (e.g. load and call are not supported). The following is the syntax for constant expressions:

trunc (CST to TYPE)

Perform the trunc operation on constants.

ptrtoint (CST to TYPE)

Perform the ptrtoint operation on constants.

inttoptr (CST to TYPE)

Perform the inttoptr operation on constants. This one is really dangerous!

bitcast (CST to TYPE)

Convert a constant, CST, to another TYPE. The constraints of the operands are the same as those for the bitcast instruction.

addrspacecast (CST to TYPE)

Convert a constant pointer or constant vector of pointer, CST, to another TYPE in a different address space. The constraints of the operands are the same as those for the addrspacecast instruction.

getelementptr (TY, CSTPTR, IDX0, IDX1, ...), getelementptr inbounds (TY, CSTPTR, IDX0, IDX1, ...)

Perform the getelementptr operation on constants. As with the getelementptr instruction, the index list may have one or more indexes, which are required to make sense for the type of “pointer to TY”. These indexes may be implicitly sign-extended or truncated to match the index size of CSTPTR’s address space.

extractelement (VAL, IDX)

Perform the extractelement operation on constants.

insertelement (VAL, ELT, IDX)

Perform the insertelement operation on constants.

shufflevector (VEC1, VEC2, IDXMASK)

Perform the shufflevector operation on constants.

add (LHS, RHS)

Perform an addition on constants.

sub (LHS, RHS)

Perform a subtraction on constants.

mul (LHS, RHS)

Perform a multiplication on constants.

shl (LHS, RHS)

Perform a left shift on constants.

xor (LHS, RHS)

Perform a bitwise xor on constants.

Other Values

Inline Assembler Expressions

LLVM supports inline assembler expressions (as opposed to Module-Level Inline Assembly) through the use of a special value. This value represents the inline assembler as a template string (containing the instructions to emit), a list of operand constraints (stored as a string), a flag that indicates whether or not the inline asm expression has side effects, and a flag indicating whether the function containing the asm needs to align its stack conservatively.

The template string supports argument substitution of the operands using “$” followed by a number, to indicate substitution of the given register/memory location, as specified by the constraint string. “${NUM:MODIFIER}” may also be used, where MODIFIER is a target-specific annotation for how to print the operand (See Asm template argument modifiers).

A literal “$” may be included by using “$$” in the template. To include other special characters into the output, the usual “\XX” escapes may be used, just as in other strings. Note that after template substitution, the resulting assembly string is parsed by LLVM’s integrated assembler unless it is disabled – even when emitting a .s file – and thus must contain assembly syntax known to LLVM.

LLVM also supports a few more substitutions useful for writing inline assembly:

• ${:uid}: Expands to a decimal integer unique to this inline assembly blob. This substitution is useful when declaring a local label. Many standard compiler optimizations, such as inlining, may duplicate an inline asm blob. Adding a blob-unique identifier ensures that the two labels will not conflict during assembly. This is used to implement GCC’s %= special format string.

• ${:comment}: Expands to the comment character of the current target’s assembly dialect. This is usually #, but many targets use other strings, such as ;, //, or !.

• ${:private}: Expands to the assembler private label prefix. Labels with this prefix will not appear in the symbol table of the assembled object. Typically the prefix is L, but targets may use other strings. .L is relatively popular.

LLVM’s support for inline asm is modeled closely on the requirements of Clang’s GCC-compatible inline-asm support. Thus, the feature-set and the constraint and modifier codes listed here are similar or identical to those in GCC’s inline asm support. However, to be clear, the syntax of the template and constraint strings described here is not the same as the syntax accepted by GCC and Clang, and, while most constraint letters are passed through as-is by Clang, some get translated to other codes when converting from the C source to the LLVM assembly.

An example inline assembler expression is:

i32 (i32) asm "bswap $0", "=r,r"

Inline assembler expressions may only be used as the callee operand of a call or an invoke instruction. Thus, typically we have:

%X = call i32 asm "bswap $0", "=r,r"(i32 %Y)

Inline asms with side effects not visible in the constraint list must be marked as having side effects. This is done through the use of the ‘sideeffect’ keyword, like so:

call void asm sideeffect "eieio", ""()

In some cases inline asms will contain code that will not work unless the stack is aligned in some way, such as calls or SSE instructions on x86, yet will not contain code that does that alignment within the asm. The compiler should make conservative assumptions about what the asm might contain and should generate its usual stack alignment code in the prologue if the ‘alignstack’ keyword is present:

call void asm alignstack "eieio", ""()

Inline asms also support using non-standard assembly dialects. The assumed dialect is ATT. When the ‘inteldialect’ keyword is present, the inline asm is using the Intel dialect. Currently, ATT and Intel are the only supported dialects. An example is:

call void asm inteldialect "eieio", ""()

In the case that the inline asm might unwind the stack, the ‘unwind’ keyword must be used, so that the compiler emits unwinding information:

call void asm unwind "call func", ""()

If the inline asm unwinds the stack and isn’t marked with the ‘unwind’ keyword, the behavior is undefined.

If multiple keywords appear, the ‘sideeffect’ keyword must come first, the ‘alignstack’ keyword second, the ‘inteldialect’ keyword third and the ‘unwind’ keyword last.

Inline Asm Constraint String

The constraint list is a comma-separated string, each element containing one or more constraint codes.

For each element in the constraint list an appropriate register or memory operand will be chosen, and it will be made available to assembly template string expansion as $0 for the first constraint in the list, $1 for the second, etc.

There are three different types of constraints, which are distinguished by a prefix symbol in front of the constraint code: Output, Input, and Clobber. The constraints must always be given in that order: outputs first, then inputs, then clobbers. They cannot be intermingled.

There are also three different categories of constraint codes:

• Register constraint. This is either a register class, or a fixed physical register. This kind of constraint will allocate a register, and if necessary, bitcast the argument or result to the appropriate type.

• Memory constraint. This kind of constraint is for use with an instruction taking a memory operand. Different constraints allow for different addressing modes used by the target.

• Immediate value constraint. This kind of constraint is for an integer or other immediate value which can be rendered directly into an instruction. The various target-specific constraints allow the selection of a value in the proper range for the instruction you wish to use it with.

Output constraints

Output constraints are specified by an “=” prefix (e.g. “=r”). This indicates that the assembly will write to this operand, and the operand will then be made available as a return value of the asm expression. Output constraints do not consume an argument from the call instruction. (Except, see below about indirect outputs).

Normally, it is expected that no output locations are written to by the assembly expression until all of the inputs have been read. As such, LLVM may assign the same register to an output and an input. If this is not safe (e.g. if the assembly contains two instructions, where the first writes to one output, and the second reads an input and writes to a second output), then the “&” modifier must be used (e.g. “=&r”) to specify that the output is an “early-clobber” output. Marking an output as “early-clobber” ensures that LLVM will not use the same register for any inputs (other than an input tied to this output).

Input constraints

Input constraints do not have a prefix – just the constraint codes. Each input constraint will consume one argument from the call instruction. It is not permitted for the asm to write to any input register or memory location (unless that input is tied to an output). Note also that multiple inputs may all be assigned to the same register, if LLVM can determine that they necessarily all contain the same value.

Instead of providing a Constraint Code, input constraints may also “tie” themselves to an output constraint, by providing an integer as the constraint string. Tied inputs still consume an argument from the call instruction, and take up a position in the asm template numbering as is usual – they will simply be constrained to always use the same register as the output they’ve been tied to. For example, a constraint string of “=r,0” says to assign a register for output, and use that register as an input as well (it being the 0’th constraint).

It is permitted to tie an input to an “early-clobber” output. In that case, no other input may share the same register as the input tied to the early-clobber (even when the other input has the same value).

You may only tie an input to an output which has a register constraint, not a memory constraint. Only a single input may be tied to an output.

There is also an “interesting” feature which deserves a bit of explanation: if a register class constraint allocates a register which is too small for the value type operand provided as input, the input value will be split into multiple registers, and all of them passed to the inline asm.

However, this feature is often not as useful as you might think.

Firstly, the registers are not guaranteed to be consecutive. So, on those architectures that have instructions which operate on multiple consecutive instructions, this is not an appropriate way to support them. (e.g. the 32-bit SparcV8 has a 64-bit load, which instruction takes a single 32-bit register. The hardware then loads into both the named register, and the next register. This feature of inline asm would not be useful to support that.)

A few of the targets provide a template string modifier allowing explicit access to the second register of a two-register operand (e.g. MIPS L, M, and D). On such an architecture, you can actually access the second allocated register (yet, still, not any subsequent ones). But, in that case, you’re still probably better off simply splitting the value into two separate operands, for clarity. (e.g. see the description of the A constraint on X86, which, despite existing only for use with this feature, is not really a good idea to use)

Indirect inputs and outputs

Indirect output or input constraints can be specified by the “*” modifier (which goes after the “=” in case of an output). This indicates that the asm will write to or read from the contents of an address provided as an input argument. (Note that in this way, indirect outputs act more like an input than an output: just like an input, they consume an argument of the call expression, rather than producing a return value. An indirect output constraint is an “output” only in that the asm is expected to write to the contents of the input memory location, instead of just read from it).

This is most typically used for memory constraint, e.g. “=*m”, to pass the address of a variable as a value.

It is also possible to use an indirect register constraint, but only on output (e.g. “=*r”). This will cause LLVM to allocate a register for an output value normally, and then, separately emit a store to the address provided as input, after the provided inline asm. (It’s not clear what value this functionality provides, compared to writing the store explicitly after the asm statement, and it can only produce worse code, since it bypasses many optimization passes. I would recommend not using it.)

Call arguments for indirect constraints must have pointer type and must specify the elementtype attribute to indicate the pointer element type.

Clobber constraints

A clobber constraint is indicated by a “~” prefix. A clobber does not consume an input operand, nor generate an output. Clobbers cannot use any of the general constraint code letters – they may use only explicit register constraints, e.g. “~{eax}”. The one exception is that a clobber string of “~{memory}” indicates that the assembly writes to arbitrary undeclared memory locations – not only the memory pointed to by a declared indirect output.

Note that clobbering named registers that are also present in output constraints is not legal.

Label constraints

A label constraint is indicated by a “!” prefix and typically used in the form "!i". Instead of consuming call arguments, label constraints consume indirect destination labels of callbr instructions.

Label constraints can only be used in conjunction with callbr and the number of label constraints must match the number of indirect destination labels in the callbr instruction.

Constraint Codes

After a potential prefix comes constraint code, or codes.

A Constraint Code is either a single letter (e.g. “r”), a “^” character followed by two letters (e.g. “^wc”), or “{” register-name “}” (e.g. “{eax}”).

The one and two letter constraint codes are typically chosen to be the same as GCC’s constraint codes.

A single constraint may include one or more than constraint code in it, leaving it up to LLVM to choose which one to use. This is included mainly for compatibility with the translation of GCC inline asm coming from clang.

There are two ways to specify alternatives, and either or both may be used in an inline asm constraint list:

1. Append the codes to each other, making a constraint code set. E.g. “im” or “{eax}m”. This means “choose any of the options in the set”. The choice of constraint is made independently for each constraint in the constraint list.

2. Use “|” between constraint code sets, creating alternatives. Every constraint in the constraint list must have the same number of alternative sets. With this syntax, the same alternative in all of the items in the constraint list will be chosen together.

Putting those together, you might have a two operand constraint string like "rm|r,ri|rm". This indicates that if operand 0 is r or m, then operand 1 may be one of r or i. If operand 0 is r, then operand 1 may be one of r or m. But, operand 0 and 1 cannot both be of type m.

However, the use of either of the alternatives features is NOT recommended, as LLVM is not able to make an intelligent choice about which one to use. (At the point it currently needs to choose, not enough information is available to do so in a smart way.) Thus, it simply tries to make a choice that’s most likely to compile, not one that will be optimal performance. (e.g., given “rm”, it’ll always choose to use memory, not registers). And, if given multiple registers, or multiple register classes, it will simply choose the first one. (In fact, it doesn’t currently even ensure explicitly specified physical registers are unique, so specifying multiple physical registers as alternatives, like {r11}{r12},{r11}{r12}, will assign r11 to both operands, not at all what was intended.)

Supported Constraint Code List

The constraint codes are, in general, expected to behave the same way they do in GCC. LLVM’s support is often implemented on an ‘as-needed’ basis, to support C inline asm code which was supported by GCC. A mismatch in behavior between LLVM and GCC likely indicates a bug in LLVM.

Some constraint codes are typically supported by all targets:

• r: A register in the target’s general purpose register class.

• m: A memory address operand. It is target-specific what addressing modes are supported, typical examples are register, or register + register offset, or register + immediate offset (of some target-specific size).

• p: An address operand. Similar to m, but used by “load address” type instructions without touching memory.

• i: An integer constant (of target-specific width). Allows either a simple immediate, or a relocatable value.

• n: An integer constant – not including relocatable values.

• s: A symbol or label reference with a constant offset.

• X: Allows an operand of any kind, no constraint whatsoever. Typically useful to pass a label for an asm branch or call.

• {register-name}: Requires exactly the named physical register.

Other constraints are target-specific:

AArch64:

• z: An immediate integer 0. Outputs WZR or XZR, as appropriate.

• I: An immediate integer valid for an ADD or SUB instruction, i.e. 0 to 4095 with optional shift by 12.

• J: An immediate integer that, when negated, is valid for an ADD or SUB instruction, i.e. -1 to -4095 with optional left shift by 12.

• K: An immediate integer that is valid for the ‘bitmask immediate 32’ of a logical instruction like AND, EOR, or ORR with a 32-bit register.

• L: An immediate integer that is valid for the ‘bitmask immediate 64’ of a logical instruction like AND, EOR, or ORR with a 64-bit register.

• M: An immediate integer for use with the MOV assembly alias on a 32-bit register. This is a superset of K: in addition to the bitmask immediate, also allows immediate integers which can be loaded with a single MOVZ or MOVL instruction.

• N: An immediate integer for use with the MOV assembly alias on a 64-bit register. This is a superset of L.

• Q: Memory address operand must be in a single register (no offsets). (However, LLVM currently does this for the m constraint as well.)

• r: A 32 or 64-bit integer register (W* or X*).

• S: A symbol or label reference with a constant offset. The generic s is not supported.

• Uci: Like r, but restricted to registers 8 to 11 inclusive.

• Ucj: Like r, but restricted to registers 12 to 15 inclusive.

• w: A 32, 64, or 128-bit floating-point, SIMD or SVE vector register.

• x: Like w, but restricted to registers 0 to 15 inclusive.

• y: Like w, but restricted to SVE vector registers Z0 to Z7 inclusive.

• Uph: One of the upper eight SVE predicate registers (P8 to P15)

• Upl: One of the lower eight SVE predicate registers (P0 to P7)

• Upa: Any of the SVE predicate registers (P0 to P15)

AMDGPU:

• r: A 32 or 64-bit integer register.

• [0-9]v: The 32-bit VGPR register, number 0-9.

• [0-9]s: The 32-bit SGPR register, number 0-9.

• [0-9]a: The 32-bit AGPR register, number 0-9.

• I: An integer inline constant in the range from -16 to 64.

• J: A 16-bit signed integer constant.

• A: An integer or a floating-point inline constant.

• B: A 32-bit signed integer constant.

• C: A 32-bit unsigned integer constant or an integer inline constant in the range from -16 to 64.

• DA: A 64-bit constant that can be split into two “A” constants.

• DB: A 64-bit constant that can be split into two “B” constants.

All ARM modes:

• Q, Um, Un, Uq, Us, Ut, Uv, Uy: Memory address operand. Treated the same as operand m, at the moment.

• Te: An even general-purpose 32-bit integer register: r0,r2,...,r12,r14

• To: An odd general-purpose 32-bit integer register: r1,r3,...,r11

ARM and ARM’s Thumb2 mode:

• j: An immediate integer between 0 and 65535 (valid for MOVW)

• I: An immediate integer valid for a data-processing instruction.

• J: An immediate integer between -4095 and 4095.

• K: An immediate integer whose bitwise inverse is valid for a data-processing instruction. (Can be used with template modifier “B” to print the inverted value).

• L: An immediate integer whose negation is valid for a data-processing instruction. (Can be used with template modifier “n” to print the negated value).

• M: A power of two or an integer between 0 and 32.

• N: Invalid immediate constraint.

• O: Invalid immediate constraint.

• r: A general-purpose 32-bit integer register (r0-r15).

• l: In Thumb2 mode, low 32-bit GPR registers (r0-r7). In ARM mode, same as r.

• h: In Thumb2 mode, a high 32-bit GPR register (r8-r15). In ARM mode, invalid.

• w: A 32, 64, or 128-bit floating-point/SIMD register in the ranges s0-s31, d0-d31, or q0-q15, respectively.

• t: A 32, 64, or 128-bit floating-point/SIMD register in the ranges s0-s31, d0-d15, or q0-q7, respectively.

• x: A 32, 64, or 128-bit floating-point/SIMD register in the ranges s0-s15, d0-d7, or q0-q3, respectively.

ARM’s Thumb1 mode:

• I: An immediate integer between 0 and 255.

• J: An immediate integer between -255 and -1.

• K: An immediate integer between 0 and 255, with optional left-shift by some amount.

• L: An immediate integer between -7 and 7.

• M: An immediate integer which is a multiple of 4 between 0 and 1020.

• N: An immediate integer between 0 and 31.

• O: An immediate integer which is a multiple of 4 between -508 and 508.

• r: A low 32-bit GPR register (r0-r7).

• l: A low 32-bit GPR register (r0-r7).

• h: A high GPR register (r0-r7).

• w: A 32, 64, or 128-bit floating-point/SIMD register in the ranges s0-s31, d0-d31, or q0-q15, respectively.

• t: A 32, 64, or 128-bit floating-point/SIMD register in the ranges s0-s31, d0-d15, or q0-q7, respectively.

• x: A 32, 64, or 128-bit floating-point/SIMD register in the ranges s0-s15, d0-d7, or q0-q3, respectively.

Hexagon:

• o, v: A memory address operand, treated the same as constraint m, at the moment.

• r: A 32 or 64-bit register.

LoongArch:

• f: A floating-point register (if available).

• k: A memory operand whose address is formed by a base register and (optionally scaled) index register.

• l: A signed 16-bit constant.

• m: A memory operand whose address is formed by a base register and offset that is suitable for use in instructions with the same addressing mode as st.w and ld.w.

• I: A signed 12-bit constant (for arithmetic instructions).

• J: An immediate integer zero.

• K: An unsigned 12-bit constant (for logic instructions).

• ZB: An address that is held in a general-purpose register. The offset is zero.

• ZC: A memory operand whose address is formed by a base register and offset that is suitable for use in instructions with the same addressing mode as ll.w and sc.w.

MSP430:

• r: An 8 or 16-bit register.

MIPS:

• I: An immediate signed 16-bit integer.

• J: An immediate integer zero.

• K: An immediate unsigned 16-bit integer.

• L: An immediate 32-bit integer, where the lower 16 bits are 0.

• N: An immediate integer between -65535 and -1.

• O: An immediate signed 15-bit integer.

• P: An immediate integer between 1 and 65535.

• m: A memory address operand. In MIPS-SE mode, allows a base address register plus 16-bit immediate offset. In MIPS mode, just a base register.

• R: A memory address operand. In MIPS-SE mode, allows a base address register plus a 9-bit signed offset. In MIPS mode, the same as constraint m.

• ZC: A memory address operand, suitable for use in a pref, ll, or sc instruction on the given subtarget (details vary).

• r, d, y: A 32 or 64-bit GPR register.

• f: A 32 or 64-bit FPU register (F0-F31), or a 128-bit MSA register (W0-W31). In the case of MSA registers, it is recommended to use the w argument modifier for compatibility with GCC.

• c: A 32-bit or 64-bit GPR register suitable for indirect jump (always 25).

• l: The lo register, 32 or 64-bit.

• x: Invalid.

NVPTX:

• b: A 1-bit integer register.

• c or h: A 16-bit integer register.

• r: A 32-bit integer register.

• l or N: A 64-bit integer register.

• q: A 128-bit integer register.

• f: A 32-bit float register.

• d: A 64-bit float register.

PowerPC:

• I: An immediate signed 16-bit integer.

• J: An immediate unsigned 16-bit integer, shifted left 16 bits.

• K: An immediate unsigned 16-bit integer.

• L: An immediate signed 16-bit integer, shifted left 16 bits.

• M: An immediate integer greater than 31.

• N: An immediate integer that is an exact power of 2.

• O: The immediate integer constant 0.

• P: An immediate integer constant whose negation is a signed 16-bit constant.

• es, o, Q, Z, Zy: A memory address operand, currently treated the same as m.

• r: A 32 or 64-bit integer register.

• b: A 32 or 64-bit integer register, excluding R0 (that is: R1-R31).

• f: A 32 or 64-bit float register (F0-F31),

• v: For 4 x f32 or 4 x f64 types, a 128-bit altivec vector

  register (V0-V31).

• y: Condition register (CR0-CR7).

• wc: An individual CR bit in a CR register.

• wa, wd, wf: Any 128-bit VSX vector register, from the full VSX register set (overlapping both the floating-point and vector register files).

• ws: A 32 or 64-bit floating-point register, from the full VSX register set.

RISC-V:

• A: An address operand (using a general-purpose register, without an offset).

• I: A 12-bit signed integer immediate operand.

• J: A zero integer immediate operand.

• K: A 5-bit unsigned integer immediate operand.

• f: A 32- or 64-bit floating-point register (requires F or D extension).

• r: A 32- or 64-bit general-purpose register (depending on the platform XLEN).

• S: Alias for s.

• vd: A vector register, excluding v0 (requires V extension).

• vm: The vector register v0 (requires V extension).

• vr: A vector register (requires V extension).

Sparc:

• I: An immediate 13-bit signed integer.

• r: A 32-bit integer register.

• f: Any floating-point register on SparcV8, or a floating-point register in the “low” half of the registers on SparcV9.

• e: Any floating-point register. (Same as f on SparcV8.)

SystemZ:

• I: An immediate unsigned 8-bit integer.

• J: An immediate unsigned 12-bit integer.

• K: An immediate signed 16-bit integer.

• L: An immediate signed 20-bit integer.

• M: An immediate integer 0x7fffffff.

• Q: A memory address operand with a base address and a 12-bit immediate unsigned displacement.

• R: A memory address operand with a base address, a 12-bit immediate unsigned displacement, and an index register.

• S: A memory address operand with a base address and a 20-bit immediate signed displacement.

• T: A memory address operand with a base address, a 20-bit immediate signed displacement, and an index register.

• r or d: A 32, 64, or 128-bit integer register.

• a: A 32, 64, or 128-bit integer address register (excludes R0, which in an address context evaluates as zero).

• h: A 32-bit value in the high part of a 64bit data register (LLVM-specific)

• f: A 32, 64, or 128-bit floating-point register.

X86:

• I: An immediate integer between 0 and 31.

• J: An immediate integer between 0 and 64.

• K: An immediate signed 8-bit integer.

• L: An immediate integer, 0xff or 0xffff or (in 64-bit mode only) 0xffffffff.

• M: An immediate integer between 0 and 3.

• N: An immediate unsigned 8-bit integer.

• O: An immediate integer between 0 and 127.

• e: An immediate 32-bit signed integer.

• Z: An immediate 32-bit unsigned integer.

• q: An 8, 16, 32, or 64-bit register which can be accessed as an 8-bit l integer register. On X86-32, this is the a, b, c, and d registers, and on X86-64, it is all of the integer registers. When feature egpr and inline-asm-use-gpr32 are both on, it will be extended to gpr32.

• Q: An 8, 16, 32, or 64-bit register which can be accessed as an 8-bit h integer register. This is the a, b, c, and d registers.

• r or l: An 8, 16, 32, or 64-bit integer register. When feature egpr and inline-asm-use-gpr32 are both on, it will be extended to gpr32.

• R: An 8, 16, 32, or 64-bit “legacy” integer register – one which has existed since i386, and can be accessed without the REX prefix.

• f: A 32, 64, or 80-bit ‘387 FPU stack pseudo-register.

• y: A 64-bit MMX register, if MMX is enabled.

• v: If SSE is enabled: a 32 or 64-bit scalar operand, or 128-bit vector operand in a SSE register. If AVX is also enabled, can also be a 256-bit vector operand in an AVX register. If AVX-512 is also enabled, can also be a 512-bit vector operand in an AVX512 register. Otherwise, an error.

• Ws: A symbolic reference with an optional constant addend or a label reference.

• x: The same as v, except that when AVX-512 is enabled, the x code only allocates into the first 16 AVX-512 registers, while the v code allocates into any of the 32 AVX-512 registers.

• Y: The same as x, if SSE2 is enabled, otherwise an error.

• A: Special case: allocates EAX first, then EDX, for a single operand (in 32-bit mode, a 64-bit integer operand will get split into two registers). It is not recommended to use this constraint, as in 64-bit mode, the 64-bit operand will get allocated only to RAX – if two 32-bit operands are needed, you’re better off splitting it yourself, before passing it to the asm statement.

• jr: An 8, 16, 32, or 64-bit integer gpr16. It won’t be extended to gpr32 when feature egpr or inline-asm-use-gpr32 is on.

• jR: An 8, 16, 32, or 64-bit integer gpr32 when feature egpr` is on. Otherwise, same as r.

XCore:

• r: A 32-bit integer register.

Asm template argument modifiers

In the asm template string, modifiers can be used on the operand reference, like “${0:n}”.

The modifiers are, in general, expected to behave the same way they do in GCC. LLVM’s support is often implemented on an ‘as-needed’ basis, to support C inline asm code which was supported by GCC. A mismatch in behavior between LLVM and GCC likely indicates a bug in LLVM.

Target-independent:

• c: Print an immediate integer constant unadorned, without the target-specific immediate punctuation (e.g. no $ prefix).

• n: Negate and print immediate integer constant unadorned, without the target-specific immediate punctuation (e.g. no $ prefix).

• l: Print as an unadorned label, without the target-specific label punctuation (e.g. no $ prefix).

AArch64:

• w: Print a GPR register with a w* name instead of x* name. E.g., instead of x30, print w30.

• x: Print a GPR register with a x* name. (this is the default, anyhow).

• b, h, s, d, q: Print a floating-point/SIMD register with a b*, h*, s*, d*, or q* name, rather than the default of v*.

AMDGPU:

• r: No effect.

ARM:

• a: Print an operand as an address (with [ and ] surrounding a register).

• P: No effect.

• q: No effect.

• y: Print a VFP single-precision register as an indexed double (e.g. print as d4[1] instead of s9)

• B: Bitwise invert and print an immediate integer constant without # prefix.

• L: Print the low 16-bits of an immediate integer constant.

• M: Print as a register set suitable for ldm/stm. Also prints all register operands subsequent to the specified one (!), so use carefully.

• Q: Print the low-order register of a register-pair, or the low-order register of a two-register operand.

• R: Print the high-order register of a register-pair, or the high-order register of a two-register operand.

• H: Print the second register of a register-pair. (On a big-endian system, H is equivalent to Q, and on little-endian system, H is equivalent to R.)

• e: Print the low doubleword register of a NEON quad register.

• f: Print the high doubleword register of a NEON quad register.

• m: Print the base register of a memory operand without the [ and ] adornment.

Hexagon:

• L: Print the second register of a two-register operand. Requires that it has been allocated consecutively to the first.

• I: Print the letter ‘i’ if the operand is an integer constant, otherwise nothing. Used to print ‘addi’ vs ‘add’ instructions.

LoongArch:

• z: Print $zero register if operand is zero, otherwise print it normally.

MSP430:

No additional modifiers.

MIPS:

• X: Print an immediate integer as hexadecimal

• x: Print the low 16 bits of an immediate integer as hexadecimal.

• d: Print an immediate integer as decimal.

• m: Subtract one and print an immediate integer as decimal.

• z: Print $0 if an immediate zero, otherwise print normally.

• L: Print the low-order register of a two-register operand, or prints the address of the low-order word of a double-word memory operand.

• M: Print the high-order register of a two-register operand, or prints the address of the high-order word of a double-word memory operand.

• D: Print the second register of a two-register operand, or prints the second word of a double-word memory operand. (On a big-endian system, D is equivalent to L, and on little-endian system, D is equivalent to M.)

• w: No effect. Provided for compatibility with GCC which requires this modifier in order to print MSA registers (W0-W31) with the f constraint.

NVPTX:

• r: No effect.

PowerPC:

• L: Print the second register of a two-register operand. Requires that it has been allocated consecutively to the first.

• I: Print the letter ‘i’ if the operand is an integer constant, otherwise nothing. Used to print ‘addi’ vs ‘add’ instructions.

• y: For a memory operand, prints formatter for a two-register X-form instruction. (Currently always prints r0,OPERAND).

• U: Prints ‘u’ if the memory operand is an update form, and nothing otherwise. (NOTE: LLVM does not support update form, so this will currently always print nothing)

• X: Prints ‘x’ if the memory operand is an indexed form. (NOTE: LLVM does not support indexed form, so this will currently always print nothing)

RISC-V:

• i: Print the letter ‘i’ if the operand is not a register, otherwise print nothing. Used to print ‘addi’ vs ‘add’ instructions, etc.

• z: Print the register zero if an immediate zero, otherwise print normally.

Sparc:

• L: Print the low-order register of a two-register operand.

• H: Print the high-order register of a two-register operand.

• r: No effect.

SystemZ:

SystemZ implements only n, and does not support any of the other target-independent modifiers.

X86:

• c: Print an unadorned integer or symbol name. (The latter is target-specific behavior for this typically target-independent modifier).

• A: Print a register name with a ‘*’ before it.

• b: Print an 8-bit register name (e.g. al); do nothing on a memory operand.

• h: Print the upper 8-bit register name (e.g. ah); do nothing on a memory operand.

• w: Print the 16-bit register name (e.g. ax); do nothing on a memory operand.

• k: Print the 32-bit register name (e.g. eax); do nothing on a memory operand.

• q: Print the 64-bit register name (e.g. rax), if 64-bit registers are available, otherwise the 32-bit register name; do nothing on a memory operand.

• n: Negate and print an unadorned integer, or, for operands other than an immediate integer (e.g. a relocatable symbol expression), print a ‘-’ before the operand. (The behavior for relocatable symbol expressions is a target-specific behavior for this typically target-independent modifier)

• H: Print a memory reference with additional offset +8.

• p: Print a raw symbol name (without syntax-specific prefixes).

• P: Print a memory reference used as the argument of a call instruction or used with explicit base reg and index reg as its offset. So it can not use additional regs to present the memory reference. (E.g. omit (rip), even though it’s PC-relative.)

XCore:

No additional modifiers.

Inline Asm Metadata

The call instructions that wrap inline asm nodes may have a “!srcloc” MDNode attached to it that contains a list of constant integers. If present, the code generator will use the integer as the location cookie value when report errors through the LLVMContext error reporting mechanisms. This allows a front-end to correlate backend errors that occur with inline asm back to the source code that produced it. For example:

call void asm sideeffect "something bad", ""(), !srcloc !42
...
!42 = !{ i64 1234567 }

It is up to the front-end to make sense of the magic numbers it places in the IR. If the MDNode contains multiple constants, the code generator will use the one that corresponds to the line of the asm that the error occurs on.

Metadata

LLVM IR allows metadata to be attached to instructions and global objects in the program that can convey extra information about the code to the optimizers and code generator.

There are two metadata primitives: strings and nodes. There are also specialized nodes which have a distinguished name and a set of named arguments.

Note

One example application of metadata is source-level debug information, which is currently the only user of specialized nodes.

Metadata does not have a type, and is not a value.

A value of non-metadata type can be used in a metadata context using the syntax ‘<type> <value>’.

All other metadata is identified in syntax as starting with an exclamation point (’!’).

Metadata may be used in the following value contexts by using the metadata type:

• Arguments to certain intrinsic functions, as described in their specification.

• Arguments to the catchpad/cleanuppad instructions.

Note

Metadata can be “wrapped” in a MetadataAsValue so it can be referenced in a value context: MetadataAsValue is-a Value.

A typed value can be “wrapped” in ValueAsMetadata so it can be referenced in a metadata context: ValueAsMetadata is-a Metadata.

There is no explicit syntax for a ValueAsMetadata, and instead the fact that a type identifier cannot begin with an exclamation point is used to resolve ambiguity.

A metadata type implies a MetadataAsValue, and when followed with a ‘<type> <value>’ pair it wraps the typed value in a ValueAsMetadata.

For example, the first argument to this call is a MetadataAsValue(ValueAsMetadata(Value)):

call void @llvm.foo(metadata i32 1)

Whereas the first argument to this call is a MetadataAsValue(MDNode):

call void @llvm.foo(metadata !0)

The first element of this MDTuple is a MDNode:

!{!0}

And the first element of this MDTuple is a ValueAsMetadata(Value):

!{i32 1}

Metadata Strings (MDString)

A metadata string is a string surrounded by double quotes. It can contain any character by escaping non-printable characters with “\xx” where “xx” is the two digit hex code. For example: “!"test\00"”.

Note

A metadata string is metadata, but is not a metadata node.

Metadata Nodes (MDNode)

Metadata tuples are represented with notation similar to structure constants: a comma separated list of elements, surrounded by braces and preceded by an exclamation point. Metadata nodes can have any values as their operand. For example:

!{!"test\00", i32 10}

Metadata nodes that aren’t uniqued use the distinct keyword. For example:

!0 = distinct !{!"test\00", i32 10}

distinct nodes are useful when nodes shouldn’t be merged based on their content. They can also occur when transformations cause uniquing collisions when metadata operands change.

A named metadata is a collection of metadata nodes, which can be looked up in the module symbol table. For example:

!foo = !{!4, !3}

Metadata can be used as function arguments. Here the llvm.dbg.value intrinsic is using three metadata arguments:

call void @llvm.dbg.value(metadata !24, metadata !25, metadata !26)

Metadata can be attached to an instruction. Here metadata !21 is attached to the add instruction using the !dbg identifier:

%indvar.next = add i64 %indvar, 1, !dbg !21

Instructions may not have multiple metadata attachments with the same identifier.

Metadata can also be attached to a function or a global variable. Here metadata !22 is attached to the f1 and f2 functions, and the globals g1 and g2 using the !dbg identifier:

declare !dbg !22 void @f1()
define void @f2() !dbg !22 {
  ret void
}

@g1 = global i32 0, !dbg !22
@g2 = external global i32, !dbg !22

Unlike instructions, global objects (functions and global variables) may have multiple metadata attachments with the same identifier.

A transformation is required to drop any metadata attachment that it does not know or know it can’t preserve. Currently there is an exception for metadata attachment to globals for !func_sanitize, !type, !absolute_symbol and !associated which can’t be unconditionally dropped unless the global is itself deleted.

Metadata attached to a module using named metadata may not be dropped, with the exception of debug metadata (named metadata with the name !llvm.dbg.*).

More information about specific metadata nodes recognized by the optimizers and code generator is found below.

Specialized Metadata Nodes

Specialized metadata nodes are custom data structures in metadata (as opposed to generic tuples). Their fields are labelled, and can be specified in any order.

These aren’t inherently debug info centric, but currently all the specialized metadata nodes are related to debug info.

DICompileUnit

DICompileUnit nodes represent a compile unit. The enums:, retainedTypes:, globals:, imports: and macros: fields are tuples containing the debug info to be emitted along with the compile unit, regardless of code optimizations (some nodes are only emitted if there are references to them from instructions). The debugInfoForProfiling: field is a boolean indicating whether or not line-table discriminators are updated to provide more-accurate debug info for profiling results.

!0 = !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang",
                    isOptimized: true, flags: "-O2", runtimeVersion: 2,
                    splitDebugFilename: "abc.debug", emissionKind: FullDebug,
                    enums: !2, retainedTypes: !3, globals: !4, imports: !5,
                    macros: !6, dwoId: 0x0abcd)

Compile unit descriptors provide the root scope for objects declared in a specific compilation unit. File descriptors are defined using this scope. These descriptors are collected by a named metadata node !llvm.dbg.cu. They keep track of global variables, type information, and imported entities (declarations and namespaces).

DIFile

DIFile nodes represent files. The filename: can include slashes.

!0 = !DIFile(filename: "path/to/file", directory: "/path/to/dir",
             checksumkind: CSK_MD5,
             checksum: "000102030405060708090a0b0c0d0e0f")

Files are sometimes used in scope: fields, and are the only valid target for file: fields.

The checksum: and checksumkind: fields are optional. If one of these fields is present, then the other is required to be present as well. Valid values for checksumkind: field are: {CSK_MD5, CSK_SHA1, CSK_SHA256}

DIBasicType

DIBasicType nodes represent primitive types, such as int, bool and float. tag: defaults to DW_TAG_base_type.

!0 = !DIBasicType(name: "unsigned char", size: 8, align: 8,
                  encoding: DW_ATE_unsigned_char)
!1 = !DIBasicType(tag: DW_TAG_unspecified_type, name: "decltype(nullptr)")

The encoding: describes the details of the type. Usually it’s one of the following:

DW_ATE_address       = 1
DW_ATE_boolean       = 2
DW_ATE_float         = 4
DW_ATE_signed        = 5
DW_ATE_signed_char   = 6
DW_ATE_unsigned      = 7
DW_ATE_unsigned_char = 8

DISubroutineType

DISubroutineType nodes represent subroutine types. Their types: field refers to a tuple; the first operand is the return type, while the rest are the types of the formal arguments in order. If the first operand is null, that represents a function with no return value (such as void foo() {} in C++).

!0 = !BasicType(name: "int", size: 32, align: 32, DW_ATE_signed)
!1 = !BasicType(name: "char", size: 8, align: 8, DW_ATE_signed_char)
!2 = !DISubroutineType(types: !{null, !0, !1}) ; void (int, char)

DIDerivedType

DIDerivedType nodes represent types derived from other types, such as qualified types.

!0 = !DIBasicType(name: "unsigned char", size: 8, align: 8,
                  encoding: DW_ATE_unsigned_char)
!1 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !0, size: 32,
                    align: 32)

The following tag: values are valid:

DW_TAG_member             = 13
DW_TAG_pointer_type       = 15
DW_TAG_reference_type     = 16
DW_TAG_typedef            = 22
DW_TAG_inheritance        = 28
DW_TAG_ptr_to_member_type = 31
DW_TAG_const_type         = 38
DW_TAG_friend             = 42
DW_TAG_volatile_type      = 53
DW_TAG_restrict_type      = 55
DW_TAG_atomic_type        = 71
DW_TAG_immutable_type     = 75

DW_TAG_member is used to define a member of a composite type. The type of the member is the baseType:. The offset: is the member’s bit offset. If the composite type has an ODR identifier: and does not set flags: DIFwdDecl, then the member is uniqued based only on its name: and scope:.

DW_TAG_inheritance and DW_TAG_friend are used in the elements: field of composite types to describe parents and friends.

DW_TAG_typedef is used to provide a name for the baseType:.

DW_TAG_pointer_type, DW_TAG_reference_type, DW_TAG_const_type, DW_TAG_volatile_type, DW_TAG_restrict_type, DW_TAG_atomic_type and DW_TAG_immutable_type are used to qualify the baseType:.

Note that the void * type is expressed as a type derived from NULL.

DICompositeType

DICompositeType nodes represent types composed of other types, like structures and unions. elements: points to a tuple of the composed types.

If the source language supports ODR, the identifier: field gives the unique identifier used for type merging between modules. When specified, subprogram declarations and member derived types that reference the ODR-type in their scope: change uniquing rules.

For a given identifier:, there should only be a single composite type that does not have flags: DIFlagFwdDecl set. LLVM tools that link modules together will unique such definitions at parse time via the identifier: field, even if the nodes are distinct.

!0 = !DIEnumerator(name: "SixKind", value: 7)
!1 = !DIEnumerator(name: "SevenKind", value: 7)
!2 = !DIEnumerator(name: "NegEightKind", value: -8)
!3 = !DICompositeType(tag: DW_TAG_enumeration_type, name: "Enum", file: !12,
                      line: 2, size: 32, align: 32, identifier: "_M4Enum",
                      elements: !{!0, !1, !2})

The following tag: values are valid:

DW_TAG_array_type       = 1
DW_TAG_class_type       = 2
DW_TAG_enumeration_type = 4
DW_TAG_structure_type   = 19
DW_TAG_union_type       = 23

For DW_TAG_array_type, the elements: should be subrange descriptors, each representing the range of subscripts at that level of indexing. The DIFlagVector flag to flags: indicates that an array type is a native packed vector. The optional dataLocation is a DIExpression that describes how to get from an object’s address to the actual raw data, if they aren’t equivalent. This is only supported for array types, particularly to describe Fortran arrays, which have an array descriptor in addition to the array data. Alternatively it can also be DIVariable which has the address of the actual raw data. The Fortran language supports pointer arrays which can be attached to actual arrays, this attachment between pointer and pointee is called association. The optional associated is a DIExpression that describes whether the pointer array is currently associated. The optional allocated is a DIExpression that describes whether the allocatable array is currently allocated. The optional rank is a DIExpression that describes the rank (number of dimensions) of fortran assumed rank array (rank is known at runtime).

For DW_TAG_enumeration_type, the elements: should be enumerator descriptors, each representing the definition of an enumeration value for the set. All enumeration type descriptors are collected in the enums: field of the compile unit.

For DW_TAG_structure_type, DW_TAG_class_type, and DW_TAG_union_type, the elements: should be derived types with tag: DW_TAG_member, tag: DW_TAG_inheritance, or tag: DW_TAG_friend; or subprograms with isDefinition: false.

DISubrange

DISubrange nodes are the elements for DW_TAG_array_type variants of DICompositeType.

• count: -1 indicates an empty array.

• count: !10 describes the count with a DILocalVariable.

• count: !12 describes the count with a DIGlobalVariable.

!0 = !DISubrange(count: 5, lowerBound: 0) ; array counting from 0
!1 = !DISubrange(count: 5, lowerBound: 1) ; array counting from 1
!2 = !DISubrange(count: -1) ; empty array.

; Scopes used in rest of example
!6 = !DIFile(filename: "vla.c", directory: "/path/to/file")
!7 = distinct !DICompileUnit(language: DW_LANG_C99, file: !6)
!8 = distinct !DISubprogram(name: "foo", scope: !7, file: !6, line: 5)

; Use of local variable as count value
!9 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
!10 = !DILocalVariable(name: "count", scope: !8, file: !6, line: 42, type: !9)
!11 = !DISubrange(count: !10, lowerBound: 0)

; Use of global variable as count value
!12 = !DIGlobalVariable(name: "count", scope: !8, file: !6, line: 22, type: !9)
!13 = !DISubrange(count: !12, lowerBound: 0)

DIEnumerator

DIEnumerator nodes are the elements for DW_TAG_enumeration_type variants of DICompositeType.

!0 = !DIEnumerator(name: "SixKind", value: 7)
!1 = !DIEnumerator(name: "SevenKind", value: 7)
!2 = !DIEnumerator(name: "NegEightKind", value: -8)

DITemplateTypeParameter

DITemplateTypeParameter nodes represent type parameters to generic source language constructs. They are used (optionally) in DICompositeType and DISubprogram templateParams: fields.

!0 = !DITemplateTypeParameter(name: "Ty", type: !1)

DITemplateValueParameter

DITemplateValueParameter nodes represent value parameters to generic source language constructs. tag: defaults to DW_TAG_template_value_parameter, but if specified can also be set to DW_TAG_GNU_template_template_param or DW_TAG_GNU_template_param_pack. They are used (optionally) in DICompositeType and DISubprogram templateParams: fields.

!0 = !DITemplateValueParameter(name: "Ty", type: !1, value: i32 7)

DINamespace

DINamespace nodes represent namespaces in the source language.

!0 = !DINamespace(name: "myawesomeproject", scope: !1, file: !2, line: 7)

DIGlobalVariable

DIGlobalVariable nodes represent global variables in the source language.

@foo = global i32, !dbg !0
!0 = !DIGlobalVariableExpression(var: !1, expr: !DIExpression())
!1 = !DIGlobalVariable(name: "foo", linkageName: "foo", scope: !2,
                       file: !3, line: 7, type: !4, isLocal: true,
                       isDefinition: false, declaration: !5)

DIGlobalVariableExpression

DIGlobalVariableExpression nodes tie a DIGlobalVariable together with a DIExpression.

@lower = global i32, !dbg !0
@upper = global i32, !dbg !1
!0 = !DIGlobalVariableExpression(
         var: !2,
         expr: !DIExpression(DW_OP_LLVM_fragment, 0, 32)
         )
!1 = !DIGlobalVariableExpression(
         var: !2,
         expr: !DIExpression(DW_OP_LLVM_fragment, 32, 32)
         )
!2 = !DIGlobalVariable(name: "split64", linkageName: "split64", scope: !3,
                       file: !4, line: 8, type: !5, declaration: !6)

All global variable expressions should be referenced by the globals: field of a compile unit.

DISubprogram

DISubprogram nodes represent functions from the source language. A distinct DISubprogram may be attached to a function definition using !dbg metadata. A unique DISubprogram may be attached to a function declaration used for call site debug info. The retainedNodes: field is a list of variables and labels that must be retained, even if their IR counterparts are optimized out of the IR. The type: field must point at an DISubroutineType.

When spFlags: DISPFlagDefinition is not present, subprograms describe a declaration in the type tree as opposed to a definition of a function. In this case, the declaration field must be empty. If the scope is a composite type with an ODR identifier: and that does not set flags: DIFwdDecl, then the subprogram declaration is uniqued based only on its linkageName: and scope:.

define void @_Z3foov() !dbg !0 {
  ...
}

!0 = distinct !DISubprogram(name: "foo", linkageName: "_Zfoov", scope: !1,
                            file: !2, line: 7, type: !3,
                            spFlags: DISPFlagDefinition | DISPFlagLocalToUnit,
                            scopeLine: 8, containingType: !4,
                            virtuality: DW_VIRTUALITY_pure_virtual,
                            virtualIndex: 10, flags: DIFlagPrototyped,
                            isOptimized: true, unit: !5, templateParams: !6,
                            declaration: !7, retainedNodes: !8,
                            thrownTypes: !9)

DILexicalBlock

DILexicalBlock nodes describe nested blocks within a subprogram. The line number and column numbers are used to distinguish two lexical blocks at same depth. They are valid targets for scope: fields.

!0 = distinct !DILexicalBlock(scope: !1, file: !2, line: 7, column: 35)

Usually lexical blocks are distinct to prevent node merging based on operands.

DILexicalBlockFile

DILexicalBlockFile nodes are used to discriminate between sections of a lexical block. The file: field can be changed to indicate textual inclusion, or the discriminator: field can be used to discriminate between control flow within a single block in the source language.

!0 = !DILexicalBlock(scope: !3, file: !4, line: 7, column: 35)
!1 = !DILexicalBlockFile(scope: !0, file: !4, discriminator: 0)
!2 = !DILexicalBlockFile(scope: !0, file: !4, discriminator: 1)

DILocation

DILocation nodes represent source debug locations. The scope: field is mandatory, and points at an DILexicalBlockFile, an DILexicalBlock, or an DISubprogram.

!0 = !DILocation(line: 2900, column: 42, scope: !1, inlinedAt: !2)

DILocalVariable

DILocalVariable nodes represent local variables in the source language. If the arg: field is set to non-zero, then this variable is a subprogram parameter, and it will be included in the retainedNodes: field of its DISubprogram.

!0 = !DILocalVariable(name: "this", arg: 1, scope: !3, file: !2, line: 7,
                      type: !3, flags: DIFlagArtificial)
!1 = !DILocalVariable(name: "x", arg: 2, scope: !4, file: !2, line: 7,
                      type: !3)
!2 = !DILocalVariable(name: "y", scope: !5, file: !2, line: 7, type: !3)

DIExpression

DIExpression nodes represent expressions that are inspired by the DWARF expression language. They are used in debug records (such as #dbg_declare and #dbg_value) to describe how the referenced LLVM variable relates to the source language variable. Debug expressions are interpreted left-to-right: start by pushing the value/address operand of the record onto a stack, then repeatedly push and evaluate opcodes from the DIExpression until the final variable description is produced.

The current supported opcode vocabulary is limited:

• DW_OP_deref dereferences the top of the expression stack.

• DW_OP_plus pops the last two entries from the expression stack, adds them together and appends the result to the expression stack.

• DW_OP_minus pops the last two entries from the expression stack, subtracts the last entry from the second last entry and appends the result to the expression stack.

• DW_OP_plus_uconst, 93 adds 93 to the working expression.

• DW_OP_LLVM_fragment, 16, 8 specifies the offset and size (16 and 8 here, respectively) of the variable fragment from the working expression. Note that contrary to DW_OP_bit_piece, the offset is describing the location within the described source variable.

• DW_OP_LLVM_convert, 16, DW_ATE_signed specifies a bit size and encoding (16 and DW_ATE_signed here, respectively) to which the top of the expression stack is to be converted. Maps into a DW_OP_convert operation that references a base type constructed from the supplied values.

• DW_OP_LLVM_extract_bits_sext, 16, 8, specifies the offset and size (16 and 8 here, respectively) of bits that are to be extracted and sign-extended from the value at the top of the expression stack. If the top of the expression stack is a memory location then these bits are extracted from the value pointed to by that memory location. Maps into a DW_OP_shl followed by DW_OP_shra.

• DW_OP_LLVM_extract_bits_zext behaves similarly to DW_OP_LLVM_extract_bits_sext, but zero-extends instead of sign-extending. Maps into a DW_OP_shl followed by DW_OP_shr.

• DW_OP_LLVM_tag_offset, tag_offset specifies that a memory tag should be optionally applied to the pointer. The memory tag is derived from the given tag offset in an implementation-defined manner.

• DW_OP_swap swaps top two stack entries.

• DW_OP_xderef provides extended dereference mechanism. The entry at the top of the stack is treated as an address. The second stack entry is treated as an address space identifier.

• DW_OP_stack_value marks a constant value.

• DW_OP_LLVM_entry_value, N refers to the value a register had upon function entry. When targeting DWARF, a DBG_VALUE(reg, ..., DIExpression(DW_OP_LLVM_entry_value, 1, ...) is lowered to DW_OP_entry_value [reg], ..., which pushes the value reg had upon function entry onto the DWARF expression stack.

  The next (N - 1) operations will be part of the DW_OP_entry_value block argument. For example, !DIExpression(DW_OP_LLVM_entry_value, 1, DW_OP_plus_uconst, 123, DW_OP_stack_value) specifies an expression where the entry value of reg is pushed onto the stack, and is added with 123. Due to framework limitations N must be 1, in other words, DW_OP_entry_value always refers to the value/address operand of the instruction.

  Because DW_OP_LLVM_entry_value is defined in terms of registers, it is usually used in MIR, but it is also allowed in LLVM IR when targeting a swiftasync argument. The operation is introduced by:

  • LiveDebugValues pass, which applies it to function parameters that are unmodified throughout the function. Support is limited to simple register location descriptions, or as indirect locations (e.g., parameters passed-by-value to a callee via a pointer to a temporary copy made in the caller).

  • AsmPrinter pass when a call site parameter value (DW_AT_call_site_parameter_value) is represented as entry value of the parameter.

  • CoroSplit pass, which may move variables from allocas into a coroutine frame. If the coroutine frame is a swiftasync argument, the variable is described with an DW_OP_LLVM_entry_value operation.

• DW_OP_LLVM_arg, N is used in debug intrinsics that refer to more than one value, such as one that calculates the sum of two registers. This is always used in combination with an ordered list of values, such that DW_OP_LLVM_arg, N refers to the N^th element in that list. For example, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_arg, 1, DW_OP_minus, DW_OP_stack_value) used with the list (%reg1, %reg2) would evaluate to %reg1 - reg2. This list of values should be provided by the containing intrinsic/instruction.

• DW_OP_breg (or DW_OP_bregx) represents a content on the provided signed offset of the specified register. The opcode is only generated by the AsmPrinter pass to describe call site parameter value which requires an expression over two registers.

• DW_OP_push_object_address pushes the address of the object which can then serve as a descriptor in subsequent calculation. This opcode can be used to calculate bounds of fortran allocatable array which has array descriptors.

• DW_OP_over duplicates the entry currently second in the stack at the top of the stack. This opcode can be used to calculate bounds of fortran assumed rank array which has rank known at run time and current dimension number is implicitly first element of the stack.

• DW_OP_LLVM_implicit_pointer It specifies the dereferenced value. It can be used to represent pointer variables which are optimized out but the value it points to is known. This operator is required as it is different than DWARF operator DW_OP_implicit_pointer in representation and specification (number and types of operands) and later can not be used as multiple level.

IR for "*ptr = 4;"
--------------
  #dbg_value(i32 4, !17, !DIExpression(DW_OP_LLVM_implicit_pointer), !20)
!17 = !DILocalVariable(name: "ptr1", scope: !12, file: !3, line: 5,
                       type: !18)
!18 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !19, size: 64)
!19 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
!20 = !DILocation(line: 10, scope: !12)

IR for "**ptr = 4;"
--------------
  #dbg_value(i32 4, !17,
    !DIExpression(DW_OP_LLVM_implicit_pointer, DW_OP_LLVM_implicit_pointer),
    !21)
!17 = !DILocalVariable(name: "ptr1", scope: !12, file: !3, line: 5,
                       type: !18)
!18 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !19, size: 64)
!19 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !20, size: 64)
!20 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
!21 = !DILocation(line: 10, scope: !12)

DWARF specifies three kinds of simple location descriptions: Register, memory, and implicit location descriptions. Note that a location description is defined over certain ranges of a program, i.e the location of a variable may change over the course of the program. Register and memory location descriptions describe the concrete location of a source variable (in the sense that a debugger might modify its value), whereas implicit locations describe merely the actual value of a source variable which might not exist in registers or in memory (see DW_OP_stack_value).

A #dbg_declare record describes an indirect value (the address) of a source variable. The first operand of the record must be an address of some kind. A DIExpression operand to the record refines this address to produce a concrete location for the source variable.

A #dbg_value record describes the direct value of a source variable. The first operand of the record may be a direct or indirect value. A DIExpression operand to the record refines the first operand to produce a direct value. For example, if the first operand is an indirect value, it may be necessary to insert DW_OP_deref into the DIExpression in order to produce a valid debug record.

Note

A DIExpression is interpreted in the same way regardless of which kind of debug record it’s attached to.

DIExpressions are always printed and parsed inline; they can never be referenced by an ID (e.g. !1).

!DIExpression(DW_OP_deref)
!DIExpression(DW_OP_plus_uconst, 3)
!DIExpression(DW_OP_constu, 3, DW_OP_plus)
!DIExpression(DW_OP_bit_piece, 3, 7)
!DIExpression(DW_OP_deref, DW_OP_constu, 3, DW_OP_plus, DW_OP_LLVM_fragment, 3, 7)
!DIExpression(DW_OP_constu, 2, DW_OP_swap, DW_OP_xderef)
!DIExpression(DW_OP_constu, 42, DW_OP_stack_value)

DIAssignID

DIAssignID nodes have no operands and are always distinct. They are used to link together (#dbg_assign records) and instructions that store in IR. See Debug Info Assignment Tracking for more info.

store i32 %a, ptr %a.addr, align 4, !DIAssignID !2
#dbg_assign(%a, !1, !DIExpression(), !2, %a.addr, !DIExpression(), !3)

!2 = distinct !DIAssignID()

DIArgList

DIArgList nodes hold a list of constant or SSA value references. These are used in debug records in combination with a DIExpression that uses the DW_OP_LLVM_arg operator. Because a DIArgList may refer to local values within a function, it must only be used as a function argument, must always be inlined, and cannot appear in named metadata.

#dbg_value(!DIArgList(i32 %a, i32 %b),
           !16,
           !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_arg, 1, DW_OP_plus),
           !26)

DIFlags

These flags encode various properties of DINodes.

The ExportSymbols flag marks a class, struct or union whose members may be referenced as if they were defined in the containing class or union. This flag is used to decide whether the DW_AT_export_symbols can be used for the structure type.

DIObjCProperty

DIObjCProperty nodes represent Objective-C property nodes.

!3 = !DIObjCProperty(name: "foo", file: !1, line: 7, setter: "setFoo",
                     getter: "getFoo", attributes: 7, type: !2)

DIImportedEntity

DIImportedEntity nodes represent entities (such as modules) imported into a compile unit. The elements field is a list of renamed entities (such as variables and subprograms) in the imported entity (such as module).

!2 = !DIImportedEntity(tag: DW_TAG_imported_module, name: "foo", scope: !0,
                       entity: !1, line: 7, elements: !3)
!3 = !{!4}
!4 = !DIImportedEntity(tag: DW_TAG_imported_declaration, name: "bar", scope: !0,
                       entity: !5, line: 7)

DIMacro

DIMacro nodes represent definition or undefinition of a macro identifiers. The name: field is the macro identifier, followed by macro parameters when defining a function-like macro, and the value field is the token-string used to expand the macro identifier.

!2 = !DIMacro(macinfo: DW_MACINFO_define, line: 7, name: "foo(x)",
              value: "((x) + 1)")
!3 = !DIMacro(macinfo: DW_MACINFO_undef, line: 30, name: "foo")

DIMacroFile

DIMacroFile nodes represent inclusion of source files. The nodes: field is a list of DIMacro and DIMacroFile nodes that appear in the included source file.

!2 = !DIMacroFile(macinfo: DW_MACINFO_start_file, line: 7, file: !2,
                  nodes: !3)

DILabel

DILabel nodes represent labels within a DISubprogram. All fields of a DILabel are mandatory. The scope: field must be one of either a DILexicalBlockFile, a DILexicalBlock, or a DISubprogram. The name: field is the label identifier. The file: field is the DIFile the label is present in. The line: field is the source line within the file where the label is declared.

!2 = !DILabel(scope: !0, name: "foo", file: !1, line: 7)

DICommonBlock

DICommonBlock nodes represent Fortran common blocks. The scope: field is mandatory and points to a DILexicalBlockFile, a DILexicalBlock, or a DISubprogram. The declaration:, name:, file:, and line: fields are optional.

DIModule

DIModule nodes represent a source language module, for example, a Clang module, or a Fortran module. The scope: field is mandatory and points to a DILexicalBlockFile, a DILexicalBlock, or a DISubprogram. The name: field is mandatory. The configMacros:, includePath:, apinotes:, file:, line:, and isDecl: fields are optional.

DIStringType

DIStringType nodes represent a Fortran CHARACTER(n) type, with a dynamic length and location encoded as an expression. The tag: field is optional and defaults to DW_TAG_string_type. The name:, stringLength:, stringLengthExpression, stringLocationExpression:, size:, align:, and encoding: fields are optional.

If not present, the size: and align: fields default to the value zero.

The length in bits of the string is specified by the first of the following fields present:

• stringLength:, which points to a DIVariable whose value is the string length in bits.

• stringLengthExpression:, which points to a DIExpression which computes the length in bits.

• size, which contains the literal length in bits.

The stringLocationExpression: points to a DIExpression which describes the “data location” of the string object, if present.

‘tbaa’ Metadata

In LLVM IR, memory does not have types, so LLVM’s own type system is not suitable for doing type based alias analysis (TBAA). Instead, metadata is added to the IR to describe a type system of a higher level language. This can be used to implement C/C++ strict type aliasing rules, but it can also be used to implement custom alias analysis behavior for other languages.

This description of LLVM’s TBAA system is broken into two parts: Semantics talks about high level issues, and Representation talks about the metadata encoding of various entities.

It is always possible to trace any TBAA node to a “root” TBAA node (details in the Representation section). TBAA nodes with different roots have an unknown aliasing relationship, and LLVM conservatively infers MayAlias between them. The rules mentioned in this section only pertain to TBAA nodes living under the same root.

Semantics

The TBAA metadata system, referred to as “struct path TBAA” (not to be confused with tbaa.struct), consists of the following high level concepts: Type Descriptors, further subdivided into scalar type descriptors and struct type descriptors; and Access Tags.

Type descriptors describe the type system of the higher level language being compiled. Scalar type descriptors describe types that do not contain other types. Each scalar type has a parent type, which must also be a scalar type or the TBAA root. Via this parent relation, scalar types within a TBAA root form a tree. Struct type descriptors denote types that contain a sequence of other type descriptors, at known offsets. These contained type descriptors can either be struct type descriptors themselves or scalar type descriptors.

Access tags are metadata nodes attached to load and store instructions. Access tags use type descriptors to describe the location being accessed in terms of the type system of the higher level language. Access tags are tuples consisting of a base type, an access type and an offset. The base type is a scalar type descriptor or a struct type descriptor, the access type is a scalar type descriptor, and the offset is a constant integer.

The access tag (BaseTy, AccessTy, Offset) can describe one of two things:

• If BaseTy is a struct type, the tag describes a memory access (load or store) of a value of type AccessTy contained in the struct type BaseTy at offset Offset.

• If BaseTy is a scalar type, Offset must be 0 and BaseTy and AccessTy must be the same; and the access tag describes a scalar access with scalar type AccessTy.

We first define an ImmediateParent relation on (BaseTy, Offset) tuples this way:

• If BaseTy is a scalar type then ImmediateParent(BaseTy, 0) is (ParentTy, 0) where ParentTy is the parent of the scalar type as described in the TBAA metadata. ImmediateParent(BaseTy, Offset) is undefined if Offset is non-zero.

• If BaseTy is a struct type then ImmediateParent(BaseTy, Offset) is (NewTy, NewOffset) where NewTy is the type contained in BaseTy at offset Offset and NewOffset is Offset adjusted to be relative within that inner type.

A memory access with an access tag (BaseTy1, AccessTy1, Offset1) aliases a memory access with an access tag (BaseTy2, AccessTy2, Offset2) if either (BaseTy1, Offset1) is reachable from (Base2, Offset2) via the Parent relation or vice versa. If memory accesses alias even though they are noalias according to !tbaa metadata, the behavior is undefined.

As a concrete example, the type descriptor graph for the following program

struct Inner {
  int i;    // offset 0
  float f;  // offset 4
};

struct Outer {
  float f;  // offset 0
  double d; // offset 4
  struct Inner inner_a;  // offset 12
};

void f(struct Outer* outer, struct Inner* inner, float* f, int* i, char* c) {
  outer->f = 0;            // tag0: (OuterStructTy, FloatScalarTy, 0)
  outer->inner_a.i = 0;    // tag1: (OuterStructTy, IntScalarTy, 12)
  outer->inner_a.f = 0.0;  // tag2: (OuterStructTy, FloatScalarTy, 16)
  *f = 0.0;                // tag3: (FloatScalarTy, FloatScalarTy, 0)
}

is (note that in C and C++, char can be used to access any arbitrary type):

Root = "TBAA Root"
CharScalarTy = ("char", Root, 0)
FloatScalarTy = ("float", CharScalarTy, 0)
DoubleScalarTy = ("double", CharScalarTy, 0)
IntScalarTy = ("int", CharScalarTy, 0)
InnerStructTy = {"Inner" (IntScalarTy, 0), (FloatScalarTy, 4)}
OuterStructTy = {"Outer", (FloatScalarTy, 0), (DoubleScalarTy, 4),
                 (InnerStructTy, 12)}

with (e.g.) ImmediateParent(OuterStructTy, 12) = (InnerStructTy, 0), ImmediateParent(InnerStructTy, 0) = (IntScalarTy, 0), and ImmediateParent(IntScalarTy, 0) = (CharScalarTy, 0).

Representation

The root node of a TBAA type hierarchy is an MDNode with 0 operands or with exactly one MDString operand.

Scalar type descriptors are represented as an MDNode s with two operands. The first operand is an MDString denoting the name of the struct type. LLVM does not assign meaning to the value of this operand, it only cares about it being an MDString. The second operand is an MDNode which points to the parent for said scalar type descriptor, which is either another scalar type descriptor or the TBAA root. Scalar type descriptors can have an optional third argument, but that must be the constant integer zero.

Struct type descriptors are represented as MDNode s with an odd number of operands greater than 1. The first operand is an MDString denoting the name of the struct type. Like in scalar type descriptors the actual value of this name operand is irrelevant to LLVM. After the name operand, the struct type descriptors have a sequence of alternating MDNode and ConstantInt operands. With N starting from 1, the 2N - 1 th operand, an MDNode, denotes a contained field, and the 2N th operand, a ConstantInt, is the offset of the said contained field. The offsets must be in non-decreasing order.

Access tags are represented as MDNode s with either 3 or 4 operands. The first operand is an MDNode pointing to the node representing the base type. The second operand is an MDNode pointing to the node representing the access type. The third operand is a ConstantInt that states the offset of the access. If a fourth field is present, it must be a ConstantInt valued at 0 or 1. If it is 1 then the access tag states that the location being accessed is “constant” (meaning pointsToConstantMemory should return true; see other useful AliasAnalysis methods). The TBAA root of the access type and the base type of an access tag must be the same, and that is the TBAA root of the access tag.

‘tbaa.struct’ Metadata

The llvm.memcpy is often used to implement aggregate assignment operations in C and similar languages, however it is defined to copy a contiguous region of memory, which is more than strictly necessary for aggregate types which contain holes due to padding. Also, it doesn’t contain any TBAA information about the fields of the aggregate.

!tbaa.struct metadata can describe which memory subregions in a memcpy are padding and what the TBAA tags of the struct are.

The current metadata format is very simple. !tbaa.struct metadata nodes are a list of operands which are in conceptual groups of three. For each group of three, the first operand gives the byte offset of a field in bytes, the second gives its size in bytes, and the third gives its tbaa tag. e.g.:

!4 = !{ i64 0, i64 4, !1, i64 8, i64 4, !2 }

This describes a struct with two fields. The first is at offset 0 bytes with size 4 bytes, and has tbaa tag !1. The second is at offset 8 bytes and has size 4 bytes and has tbaa tag !2.

Note that the fields need not be contiguous. In this example, there is a 4 byte gap between the two fields. This gap represents padding which does not carry useful data and need not be preserved.

‘noalias’ and ‘alias.scope’ Metadata

noalias and alias.scope metadata provide the ability to specify generic noalias memory-access sets. This means that some collection of memory access instructions (loads, stores, memory-accessing calls, etc.) that carry noalias metadata can specifically be specified not to alias with some other collection of memory access instructions that carry alias.scope metadata. If accesses from different collections alias, the behavior is undefined. Each type of metadata specifies a list of scopes where each scope has an id and a domain.

When evaluating an aliasing query, if for some domain, the set of scopes with that domain in one instruction’s alias.scope list is a subset of (or equal to) the set of scopes for that domain in another instruction’s noalias list, then the two memory accesses are assumed not to alias.

Because scopes in one domain don’t affect scopes in other domains, separate domains can be used to compose multiple independent noalias sets. This is used for example during inlining. As the noalias function parameters are turned into noalias scope metadata, a new domain is used every time the function is inlined.

The metadata identifying each domain is itself a list containing one or two entries. The first entry is the name of the domain. Note that if the name is a string then it can be combined across functions and translation units. A self-reference can be used to create globally unique domain names. A descriptive string may optionally be provided as a second list entry.

The metadata identifying each scope is also itself a list containing two or three entries. The first entry is the name of the scope. Note that if the name is a string then it can be combined across functions and translation units. A self-reference can be used to create globally unique scope names. A metadata reference to the scope’s domain is the second entry. A descriptive string may optionally be provided as a third list entry.

For example,

; Two scope domains:
!0 = !{!0}
!1 = !{!1}

; Some scopes in these domains:
!2 = !{!2, !0}
!3 = !{!3, !0}
!4 = !{!4, !1}

; Some scope lists:
!5 = !{!4} ; A list containing only scope !4
!6 = !{!4, !3, !2}
!7 = !{!3}

; These two instructions don't alias:
%0 = load float, ptr %c, align 4, !alias.scope !5
store float %0, ptr %arrayidx.i, align 4, !noalias !5

; These two instructions also don't alias (for domain !1, the set of scopes
; in the !alias.scope equals that in the !noalias list):
%2 = load float, ptr %c, align 4, !alias.scope !5
store float %2, ptr %arrayidx.i2, align 4, !noalias !6

; These two instructions may alias (for domain !0, the set of scopes in
; the !noalias list is not a superset of, or equal to, the scopes in the
; !alias.scope list):
%2 = load float, ptr %c, align 4, !alias.scope !6
store float %0, ptr %arrayidx.i, align 4, !noalias !7

‘fpmath’ Metadata

fpmath metadata may be attached to any instruction of floating-point type. It can be used to express the maximum acceptable error in the result of that instruction, in ULPs, thus potentially allowing the compiler to use a more efficient but less accurate method of computing it. ULP is defined as follows:

If x is a real number that lies between two finite consecutive floating-point numbers a and b, without being equal to one of them, then ulp(x) = |b - a|, otherwise ulp(x) is the distance between the two non-equal finite floating-point numbers nearest x. Moreover, ulp(NaN) is NaN.

The metadata node shall consist of a single positive float type number representing the maximum relative error, for example:

!0 = !{ float 2.5 } ; maximum acceptable inaccuracy is 2.5 ULPs

‘range’ Metadata

range metadata may be attached only to load, call and invoke of integer or vector of integer types. It expresses the possible ranges the loaded value or the value returned by the called function at this call site is in. If the loaded or returned value is not in the specified range, a poison value is returned instead. The ranges are represented with a flattened list of integers. The loaded value or the value returned is known to be in the union of the ranges defined by each consecutive pair. Each pair has the following properties:

• The type must match the scalar type of the instruction.

• The pair a,b represents the range [a,b).

• Both a and b are constants.

• The range is allowed to wrap.

• The range should not represent the full or empty set. That is, a!=b.

In addition, the pairs must be in signed order of the lower bound and they must be non-contiguous.

For vector-typed instructions, the range is applied element-wise.

Examples:

  %a = load i8, ptr %x, align 1, !range !0 ; Can only be 0 or 1
  %b = load i8, ptr %y, align 1, !range !1 ; Can only be 255 (-1), 0 or 1
  %c = call i8 @foo(),       !range !2 ; Can only be 0, 1, 3, 4 or 5
  %d = invoke i8 @bar() to label %cont
         unwind label %lpad, !range !3 ; Can only be -2, -1, 3, 4 or 5
  %e = load <2 x i8>, ptr %x, !range 0 ; Can only be <0 or 1, 0 or 1>
...
!0 = !{ i8 0, i8 2 }
!1 = !{ i8 255, i8 2 }
!2 = !{ i8 0, i8 2, i8 3, i8 6 }
!3 = !{ i8 -2, i8 0, i8 3, i8 6 }

‘absolute_symbol’ Metadata

absolute_symbol metadata may be attached to a global variable declaration. It marks the declaration as a reference to an absolute symbol, which causes the backend to use absolute relocations for the symbol even in position independent code, and expresses the possible ranges that the global variable’s address (not its value) is in, in the same format as range metadata, with the extension that the pair all-ones,all-ones may be used to represent the full set.

Example (assuming 64-bit pointers):

  @a = external global i8, !absolute_symbol !0 ; Absolute symbol in range [0,256)
  @b = external global i8, !absolute_symbol !1 ; Absolute symbol in range [0,2^64)

...
!0 = !{ i64 0, i64 256 }
!1 = !{ i64 -1, i64 -1 }

‘callees’ Metadata

callees metadata may be attached to indirect call sites. If callees metadata is attached to a call site, and any callee is not among the set of functions provided by the metadata, the behavior is undefined. The intent of this metadata is to facilitate optimizations such as indirect-call promotion. For example, in the code below, the call instruction may only target the add or sub functions:

%result = call i64 %binop(i64 %x, i64 %y), !callees !0

...
!0 = !{ptr @add, ptr @sub}

‘callback’ Metadata

callback metadata may be attached to a function declaration, or definition. (Call sites are excluded only due to the lack of a use case.) For ease of exposition, we’ll refer to the function annotated w/ metadata as a broker function. The metadata describes how the arguments of a call to the broker are in turn passed to the callback function specified by the metadata. Thus, the callback metadata provides a partial description of a call site inside the broker function with regards to the arguments of a call to the broker. The only semantic restriction on the broker function itself is that it is not allowed to inspect or modify arguments referenced in the callback metadata as pass-through to the callback function.

The broker is not required to actually invoke the callback function at runtime. However, the assumptions about not inspecting or modifying arguments that would be passed to the specified callback function still hold, even if the callback function is not dynamically invoked. The broker is allowed to invoke the callback function more than once per invocation of the broker. The broker is also allowed to invoke (directly or indirectly) the function passed as a callback through another use. Finally, the broker is also allowed to relay the callback callee invocation to a different thread.

The metadata is structured as follows: At the outer level, callback metadata is a list of callback encodings. Each encoding starts with a constant i64 which describes the argument position of the callback function in the call to the broker. The following elements, except the last, describe what arguments are passed to the callback function. Each element is again an i64 constant identifying the argument of the broker that is passed through, or i64 -1 to indicate an unknown or inspected argument. The order in which they are listed has to be the same in which they are passed to the callback callee. The last element of the encoding is a boolean which specifies how variadic arguments of the broker are handled. If it is true, all variadic arguments of the broker are passed through to the callback function after the arguments encoded explicitly before.

In the code below, the pthread_create function is marked as a broker through the !callback !1 metadata. In the example, there is only one callback encoding, namely !2, associated with the broker. This encoding identifies the callback function as the second argument of the broker (i64 2) and the sole argument of the callback function as the third one of the broker function (i64 3).

declare !callback !1 dso_local i32 @pthread_create(ptr, ptr, ptr, ptr)

...
!2 = !{i64 2, i64 3, i1 false}
!1 = !{!2}

Another example is shown below. The callback callee is the second argument of the __kmpc_fork_call function (i64 2). The callee is given two unknown values (each identified by a i64 -1) and afterwards all variadic arguments that are passed to the __kmpc_fork_call call (due to the final i1 true).

declare !callback !0 dso_local void @__kmpc_fork_call(ptr, i32, ptr, ...)

...
!1 = !{i64 2, i64 -1, i64 -1, i1 true}
!0 = !{!1}

‘exclude’ Metadata

exclude metadata may be attached to a global variable to signify that its section should not be included in the final executable or shared library. This option is only valid for global variables with an explicit section targeting ELF or COFF. This is done using the SHF_EXCLUDE flag on ELF targets and the IMAGE_SCN_LNK_REMOVE and IMAGE_SCN_MEM_DISCARDABLE flags for COFF targets. Additionally, this metadata is only used as a flag, so the associated node must be empty. The explicit section should not conflict with any other sections that the user does not want removed after linking.

@object = private constant [1 x i8] c"\00", section ".foo" !exclude !0

...
!0 = !{}

‘unpredictable’ Metadata

unpredictable metadata may be attached to any branch or switch instruction. It can be used to express the unpredictability of control flow. Similar to the llvm.expect intrinsic, it may be used to alter optimizations related to compare and branch instructions. The metadata is treated as a boolean value; if it exists, it signals that the branch or switch that it is attached to is completely unpredictable.

‘dereferenceable’ Metadata

The existence of the !dereferenceable metadata on the instruction tells the optimizer that the value loaded is known to be dereferenceable, otherwise the behavior is undefined. The number of bytes known to be dereferenceable is specified by the integer value in the metadata node. This is analogous to the ‘’dereferenceable’’ attribute on parameters and return values.

‘dereferenceable_or_null’ Metadata

The existence of the !dereferenceable_or_null metadata on the instruction tells the optimizer that the value loaded is known to be either dereferenceable or null, otherwise the behavior is undefined. The number of bytes known to be dereferenceable is specified by the integer value in the metadata node. This is analogous to the ‘’dereferenceable_or_null’’ attribute on parameters and return values.

‘llvm.loop’

It is sometimes useful to attach information to loop constructs. Currently, loop metadata is implemented as metadata attached to the branch instruction in the loop latch block. The loop metadata node is a list of other metadata nodes, each representing a property of the loop. Usually, the first item of the property node is a string. For example, the llvm.loop.unroll.count suggests an unroll factor to the loop unroller:

  br i1 %exitcond, label %._crit_edge, label %.lr.ph, !llvm.loop !0
...
!0 = !{!0, !1, !2}
!1 = !{!"llvm.loop.unroll.enable"}
!2 = !{!"llvm.loop.unroll.count", i32 4}

For legacy reasons, the first item of a loop metadata node must be a reference to itself. Before the advent of the ‘distinct’ keyword, this forced the preservation of otherwise identical metadata nodes. Since the loop-metadata node can be attached to multiple nodes, the ‘distinct’ keyword has become unnecessary.

Prior to the property nodes, one or two DILocation (debug location) nodes can be present in the list. The first, if present, identifies the source-code location where the loop begins. The second, if present, identifies the source-code location where the loop ends.

Loop metadata nodes cannot be used as unique identifiers. They are neither persistent for the same loop through transformations nor necessarily unique to just one loop.

‘llvm.loop.disable_nonforced’

This metadata disables all optional loop transformations unless explicitly instructed using other transformation metadata such as llvm.loop.unroll.enable. That is, no heuristic will try to determine whether a transformation is profitable. The purpose is to avoid that the loop is transformed to a different loop before an explicitly requested (forced) transformation is applied. For instance, loop fusion can make other transformations impossible. Mandatory loop canonicalizations such as loop rotation are still applied.

It is recommended to use this metadata in addition to any llvm.loop.* transformation directive. Also, any loop should have at most one directive applied to it (and a sequence of transformations built using followup-attributes). Otherwise, which transformation will be applied depends on implementation details such as the pass pipeline order.

See Code Transformation Metadata for details.

‘llvm.loop.vectorize’ and ‘llvm.loop.interleave’

Metadata prefixed with llvm.loop.vectorize or llvm.loop.interleave are used to control per-loop vectorization and interleaving parameters such as vectorization width and interleave count. These metadata should be used in conjunction with llvm.loop loop identification metadata. The llvm.loop.vectorize and llvm.loop.interleave metadata are only optimization hints and the optimizer will only interleave and vectorize loops if it believes it is safe to do so. The llvm.loop.parallel_accesses metadata which contains information about loop-carried memory dependencies can be helpful in determining the safety of these transformations.

‘llvm.loop.interleave.count’ Metadata

This metadata suggests an interleave count to the loop interleaver. The first operand is the string llvm.loop.interleave.count and the second operand is an integer specifying the interleave count. For example:

!0 = !{!"llvm.loop.interleave.count", i32 4}

Note that setting llvm.loop.interleave.count to 1 disables interleaving multiple iterations of the loop. If llvm.loop.interleave.count is set to 0 then the interleave count will be determined automatically.

‘llvm.loop.vectorize.enable’ Metadata

This metadata selectively enables or disables vectorization for the loop. The first operand is the string llvm.loop.vectorize.enable and the second operand is a bit. If the bit operand value is 1 vectorization is enabled. A value of 0 disables vectorization:

!0 = !{!"llvm.loop.vectorize.enable", i1 0}
!1 = !{!"llvm.loop.vectorize.enable", i1 1}

‘llvm.loop.vectorize.predicate.enable’ Metadata

This metadata selectively enables or disables creating predicated instructions for the loop, which can enable folding of the scalar epilogue loop into the main loop. The first operand is the string llvm.loop.vectorize.predicate.enable and the second operand is a bit. If the bit operand value is 1 vectorization is enabled. A value of 0 disables vectorization:

!0 = !{!"llvm.loop.vectorize.predicate.enable", i1 0}
!1 = !{!"llvm.loop.vectorize.predicate.enable", i1 1}

‘llvm.loop.vectorize.scalable.enable’ Metadata

This metadata selectively enables or disables scalable vectorization for the loop, and only has any effect if vectorization for the loop is already enabled. The first operand is the string llvm.loop.vectorize.scalable.enable and the second operand is a bit. If the bit operand value is 1 scalable vectorization is enabled, whereas a value of 0 reverts to the default fixed width vectorization:

!0 = !{!"llvm.loop.vectorize.scalable.enable", i1 0}
!1 = !{!"llvm.loop.vectorize.scalable.enable", i1 1}

‘llvm.loop.vectorize.width’ Metadata

This metadata sets the target width of the vectorizer. The first operand is the string llvm.loop.vectorize.width and the second operand is an integer specifying the width. For example:

!0 = !{!"llvm.loop.vectorize.width", i32 4}

Note that setting llvm.loop.vectorize.width to 1 disables vectorization of the loop. If llvm.loop.vectorize.width is set to 0 or if the loop does not have this metadata the width will be determined automatically.

‘llvm.loop.vectorize.followup_vectorized’ Metadata

This metadata defines which loop attributes the vectorized loop will have. See Code Transformation Metadata for details.

‘llvm.loop.vectorize.followup_epilogue’ Metadata

This metadata defines which loop attributes the epilogue will have. The epilogue is not vectorized and is executed when either the vectorized loop is not known to preserve semantics (because e.g., it processes two arrays that are found to alias by a runtime check) or for the last iterations that do not fill a complete set of vector lanes. See Transformation Metadata for details.

‘llvm.loop.vectorize.followup_all’ Metadata

Attributes in the metadata will be added to both the vectorized and epilogue loop. See Transformation Metadata for details.

‘llvm.loop.unroll’

Metadata prefixed with llvm.loop.unroll are loop unrolling optimization hints such as the unroll factor. llvm.loop.unroll metadata should be used in conjunction with llvm.loop loop identification metadata. The llvm.loop.unroll metadata are only optimization hints and the unrolling will only be performed if the optimizer believes it is safe to do so.

‘llvm.loop.unroll.count’ Metadata

This metadata suggests an unroll factor to the loop unroller. The first operand is the string llvm.loop.unroll.count and the second operand is a positive integer specifying the unroll factor. For example:

!0 = !{!"llvm.loop.unroll.count", i32 4}

If the trip count of the loop is less than the unroll count the loop will be partially unrolled.

‘llvm.loop.unroll.disable’ Metadata

This metadata disables loop unrolling. The metadata has a single operand which is the string llvm.loop.unroll.disable. For example:

!0 = !{!"llvm.loop.unroll.disable"}

‘llvm.loop.unroll.runtime.disable’ Metadata

This metadata disables runtime loop unrolling. The metadata has a single operand which is the string llvm.loop.unroll.runtime.disable. For example:

!0 = !{!"llvm.loop.unroll.runtime.disable"}

‘llvm.loop.unroll.enable’ Metadata

This metadata suggests that the loop should be fully unrolled if the trip count is known at compile time and partially unrolled if the trip count is not known at compile time. The metadata has a single operand which is the string llvm.loop.unroll.enable. For example:

!0 = !{!"llvm.loop.unroll.enable"}

‘llvm.loop.unroll.full’ Metadata

This metadata suggests that the loop should be unrolled fully. The metadata has a single operand which is the string llvm.loop.unroll.full. For example:

!0 = !{!"llvm.loop.unroll.full"}

‘llvm.loop.unroll.followup’ Metadata

This metadata defines which loop attributes the unrolled loop will have. See Transformation Metadata for details.

‘llvm.loop.unroll.followup_remainder’ Metadata

This metadata defines which loop attributes the remainder loop after partial/runtime unrolling will have. See Transformation Metadata for details.

‘llvm.loop.unroll_and_jam’

This metadata is treated very similarly to the llvm.loop.unroll metadata above, but affect the unroll and jam pass. In addition any loop with llvm.loop.unroll metadata but no llvm.loop.unroll_and_jam metadata will disable unroll and jam (so llvm.loop.unroll metadata will be left to the unroller, plus llvm.loop.unroll.disable metadata will disable unroll and jam too.)

The metadata for unroll and jam otherwise is the same as for unroll. llvm.loop.unroll_and_jam.enable, llvm.loop.unroll_and_jam.disable and llvm.loop.unroll_and_jam.count do the same as for unroll. llvm.loop.unroll_and_jam.full is not supported. Again these are only hints and the normal safety checks will still be performed.

‘llvm.loop.unroll_and_jam.count’ Metadata

This metadata suggests an unroll and jam factor to use, similarly to llvm.loop.unroll.count. The first operand is the string llvm.loop.unroll_and_jam.count and the second operand is a positive integer specifying the unroll factor. For example:

!0 = !{!"llvm.loop.unroll_and_jam.count", i32 4}

If the trip count of the loop is less than the unroll count the loop will be partially unroll and jammed.

‘llvm.loop.unroll_and_jam.disable’ Metadata

This metadata disables loop unroll and jamming. The metadata has a single operand which is the string llvm.loop.unroll_and_jam.disable. For example:

!0 = !{!"llvm.loop.unroll_and_jam.disable"}

‘llvm.loop.unroll_and_jam.enable’ Metadata

This metadata suggests that the loop should be fully unroll and jammed if the trip count is known at compile time and partially unrolled if the trip count is not known at compile time. The metadata has a single operand which is the string llvm.loop.unroll_and_jam.enable. For example:

!0 = !{!"llvm.loop.unroll_and_jam.enable"}

‘llvm.loop.unroll_and_jam.followup_outer’ Metadata

This metadata defines which loop attributes the outer unrolled loop will have. See Transformation Metadata for details.

‘llvm.loop.unroll_and_jam.followup_inner’ Metadata

This metadata defines which loop attributes the inner jammed loop will have. See Transformation Metadata for details.

‘llvm.loop.unroll_and_jam.followup_remainder_outer’ Metadata

This metadata defines which attributes the epilogue of the outer loop will have. This loop is usually unrolled, meaning there is no such loop. This attribute will be ignored in this case. See Transformation Metadata for details.

‘llvm.loop.unroll_and_jam.followup_remainder_inner’ Metadata

This metadata defines which attributes the inner loop of the epilogue will have. The outer epilogue will usually be unrolled, meaning there can be multiple inner remainder loops. See Transformation Metadata for details.

‘llvm.loop.unroll_and_jam.followup_all’ Metadata

Attributes specified in the metadata is added to all llvm.loop.unroll_and_jam.* loops. See Transformation Metadata for details.

‘llvm.loop.licm_versioning.disable’ Metadata

This metadata indicates that the loop should not be versioned for the purpose of enabling loop-invariant code motion (LICM). The metadata has a single operand which is the string llvm.loop.licm_versioning.disable. For example:

!0 = !{!"llvm.loop.licm_versioning.disable"}

‘llvm.loop.distribute.enable’ Metadata

Loop distribution allows splitting a loop into multiple loops. Currently, this is only performed if the entire loop cannot be vectorized due to unsafe memory dependencies. The transformation will attempt to isolate the unsafe dependencies into their own loop.

This metadata can be used to selectively enable or disable distribution of the loop. The first operand is the string llvm.loop.distribute.enable and the second operand is a bit. If the bit operand value is 1 distribution is enabled. A value of 0 disables distribution:

!0 = !{!"llvm.loop.distribute.enable", i1 0}
!1 = !{!"llvm.loop.distribute.enable", i1 1}

This metadata should be used in conjunction with llvm.loop loop identification metadata.

‘llvm.loop.distribute.followup_coincident’ Metadata

This metadata defines which attributes extracted loops with no cyclic dependencies will have (i.e. can be vectorized). See Transformation Metadata for details.

‘llvm.loop.distribute.followup_sequential’ Metadata

This metadata defines which attributes the isolated loops with unsafe memory dependencies will have. See Transformation Metadata for details.

‘llvm.loop.distribute.followup_fallback’ Metadata

If loop versioning is necessary, this metadata defined the attributes the non-distributed fallback version will have. See Transformation Metadata for details.

‘llvm.loop.distribute.followup_all’ Metadata

The attributes in this metadata is added to all followup loops of the loop distribution pass. See Transformation Metadata for details.

‘llvm.licm.disable’ Metadata

This metadata indicates that loop-invariant code motion (LICM) should not be performed on this loop. The metadata has a single operand which is the string llvm.licm.disable. For example:

!0 = !{!"llvm.licm.disable"}

Note that although it operates per loop it isn’t given the llvm.loop prefix as it is not affected by the llvm.loop.disable_nonforced metadata.

‘llvm.access.group’ Metadata

llvm.access.group metadata can be attached to any instruction that potentially accesses memory. It can point to a single distinct metadata node, which we call access group. This node represents all memory access instructions referring to it via llvm.access.group. When an instruction belongs to multiple access groups, it can also point to a list of accesses groups, illustrated by the following example.

%val = load i32, ptr %arrayidx, !llvm.access.group !0
...
!0 = !{!1, !2}
!1 = distinct !{}
!2 = distinct !{}

It is illegal for the list node to be empty since it might be confused with an access group.

The access group metadata node must be ‘distinct’ to avoid collapsing multiple access groups by content. An access group metadata node must always be empty which can be used to distinguish an access group metadata node from a list of access groups. Being empty avoids the situation that the content must be updated which, because metadata is immutable by design, would required finding and updating all references to the access group node.

The access group can be used to refer to a memory access instruction without pointing to it directly (which is not possible in global metadata). Currently, the only metadata making use of it is llvm.loop.parallel_accesses.

‘llvm.loop.parallel_accesses’ Metadata

The llvm.loop.parallel_accesses metadata refers to one or more access group metadata nodes (see llvm.access.group). It denotes that no loop-carried memory dependence exist between it and other instructions in the loop with this metadata.

Let m1 and m2 be two instructions that both have the llvm.access.group metadata to the access group g1, respectively g2 (which might be identical). If a loop contains both access groups in its llvm.loop.parallel_accesses metadata, then the compiler can assume that there is no dependency between m1 and m2 carried by this loop. Instructions that belong to multiple access groups are considered having this property if at least one of the access groups matches the llvm.loop.parallel_accesses list.

If all memory-accessing instructions in a loop have llvm.access.group metadata that each refer to one of the access groups of a loop’s llvm.loop.parallel_accesses metadata, then the loop has no loop carried memory dependencies and is considered to be a parallel loop. If there is a loop-carried dependency, the behavior is undefined.

Note that if not all memory access instructions belong to an access group referred to by llvm.loop.parallel_accesses, then the loop must not be considered trivially parallel. Additional memory dependence analysis is required to make that determination. As a fail safe mechanism, this causes loops that were originally parallel to be considered sequential (if optimization passes that are unaware of the parallel semantics insert new memory instructions into the loop body).

Example of a loop that is considered parallel due to its correct use of both llvm.access.group and llvm.loop.parallel_accesses metadata types.

for.body:
  ...
  %val0 = load i32, ptr %arrayidx, !llvm.access.group !1
  ...
  store i32 %val0, ptr %arrayidx1, !llvm.access.group !1
  ...
  br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !0

for.end:
...
!0 = distinct !{!0, !{!"llvm.loop.parallel_accesses", !1}}
!1 = distinct !{}

It is also possible to have nested parallel loops:

outer.for.body:
  ...
  %val1 = load i32, ptr %arrayidx3, !llvm.access.group !4
  ...
  br label %inner.for.body

inner.for.body:
  ...
  %val0 = load i32, ptr %arrayidx1, !llvm.access.group !3
  ...
  store i32 %val0, ptr %arrayidx2, !llvm.access.group !3
  ...
  br i1 %exitcond, label %inner.for.end, label %inner.for.body, !llvm.loop !1

inner.for.end:
  ...
  store i32 %val1, ptr %arrayidx4, !llvm.access.group !4
  ...
  br i1 %exitcond, label %outer.for.end, label %outer.for.body, !llvm.loop !2

outer.for.end:                                          ; preds = %for.body
...
!1 = distinct !{!1, !{!"llvm.loop.parallel_accesses", !3}}     ; metadata for the inner loop
!2 = distinct !{!2, !{!"llvm.loop.parallel_accesses", !3, !4}} ; metadata for the outer loop
!3 = distinct !{} ; access group for instructions in the inner loop (which are implicitly contained in outer loop as well)
!4 = distinct !{} ; access group for instructions in the outer, but not the inner loop

‘llvm.loop.mustprogress’ Metadata

The llvm.loop.mustprogress metadata indicates that this loop is required to terminate, unwind, or interact with the environment in an observable way e.g. via a volatile memory access, I/O, or other synchronization. If such a loop is not found to interact with the environment in an observable way, the loop may be removed. This corresponds to the mustprogress function attribute.

‘irr_loop’ Metadata

irr_loop metadata may be attached to the terminator instruction of a basic block that’s an irreducible loop header (note that an irreducible loop has more than once header basic blocks.) If irr_loop metadata is attached to the terminator instruction of a basic block that is not really an irreducible loop header, the behavior is undefined. The intent of this metadata is to improve the accuracy of the block frequency propagation. For example, in the code below, the block header0 may have a loop header weight (relative to the other headers of the irreducible loop) of 100:

header0:
...
br i1 %cmp, label %t1, label %t2, !irr_loop !0

...
!0 = !{"loop_header_weight", i64 100}

Irreducible loop header weights are typically based on profile data.

‘invariant.group’ Metadata

The experimental invariant.group metadata may be attached to load/store instructions referencing a single metadata with no entries. The existence of the invariant.group metadata on the instruction tells the optimizer that every load and store to the same pointer operand can be assumed to load or store the same value (but see the llvm.launder.invariant.group intrinsic which affects when two pointers are considered the same). Pointers returned by bitcast or getelementptr with only zero indices are considered the same.

Examples:

@unknownPtr = external global i8
...
%ptr = alloca i8
store i8 42, ptr %ptr, !invariant.group !0
call void @foo(ptr %ptr)

%a = load i8, ptr %ptr, !invariant.group !0 ; Can assume that value under %ptr didn't change
call void @foo(ptr %ptr)

%newPtr = call ptr @getPointer(ptr %ptr)
%c = load i8, ptr %newPtr, !invariant.group !0 ; Can't assume anything, because we only have information about %ptr

%unknownValue = load i8, ptr @unknownPtr
store i8 %unknownValue, ptr %ptr, !invariant.group !0 ; Can assume that %unknownValue == 42

call void @foo(ptr %ptr)
%newPtr2 = call ptr @llvm.launder.invariant.group.p0(ptr %ptr)
%d = load i8, ptr %newPtr2, !invariant.group !0  ; Can't step through launder.invariant.group to get value of %ptr

...
declare void @foo(ptr)
declare ptr @getPointer(ptr)
declare ptr @llvm.launder.invariant.group.p0(ptr)

!0 = !{}

The invariant.group metadata must be dropped when replacing one pointer by another based on aliasing information. This is because invariant.group is tied to the SSA value of the pointer operand.

%v = load i8, ptr %x, !invariant.group !0
; if %x mustalias %y then we can replace the above instruction with
%v = load i8, ptr %y

Note that this is an experimental feature, which means that its semantics might change in the future.

‘type’ Metadata

See Type Metadata.

‘associated’ Metadata

The associated metadata may be attached to a global variable definition with a single argument that references a global object (optionally through an alias).

This metadata lowers to the ELF section flag SHF_LINK_ORDER which prevents discarding of the global variable in linker GC unless the referenced object is also discarded. The linker support for this feature is spotty. For best compatibility, globals carrying this metadata should:

• Be in @llvm.compiler.used.

• If the referenced global variable is in a comdat, be in the same comdat.

!associated can not express many-to-one relationship. A global variable with the metadata should generally not be referenced by a function: the function may be inlined into other functions, leading to more references to the metadata. Ideally we would want to keep metadata alive as long as any inline location is alive, but this many-to-one relationship is not representable. Moreover, if the metadata is retained while the function is discarded, the linker will report an error of a relocation referencing a discarded section.

The metadata is often used with an explicit section consisting of valid C identifiers so that the runtime can find the metadata section with linker-defined encapsulation symbols __start_<section_name> and __stop_<section_name>.

It does not have any effect on non-ELF targets.

Example:

$a = comdat any
@a = global i32 1, comdat $a
@b = internal global i32 2, comdat $a, section "abc", !associated !0
!0 = !{ptr @a}

‘prof’ Metadata

The prof metadata is used to record profile data in the IR. The first operand of the metadata node indicates the profile metadata type. There are currently 3 types: branch_weights, function_entry_count, and VP.

branch_weights

Branch weight metadata attached to a branch, select, switch or call instruction represents the likeliness of the associated branch being taken. For more information, see LLVM Branch Weight Metadata.

function_entry_count

Function entry count metadata can be attached to function definitions to record the number of times the function is called. Used with BFI information, it is also used to derive the basic block profile count. For more information, see LLVM Branch Weight Metadata.

VP

VP (value profile) metadata can be attached to instructions that have value profile information. Currently this is indirect calls (where it records the hottest callees) and calls to memory intrinsics such as memcpy, memmove, and memset (where it records the hottest byte lengths).

Each VP metadata node contains “VP” string, then a uint32_t value for the value profiling kind, a uint64_t value for the total number of times the instruction is executed, followed by uint64_t value and execution count pairs. The value profiling kind is 0 for indirect call targets and 1 for memory operations. For indirect call targets, each profile value is a hash of the callee function name, and for memory operations each value is the byte length.

Note that the value counts do not need to add up to the total count listed in the third operand (in practice only the top hottest values are tracked and reported).

Indirect call example:

call void %f(), !prof !1
!1 = !{!"VP", i32 0, i64 1600, i64 7651369219802541373, i64 1030, i64 -4377547752858689819, i64 410}

Note that the VP type is 0 (the second operand), which indicates this is an indirect call value profile data. The third operand indicates that the indirect call executed 1600 times. The 4th and 6th operands give the hashes of the 2 hottest target functions’ names (this is the same hash used to represent function names in the profile database), and the 5th and 7th operands give the execution count that each of the respective prior target functions was called.

‘annotation’ Metadata

The annotation metadata can be used to attach a tuple of annotation strings or a tuple of a tuple of annotation strings to any instruction. This metadata does not impact the semantics of the program and may only be used to provide additional insight about the program and transformations to users.

Example:

%a.addr = alloca ptr, align 8, !annotation !0
!0 = !{!"auto-init"}

Embedding tuple of strings example:

%a.ptr = getelementptr ptr, ptr %base, i64 0. !annotation !0
!0 = !{!1}
!1 = !{!"gep offset", !"0"}

‘func_sanitize’ Metadata

The func_sanitize metadata is used to attach two values for the function sanitizer instrumentation. The first value is the ubsan function signature. The second value is the address of the proxy variable which stores the address of the RTTI descriptor. If prologue and ‘func_sanitize’ are used at the same time, prologue is emitted before ‘func_sanitize’ in the output.

Example:

@__llvm_rtti_proxy = private unnamed_addr constant ptr @_ZTIFvvE
define void @_Z3funv() !func_sanitize !0 {
  return void
}
!0 = !{i32 846595819, ptr @__llvm_rtti_proxy}

‘kcfi_type’ Metadata

The kcfi_type metadata can be used to attach a type identifier to functions that can be called indirectly. The type data is emitted before the function entry in the assembly. Indirect calls with the kcfi operand bundle will emit a check that compares the type identifier to the metadata.

Example:

define dso_local i32 @f() !kcfi_type !0 {
  ret i32 0
}
!0 = !{i32 12345678}

Clang emits kcfi_type metadata nodes for address-taken functions with -fsanitize=kcfi.

‘memprof’ Metadata

The memprof metadata is used to record memory profile data on heap allocation calls. Multiple context-sensitive profiles can be represented with a single memprof metadata attachment.

Example:

%call = call ptr @_Znam(i64 10), !memprof !0, !callsite !5
!0 = !{!1, !3}
!1 = !{!2, !"cold"}
!2 = !{i64 4854880825882961848, i64 1905834578520680781}
!3 = !{!4, !"notcold"}
!4 = !{i64 4854880825882961848, i64 -6528110295079665978}
!5 = !{i64 4854880825882961848}

Each operand in the memprof metadata attachment describes the profiled behavior of memory allocated by the associated allocation for a given context. In the above example, there were 2 profiled contexts, one allocating memory that was typically cold and one allocating memory that was typically not cold.

The format of the metadata describing a context specific profile (e.g. !1 and !3 above) requires a first operand that is a metadata node describing the context, followed by a list of string metadata tags describing the profile behavior (e.g. cold and notcold) above. The metadata nodes describing the context (e.g. !2 and !4 above) are unique ids corresponding to callsites, which can be matched to associated IR calls via callsite metadata. In practice these ids are formed via a hash of the callsite’s debug info, and the associated call may be in a different module. The contexts are listed in order from leaf-most call (the allocation itself) to the outermost callsite context required for uniquely identifying the described profile behavior (note this may not be the top of the profiled call stack).

‘callsite’ Metadata

The callsite metadata is used to identify callsites involved in memory profile contexts described in memprof metadata.

It is attached both to the profile allocation calls (see the example in memprof metadata), as well as to other callsites in profiled contexts described in heap allocation memprof metadata.

Example:

%call = call ptr @_Z1Bb(void), !callsite !0
!0 = !{i64 -6528110295079665978, i64 5462047985461644151}

Each operand in the callsite metadata attachment is a unique id corresponding to a callsite (possibly inlined). In practice these ids are formed via a hash of the callsite’s debug info. If the call was not inlined into any callers it will contain a single operand (id). If it was inlined it will contain a list of ids, including the ids of the callsites in the full inline sequence, in order from the leaf-most call’s id to the outermost inlined call.

‘noalias.addrspace’ Metadata

The noalias.addrspace metadata is used to identify memory operations which cannot access objects allocated in a range of address spaces. It is attached to memory instructions, including atomicrmw, cmpxchg, and call instructions.

This follows the same form as range metadata, except the field entries must be of type i32. The interpretation is the same numeric address spaces as applied to IR values.

Example:

; %ptr cannot point to an object allocated in addrspace(5)
%rmw.valid = atomicrmw and ptr %ptr, i64 %value seq_cst, !noalias.addrspace !0

; Undefined behavior. The underlying object is allocated in one of the listed
; address spaces.
%alloca = alloca i64, addrspace(5)
%alloca.cast = addrspacecast ptr addrspace(5) %alloca to ptr
%rmw.ub = atomicrmw and ptr %alloca.cast, i64 %value seq_cst, !noalias.addrspace !0

!0 = !{i32 5, i32 6} ; Exclude addrspace(5) only

This is intended for use on targets with a notion of generic address spaces, which at runtime resolve to different physical memory spaces. The interpretation of the address space values is target specific. The behavior is undefined if the runtime memory address does resolve to an object defined in one of the indicated address spaces.

Module Flags Metadata

Information about the module as a whole is difficult to convey to LLVM’s subsystems. The LLVM IR isn’t sufficient to transmit this information. The llvm.module.flags named metadata exists in order to facilitate this. These flags are in the form of key / value pairs — much like a dictionary — making it easy for any subsystem who cares about a flag to look it up.

The llvm.module.flags metadata contains a list of metadata triplets. Each triplet has the following form:

• The first element is a behavior flag, which specifies the behavior when two (or more) modules are merged together, and it encounters two (or more) metadata with the same ID. The supported behaviors are described below.

• The second element is a metadata string that is a unique ID for the metadata. Each module may only have one flag entry for each unique ID (not including entries with the Require behavior).

• The third element is the value of the flag.

When two (or more) modules are merged together, the resulting llvm.module.flags metadata is the union of the modules’ flags. That is, for each unique metadata ID string, there will be exactly one entry in the merged modules llvm.module.flags metadata table, and the value for that entry will be determined by the merge behavior flag, as described below. The only exception is that entries with the Require behavior are always preserved.

The following behaviors are supported:

Value	Behavior
1	Error Emits an error if two values disagree, otherwise the resulting value is that of the operands.
2	Warning Emits a warning if two values disagree. The result value will be the operand for the flag from the first module being linked, unless the other module uses Min or Max, in which case the result will be Min (with the min value) or Max (with the max value), respectively.
3	Require Adds a requirement that another module flag be present and have a specified value after linking is performed. The value must be a metadata pair, where the first element of the pair is the ID of the module flag to be restricted, and the second element of the pair is the value the module flag should be restricted to. This behavior can be used to restrict the allowable results (via triggering of an error) of linking IDs with the Override behavior.
4	Override Uses the specified value, regardless of the behavior or value of the other module. If both modules specify Override, but the values differ, an error will be emitted.
5	Append Appends the two values, which are required to be metadata nodes.
6	AppendUnique Appends the two values, which are required to be metadata nodes. However, duplicate entries in the second list are dropped during the append operation.
7	Max Takes the max of the two values, which are required to be integers.
8	Min Takes the min of the two values, which are required to be non-negative integers. An absent module flag is treated as having the value 0.

It is an error for a particular unique flag ID to have multiple behaviors, except in the case of Require (which adds restrictions on another metadata value) or Override.

An example of module flags:

!0 = !{ i32 1, !"foo", i32 1 }
!1 = !{ i32 4, !"bar", i32 37 }
!2 = !{ i32 2, !"qux", i32 42 }
!3 = !{ i32 3, !"qux",
  !{
    !"foo", i32 1
  }
}
!llvm.module.flags = !{ !0, !1, !2, !3 }

• Metadata !0 has the ID !"foo" and the value ‘1’. The behavior if two or more !"foo" flags are seen is to emit an error if their values are not equal.

• Metadata !1 has the ID !"bar" and the value ‘37’. The behavior if two or more !"bar" flags are seen is to use the value ‘37’.

• Metadata !2 has the ID !"qux" and the value ‘42’. The behavior if two or more !"qux" flags are seen is to emit a warning if their values are not equal.

• Metadata !3 has the ID !"qux" and the value:

  !{ !"foo", i32 1 }
  

  The behavior is to emit an error if the llvm.module.flags does not contain a flag with the ID !"foo" that has the value ‘1’ after linking is performed.

Synthesized Functions Module Flags Metadata

These metadata specify the default attributes synthesized functions should have. These metadata are currently respected by a few instrumentation passes, such as sanitizers.

These metadata correspond to a few function attributes with significant code generation behaviors. Function attributes with just optimization purposes should not be listed because the performance impact of these synthesized functions is small.

• “frame-pointer”: Max. The value can be 0, 1, or 2. A synthesized function will get the “frame-pointer” function attribute, with value being “none”, “non-leaf”, or “all”, respectively.

• “function_return_thunk_extern”: The synthesized function will get the fn_return_thunk_extern function attribute.

• “uwtable”: Max. The value can be 0, 1, or 2. If the value is 1, a synthesized function will get the uwtable(sync) function attribute, if the value is 2, a synthesized function will get the uwtable(async) function attribute.

Objective-C Garbage Collection Module Flags Metadata

On the Mach-O platform, Objective-C stores metadata about garbage collection in a special section called “image info”. The metadata consists of a version number and a bitmask specifying what types of garbage collection are supported (if any) by the file. If two or more modules are linked together their garbage collection metadata needs to be merged rather than appended together.

The Objective-C garbage collection module flags metadata consists of the following key-value pairs:

Key	Value
Objective-C Version	[Required] — The Objective-C ABI version. Valid values are 1 and 2.
Objective-C Image Info Version	[Required] — The version of the image info section. Currently always 0.
Objective-C Image Info Section	[Required] — The section to place the metadata. Valid values are "__OBJC, __image_info, regular" for Objective-C ABI version 1, and "__DATA,__objc_imageinfo, regular, no_dead_strip" for Objective-C ABI version 2.
Objective-C Garbage Collection	[Required] — Specifies whether garbage collection is supported or not. Valid values are 0, for no garbage collection, and 2, for garbage collection supported.
Objective-C GC Only	[Optional] — Specifies that only garbage collection is supported. If present, its value must be 6. This flag requires that the Objective-C Garbage Collection flag have the value 2.

Some important flag interactions:

• If a module with Objective-C Garbage Collection set to 0 is merged with a module with Objective-C Garbage Collection set to 2, then the resulting module has the Objective-C Garbage Collection flag set to 0.

• A module with Objective-C Garbage Collection set to 0 cannot be merged with a module with Objective-C GC Only set to 6.

C type width Module Flags Metadata

The ARM backend emits a section into each generated object file describing the options that it was compiled with (in a compiler-independent way) to prevent linking incompatible objects, and to allow automatic library selection. Some of these options are not visible at the IR level, namely wchar_t width and enum width.

To pass this information to the backend, these options are encoded in module flags metadata, using the following key-value pairs:

Key	Value
short_wchar	0 — sizeof(wchar_t) == 4 1 — sizeof(wchar_t) == 2
short_enum	0 — Enums are at least as large as an int. 1 — Enums are stored in the smallest integer type which can represent all of its values.

For example, the following metadata section specifies that the module was compiled with a wchar_t width of 4 bytes, and the underlying type of an enum is the smallest type which can represent all of its values:

!llvm.module.flags = !{!0, !1}
!0 = !{i32 1, !"short_wchar", i32 1}
!1 = !{i32 1, !"short_enum", i32 0}

Stack Alignment Metadata

Changes the default stack alignment from the target ABI’s implicit default stack alignment. Takes an i32 value in bytes. It is considered an error to link two modules together with different values for this metadata.

For example:

!llvm.module.flags = !{!0} !0 = !{i32 1, !”override-stack-alignment”, i32 8}

This will change the stack alignment to 8B.

Embedded Objects Names Metadata

Offloading compilations need to embed device code into the host section table to create a fat binary. This metadata node references each global that will be embedded in the module. The primary use for this is to make referencing these globals more efficient in the IR. The metadata references nodes containing pointers to the global to be embedded followed by the section name it will be stored at:

!llvm.embedded.objects = !{!0}
!0 = !{ptr @object, !".section"}

Automatic Linker Flags Named Metadata

Some targets support embedding of flags to the linker inside individual object files. Typically this is used in conjunction with language extensions which allow source files to contain linker command line options, and have these automatically be transmitted to the linker via object files.

These flags are encoded in the IR using named metadata with the name !llvm.linker.options. Each operand is expected to be a metadata node which should be a list of other metadata nodes, each of which should be a list of metadata strings defining linker options.

For example, the following metadata section specifies two separate sets of linker options, presumably to link against libz and the Cocoa framework:

!0 = !{ !"-lz" }
!1 = !{ !"-framework", !"Cocoa" }
!llvm.linker.options = !{ !0, !1 }

The metadata encoding as lists of lists of options, as opposed to a collapsed list of options, is chosen so that the IR encoding can use multiple option strings to specify e.g., a single library, while still having that specifier be preserved as an atomic element that can be recognized by a target specific assembly writer or object file emitter.

Each individual option is required to be either a valid option for the target’s linker, or an option that is reserved by the target specific assembly writer or object file emitter. No other aspect of these options is defined by the IR.

Dependent Libs Named Metadata

Some targets support embedding of strings into object files to indicate a set of libraries to add to the link. Typically this is used in conjunction with language extensions which allow source files to explicitly declare the libraries they depend on, and have these automatically be transmitted to the linker via object files.

The list is encoded in the IR using named metadata with the name !llvm.dependent-libraries. Each operand is expected to be a metadata node which should contain a single string operand.

For example, the following metadata section contains two library specifiers:

!0 = !{!"a library specifier"}
!1 = !{!"another library specifier"}
!llvm.dependent-libraries = !{ !0, !1 }

Each library specifier will be handled independently by the consuming linker. The effect of the library specifiers are defined by the consuming linker.

ThinLTO Summary

Compiling with ThinLTO causes the building of a compact summary of the module that is emitted into the bitcode. The summary is emitted into the LLVM assembly and identified in syntax by a caret (’^’).

The summary is parsed into a bitcode output, along with the Module IR, via the “llvm-as” tool. Tools that parse the Module IR for the purposes of optimization (e.g. “clang -x ir” and “opt”), will ignore the summary entries (just as they currently ignore summary entries in a bitcode input file).

Eventually, the summary will be parsed into a ModuleSummaryIndex object under the same conditions where summary index is currently built from bitcode. Specifically, tools that test the Thin Link portion of a ThinLTO compile (i.e. llvm-lto and llvm-lto2), or when parsing a combined index for a distributed ThinLTO backend via clang’s “-fthinlto-index=<>” flag (this part is not yet implemented, use llvm-as to create a bitcode object before feeding into thin link tools for now).

There are currently 3 types of summary entries in the LLVM assembly: module paths, global values, and type identifiers.

Module Path Summary Entry

Each module path summary entry lists a module containing global values included in the summary. For a single IR module there will be one such entry, but in a combined summary index produced during the thin link, there will be one module path entry per linked module with summary.

Example:

^0 = module: (path: "/path/to/file.o", hash: (2468601609, 1329373163, 1565878005, 638838075, 3148790418))

The path field is a string path to the bitcode file, and the hash field is the 160-bit SHA-1 hash of the IR bitcode contents, used for incremental builds and caching.

Global Value Summary Entry

Each global value summary entry corresponds to a global value defined or referenced by a summarized module.

Example:

^4 = gv: (name: "f"[, summaries: (Summary)[, (Summary)]*]?) ; guid = 14740650423002898831

For declarations, there will not be a summary list. For definitions, a global value will contain a list of summaries, one per module containing a definition. There can be multiple entries in a combined summary index for symbols with weak linkage.

Each Summary format will depend on whether the global value is a function, variable, or alias.

Function Summary

If the global value is a function, the Summary entry will look like:

function: (module: ^0, flags: (linkage: external, notEligibleToImport: 0, live: 0, dsoLocal: 0), insts: 2[, FuncFlags]?[, Calls]?[, TypeIdInfo]?[, Params]?[, Refs]?

The module field includes the summary entry id for the module containing this definition, and the flags field contains information such as the linkage type, a flag indicating whether it is legal to import the definition, whether it is globally live and whether the linker resolved it to a local definition (the latter two are populated during the thin link). The insts field contains the number of IR instructions in the function. Finally, there are several optional fields: FuncFlags, Calls, TypeIdInfo, Params, Refs.

Global Variable Summary

If the global value is a variable, the Summary entry will look like:

variable: (module: ^0, flags: (linkage: external, notEligibleToImport: 0, live: 0, dsoLocal: 0)[, Refs]?

The variable entry contains a subset of the fields in a function summary, see the descriptions there.

Alias Summary

If the global value is an alias, the Summary entry will look like:

alias: (module: ^0, flags: (linkage: external, notEligibleToImport: 0, live: 0, dsoLocal: 0), aliasee: ^2)

The module and flags fields are as described for a function summary. The aliasee field contains a reference to the global value summary entry of the aliasee.

Function Flags

The optional FuncFlags field looks like:

funcFlags: (readNone: 0, readOnly: 0, noRecurse: 0, returnDoesNotAlias: 0, noInline: 0, alwaysInline: 0, noUnwind: 1, mayThrow: 0, hasUnknownCall: 0)

If unspecified, flags are assumed to hold the conservative false value of 0.

Calls

The optional Calls field looks like:

calls: ((Callee)[, (Callee)]*)

where each Callee looks like:

callee: ^1[, hotness: None]?[, relbf: 0]?

The callee refers to the summary entry id of the callee. At most one of hotness (which can take the values Unknown, Cold, None, Hot, and Critical), and relbf (which holds the integer branch frequency relative to the entry frequency, scaled down by 2^8) may be specified. The defaults are Unknown and 0, respectively.

Params

The optional Params is used by StackSafety and looks like:

Params: ((Param)[, (Param)]*)

where each Param describes pointer parameter access inside of the function and looks like:

param: 4, offset: [0, 5][, calls: ((Callee)[, (Callee)]*)]?

where the first param is the number of the parameter it describes, offset is the inclusive range of offsets from the pointer parameter to bytes which can be accessed by the function. This range does not include accesses by function calls from calls list.

where each Callee describes how parameter is forwarded into other functions and looks like:

callee: ^3, param: 5, offset: [-3, 3]

The callee refers to the summary entry id of the callee, param is the number of the callee parameter which points into the callers parameter with offset known to be inside of the offset range. calls will be consumed and removed by thin link stage to update Param::offset so it covers all accesses possible by calls.

Pointer parameter without corresponding Param is considered unsafe and we assume that access with any offset is possible.

Example:

If we have the following function:

define i64 @foo(ptr %0, ptr %1, ptr %2, i8 %3) {
  store ptr %1, ptr @x
  %5 = getelementptr inbounds i8, ptr %2, i64 5
  %6 = load i8, ptr %5
  %7 = getelementptr inbounds i8, ptr %2, i8 %3
  tail call void @bar(i8 %3, ptr %7)
  %8 = load i64, ptr %0
  ret i64 %8
}

We can expect the record like this:

params: ((param: 0, offset: [0, 7]),(param: 2, offset: [5, 5], calls: ((callee: ^3, param: 1, offset: [-128, 127]))))

The function may access just 8 bytes of the parameter %0 . calls is empty, so the parameter is either not used for function calls or offset already covers all accesses from nested function calls. Parameter %1 escapes, so access is unknown. The function itself can access just a single byte of the parameter %2. Additional access is possible inside of the @bar or ^3. The function adds signed offset to the pointer and passes the result as the argument %1 into ^3. This record itself does not tell us how ^3 will access the parameter. Parameter %3 is not a pointer.

Refs

The optional Refs field looks like:

refs: ((Ref)[, (Ref)]*)

where each Ref contains a reference to the summary id of the referenced value (e.g. ^1).

TypeIdInfo

The optional TypeIdInfo field, used for Control Flow Integrity, looks like:

typeIdInfo: [(TypeTests)]?[, (TypeTestAssumeVCalls)]?[, (TypeCheckedLoadVCalls)]?[, (TypeTestAssumeConstVCalls)]?[, (TypeCheckedLoadConstVCalls)]?

These optional fields have the following forms:

TypeTests

typeTests: (TypeIdRef[, TypeIdRef]*)

Where each TypeIdRef refers to a type id by summary id or GUID.

TypeTestAssumeVCalls

typeTestAssumeVCalls: (VFuncId[, VFuncId]*)

Where each VFuncId has the format:

vFuncId: (TypeIdRef, offset: 16)

Where each TypeIdRef refers to a type id by summary id or GUID preceded by a guid: tag.

TypeCheckedLoadVCalls

typeCheckedLoadVCalls: (VFuncId[, VFuncId]*)

Where each VFuncId has the format described for TypeTestAssumeVCalls.

TypeTestAssumeConstVCalls

typeTestAssumeConstVCalls: (ConstVCall[, ConstVCall]*)

Where each ConstVCall has the format:

(VFuncId, args: (Arg[, Arg]*))

and where each VFuncId has the format described for TypeTestAssumeVCalls, and each Arg is an integer argument number.

TypeCheckedLoadConstVCalls

typeCheckedLoadConstVCalls: (ConstVCall[, ConstVCall]*)

Where each ConstVCall has the format described for TypeTestAssumeConstVCalls.

Type ID Summary Entry

Each type id summary entry corresponds to a type identifier resolution which is generated during the LTO link portion of the compile when building with Control Flow Integrity, so these are only present in a combined summary index.

Example:

^4 = typeid: (name: "_ZTS1A", summary: (typeTestRes: (kind: allOnes, sizeM1BitWidth: 7[, alignLog2: 0]?[, sizeM1: 0]?[, bitMask: 0]?[, inlineBits: 0]?)[, WpdResolutions]?)) ; guid = 7004155349499253778

The typeTestRes gives the type test resolution kind (which may be unsat, byteArray, inline, single, or allOnes), and the size-1 bit width. It is followed by optional flags, which default to 0, and an optional WpdResolutions (whole program devirtualization resolution) field that looks like:

wpdResolutions: ((offset: 0, WpdRes)[, (offset: 1, WpdRes)]*

where each entry is a mapping from the given byte offset to the whole-program devirtualization resolution WpdRes, that has one of the following formats:

wpdRes: (kind: branchFunnel)
wpdRes: (kind: singleImpl, singleImplName: "_ZN1A1nEi")
wpdRes: (kind: indir)

Additionally, each wpdRes has an optional resByArg field, which describes the resolutions for calls with all constant integer arguments:

resByArg: (ResByArg[, ResByArg]*)

where ResByArg is:

args: (Arg[, Arg]*), byArg: (kind: UniformRetVal[, info: 0][, byte: 0][, bit: 0])

Where the kind can be Indir, UniformRetVal, UniqueRetVal or VirtualConstProp. The info field is only used if the kind is UniformRetVal (indicates the uniform return value), or UniqueRetVal (holds the return value associated with the unique vtable (0 or 1)). The byte and bit fields are only used if the target does not support the use of absolute symbols to store constants.

Intrinsic Global Variables

LLVM has a number of “magic” global variables that contain data that affect code generation or other IR semantics. These are documented here. All globals of this sort should have a section specified as “llvm.metadata”. This section and all globals that start with “llvm.” are reserved for use by LLVM.

The ‘llvm.used’ Global Variable

The @llvm.used global is an array which has appending linkage. This array contains a list of pointers to named global variables, functions and aliases which may optionally have a pointer cast formed of bitcast or getelementptr. For example, a legal use of it is:

@X = global i8 4
@Y = global i32 123

@llvm.used = appending global [2 x ptr] [
   ptr @X,
   ptr @Y
], section "llvm.metadata"

If a symbol appears in the @llvm.used list, then the compiler, assembler, and linker are required to treat the symbol as if there is a reference to the symbol that it cannot see (which is why they have to be named). For example, if a variable has internal linkage and no references other than that from the @llvm.used list, it cannot be deleted. This is commonly used to represent references from inline asms and other things the compiler cannot “see”, and corresponds to “attribute((used))” in GNU C.

On some targets, the code generator must emit a directive to the assembler or object file to prevent the assembler and linker from removing the symbol.

The ‘llvm.compiler.used’ Global Variable

The @llvm.compiler.used directive is the same as the @llvm.used directive, except that it only prevents the compiler from touching the symbol. On targets that support it, this allows an intelligent linker to optimize references to the symbol without being impeded as it would be by @llvm.used.

This is a rare construct that should only be used in rare circumstances, and should not be exposed to source languages.

The ‘llvm.global_ctors’ Global Variable

%0 = type { i32, ptr, ptr }
@llvm.global_ctors = appending global [1 x %0] [%0 { i32 65535, ptr @ctor, ptr @data }]

The @llvm.global_ctors array contains a list of constructor functions, priorities, and an associated global or function. The functions referenced by this array will be called in ascending order of priority (i.e. lowest first) when the module is loaded. The order of functions with the same priority is not defined.

If the third field is non-null, and points to a global variable or function, the initializer function will only run if the associated data from the current module is not discarded. On ELF the referenced global variable or function must be in a comdat.

The ‘llvm.global_dtors’ Global Variable

%0 = type { i32, ptr, ptr }
@llvm.global_dtors = appending global [1 x %0] [%0 { i32 65535, ptr @dtor, ptr @data }]

The @llvm.global_dtors array contains a list of destructor functions, priorities, and an associated global or function. The functions referenced by this array will be called in descending order of priority (i.e. highest first) when the module is unloaded. The order of functions with the same priority is not defined.

If the third field is non-null, and points to a global variable or function, the destructor function will only run if the associated data from the current module is not discarded. On ELF the referenced global variable or function must be in a comdat.

Instruction Reference

The LLVM instruction set consists of several different classifications of instructions: terminator instructions, binary instructions, bitwise binary instructions, memory instructions, and other instructions. There are also debug records, which are not instructions themselves but are printed interleaved with instructions to describe changes in the state of the program’s debug information at each position in the program’s execution.

Terminator Instructions

As mentioned previously, every basic block in a program ends with a “Terminator” instruction, which indicates which block should be executed after the current block is finished. These terminator instructions typically yield a ‘void’ value: they produce control flow, not values (the one exception being the ‘invoke’ instruction).

The terminator instructions are: ‘ret’, ‘br’, ‘switch’, ‘indirectbr’, ‘invoke’, ‘callbr’ ‘resume’, ‘catchswitch’, ‘catchret’, ‘cleanupret’, and ‘unreachable’.

‘ret’ Instruction

Syntax:

ret <type> <value>       ; Return a value from a non-void function
ret void                 ; Return from void function

Overview:

The ‘ret’ instruction is used to return control flow (and optionally a value) from a function back to the caller.

There are two forms of the ‘ret’ instruction: one that returns a value and then causes control flow, and one that just causes control flow to occur.

Arguments:

The ‘ret’ instruction optionally accepts a single argument, the return value. The type of the return value must be a ‘first class’ type.

A function is not well formed if it has a non-void return type and contains a ‘ret’ instruction with no return value or a return value with a type that does not match its type, or if it has a void return type and contains a ‘ret’ instruction with a return value.

Semantics:

When the ‘ret’ instruction is executed, control flow returns back to the calling function’s context. If the caller is a “call” instruction, execution continues at the instruction after the call. If the caller was an “invoke” instruction, execution continues at the beginning of the “normal” destination block. If the instruction returns a value, that value shall set the call or invoke instruction’s return value.

Example:

ret i32 5                       ; Return an integer value of 5
ret void                        ; Return from a void function
ret { i32, i8 } { i32 4, i8 2 } ; Return a struct of values 4 and 2

‘br’ Instruction

Syntax:

br i1 <cond>, label <iftrue>, label <iffalse>
br label <dest>          ; Unconditional branch

Overview:

The ‘br’ instruction is used to cause control flow to transfer to a different basic block in the current function. There are two forms of this instruction, corresponding to a conditional branch and an unconditional branch.

Arguments:

The conditional branch form of the ‘br’ instruction takes a single ‘i1’ value and two ‘label’ values. The unconditional form of the ‘br’ instruction takes a single ‘label’ value as a target.

Semantics:

Upon execution of a conditional ‘br’ instruction, the ‘i1’ argument is evaluated. If the value is true, control flows to the ‘iftrue’ label argument. If “cond” is false, control flows to the ‘iffalse’ label argument. If ‘cond’ is poison or undef, this instruction has undefined behavior.

Example:

Test:
  %cond = icmp eq i32 %a, %b
  br i1 %cond, label %IfEqual, label %IfUnequal
IfEqual:
  ret i32 1
IfUnequal:
  ret i32 0

‘switch’ Instruction

Syntax:

switch <intty> <value>, label <defaultdest> [ <intty> <val>, label <dest> ... ]

Overview:

The ‘switch’ instruction is used to transfer control flow to one of several different places. It is a generalization of the ‘br’ instruction, allowing a branch to occur to one of many possible destinations.

Arguments:

The ‘switch’ instruction uses three parameters: an integer comparison value ‘value’, a default ‘label’ destination, and an array of pairs of comparison value constants and ‘label’s. The table is not allowed to contain duplicate constant entries.

Semantics:

The switch instruction specifies a table of values and destinations. When the ‘switch’ instruction is executed, this table is searched for the given value. If the value is found, control flow is transferred to the corresponding destination; otherwise, control flow is transferred to the default destination. If ‘value’ is poison or undef, this instruction has undefined behavior.

Implementation:

Depending on properties of the target machine and the particular switch instruction, this instruction may be code generated in different ways. For example, it could be generated as a series of chained conditional branches or with a lookup table.

Example:

; Emulate a conditional br instruction
%Val = zext i1 %value to i32
switch i32 %Val, label %truedest [ i32 0, label %falsedest ]

; Emulate an unconditional br instruction
switch i32 0, label %dest [ ]

; Implement a jump table:
switch i32 %val, label %otherwise [ i32 0, label %onzero
                                    i32 1, label %onone
                                    i32 2, label %ontwo ]

‘indirectbr’ Instruction

Syntax:

indirectbr ptr <address>, [ label <dest1>, label <dest2>, ... ]

Overview:

The ‘indirectbr’ instruction implements an indirect branch to a label within the current function, whose address is specified by “address”. Address must be derived from a blockaddress constant.

Arguments:

The ‘address’ argument is the address of the label to jump to. The rest of the arguments indicate the full set of possible destinations that the address may point to. Blocks are allowed to occur multiple times in the destination list, though this isn’t particularly useful.

This destination list is required so that dataflow analysis has an accurate understanding of the CFG.

Semantics:

Control transfers to the block specified in the address argument. All possible destination blocks must be listed in the label list, otherwise this instruction has undefined behavior. This implies that jumps to labels defined in other functions have undefined behavior as well. If ‘address’ is poison or undef, this instruction has undefined behavior.

Implementation:

This is typically implemented with a jump through a register.

Example:

indirectbr ptr %Addr, [ label %bb1, label %bb2, label %bb3 ]

‘invoke’ Instruction

Syntax:

<result> = invoke [cconv] [ret attrs] [addrspace(<num>)] <ty>|<fnty> <fnptrval>(<function args>) [fn attrs]
              [operand bundles] to label <normal label> unwind label <exception label>

Overview:

The ‘invoke’ instruction causes control to transfer to a specified function, with the possibility of control flow transfer to either the ‘normal’ label or the ‘exception’ label. If the callee function returns with the “ret” instruction, control flow will return to the “normal” label. If the callee (or any indirect callees) returns via the “resume” instruction or other exception handling mechanism, control is interrupted and continued at the dynamically nearest “exception” label.

The ‘exception’ label is a landing pad for the exception. As such, ‘exception’ label is required to have the “landingpad” instruction, which contains the information about the behavior of the program after unwinding happens, as its first non-PHI instruction. The restrictions on the “landingpad” instruction’s tightly couples it to the “invoke” instruction, so that the important information contained within the “landingpad” instruction can’t be lost through normal code motion.

Arguments:

This instruction requires several arguments:

1. The optional “cconv” marker indicates which calling convention the call should use. If none is specified, the call defaults to using C calling conventions.

2. The optional Parameter Attributes list for return values. Only ‘zeroext’, ‘signext’, ‘noext’, and ‘inreg’ attributes are valid here.

3. The optional addrspace attribute can be used to indicate the address space of the called function. If it is not specified, the program address space from the datalayout string will be used.

4. ‘ty’: the type of the call instruction itself which is also the type of the return value. Functions that return no value are marked void.

5. ‘fnty’: shall be the signature of the function being invoked. The argument types must match the types implied by this signature. This type can be omitted if the function is not varargs.

6. ‘fnptrval’: An LLVM value containing a pointer to a function to be invoked. In most cases, this is a direct function invocation, but indirect invoke’s are just as possible, calling an arbitrary pointer to function value.

7. ‘function args’: argument list whose types match the function signature argument types and parameter attributes. All arguments must be of first class type. If the function signature indicates the function accepts a variable number of arguments, the extra arguments can be specified.

8. ‘normal label’: the label reached when the called function executes a ‘ret’ instruction.

9. ‘exception label’: the label reached when a callee returns via the resume instruction or other exception handling mechanism.

10. The optional function attributes list.

11. The optional operand bundles list.

Semantics:

This instruction is designed to operate as a standard ‘call’ instruction in most regards. The primary difference is that it establishes an association with a label, which is used by the runtime library to unwind the stack.

This instruction is used in languages with destructors to ensure that proper cleanup is performed in the case of either a longjmp or a thrown exception. Additionally, this is important for implementation of ‘catch’ clauses in high-level languages that support them.

For the purposes of the SSA form, the definition of the value returned by the ‘invoke’ instruction is deemed to occur on the edge from the current block to the “normal” label. If the callee unwinds then no return value is available.

Example:

%retval = invoke i32 @Test(i32 15) to label %Continue
            unwind label %TestCleanup              ; i32:retval set
%retval = invoke coldcc i32 %Testfnptr(i32 15) to label %Continue
            unwind label %TestCleanup              ; i32:retval set

‘callbr’ Instruction

Syntax:

<result> = callbr [cconv] [ret attrs] [addrspace(<num>)] <ty>|<fnty> <fnptrval>(<function args>) [fn attrs]
              [operand bundles] to label <fallthrough label> [indirect labels]

Overview:

The ‘callbr’ instruction causes control to transfer to a specified function, with the possibility of control flow transfer to either the ‘fallthrough’ label or one of the ‘indirect’ labels.

This instruction should only be used to implement the “goto” feature of gcc style inline assembly. Any other usage is an error in the IR verifier.

Note that in order to support outputs along indirect edges, LLVM may need to split critical edges, which may require synthesizing a replacement block for the indirect labels. Therefore, the address of a label as seen by another callbr instruction, or for a blockaddress constant, may not be equal to the address provided for the same block to this instruction’s indirect labels operand. The assembly code may only transfer control to addresses provided via this instruction’s indirect labels.

Arguments:

This instruction requires several arguments:

1. The optional “cconv” marker indicates which calling convention the call should use. If none is specified, the call defaults to using C calling conventions.

2. The optional Parameter Attributes list for return values. Only ‘zeroext’, ‘signext’, ‘noext’, and ‘inreg’ attributes are valid here.

3. The optional addrspace attribute can be used to indicate the address space of the called function. If it is not specified, the program address space from the datalayout string will be used.

4. ‘ty’: the type of the call instruction itself which is also the type of the return value. Functions that return no value are marked void.

5. ‘fnty’: shall be the signature of the function being called. The argument types must match the types implied by this signature. This type can be omitted if the function is not varargs.

6. ‘fnptrval’: An LLVM value containing a pointer to a function to be called. In most cases, this is a direct function call, but other callbr’s are just as possible, calling an arbitrary pointer to function value.

7. ‘function args’: argument list whose types match the function signature argument types and parameter attributes. All arguments must be of first class type. If the function signature indicates the function accepts a variable number of arguments, the extra arguments can be specified.

8. ‘fallthrough label’: the label reached when the inline assembly’s execution exits the bottom.

9. ‘indirect labels’: the labels reached when a callee transfers control to a location other than the ‘fallthrough label’. Label constraints refer to these destinations.

10. The optional function attributes list.

11. The optional operand bundles list.

Semantics:

This instruction is designed to operate as a standard ‘call’ instruction in most regards. The primary difference is that it establishes an association with additional labels to define where control flow goes after the call.

The output values of a ‘callbr’ instruction are available both in the the ‘fallthrough’ block, and any ‘indirect’ blocks(s).

The only use of this today is to implement the “goto” feature of gcc inline assembly where additional labels can be provided as locations for the inline assembly to jump to.

Example:

; "asm goto" without output constraints.
callbr void asm "", "r,!i"(i32 %x)
            to label %fallthrough [label %indirect]

; "asm goto" with output constraints.
<result> = callbr i32 asm "", "=r,r,!i"(i32 %x)
            to label %fallthrough [label %indirect]

‘resume’ Instruction

Syntax:

resume <type> <value>

Overview:

The ‘resume’ instruction is a terminator instruction that has no successors.

Arguments:

The ‘resume’ instruction requires one argument, which must have the same type as the result of any ‘landingpad’ instruction in the same function.

Semantics:

The ‘resume’ instruction resumes propagation of an existing (in-flight) exception whose unwinding was interrupted with a landingpad instruction.

Example:

resume { ptr, i32 } %exn

‘catchswitch’ Instruction

Syntax:

<resultval> = catchswitch within <parent> [ label <handler1>, label <handler2>, ... ] unwind to caller
<resultval> = catchswitch within <parent> [ label <handler1>, label <handler2>, ... ] unwind label <default>

Overview:

The ‘catchswitch’ instruction is used by LLVM’s exception handling system to describe the set of possible catch handlers that may be executed by the EH personality routine.

Arguments:

The parent argument is the token of the funclet that contains the catchswitch instruction. If the catchswitch is not inside a funclet, this operand may be the token none.

The default argument is the label of another basic block beginning with either a cleanuppad or catchswitch instruction. This unwind destination must be a legal target with respect to the parent links, as described in the exception handling documentation.

The handlers are a nonempty list of successor blocks that each begin with a catchpad instruction.

Semantics:

Executing this instruction transfers control to one of the successors in handlers, if appropriate, or continues to unwind via the unwind label if present.

The catchswitch is both a terminator and a “pad” instruction, meaning that it must be both the first non-phi instruction and last instruction in the basic block. Therefore, it must be the only non-phi instruction in the block.

Example:

dispatch1:
  %cs1 = catchswitch within none [label %handler0, label %handler1] unwind to caller
dispatch2:
  %cs2 = catchswitch within %parenthandler [label %handler0] unwind label %cleanup

‘catchret’ Instruction

Syntax:

catchret from <token> to label <normal>

Overview:

The ‘catchret’ instruction is a terminator instruction that has a single successor.

Arguments:

The first argument to a ‘catchret’ indicates which catchpad it exits. It must be a catchpad. The second argument to a ‘catchret’ specifies where control will transfer to next.

Semantics:

The ‘catchret’ instruction ends an existing (in-flight) exception whose unwinding was interrupted with a catchpad instruction. The personality function gets a chance to execute arbitrary code to, for example, destroy the active exception. Control then transfers to normal.

The token argument must be a token produced by a catchpad instruction. If the specified catchpad is not the most-recently-entered not-yet-exited funclet pad (as described in the EH documentation), the catchret’s behavior is undefined.

Example:

catchret from %catch to label %continue

‘cleanupret’ Instruction

Syntax:

cleanupret from <value> unwind label <continue>
cleanupret from <value> unwind to caller

Overview:

The ‘cleanupret’ instruction is a terminator instruction that has an optional successor.

Arguments:

The ‘cleanupret’ instruction requires one argument, which indicates which cleanuppad it exits, and must be a cleanuppad. If the specified cleanuppad is not the most-recently-entered not-yet-exited funclet pad (as described in the EH documentation), the cleanupret’s behavior is undefined.

The ‘cleanupret’ instruction also has an optional successor, continue, which must be the label of another basic block beginning with either a cleanuppad or catchswitch instruction. This unwind destination must be a legal target with respect to the parent links, as described in the exception handling documentation.

Semantics:

The ‘cleanupret’ instruction indicates to the personality function that one cleanuppad it transferred control to has ended. It transfers control to continue or unwinds out of the function.

Example:

cleanupret from %cleanup unwind to caller
cleanupret from %cleanup unwind label %continue

‘unreachable’ Instruction

Syntax:

unreachable

Overview:

The ‘unreachable’ instruction has no defined semantics. This instruction is used to inform the optimizer that a particular portion of the code is not reachable. This can be used to indicate that the code after a no-return function cannot be reached, and other facts.

Semantics:

The ‘unreachable’ instruction has no defined semantics.

Unary Operations

Unary operators require a single operand, execute an operation on it, and produce a single value. The operand might represent multiple data, as is the case with the vector data type. The result value has the same type as its operand.

‘fneg’ Instruction

Syntax:

<result> = fneg [fast-math flags]* <ty> <op1>   ; yields ty:result

Overview:

The ‘fneg’ instruction returns the negation of its operand.

Arguments:

The argument to the ‘fneg’ instruction must be a floating-point or vector of floating-point values.

Semantics:

The value produced is a copy of the operand with its sign bit flipped. The value is otherwise completely identical; in particular, if the input is a NaN, then the quiet/signaling bit and payload are perfectly preserved.

This instruction can also take any number of fast-math flags, which are optimization hints to enable otherwise unsafe floating-point optimizations:

Example:

<result> = fneg float %val          ; yields float:result = -%var

Binary Operations

Binary operators are used to do most of the computation in a program. They require two operands of the same type, execute an operation on them, and produce a single value. The operands might represent multiple data, as is the case with the vector data type. The result value has the same type as its operands.

There are several different binary operators:

‘add’ Instruction

Syntax:

<result> = add <ty> <op1>, <op2>          ; yields ty:result
<result> = add nuw <ty> <op1>, <op2>      ; yields ty:result
<result> = add nsw <ty> <op1>, <op2>      ; yields ty:result
<result> = add nuw nsw <ty> <op1>, <op2>  ; yields ty:result

Overview:

The ‘add’ instruction returns the sum of its two operands.

Arguments:

The two arguments to the ‘add’ instruction must be integer or vector of integer values. Both arguments must have identical types.

Semantics:

The value produced is the integer sum of the two operands.

If the sum has unsigned overflow, the result returned is the mathematical result modulo 2ⁿ, where n is the bit width of the result.

Because LLVM integers use a two’s complement representation, this instruction is appropriate for both signed and unsigned integers.

nuw and nsw stand for “No Unsigned Wrap” and “No Signed Wrap”, respectively. If the nuw and/or nsw keywords are present, the result value of the add is a poison value if unsigned and/or signed overflow, respectively, occurs.

Example:

<result> = add i32 4, %var          ; yields i32:result = 4 + %var

‘fadd’ Instruction

Syntax:

<result> = fadd [fast-math flags]* <ty> <op1>, <op2>   ; yields ty:result

Overview:

The ‘fadd’ instruction returns the sum of its two operands.

Arguments:

The two arguments to the ‘fadd’ instruction must be floating-point or vector of floating-point values. Both arguments must have identical types.

Semantics:

The value produced is the floating-point sum of the two operands. This instruction is assumed to execute in the default floating-point environment. This instruction can also take any number of fast-math flags, which are optimization hints to enable otherwise unsafe floating-point optimizations:

Example:

<result> = fadd float 4.0, %var          ; yields float:result = 4.0 + %var

‘sub’ Instruction

Syntax:

<result> = sub <ty> <op1>, <op2>          ; yields ty:result
<result> = sub nuw <ty> <op1>, <op2>      ; yields ty:result
<result> = sub nsw <ty> <op1>, <op2>      ; yields ty:result
<result> = sub nuw nsw <ty> <op1>, <op2>  ; yields ty:result

Overview:

The ‘sub’ instruction returns the difference of its two operands.

Note that the ‘sub’ instruction is used to represent the ‘neg’ instruction present in most other intermediate representations.

Arguments:

The two arguments to the ‘sub’ instruction must be integer or vector of integer values. Both arguments must have identical types.

Semantics:

The value produced is the integer difference of the two operands.

If the difference has unsigned overflow, the result returned is the mathematical result modulo 2ⁿ, where n is the bit width of the result.

Because LLVM integers use a two’s complement representation, this instruction is appropriate for both signed and unsigned integers.

nuw and nsw stand for “No Unsigned Wrap” and “No Signed Wrap”, respectively. If the nuw and/or nsw keywords are present, the result value of the sub is a poison value if unsigned and/or signed overflow, respectively, occurs.

Example:

<result> = sub i32 4, %var          ; yields i32:result = 4 - %var
<result> = sub i32 0, %val          ; yields i32:result = -%var

‘fsub’ Instruction

Syntax:

<result> = fsub [fast-math flags]* <ty> <op1>, <op2>   ; yields ty:result

Overview:

The ‘fsub’ instruction returns the difference of its two operands.

Arguments:

The two arguments to the ‘fsub’ instruction must be floating-point or vector of floating-point values. Both arguments must have identical types.

Semantics:

The value produced is the floating-point difference of the two operands. This instruction is assumed to execute in the default floating-point environment. This instruction can also take any number of fast-math flags, which are optimization hints to enable otherwise unsafe floating-point optimizations:

Example:

<result> = fsub float 4.0, %var           ; yields float:result = 4.0 - %var
<result> = fsub float -0.0, %val          ; yields float:result = -%var

‘mul’ Instruction

Syntax:

<result> = mul <ty> <op1>, <op2>          ; yields ty:result
<result> = mul nuw <ty> <op1>, <op2>      ; yields ty:result
<result> = mul nsw <ty> <op1>, <op2>      ; yields ty:result
<result> = mul nuw nsw <ty> <op1>, <op2>  ; yields ty:result

Overview:

The ‘mul’ instruction returns the product of its two operands.

Arguments:

The two arguments to the ‘mul’ instruction must be integer or vector of integer values. Both arguments must have identical types.

Semantics:

The value produced is the integer product of the two operands.

If the result of the multiplication has unsigned overflow, the result returned is the mathematical result modulo 2ⁿ, where n is the bit width of the result.

Because LLVM integers use a two’s complement representation, and the result is the same width as the operands, this instruction returns the correct result for both signed and unsigned integers. If a full product (e.g. i32 * i32 -> i64) is needed, the operands should be sign-extended or zero-extended as appropriate to the width of the full product.

nuw and nsw stand for “No Unsigned Wrap” and “No Signed Wrap”, respectively. If the nuw and/or nsw keywords are present, the result value of the mul is a poison value if unsigned and/or signed overflow, respectively, occurs.

Example:

<result> = mul i32 4, %var          ; yields i32:result = 4 * %var

‘fmul’ Instruction

Syntax:

<result> = fmul [fast-math flags]* <ty> <op1>, <op2>   ; yields ty:result

Overview:

The ‘fmul’ instruction returns the product of its two operands.

Arguments:

The two arguments to the ‘fmul’ instruction must be floating-point or vector of floating-point values. Both arguments must have identical types.

Semantics:

The value produced is the floating-point product of the two operands. This instruction is assumed to execute in the default floating-point environment. This instruction can also take any number of fast-math flags, which are optimization hints to enable otherwise unsafe floating-point optimizations:

Example:

<result> = fmul float 4.0, %var          ; yields float:result = 4.0 * %var

‘udiv’ Instruction

Syntax:

<result> = udiv <ty> <op1>, <op2>         ; yields ty:result
<result> = udiv exact <ty> <op1>, <op2>   ; yields ty:result

Overview:

The ‘udiv’ instruction returns the quotient of its two operands.

Arguments:

The two arguments to the ‘udiv’ instruction must be integer or vector of integer values. Both arguments must have identical types.

Semantics:

The value produced is the unsigned integer quotient of the two operands.

Note that unsigned integer division and signed integer division are distinct operations; for signed integer division, use ‘sdiv’.

Division by zero is undefined behavior. For vectors, if any element of the divisor is zero, the operation has undefined behavior.

If the exact keyword is present, the result value of the udiv is a poison value if %op1 is not a multiple of %op2 (as such, “((a udiv exact b) mul b) == a”).

Example:

<result> = udiv i32 4, %var          ; yields i32:result = 4 / %var

‘sdiv’ Instruction

Syntax:

<result> = sdiv <ty> <op1>, <op2>         ; yields ty:result
<result> = sdiv exact <ty> <op1>, <op2>   ; yields ty:result

Overview:

The ‘sdiv’ instruction returns the quotient of its two operands.

Arguments:

The two arguments to the ‘sdiv’ instruction must be integer or vector of integer values. Both arguments must have identical types.

Semantics:

The value produced is the signed integer quotient of the two operands rounded towards zero.

Note that signed integer division and unsigned integer division are distinct operations; for unsigned integer division, use ‘udiv’.

Division by zero is undefined behavior. For vectors, if any element of the divisor is zero, the operation has undefined behavior. Overflow also leads to undefined behavior; this is a rare case, but can occur, for example, by doing a 32-bit division of -2147483648 by -1.

If the exact keyword is present, the result value of the sdiv is a poison value if the result would be rounded.

Example:

<result> = sdiv i32 4, %var          ; yields i32:result = 4 / %var

‘fdiv’ Instruction

Syntax:

<result> = fdiv [fast-math flags]* <ty> <op1>, <op2>   ; yields ty:result

Overview:

The ‘fdiv’ instruction returns the quotient of its two operands.

Arguments:

The two arguments to the ‘fdiv’ instruction must be floating-point or vector of floating-point values. Both arguments must have identical types.

Semantics:

The value produced is the floating-point quotient of the two operands. This instruction is assumed to execute in the default floating-point environment. This instruction can also take any number of fast-math flags, which are optimization hints to enable otherwise unsafe floating-point optimizations:

Example:

<result> = fdiv float 4.0, %var          ; yields float:result = 4.0 / %var

‘urem’ Instruction

Syntax:

<result> = urem <ty> <op1>, <op2>   ; yields ty:result

Overview:

The ‘urem’ instruction returns the remainder from the unsigned division of its two arguments.

Arguments:

The two arguments to the ‘urem’ instruction must be integer or vector of integer values. Both arguments must have identical types.

Semantics:

This instruction returns the unsigned integer remainder of a division. This instruction always performs an unsigned division to get the remainder.

Note that unsigned integer remainder and signed integer remainder are distinct operations; for signed integer remainder, use ‘srem’.

Taking the remainder of a division by zero is undefined behavior. For vectors, if any element of the divisor is zero, the operation has undefined behavior.

Example:

<result> = urem i32 4, %var          ; yields i32:result = 4 % %var

‘srem’ Instruction

Syntax:

<result> = srem <ty> <op1>, <op2>   ; yields ty:result

Overview:

The ‘srem’ instruction returns the remainder from the signed division of its two operands. This instruction can also take vector versions of the values in which case the elements must be integers.

Arguments:

The two arguments to the ‘srem’ instruction must be integer or vector of integer values. Both arguments must have identical types.

Semantics:

This instruction returns the remainder of a division (where the result is either zero or has the same sign as the dividend, op1), not the modulo operator (where the result is either zero or has the same sign as the divisor, op2) of a value. For more information about the difference, see The Math Forum. For a table of how this is implemented in various languages, please see Wikipedia: modulo operation.

Note that signed integer remainder and unsigned integer remainder are distinct operations; for unsigned integer remainder, use ‘urem’.

Taking the remainder of a division by zero is undefined behavior. For vectors, if any element of the divisor is zero, the operation has undefined behavior. Overflow also leads to undefined behavior; this is a rare case, but can occur, for example, by taking the remainder of a 32-bit division of -2147483648 by -1. (The remainder doesn’t actually overflow, but this rule lets srem be implemented using instructions that return both the result of the division and the remainder.)

Example:

<result> = srem i32 4, %var          ; yields i32:result = 4 % %var

‘frem’ Instruction

Syntax:

<result> = frem [fast-math flags]* <ty> <op1>, <op2>   ; yields ty:result

Overview:

The ‘frem’ instruction returns the remainder from the division of its two operands.

Note

The instruction is implemented as a call to libm’s ‘fmod’ for some targets, and using the instruction may thus require linking libm.

Arguments:

The two arguments to the ‘frem’ instruction must be floating-point or vector of floating-point values. Both arguments must have identical types.

Semantics:

The value produced is the floating-point remainder of the two operands. This is the same output as a libm ‘fmod’ function, but without any possibility of setting errno. The remainder has the same sign as the dividend. This instruction is assumed to execute in the default floating-point environment. This instruction can also take any number of fast-math flags, which are optimization hints to enable otherwise unsafe floating-point optimizations:

Example:

<result> = frem float 4.0, %var          ; yields float:result = 4.0 % %var

Bitwise Binary Operations

Bitwise binary operators are used to do various forms of bit-twiddling in a program. They are generally very efficient instructions and can commonly be strength reduced from other instructions. They require two operands of the same type, execute an operation on them, and produce a single value. The resulting value is the same type as its operands.

‘shl’ Instruction

Syntax:

<result> = shl <ty> <op1>, <op2>           ; yields ty:result
<result> = shl nuw <ty> <op1>, <op2>       ; yields ty:result
<result> = shl nsw <ty> <op1>, <op2>       ; yields ty:result
<result> = shl nuw nsw <ty> <op1>, <op2>   ; yields ty:result

Overview:

The ‘shl’ instruction returns the first operand shifted to the left a specified number of bits.

Arguments:

Both arguments to the ‘shl’ instruction must be the same integer or vector of integer type. ‘op2’ is treated as an unsigned value.

Semantics:

The value produced is op1 * 2^op2 mod 2ⁿ, where n is the width of the result. If op2 is (statically or dynamically) equal to or larger than the number of bits in op1, this instruction returns a poison value. If the arguments are vectors, each vector element of op1 is shifted by the corresponding shift amount in op2.

If the nuw keyword is present, then the shift produces a poison value if it shifts out any non-zero bits. If the nsw keyword is present, then the shift produces a poison value if it shifts out any bits that disagree with the resultant sign bit.

Example:

<result> = shl i32 4, %var   ; yields i32: 4 << %var
<result> = shl i32 4, 2      ; yields i32: 16
<result> = shl i32 1, 10     ; yields i32: 1024
<result> = shl i32 1, 32     ; undefined
<result> = shl <2 x i32> < i32 1, i32 1>, < i32 1, i32 2>   ; yields: result=<2 x i32> < i32 2, i32 4>

‘lshr’ Instruction

Syntax:

<result> = lshr <ty> <op1>, <op2>         ; yields ty:result
<result> = lshr exact <ty> <op1>, <op2>   ; yields ty:result

Overview:

The ‘lshr’ instruction (logical shift right) returns the first operand shifted to the right a specified number of bits with zero fill.

Arguments:

Both arguments to the ‘lshr’ instruction must be the same integer or vector of integer type. ‘op2’ is treated as an unsigned value.

Semantics:

This instruction always performs a logical shift right operation. The most significant bits of the result will be filled with zero bits after the shift. If op2 is (statically or dynamically) equal to or larger than the number of bits in op1, this instruction returns a poison value. If the arguments are vectors, each vector element of op1 is shifted by the corresponding shift amount in op2.

If the exact keyword is present, the result value of the lshr is a poison value if any of the bits shifted out are non-zero.

Example:

<result> = lshr i32 4, 1   ; yields i32:result = 2
<result> = lshr i32 4, 2   ; yields i32:result = 1
<result> = lshr i8  4, 3   ; yields i8:result = 0
<result> = lshr i8 -2, 1   ; yields i8:result = 0x7F
<result> = lshr i32 1, 32  ; undefined
<result> = lshr <2 x i32> < i32 -2, i32 4>, < i32 1, i32 2>   ; yields: result=<2 x i32> < i32 0x7FFFFFFF, i32 1>

‘ashr’ Instruction

Syntax:

<result> = ashr <ty> <op1>, <op2>         ; yields ty:result
<result> = ashr exact <ty> <op1>, <op2>   ; yields ty:result

Overview:

The ‘ashr’ instruction (arithmetic shift right) returns the first operand shifted to the right a specified number of bits with sign extension.

Arguments:

Both arguments to the ‘ashr’ instruction must be the same integer or vector of integer type. ‘op2’ is treated as an unsigned value.

Semantics:

This instruction always performs an arithmetic shift right operation, The most significant bits of the result will be filled with the sign bit of op1. If op2 is (statically or dynamically) equal to or larger than the number of bits in op1, this instruction returns a poison value. If the arguments are vectors, each vector element of op1 is shifted by the corresponding shift amount in op2.

If the exact keyword is present, the result value of the ashr is a poison value if any of the bits shifted out are non-zero.

Example:

<result> = ashr i32 4, 1   ; yields i32:result = 2
<result> = ashr i32 4, 2   ; yields i32:result = 1
<result> = ashr i8  4, 3   ; yields i8:result = 0
<result> = ashr i8 -2, 1   ; yields i8:result = -1
<result> = ashr i32 1, 32  ; undefined
<result> = ashr <2 x i32> < i32 -2, i32 4>, < i32 1, i32 3>   ; yields: result=<2 x i32> < i32 -1, i32 0>

‘and’ Instruction

Syntax:

<result> = and <ty> <op1>, <op2>   ; yields ty:result

Overview:

The ‘and’ instruction returns the bitwise logical and of its two operands.

Arguments:

The two arguments to the ‘and’ instruction must be integer or vector of integer values. Both arguments must have identical types.

Semantics:

The truth table used for the ‘and’ instruction is:

In0	In1	Out
0	0	0
0	1	0
1	0	0
1	1	1

Example:

<result> = and i32 4, %var         ; yields i32:result = 4 & %var
<result> = and i32 15, 40          ; yields i32:result = 8
<result> = and i32 4, 8            ; yields i32:result = 0

‘or’ Instruction

Syntax:

<result> = or <ty> <op1>, <op2>   ; yields ty:result
<result> = or disjoint <ty> <op1>, <op2>   ; yields ty:result

Overview:

The ‘or’ instruction returns the bitwise logical inclusive or of its two operands.

Arguments:

The two arguments to the ‘or’ instruction must be integer or vector of integer values. Both arguments must have identical types.

Semantics:

The truth table used for the ‘or’ instruction is:

In0	In1	Out
0	0	0
0	1	1
1	0	1
1	1	1

disjoint means that for each bit, that bit is zero in at least one of the inputs. This allows the Or to be treated as an Add since no carry can occur from any bit. If the disjoint keyword is present, the result value of the or is a poison value if both inputs have a one in the same bit position. For vectors, only the element containing the bit is poison.

Example:

<result> = or i32 4, %var         ; yields i32:result = 4 | %var
<result> = or i32 15, 40          ; yields i32:result = 47
<result> = or i32 4, 8            ; yields i32:result = 12

‘xor’ Instruction

Syntax:

<result> = xor <ty> <op1>, <op2>   ; yields ty:result

Overview:

The ‘xor’ instruction returns the bitwise logical exclusive or of its two operands. The xor is used to implement the “one’s complement” operation, which is the “~” operator in C.

Arguments:

The two arguments to the ‘xor’ instruction must be integer or vector of integer values. Both arguments must have identical types.

Semantics:

The truth table used for the ‘xor’ instruction is:

In0	In1	Out
0	0	0
0	1	1
1	0	1
1	1	0

Example:

<result> = xor i32 4, %var         ; yields i32:result = 4 ^ %var
<result> = xor i32 15, 40          ; yields i32:result = 39
<result> = xor i32 4, 8            ; yields i32:result = 12
<result> = xor i32 %V, -1          ; yields i32:result = ~%V

Vector Operations

LLVM supports several instructions to represent vector operations in a target-independent manner. These instructions cover the element-access and vector-specific operations needed to process vectors effectively. While LLVM does directly support these vector operations, many sophisticated algorithms will want to use target-specific intrinsics to take full advantage of a specific target.

‘extractelement’ Instruction

Syntax:

<result> = extractelement <n x <ty>> <val>, <ty2> <idx>  ; yields <ty>
<result> = extractelement <vscale x n x <ty>> <val>, <ty2> <idx> ; yields <ty>

Overview:

The ‘extractelement’ instruction extracts a single scalar element from a vector at a specified index.

Arguments:

The first operand of an ‘extractelement’ instruction is a value of vector type. The second operand is an index indicating the position from which to extract the element. The index may be a variable of any integer type, and will be treated as an unsigned integer.

Semantics:

The result is a scalar of the same type as the element type of val. Its value is the value at position idx of val. If idx exceeds the length of val for a fixed-length vector, the result is a poison value. For a scalable vector, if the value of idx exceeds the runtime length of the vector, the result is a poison value.

Example:

<result> = extractelement <4 x i32> %vec, i32 0    ; yields i32

‘insertelement’ Instruction

Syntax:

<result> = insertelement <n x <ty>> <val>, <ty> <elt>, <ty2> <idx>    ; yields <n x <ty>>
<result> = insertelement <vscale x n x <ty>> <val>, <ty> <elt>, <ty2> <idx> ; yields <vscale x n x <ty>>

Overview:

The ‘insertelement’ instruction inserts a scalar element into a vector at a specified index.

Arguments:

The first operand of an ‘insertelement’ instruction is a value of vector type. The second operand is a scalar value whose type must equal the element type of the first operand. The third operand is an index indicating the position at which to insert the value. The index may be a variable of any integer type, and will be treated as an unsigned integer.

Semantics:

The result is a vector of the same type as val. Its element values are those of val except at position idx, where it gets the value elt. If idx exceeds the length of val for a fixed-length vector, the result is a poison value. For a scalable vector, if the value of idx exceeds the runtime length of the vector, the result is a poison value.

Example:

<result> = insertelement <4 x i32> %vec, i32 1, i32 0    ; yields <4 x i32>

‘shufflevector’ Instruction

Syntax:

<result> = shufflevector <n x <ty>> <v1>, <n x <ty>> <v2>, <m x i32> <mask>    ; yields <m x <ty>>
<result> = shufflevector <vscale x n x <ty>> <v1>, <vscale x n x <ty>> v2, <vscale x m x i32> <mask>  ; yields <vscale x m x <ty>>

Overview:

The ‘shufflevector’ instruction constructs a permutation of elements from two input vectors, returning a vector with the same element type as the input and length that is the same as the shuffle mask.

Arguments:

The first two operands of a ‘shufflevector’ instruction are vectors with the same type. The third argument is a shuffle mask vector constant whose element type is i32. The mask vector elements must be constant integers or poison values. The result of the instruction is a vector whose length is the same as the shuffle mask and whose element type is the same as the element type of the first two operands.

Semantics:

The elements of the two input vectors are numbered from left to right across both of the vectors. For each element of the result vector, the shuffle mask selects an element from one of the input vectors to copy to the result. Non-negative elements in the mask represent an index into the concatenated pair of input vectors.

A poison element in the mask vector specifies that the resulting element is poison. For backwards-compatibility reasons, LLVM temporarily also accepts undef mask elements, which will be interpreted the same way as poison elements. If the shuffle mask selects an undef element from one of the input vectors, the resulting element is undef.

For scalable vectors, the only valid mask values at present are zeroinitializer, undef and poison, since we cannot write all indices as literals for a vector with a length unknown at compile time.

Example:

<result> = shufflevector <4 x i32> %v1, <4 x i32> %v2,
                        <4 x i32> <i32 0, i32 4, i32 1, i32 5>  ; yields <4 x i32>
<result> = shufflevector <4 x i32> %v1, <4 x i32> poison,
                        <4 x i32> <i32 0, i32 1, i32 2, i32 3>  ; yields <4 x i32> - Identity shuffle.
<result> = shufflevector <8 x i32> %v1, <8 x i32> poison,
                        <4 x i32> <i32 0, i32 1, i32 2, i32 3>  ; yields <4 x i32>
<result> = shufflevector <4 x i32> %v1, <4 x i32> %v2,
                        <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7 >  ; yields <8 x i32>

Aggregate Operations

LLVM supports several instructions for working with aggregate values.

‘extractvalue’ Instruction

Syntax:

<result> = extractvalue <aggregate type> <val>, <idx>{, <idx>}*

Overview:

The ‘extractvalue’ instruction extracts the value of a member field from an aggregate value.

Arguments:

The first operand of an ‘extractvalue’ instruction is a value of struct or array type. The other operands are constant indices to specify which value to extract in a similar manner as indices in a ‘getelementptr’ instruction.

The major differences to getelementptr indexing are:

• Since the value being indexed is not a pointer, the first index is omitted and assumed to be zero.

• At least one index must be specified.

• Not only struct indices but also array indices must be in bounds.

Semantics:

The result is the value at the position in the aggregate specified by the index operands.

Example:

<result> = extractvalue {i32, float} %agg, 0    ; yields i32

‘insertvalue’ Instruction

Syntax:

<result> = insertvalue <aggregate type> <val>, <ty> <elt>, <idx>{, <idx>}*    ; yields <aggregate type>

Overview:

The ‘insertvalue’ instruction inserts a value into a member field in an aggregate value.

Arguments:

The first operand of an ‘insertvalue’ instruction is a value of struct or array type. The second operand is a first-class value to insert. The following operands are constant indices indicating the position at which to insert the value in a similar manner as indices in a ‘extractvalue’ instruction. The value to insert must have the same type as the value identified by the indices.

Semantics:

The result is an aggregate of the same type as val. Its value is that of val except that the value at the position specified by the indices is that of elt.

Example:

%agg1 = insertvalue {i32, float} poison, i32 1, 0              ; yields {i32 1, float poison}
%agg2 = insertvalue {i32, float} %agg1, float %val, 1          ; yields {i32 1, float %val}
%agg3 = insertvalue {i32, {float}} poison, float %val, 1, 0    ; yields {i32 poison, {float %val}}

Memory Access and Addressing Operations

A key design point of an SSA-based representation is how it represents memory. In LLVM, no memory locations are in SSA form, which makes things very simple. This section describes how to read, write, and allocate memory in LLVM.

‘alloca’ Instruction

Syntax:

<result> = alloca [inalloca] <type> [, <ty> <NumElements>] [, align <alignment>] [, addrspace(<num>)]     ; yields type addrspace(num)*:result

Overview:

The ‘alloca’ instruction allocates memory on the stack frame of the currently executing function, to be automatically released when this function returns to its caller. If the address space is not explicitly specified, the object is allocated in the alloca address space from the datalayout string.

Arguments:

The ‘alloca’ instruction allocates sizeof(<type>)*NumElements bytes of memory on the runtime stack, returning a pointer of the appropriate type to the program. If “NumElements” is specified, it is the number of elements allocated, otherwise “NumElements” is defaulted to be one.

If a constant alignment is specified, the value result of the allocation is guaranteed to be aligned to at least that boundary. The alignment may not be greater than 1 << 32.

The alignment is only optional when parsing textual IR; for in-memory IR, it is always present. If not specified, the target can choose to align the allocation on any convenient boundary compatible with the type.

‘type’ may be any sized type.

Structs containing scalable vectors cannot be used in allocas unless all fields are the same scalable vector type (e.g. {<vscale x 2 x i32>, <vscale x 2 x i32>} contains the same type while {<vscale x 2 x i32>, <vscale x 2 x i64>} doesn’t).

Semantics:

Memory is allocated; a pointer is returned. The allocated memory is uninitialized, and loading from uninitialized memory produces an undefined value. The operation itself is undefined if there is insufficient stack space for the allocation.’alloca’d memory is automatically released when the function returns. The ‘alloca’ instruction is commonly used to represent automatic variables that must have an address available. When the function returns (either with the ret or resume instructions), the memory is reclaimed. Allocating zero bytes is legal, but the returned pointer may not be unique. The order in which memory is allocated (ie., which way the stack grows) is not specified.

Note that ‘alloca’ outside of the alloca address space from the datalayout string is meaningful only if the target has assigned it a semantics.

If the returned pointer is used by llvm.lifetime.start, the returned object is initially dead. See llvm.lifetime.start and llvm.lifetime.end for the precise semantics of lifetime-manipulating intrinsics.

Example:

%ptr = alloca i32                             ; yields ptr
%ptr = alloca i32, i32 4                      ; yields ptr
%ptr = alloca i32, i32 4, align 1024          ; yields ptr
%ptr = alloca i32, align 1024                 ; yields ptr

‘load’ Instruction

Syntax:

<result> = load [volatile] <ty>, ptr <pointer>[, align <alignment>][, !nontemporal !<nontemp_node>][, !invariant.load !<empty_node>][, !invariant.group !<empty_node>][, !nonnull !<empty_node>][, !dereferenceable !<deref_bytes_node>][, !dereferenceable_or_null !<deref_bytes_node>][, !align !<align_node>][, !noundef !<empty_node>]
<result> = load atomic [volatile] <ty>, ptr <pointer> [syncscope("<target-scope>")] <ordering>, align <alignment> [, !invariant.group !<empty_node>]
!<nontemp_node> = !{ i32 1 }
!<empty_node> = !{}
!<deref_bytes_node> = !{ i64 <dereferenceable_bytes> }
!<align_node> = !{ i64 <value_alignment> }

Overview:

The ‘load’ instruction is used to read from memory.

Arguments:

The argument to the load instruction specifies the memory address from which to load. The type specified must be a first class type of known size (i.e. not containing an opaque structural type). If the load is marked as volatile, then the optimizer is not allowed to modify the number or order of execution of this load with other volatile operations.

If the load is marked as atomic, it takes an extra ordering and optional syncscope("<target-scope>") argument. The release and acq_rel orderings are not valid on load instructions. Atomic loads produce defined results when they may see multiple atomic stores. The type of the pointee must be an integer, pointer, or floating-point type whose bit width is a power of two greater than or equal to eight and less than or equal to a target-specific size limit. align must be explicitly specified on atomic loads. Note: if the alignment is not greater or equal to the size of the <value> type, the atomic operation is likely to require a lock and have poor performance. !nontemporal does not have any defined semantics for atomic loads.

The optional constant align argument specifies the alignment of the operation (that is, the alignment of the memory address). It is the responsibility of the code emitter to ensure that the alignment information is correct. Overestimating the alignment results in undefined behavior. Underestimating the alignment may produce less efficient code. An alignment of 1 is always safe. The maximum possible alignment is 1 << 32. An alignment value higher than the size of the loaded type implies memory up to the alignment value bytes can be safely loaded without trapping in the default address space. Access of the high bytes can interfere with debugging tools, so should not be accessed if the function has the sanitize_thread or sanitize_address attributes.

The alignment is only optional when parsing textual IR; for in-memory IR, it is always present. An omitted align argument means that the operation has the ABI alignment for the target.

The optional !nontemporal metadata must reference a single metadata name <nontemp_node> corresponding to a metadata node with one i32 entry of value 1. The existence of the !nontemporal metadata on the instruction tells the optimizer and code generator that this load is not expected to be reused in the cache. The code generator may select special instructions to save cache bandwidth, such as the MOVNT instruction on x86.

The optional !invariant.load metadata must reference a single metadata name <empty_node> corresponding to a metadata node with no entries. If a load instruction tagged with the !invariant.load metadata is executed, the memory location referenced by the load has to contain the same value at all points in the program where the memory location is dereferenceable; otherwise, the behavior is undefined.

The optional !invariant.group metadata must reference a single metadata name

<empty_node> corresponding to a metadata node with no entries. See invariant.group metadata invariant.group.

The optional !nonnull metadata must reference a single metadata name <empty_node> corresponding to a metadata node with no entries. The existence of the !nonnull metadata on the instruction tells the optimizer that the value loaded is known to never be null. If the value is null at runtime, a poison value is returned instead. This is analogous to the nonnull attribute on parameters and return values. This metadata can only be applied to loads of a pointer type.

The optional !dereferenceable metadata must reference a single metadata name <deref_bytes_node> corresponding to a metadata node with one i64 entry. See dereferenceable metadata dereferenceable.

The optional !dereferenceable_or_null metadata must reference a single metadata name <deref_bytes_node> corresponding to a metadata node with one i64 entry. See dereferenceable_or_null metadata dereferenceable_or_null.

The optional !align metadata must reference a single metadata name <align_node> corresponding to a metadata node with one i64 entry. The existence of the !align metadata on the instruction tells the optimizer that the value loaded is known to be aligned to a boundary specified by the integer value in the metadata node. The alignment must be a power of 2. This is analogous to the ‘’align’’ attribute on parameters and return values. This metadata can only be applied to loads of a pointer type. If the returned value is not appropriately aligned at runtime, a poison value is returned instead.

The optional !noundef metadata must reference a single metadata name <empty_node> corresponding to a node with no entries. The existence of !noundef metadata on the instruction tells the optimizer that the value loaded is known to be well defined. If the value isn’t well defined, the behavior is undefined. If the !noundef metadata is combined with poison-generating metadata like !nonnull, violation of that metadata constraint will also result in undefined behavior.

Semantics:

The location of memory pointed to is loaded. If the value being loaded is of scalar type then the number of bytes read does not exceed the minimum number of bytes needed to hold all bits of the type. For example, loading an i24 reads at most three bytes. When loading a value of a type like i20 with a size that is not an integral number of bytes, the result is undefined if the value was not originally written using a store of the same type. If the value being loaded is of aggregate type, the bytes that correspond to padding may be accessed but are ignored, because it is impossible to observe padding from the loaded aggregate value. If <pointer> is not a well-defined value, the behavior is undefined.

Examples:

%ptr = alloca i32                               ; yields ptr
store i32 3, ptr %ptr                           ; yields void
%val = load i32, ptr %ptr                       ; yields i32:val = i32 3

‘store’ Instruction

Syntax:

store [volatile] <ty> <value>, ptr <pointer>[, align <alignment>][, !nontemporal !<nontemp_node>][, !invariant.group !<empty_node>]        ; yields void
store atomic [volatile] <ty> <value>, ptr <pointer> [syncscope("<target-scope>")] <ordering>, align <alignment> [, !invariant.group !<empty_node>] ; yields void
!<nontemp_node> = !{ i32 1 }
!<empty_node> = !{}

Overview:

The ‘store’ instruction is used to write to memory.

Arguments:

There are two arguments to the store instruction: a value to store and an address at which to store it. The type of the <pointer> operand must be a pointer to the first class type of the <value> operand. If the store is marked as volatile, then the optimizer is not allowed to modify the number or order of execution of this store with other volatile operations. Only values of first class types of known size (i.e. not containing an opaque structural type) can be stored.

If the store is marked as atomic, it takes an extra ordering and optional syncscope("<target-scope>") argument. The acquire and acq_rel orderings aren’t valid on store instructions. Atomic loads produce defined results when they may see multiple atomic stores. The type of the pointee must be an integer, pointer, or floating-point type whose bit width is a power of two greater than or equal to eight and less than or equal to a target-specific size limit. align must be explicitly specified on atomic stores. Note: if the alignment is not greater or equal to the size of the <value> type, the atomic operation is likely to require a lock and have poor performance. !nontemporal does not have any defined semantics for atomic stores.

The optional constant align argument specifies the alignment of the operation (that is, the alignment of the memory address). It is the responsibility of the code emitter to ensure that the alignment information is correct. Overestimating the alignment results in undefined behavior. Underestimating the alignment may produce less efficient code. An alignment of 1 is always safe. The maximum possible alignment is 1 << 32. An alignment value higher than the size of the loaded type implies memory up to the alignment value bytes can be safely loaded without trapping in the default address space. Access of the high bytes can interfere with debugging tools, so should not be accessed if the function has the sanitize_thread or sanitize_address attributes.

The alignment is only optional when parsing textual IR; for in-memory IR, it is always present. An omitted align argument means that the operation has the ABI alignment for the target.

The optional !nontemporal metadata must reference a single metadata name <nontemp_node> corresponding to a metadata node with one i32 entry of value 1. The existence of the !nontemporal metadata on the instruction tells the optimizer and code generator that this load is not expected to be reused in the cache. The code generator may select special instructions to save cache bandwidth, such as the MOVNT instruction on x86.

The optional !invariant.group metadata must reference a single metadata name <empty_node>. See invariant.group metadata.

Semantics:

The contents of memory are updated to contain <value> at the location specified by the <pointer> operand. If <value> is of scalar type then the number of bytes written does not exceed the minimum number of bytes needed to hold all bits of the type. For example, storing an i24 writes at most three bytes. When writing a value of a type like i20 with a size that is not an integral number of bytes, it is unspecified what happens to the extra bits that do not belong to the type, but they will typically be overwritten. If <value> is of aggregate type, padding is filled with undef. If <pointer> is not a well-defined value, the behavior is undefined.

Example:

%ptr = alloca i32                               ; yields ptr
store i32 3, ptr %ptr                           ; yields void
%val = load i32, ptr %ptr                       ; yields i32:val = i32 3

‘fence’ Instruction

Syntax:

fence [syncscope("<target-scope>")] <ordering>  ; yields void

Overview:

The ‘fence’ instruction is used to introduce happens-before edges between operations.

Arguments:

‘fence’ instructions take an ordering argument which defines what synchronizes-with edges they add. They can only be given acquire, release, acq_rel, and seq_cst orderings.

Semantics:

A fence A which has (at least) release ordering semantics synchronizes with a fence B with (at least) acquire ordering semantics if and only if there exist atomic operations X and Y, both operating on some atomic object M, such that A is sequenced before X, X modifies M (either directly or through some side effect of a sequence headed by X), Y is sequenced before B, and Y observes M. This provides a happens-before dependency between A and B. Rather than an explicit fence, one (but not both) of the atomic operations X or Y might provide a release or acquire (resp.) ordering constraint and still synchronize-with the explicit fence and establish the happens-before edge.

A fence which has seq_cst ordering, in addition to having both acquire and release semantics specified above, participates in the global program order of other seq_cst operations and/or fences. Furthermore, the global ordering created by a seq_cst fence must be compatible with the individual total orders of monotonic (or stronger) memory accesses occurring before and after such a fence. The exact semantics of this interaction are somewhat complicated, see the C++ standard’s [atomics.order] section for more details.

A fence instruction can also take an optional “syncscope” argument.

Example:

fence acquire                                        ; yields void
fence syncscope("singlethread") seq_cst              ; yields void
fence syncscope("agent") seq_cst                     ; yields void

‘cmpxchg’ Instruction

Syntax:

cmpxchg [weak] [volatile] ptr <pointer>, <ty> <cmp>, <ty> <new> [syncscope("<target-scope>")] <success ordering> <failure ordering>[, align <alignment>] ; yields  { ty, i1 }

Overview:

The ‘cmpxchg’ instruction is used to atomically modify memory. It loads a value in memory and compares it to a given value. If they are equal, it tries to store a new value into the memory.

Arguments:

There are three arguments to the ‘cmpxchg’ instruction: an address to operate on, a value to compare to the value currently be at that address, and a new value to place at that address if the compared values are equal. The type of ‘<cmp>’ must be an integer or pointer type whose bit width is a power of two greater than or equal to eight and less than or equal to a target-specific size limit. ‘<cmp>’ and ‘<new>’ must have the same type, and the type of ‘<pointer>’ must be a pointer to that type. If the cmpxchg is marked as volatile, then the optimizer is not allowed to modify the number or order of execution of this cmpxchg with other volatile operations.

The success and failure ordering arguments specify how this cmpxchg synchronizes with other atomic operations. Both ordering parameters must be at least monotonic, the failure ordering cannot be either release or acq_rel.

A cmpxchg instruction can also take an optional “syncscope” argument.

Note: if the alignment is not greater or equal to the size of the <value> type, the atomic operation is likely to require a lock and have poor performance.

The alignment is only optional when parsing textual IR; for in-memory IR, it is always present. If unspecified, the alignment is assumed to be equal to the size of the ‘<value>’ type. Note that this default alignment assumption is different from the alignment used for the load/store instructions when align isn’t specified.

The pointer passed into cmpxchg must have alignment greater than or equal to the size in memory of the operand.

Semantics:

The contents of memory at the location specified by the ‘<pointer>’ operand is read and compared to ‘<cmp>’; if the values are equal, ‘<new>’ is written to the location. The original value at the location is returned, together with a flag indicating success (true) or failure (false).

If the cmpxchg operation is marked as weak then a spurious failure is permitted: the operation may not write <new> even if the comparison matched.

If the cmpxchg operation is strong (the default), the i1 value is 1 if and only if the value loaded equals cmp.

A successful cmpxchg is a read-modify-write instruction for the purpose of identifying release sequences. A failed cmpxchg is equivalent to an atomic load with an ordering parameter determined the second ordering parameter.

Example:

entry:
  %orig = load atomic i32, ptr %ptr unordered, align 4                      ; yields i32
  br label %loop

loop:
  %cmp = phi i32 [ %orig, %entry ], [%value_loaded, %loop]
  %squared = mul i32 %cmp, %cmp
  %val_success = cmpxchg ptr %ptr, i32 %cmp, i32 %squared acq_rel monotonic ; yields  { i32, i1 }
  %value_loaded = extractvalue { i32, i1 } %val_success, 0
  %success = extractvalue { i32, i1 } %val_success, 1
  br i1 %success, label %done, label %loop

done:
  ...

‘atomicrmw’ Instruction

Syntax:

atomicrmw [volatile] <operation> ptr <pointer>, <ty> <value> [syncscope("<target-scope>")] <ordering>[, align <alignment>]  ; yields ty

Overview:

The ‘atomicrmw’ instruction is used to atomically modify memory.

Arguments:

There are three arguments to the ‘atomicrmw’ instruction: an operation to apply, an address whose value to modify, an argument to the operation. The operation must be one of the following keywords:

• xchg

• add

• sub

• and

• nand

• or

• xor

• max

• min

• umax

• umin

• fadd

• fsub

• fmax

• fmin

• uinc_wrap

• udec_wrap

• usub_cond

• usub_sat

For most of these operations, the type of ‘<value>’ must be an integer type whose bit width is a power of two greater than or equal to eight and less than or equal to a target-specific size limit. For xchg, this may also be a floating point or a pointer type with the same size constraints as integers. For fadd/fsub/fmax/fmin, this must be a floating-point or fixed vector of floating-point type. The type of the ‘<pointer>’ operand must be a pointer to that type. If the atomicrmw is marked as volatile, then the optimizer is not allowed to modify the number or order of execution of this atomicrmw with other volatile operations.

Note: if the alignment is not greater or equal to the size of the <value> type, the atomic operation is likely to require a lock and have poor performance.

The alignment is only optional when parsing textual IR; for in-memory IR, it is always present. If unspecified, the alignment is assumed to be equal to the size of the ‘<value>’ type. Note that this default alignment assumption is different from the alignment used for the load/store instructions when align isn’t specified.

A atomicrmw instruction can also take an optional “syncscope” argument.

Semantics:

The contents of memory at the location specified by the ‘<pointer>’ operand are atomically read, modified, and written back. The original value at the location is returned. The modification is specified by the operation argument:

• xchg: *ptr = val

• add: *ptr = *ptr + val

• sub: *ptr = *ptr - val

• and: *ptr = *ptr & val

• nand: *ptr = ~(*ptr & val)

• or: *ptr = *ptr | val

• xor: *ptr = *ptr ^ val

• max: *ptr = *ptr > val ? *ptr : val (using a signed comparison)

• min: *ptr = *ptr < val ? *ptr : val (using a signed comparison)

• umax: *ptr = *ptr > val ? *ptr : val (using an unsigned comparison)

• umin: *ptr = *ptr < val ? *ptr : val (using an unsigned comparison)

• fadd: *ptr = *ptr + val (using floating point arithmetic)

• fsub: *ptr = *ptr - val (using floating point arithmetic)

• fmax: *ptr = maxnum(*ptr, val) (match the llvm.maxnum.*` intrinsic)

• fmin: *ptr = minnum(*ptr, val) (match the llvm.minnum.*` intrinsic)

• uinc_wrap: *ptr = (*ptr u>= val) ? 0 : (*ptr + 1) (increment value with wraparound to zero when incremented above input value)

• udec_wrap: *ptr = ((*ptr == 0) || (*ptr u> val)) ? val : (*ptr - 1) (decrement with wraparound to input value when decremented below zero).

• usub_cond: *ptr = (*ptr u>= val) ? *ptr - val : *ptr (subtract only if no unsigned overflow).

• usub_sat: *ptr = (*ptr u>= val) ? *ptr - val : 0 (subtract with unsigned clamping to zero).

Example:

%old = atomicrmw add ptr %ptr, i32 1 acquire                        ; yields i32

‘getelementptr’ Instruction

Syntax:

<result> = getelementptr <ty>, ptr <ptrval>{, <ty> <idx>}*
<result> = getelementptr inbounds <ty>, ptr <ptrval>{, <ty> <idx>}*
<result> = getelementptr nusw <ty>, ptr <ptrval>{, <ty> <idx>}*
<result> = getelementptr nuw <ty>, ptr <ptrval>{, <ty> <idx>}*
<result> = getelementptr inrange(S,E) <ty>, ptr <ptrval>{, <ty> <idx>}*
<result> = getelementptr <ty>, <N x ptr> <ptrval>, <vector index type> <idx>

Overview:

The ‘getelementptr’ instruction is used to get the address of a subelement of an aggregate data structure. It performs address calculation only and does not access memory. The instruction can also be used to calculate a vector of such addresses.

Arguments:

The first argument is always a type used as the basis for the calculations. The second argument is always a pointer or a vector of pointers, and is the base address to start from. The remaining arguments are indices that indicate which of the elements of the aggregate object are indexed. The interpretation of each index is dependent on the type being indexed into. The first index always indexes the pointer value given as the second argument, the second index indexes a value of the type pointed to (not necessarily the value directly pointed to, since the first index can be non-zero), etc. The first type indexed into must be a pointer value, subsequent types can be arrays, vectors, and structs. Note that subsequent types being indexed into can never be pointers, since that would require loading the pointer before continuing calculation.

The type of each index argument depends on the type it is indexing into. When indexing into a (optionally packed) structure, only i32 integer constants are allowed (when using a vector of indices they must all be the same i32 integer constant). When indexing into an array, pointer or vector, integers of any width are allowed, and they are not required to be constant. These integers are treated as signed values where relevant.

For example, let’s consider a C code fragment and how it gets compiled to LLVM:

struct RT {
  char A;
  int B[10][20];
  char C;
};
struct ST {
  int X;
  double Y;
  struct RT Z;
};

int *foo(struct ST *s) {
  return &s[1].Z.B[5][13];
}

The LLVM code generated by Clang is approximately:

%struct.RT = type { i8, [10 x [20 x i32]], i8 }
%struct.ST = type { i32, double, %struct.RT }

define ptr @foo(ptr %s) {
entry:
  %arrayidx = getelementptr inbounds %struct.ST, ptr %s, i64 1, i32 2, i32 1, i64 5, i64 13
  ret ptr %arrayidx
}

Semantics:

In the example above, the first index is indexing into the ‘%struct.ST*’ type, which is a pointer, yielding a ‘%struct.ST’ = ‘{ i32, double, %struct.RT }’ type, a structure. The second index indexes into the third element of the structure, yielding a ‘%struct.RT’ = ‘{ i8 , [10 x [20 x i32]], i8 }’ type, another structure. The third index indexes into the second element of the structure, yielding a ‘[10 x [20 x i32]]’ type, an array. The two dimensions of the array are subscripted into, yielding an ‘i32’ type. The ‘getelementptr’ instruction returns a pointer to this element.

Note that it is perfectly legal to index partially through a structure, returning a pointer to an inner element. Because of this, the LLVM code for the given testcase is equivalent to:

define ptr @foo(ptr %s) {
  %t1 = getelementptr %struct.ST, ptr %s, i32 1
  %t2 = getelementptr %struct.ST, ptr %t1, i32 0, i32 2
  %t3 = getelementptr %struct.RT, ptr %t2, i32 0, i32 1
  %t4 = getelementptr [10 x [20 x i32]], ptr %t3, i32 0, i32 5
  %t5 = getelementptr [20 x i32], ptr %t4, i32 0, i32 13
  ret ptr %t5
}

The indices are first converted to offsets in the pointer’s index type. If the currently indexed type is a struct type, the struct offset corresponding to the index is sign-extended or truncated to the pointer index type. Otherwise, the index itself is sign-extended or truncated, and then multiplied by the type allocation size (that is, the size rounded up to the ABI alignment) of the currently indexed type.

The offsets are then added to the low bits of the base address up to the index type width, with silently-wrapping two’s complement arithmetic. If the pointer size is larger than the index size, this means that the bits outside the index type width will not be affected.

The result value of the getelementptr may be outside the object pointed to by the base pointer. The result value may not necessarily be used to access memory though, even if it happens to point into allocated storage. See the Pointer Aliasing Rules section for more information.

The getelementptr instruction may have a number of attributes that impose additional rules. If any of the rules are violated, the result value is a poison value. In cases where the base is a vector of pointers, the attributes apply to each computation element-wise.

For nusw (no unsigned signed wrap):

• If the type of an index is larger than the pointer index type, the truncation to the pointer index type preserves the signed value (trunc nsw).

• The multiplication of an index by the type size does not wrap the pointer index type in a signed sense (mul nsw).

• The successive addition of each offset (without adding the base address) does not wrap the pointer index type in a signed sense (add nsw).

• The successive addition of the current address, truncated to the pointer index type and interpreted as an unsigned number, and each offset, interpreted as a signed number, does not wrap the pointer index type.

For nuw (no unsigned wrap):

• If the type of an index is larger than the pointer index type, the truncation to the pointer index type preserves the unsigned value (trunc nuw).

• The multiplication of an index by the type size does not wrap the pointer index type in an unsigned sense (mul nuw).

• The successive addition of each offset (without adding the base address) does not wrap the pointer index type in an unsigned sense (add nuw).

• The successive addition of the current address, truncated to the pointer index type and interpreted as an unsigned number, and each offset, also interpreted as an unsigned number, does not wrap the pointer index type (add nuw).

For inbounds all rules of the nusw attribute apply. Additionally, if the getelementptr has any non-zero indices, the following rules apply:

• The base pointer has an in bounds address of the allocated object that it is based on. This means that it points into that allocated object, or to its end. Note that the object does not have to be live anymore; being in-bounds of a deallocated object is sufficient.

• During the successive addition of offsets to the address, the resulting pointer must remain in bounds of the allocated object at each step.

Note that getelementptr with all-zero indices is always considered to be inbounds, even if the base pointer does not point to an allocated object. As a corollary, the only pointer in bounds of the null pointer in the default address space is the null pointer itself.

These rules are based on the assumption that no allocated object may cross the unsigned address space boundary, and no allocated object may be larger than half the pointer index type space.

If inbounds is present on a getelementptr instruction, the nusw attribute will be automatically set as well. For this reason, the nusw will also not be printed in textual IR if inbounds is already present.

If the inrange(Start, End) attribute is present, loading from or storing to any pointer derived from the getelementptr has undefined behavior if the load or store would access memory outside the half-open range [Start, End) from the getelementptr expression result. The result of a pointer comparison or ptrtoint (including ptrtoint-like operations involving memory) involving a pointer derived from a getelementptr with the inrange keyword is undefined, with the exception of comparisons in the case where both operands are in the closed range [Start, End]. Note that the inrange keyword is currently only allowed in constant getelementptr expressions.

The getelementptr instruction is often confusing. For some more insight into how it works, see the getelementptr FAQ.

Example:

%aptr = getelementptr {i32, [12 x i8]}, ptr %saptr, i64 0, i32 1
%vptr = getelementptr {i32, <2 x i8>}, ptr %svptr, i64 0, i32 1, i32 1
%eptr = getelementptr [12 x i8], ptr %aptr, i64 0, i32 1
%iptr = getelementptr [10 x i32], ptr @arr, i16 0, i16 0

Vector of pointers:

The getelementptr returns a vector of pointers, instead of a single address, when one or more of its arguments is a vector. In such cases, all vector arguments should have the same number of elements, and every scalar argument will be effectively broadcast into a vector during address calculation.

; All arguments are vectors:
;   A[i] = ptrs[i] + offsets[i]*sizeof(i8)
%A = getelementptr i8, <4 x i8*> %ptrs, <4 x i64> %offsets

; Add the same scalar offset to each pointer of a vector:
;   A[i] = ptrs[i] + offset*sizeof(i8)
%A = getelementptr i8, <4 x ptr> %ptrs, i64 %offset

; Add distinct offsets to the same pointer:
;   A[i] = ptr + offsets[i]*sizeof(i8)
%A = getelementptr i8, ptr %ptr, <4 x i64> %offsets

; In all cases described above the type of the result is <4 x ptr>

The two following instructions are equivalent:

getelementptr  %struct.ST, <4 x ptr> %s, <4 x i64> %ind1,
  <4 x i32> <i32 2, i32 2, i32 2, i32 2>,
  <4 x i32> <i32 1, i32 1, i32 1, i32 1>,
  <4 x i32> %ind4,
  <4 x i64> <i64 13, i64 13, i64 13, i64 13>

getelementptr  %struct.ST, <4 x ptr> %s, <4 x i64> %ind1,
  i32 2, i32 1, <4 x i32> %ind4, i64 13

Let’s look at the C code, where the vector version of getelementptr makes sense:

// Let's assume that we vectorize the following loop:
double *A, *B; int *C;
for (int i = 0; i < size; ++i) {
  A[i] = B[C[i]];
}

; get pointers for 8 elements from array B
%ptrs = getelementptr double, ptr %B, <8 x i32> %C
; load 8 elements from array B into A
%A = call <8 x double> @llvm.masked.gather.v8f64.v8p0f64(<8 x ptr> %ptrs,
     i32 8, <8 x i1> %mask, <8 x double> %passthru)

Conversion Operations

The instructions in this category are the conversion instructions (casting) which all take a single operand and a type. They perform various bit conversions on the operand.

‘trunc .. to’ Instruction

Syntax:

<result> = trunc <ty> <value> to <ty2>             ; yields ty2
<result> = trunc nsw <ty> <value> to <ty2>         ; yields ty2
<result> = trunc nuw <ty> <value> to <ty2>         ; yields ty2
<result> = trunc nuw nsw <ty> <value> to <ty2>     ; yields ty2

Overview:

The ‘trunc’ instruction truncates its operand to the type ty2.

Arguments:

The ‘trunc’ instruction takes a value to trunc, and a type to trunc it to. Both types must be of integer types, or vectors of the same number of integers. The bit size of the value must be larger than the bit size of the destination type, ty2. Equal sized types are not allowed.

Semantics:

The ‘trunc’ instruction truncates the high order bits in value and converts the remaining bits to ty2. Since the source size must be larger than the destination size, trunc cannot be a no-op cast. It will always truncate bits.

If the nuw keyword is present, and any of the truncated bits are non-zero, the result is a poison value. If the nsw keyword is present, and any of the truncated bits are not the same as the top bit of the truncation result, the result is a poison value.

Example:

%X = trunc i32 257 to i8                        ; yields i8:1
%Y = trunc i32 123 to i1                        ; yields i1:true
%Z = trunc i32 122 to i1                        ; yields i1:false
%W = trunc <2 x i16> <i16 8, i16 7> to <2 x i8> ; yields <i8 8, i8 7>

‘zext .. to’ Instruction

Syntax:

<result> = zext <ty> <value> to <ty2>             ; yields ty2

Overview:

The ‘zext’ instruction zero extends its operand to type ty2.

The nneg (non-negative) flag, if present, specifies that the operand is non-negative. This property may be used by optimization passes to later convert the zext into a sext.

Arguments:

The ‘zext’ instruction takes a value to cast, and a type to cast it to. Both types must be of integer types, or vectors of the same number of integers. The bit size of the value must be smaller than the bit size of the destination type, ty2.

Semantics:

The zext fills the high order bits of the value with zero bits until it reaches the size of the destination type, ty2.

When zero extending from i1, the result will always be either 0 or 1.

If the nneg flag is set, and the zext argument is negative, the result is a poison value.

Example:

%X = zext i32 257 to i64              ; yields i64:257
%Y = zext i1 true to i32              ; yields i32:1
%Z = zext <2 x i16> <i16 8, i16 7> to <2 x i32> ; yields <i32 8, i32 7>

%a = zext nneg i8 127 to i16 ; yields i16 127
%b = zext nneg i8 -1 to i16  ; yields i16 poison

‘sext .. to’ Instruction

Syntax:

<result> = sext <ty> <value> to <ty2>             ; yields ty2

Overview:

The ‘sext’ sign extends value to the type ty2.

Arguments:

The ‘sext’ instruction takes a value to cast, and a type to cast it to. Both types must be of integer types, or vectors of the same number of integers. The bit size of the value must be smaller than the bit size of the destination type, ty2.

Semantics:

The ‘sext’ instruction performs a sign extension by copying the sign bit (highest order bit) of the value until it reaches the bit size of the type ty2.

When sign extending from i1, the extension always results in -1 or 0.

Example:

%X = sext i8  -1 to i16              ; yields i16   :65535
%Y = sext i1 true to i32             ; yields i32:-1
%Z = sext <2 x i16> <i16 8, i16 7> to <2 x i32> ; yields <i32 8, i32 7>

‘fptrunc .. to’ Instruction

Syntax:

<result> = fptrunc [fast-math flags]* <ty> <value> to <ty2> ; yields ty2

Overview:

The ‘fptrunc’ instruction truncates value to type ty2.

Arguments:

The ‘fptrunc’ instruction takes a floating-point value to cast and a floating-point type to cast it to. The size of value must be larger than the size of ty2. This implies that fptrunc cannot be used to make a no-op cast.

Semantics:

The ‘fptrunc’ instruction casts a value from a larger floating-point type to a smaller floating-point type. This instruction is assumed to execute in the default floating-point environment.

NaN values follow the usual NaN behaviors, except that _if_ a NaN payload is propagated from the input (“Quieting NaN propagation” or “Unchanged NaN propagation” cases), then the low order bits of the NaN payload which cannot fit in the resulting type are discarded. Note that if discarding the low order bits leads to an all-0 payload, this cannot be represented as a signaling NaN (it would represent an infinity instead), so in that case “Unchanged NaN propagation” is not possible.

This instruction can also take any number of fast-math flags, which are optimization hints to enable otherwise unsafe floating-point optimizations.

Example:

%X = fptrunc double 16777217.0 to float    ; yields float:16777216.0
%Y = fptrunc double 1.0E+300 to half       ; yields half:+infinity

‘fpext .. to’ Instruction

Syntax:

<result> = fpext [fast-math flags]* <ty> <value> to <ty2> ; yields ty2

Overview:

The ‘fpext’ extends a floating-point value to a larger floating-point value.

Arguments:

The ‘fpext’ instruction takes a floating-point value to cast, and a floating-point type to cast it to. The source type must be smaller than the destination type.

Semantics:

The ‘fpext’ instruction extends the value from a smaller floating-point type to a larger floating-point type. The fpext cannot be used to make a no-op cast because it always changes bits. Use bitcast to make a no-op cast for a floating-point cast.

NaN values follow the usual NaN behaviors, except that _if_ a NaN payload is propagated from the input (“Quieting NaN propagation” or “Unchanged NaN propagation” cases), then it is copied to the high order bits of the resulting payload, and the remaining low order bits are zero.

This instruction can also take any number of fast-math flags, which are optimization hints to enable otherwise unsafe floating-point optimizations.

Example:

%X = fpext float 3.125 to double         ; yields double:3.125000e+00
%Y = fpext double %X to fp128            ; yields fp128:0xL00000000000000004000900000000000

‘fptoui .. to’ Instruction

Syntax:

<result> = fptoui <ty> <value> to <ty2>             ; yields ty2

Overview:

The ‘fptoui’ converts a floating-point value to its unsigned integer equivalent of type ty2.

Arguments:

The ‘fptoui’ instruction takes a value to cast, which must be a scalar or vector floating-point value, and a type to cast it to ty2, which must be an integer type. If ty is a vector floating-point type, ty2 must be a vector integer type with the same number of elements as ty

Semantics:

The ‘fptoui’ instruction converts its floating-point operand into the nearest (rounding towards zero) unsigned integer value. If the value cannot fit in ty2, the result is a poison value.

Example:

%X = fptoui double 123.0 to i32      ; yields i32:123
%Y = fptoui float 1.0E+300 to i1     ; yields undefined:1
%Z = fptoui float 1.04E+17 to i8     ; yields undefined:1

‘fptosi .. to’ Instruction

Syntax:

<result> = fptosi <ty> <value> to <ty2>             ; yields ty2

Overview:

The ‘fptosi’ instruction converts floating-point value to type ty2.

Arguments:

The ‘fptosi’ instruction takes a value to cast, which must be a scalar or vector floating-point value, and a type to cast it to ty2, which must be an integer type. If ty is a vector floating-point type, ty2 must be a vector integer type with the same number of elements as ty

Semantics:

The ‘fptosi’ instruction converts its floating-point operand into the nearest (rounding towards zero) signed integer value. If the value cannot fit in ty2, the result is a poison value.

Example:

%X = fptosi double -123.0 to i32      ; yields i32:-123
%Y = fptosi float 1.0E-247 to i1      ; yields undefined:1
%Z = fptosi float 1.04E+17 to i8      ; yields undefined:1

‘uitofp .. to’ Instruction

Syntax:

<result> = uitofp <ty> <value> to <ty2>             ; yields ty2

Overview:

The ‘uitofp’ instruction regards value as an unsigned integer and converts that value to the ty2 type.

The nneg (non-negative) flag, if present, specifies that the operand is non-negative. This property may be used by optimization passes to later convert the uitofp into a sitofp.

Arguments:

The ‘uitofp’ instruction takes a value to cast, which must be a scalar or vector integer value, and a type to cast it to ty2, which must be an floating-point type. If ty is a vector integer type, ty2 must be a vector floating-point type with the same number of elements as ty

Semantics:

The ‘uitofp’ instruction interprets its operand as an unsigned integer quantity and converts it to the corresponding floating-point value. If the value cannot be exactly represented, it is rounded using the default rounding mode.

If the nneg flag is set, and the uitofp argument is negative, the result is a poison value.

Example:

%X = uitofp i32 257 to float         ; yields float:257.0
%Y = uitofp i8 -1 to double          ; yields double:255.0

%a = uitofp nneg i32 256 to i32      ; yields float:256.0
%b = uitofp nneg i32 -256 to i32     ; yields i32 poison

‘sitofp .. to’ Instruction

Syntax:

<result> = sitofp <ty> <value> to <ty2>             ; yields ty2

Overview:

The ‘sitofp’ instruction regards value as a signed integer and converts that value to the ty2 type.

Arguments:

The ‘sitofp’ instruction takes a value to cast, which must be a scalar or vector integer value, and a type to cast it to ty2, which must be an floating-point type. If ty is a vector integer type, ty2 must be a vector floating-point type with the same number of elements as ty

Semantics:

The ‘sitofp’ instruction interprets its operand as a signed integer quantity and converts it to the corresponding floating-point value. If the value cannot be exactly represented, it is rounded using the default rounding mode.

Example:

%X = sitofp i32 257 to float         ; yields float:257.0
%Y = sitofp i8 -1 to double          ; yields double:-1.0

‘ptrtoint .. to’ Instruction

Syntax:

<result> = ptrtoint <ty> <value> to <ty2>             ; yields ty2

Overview:

The ‘ptrtoint’ instruction converts the pointer or a vector of pointers value to the integer (or vector of integers) type ty2.

Arguments:

The ‘ptrtoint’ instruction takes a value to cast, which must be a value of type pointer or a vector of pointers, and a type to cast it to ty2, which must be an integer or a vector of integers type.

Semantics:

The ‘ptrtoint’ instruction converts value to integer type ty2 by interpreting the pointer value as an integer and either truncating or zero extending that value to the size of the integer type. If value is smaller than ty2 then a zero extension is done. If value is larger than ty2 then a truncation is done. If they are the same size, then nothing is done (no-op cast) other than a type change.

Example:

%X = ptrtoint ptr %P to i8                         ; yields truncation on 32-bit architecture
%Y = ptrtoint ptr %P to i64                        ; yields zero extension on 32-bit architecture
%Z = ptrtoint <4 x ptr> %P to <4 x i64>; yields vector zero extension for a vector of addresses on 32-bit architecture

‘inttoptr .. to’ Instruction

Syntax:

<result> = inttoptr <ty> <value> to <ty2>[, !dereferenceable !<deref_bytes_node>][, !dereferenceable_or_null !<deref_bytes_node>]             ; yields ty2

Overview:

The ‘inttoptr’ instruction converts an integer value to a pointer type, ty2.

Arguments:

The ‘inttoptr’ instruction takes an integer value to cast, and a type to cast it to, which must be a pointer type.

The optional !dereferenceable metadata must reference a single metadata name <deref_bytes_node> corresponding to a metadata node with one i64 entry. See dereferenceable metadata.

The optional !dereferenceable_or_null metadata must reference a single metadata name <deref_bytes_node> corresponding to a metadata node with one i64 entry. See dereferenceable_or_null metadata.

Semantics:

The ‘inttoptr’ instruction converts value to type ty2 by applying either a zero extension or a truncation depending on the size of the integer value. If value is larger than the size of a pointer then a truncation is done. If value is smaller than the size of a pointer then a zero extension is done. If they are the same size, nothing is done (no-op cast).

Example:

%X = inttoptr i32 255 to ptr           ; yields zero extension on 64-bit architecture
%Y = inttoptr i32 255 to ptr           ; yields no-op on 32-bit architecture
%Z = inttoptr i64 0 to ptr             ; yields truncation on 32-bit architecture
%Z = inttoptr <4 x i32> %G to <4 x ptr>; yields truncation of vector G to four pointers

‘bitcast .. to’ Instruction

Syntax:

<result> = bitcast <ty> <value> to <ty2>             ; yields ty2

Overview:

The ‘bitcast’ instruction converts value to type ty2 without changing any bits.

Arguments:

The ‘bitcast’ instruction takes a value to cast, which must be a non-aggregate first class value, and a type to cast it to, which must also be a non-aggregate first class type. The bit sizes of value and the destination type, ty2, must be identical. If the source type is a pointer, the destination type must also be a pointer of the same size. This instruction supports bitwise conversion of vectors to integers and to vectors of other types (as long as they have the same size).

Semantics:

The ‘bitcast’ instruction converts value to type ty2. It is always a no-op cast because no bits change with this conversion. The conversion is done as if the value had been stored to memory and read back as type ty2. Pointer (or vector of pointers) types may only be converted to other pointer (or vector of pointers) types with the same address space through this instruction. To convert pointers to other types, use the inttoptr or ptrtoint instructions first.

There is a caveat for bitcasts involving vector types in relation to endianness. For example bitcast <2 x i8> <value> to i16 puts element zero of the vector in the least significant bits of the i16 for little-endian while element zero ends up in the most significant bits for big-endian.

Example:

%X = bitcast i8 255 to i8         ; yields i8 :-1
%Y = bitcast i32* %x to i16*      ; yields i16*:%x
%Z = bitcast <2 x i32> %V to i64; ; yields i64: %V (depends on endianness)
%Z = bitcast <2 x i32*> %V to <2 x i64*> ; yields <2 x i64*>

‘addrspacecast .. to’ Instruction

Syntax:

<result> = addrspacecast <pty> <ptrval> to <pty2>       ; yields pty2

Overview:

The ‘addrspacecast’ instruction converts ptrval from pty in address space n to type pty2 in address space m.

Arguments:

The ‘addrspacecast’ instruction takes a pointer or vector of pointer value to cast and a pointer type to cast it to, which must have a different address space.

Semantics:

The ‘addrspacecast’ instruction converts the pointer value ptrval to type pty2. It can be a no-op cast or a complex value modification, depending on the target and the address space pair. Pointer conversions within the same address space must be performed with the bitcast instruction. Note that if the address space conversion produces a dereferenceable result then both result and operand refer to the same memory location. The conversion must have no side effects, and must not capture the value of the pointer.

If the source is poison, the result is poison.

If the source is not poison, and both source and destination are integral pointers, and the result pointer is dereferenceable, the cast is assumed to be reversible (i.e. casting the result back to the original address space should yield the original bit pattern).

Example:

%X = addrspacecast ptr %x to ptr addrspace(1)
%Y = addrspacecast ptr addrspace(1) %y to ptr addrspace(2)
%Z = addrspacecast <4 x ptr> %z to <4 x ptr addrspace(3)>

Other Operations

The instructions in this category are the “miscellaneous” instructions, which defy better classification.

‘icmp’ Instruction

Syntax:

<result> = icmp <cond> <ty> <op1>, <op2>   ; yields i1 or <N x i1>:result
<result> = icmp samesign <cond> <ty> <op1>, <op2>   ; yields i1 or <N x i1>:result

Overview:

The ‘icmp’ instruction returns a boolean value or a vector of boolean values based on comparison of its two integer, integer vector, pointer, or pointer vector operands.

Arguments:

The ‘icmp’ instruction takes three operands. The first operand is the condition code indicating the kind of comparison to perform. It is not a value, just a keyword. The possible condition codes are:

1. eq: equal

2. ne: not equal

3. ugt: unsigned greater than

4. uge: unsigned greater or equal

5. ult: unsigned less than

6. ule: unsigned less or equal

7. sgt: signed greater than

8. sge: signed greater or equal

9. slt: signed less than

10. sle: signed less or equal

The remaining two arguments must be integer or pointer or integer vector typed. They must also be identical types.

Semantics:

The ‘icmp’ compares op1 and op2 according to the condition code given as cond. The comparison performed always yields either an i1 or vector of i1 result, as follows:

1. eq: yields true if the operands are equal, false otherwise. No sign interpretation is necessary or performed.

2. ne: yields true if the operands are unequal, false otherwise. No sign interpretation is necessary or performed.

3. ugt: interprets the operands as unsigned values and yields true if op1 is greater than op2.

4. uge: interprets the operands as unsigned values and yields true if op1 is greater than or equal to op2.

5. ult: interprets the operands as unsigned values and yields true if op1 is less than op2.

6. ule: interprets the operands as unsigned values and yields true if op1 is less than or equal to op2.

7. sgt: interprets the operands as signed values and yields true if op1 is greater than op2.

8. sge: interprets the operands as signed values and yields true if op1 is greater than or equal to op2.

9. slt: interprets the operands as signed values and yields true if op1 is less than op2.

10. sle: interprets the operands as signed values and yields true if op1 is less than or equal to op2.

If the operands are pointer typed, the pointer values are compared as if they were integers.

If the operands are integer vectors, then they are compared element by element. The result is an i1 vector with the same number of elements as the values being compared. Otherwise, the result is an i1.

If the samesign keyword is present and the operands are not of the same sign then the result is a poison value.

Example:

<result> = icmp eq i32 4, 5          ; yields: result=false
<result> = icmp ne ptr %X, %X        ; yields: result=false
<result> = icmp ult i16  4, 5        ; yields: result=true
<result> = icmp sgt i16  4, 5        ; yields: result=false
<result> = icmp ule i16 -4, 5        ; yields: result=false
<result> = icmp sge i16  4, 5        ; yields: result=false

‘fcmp’ Instruction

Syntax:

<result> = fcmp [fast-math flags]* <cond> <ty> <op1>, <op2>     ; yields i1 or <N x i1>:result

Overview:

The ‘fcmp’ instruction returns a boolean value or vector of boolean values based on comparison of its operands.

If the operands are floating-point scalars, then the result type is a boolean (i1).

If the operands are floating-point vectors, then the result type is a vector of boolean with the same number of elements as the operands being compared.

Arguments:

The ‘fcmp’ instruction takes three operands. The first operand is the condition code indicating the kind of comparison to perform. It is not a value, just a keyword. The possible condition codes are:

1. false: no comparison, always returns false

2. oeq: ordered and equal

3. ogt: ordered and greater than

4. oge: ordered and greater than or equal

5. olt: ordered and less than

6. ole: ordered and less than or equal

7. one: ordered and not equal

8. ord: ordered (no nans)

9. ueq: unordered or equal

10. ugt: unordered or greater than

11. uge: unordered or greater than or equal

12. ult: unordered or less than

13. ule: unordered or less than or equal

14. une: unordered or not equal

15. uno: unordered (either nans)

16. true: no comparison, always returns true

Ordered means that neither operand is a QNAN while unordered means that either operand may be a QNAN.

Each of val1 and val2 arguments must be either a floating-point type or a vector of floating-point type. They must have identical types.

Semantics:

The ‘fcmp’ instruction compares op1 and op2 according to the condition code given as cond. If the operands are vectors, then the vectors are compared element by element. Each comparison performed always yields an i1 result, as follows:

1. false: always yields false, regardless of operands.

2. oeq: yields true if both operands are not a QNAN and op1 is equal to op2.

3. ogt: yields true if both operands are not a QNAN and op1 is greater than op2.

4. oge: yields true if both operands are not a QNAN and op1 is greater than or equal to op2.

5. olt: yields true if both operands are not a QNAN and op1 is less than op2.

6. ole: yields true if both operands are not a QNAN and op1 is less than or equal to op2.

7. one: yields true if both operands are not a QNAN and op1 is not equal to op2.

8. ord: yields true if both operands are not a QNAN.

9. ueq: yields true if either operand is a QNAN or op1 is equal to op2.

10. ugt: yields true if either operand is a QNAN or op1 is greater than op2.

11. uge: yields true if either operand is a QNAN or op1 is greater than or equal to op2.

12. ult: yields true if either operand is a QNAN or op1 is less than op2.

13. ule: yields true if either operand is a QNAN or op1 is less than or equal to op2.

14. une: yields true if either operand is a QNAN or op1 is not equal to op2.

15. uno: yields true if either operand is a QNAN.

16. true: always yields true, regardless of operands.

The fcmp instruction can also optionally take any number of fast-math flags, which are optimization hints to enable otherwise unsafe floating-point optimizations.

Any set of fast-math flags are legal on an fcmp instruction, but the only flags that have any effect on its semantics are those that allow assumptions to be made about the values of input arguments; namely nnan, ninf, and reassoc. See Fast-Math Flags for more information.

Example:

<result> = fcmp oeq float 4.0, 5.0    ; yields: result=false
<result> = fcmp one float 4.0, 5.0    ; yields: result=true
<result> = fcmp olt float 4.0, 5.0    ; yields: result=true
<result> = fcmp ueq double 1.0, 2.0   ; yields: result=false

‘phi’ Instruction

Syntax:

<result> = phi [fast-math-flags] <ty> [ <val0>, <label0>], ...

Overview:

The ‘phi’ instruction is used to implement the φ node in the SSA graph representing the function.

Arguments:

The type of the incoming values is specified with the first type field. After this, the ‘phi’ instruction takes a list of pairs as arguments, with one pair for each predecessor basic block of the current block. Only values of first class type may be used as the value arguments to the PHI node. Only labels may be used as the label arguments.

There must be no non-phi instructions between the start of a basic block and the PHI instructions: i.e. PHI instructions must be first in a basic block.

For the purposes of the SSA form, the use of each incoming value is deemed to occur on the edge from the corresponding predecessor block to the current block (but after any definition of an ‘invoke’ instruction’s return value on the same edge).

The optional fast-math-flags marker indicates that the phi has one or more fast-math-flags. These are optimization hints to enable otherwise unsafe floating-point optimizations. Fast-math-flags are only valid for phis that return supported floating-point types.

Semantics:

At runtime, the ‘phi’ instruction logically takes on the value specified by the pair corresponding to the predecessor basic block that executed just prior to the current block.

Example:

Loop:       ; Infinite loop that counts from 0 on up...
  %indvar = phi i32 [ 0, %LoopHeader ], [ %nextindvar, %Loop ]
  %nextindvar = add i32 %indvar, 1
  br label %Loop

‘select’ Instruction

Syntax:

<result> = select [fast-math flags] selty <cond>, <ty> <val1>, <ty> <val2>             ; yields ty

selty is either i1 or {<N x i1>}

Overview:

The ‘select’ instruction is used to choose one value based on a condition, without IR-level branching.

Arguments:

The ‘select’ instruction requires an ‘i1’ value or a vector of ‘i1’ values indicating the condition, and two values of the same first class type.

1. The optional fast-math flags marker indicates that the select has one or more fast-math flags. These are optimization hints to enable otherwise unsafe floating-point optimizations. Fast-math flags are only valid for selects that return supported floating-point types.

Semantics:

If the condition is an i1 and it evaluates to 1, the instruction returns the first value argument; otherwise, it returns the second value argument.

If the condition is a vector of i1, then the value arguments must be vectors of the same size, and the selection is done element by element.

If the condition is an i1 and the value arguments are vectors of the same size, then an entire vector is selected.

Example:

%X = select i1 true, i8 17, i8 42          ; yields i8:17

‘freeze’ Instruction

Syntax:

<result> = freeze ty <val>    ; yields ty:result

Overview:

The ‘freeze’ instruction is used to stop propagation of undef and poison values.

Arguments:

The ‘freeze’ instruction takes a single argument.

Semantics:

If the argument is undef or poison, ‘freeze’ returns an arbitrary, but fixed, value of type ‘ty’. Otherwise, this instruction is a no-op and returns the input argument. All uses of a value returned by the same ‘freeze’ instruction are guaranteed to always observe the same value, while different ‘freeze’ instructions may yield different values.

While undef and poison pointers can be frozen, the result is a non-dereferenceable pointer. See the Pointer Aliasing Rules section for more information. If an aggregate value or vector is frozen, the operand is frozen element-wise. The padding of an aggregate isn’t considered, since it isn’t visible without storing it into memory and loading it with a different type.

Example:

%w = i32 undef
%x = freeze i32 %w
%y = add i32 %w, %w         ; undef
%z = add i32 %x, %x         ; even number because all uses of %x observe
                            ; the same value
%x2 = freeze i32 %w
%cmp = icmp eq i32 %x, %x2  ; can be true or false

; example with vectors
%v = <2 x i32> <i32 undef, i32 poison>
%a = extractelement <2 x i32> %v, i32 0    ; undef
%b = extractelement <2 x i32> %v, i32 1    ; poison
%add = add i32 %a, %a                      ; undef

%v.fr = freeze <2 x i32> %v                ; element-wise freeze
%d = extractelement <2 x i32> %v.fr, i32 0 ; not undef
%add.f = add i32 %d, %d                    ; even number

; branching on frozen value
%poison = add nsw i1 %k, undef   ; poison
%c = freeze i1 %poison
br i1 %c, label %foo, label %bar ; non-deterministic branch to %foo or %bar

‘call’ Instruction

Syntax:

<result> = [tail | musttail | notail ] call [fast-math flags] [cconv] [ret attrs] [addrspace(<num>)]
           <ty>|<fnty> <fnptrval>(<function args>) [fn attrs] [ operand bundles ]

Overview:

The ‘call’ instruction represents a simple function call.

Arguments:

This instruction requires several arguments:

1. The optional tail and musttail markers indicate that the optimizers should perform tail call optimization. The tail marker is a hint that can be ignored. The musttail marker means that the call must be tail call optimized in order for the program to be correct. This is true even in the presence of attributes like “disable-tail-calls”. The musttail marker provides these guarantees:

   1. The call will not cause unbounded stack growth if it is part of a recursive cycle in the call graph.

   2. Arguments with the inalloca or preallocated attribute are forwarded in place.

   3. If the musttail call appears in a function with the "thunk" attribute and the caller and callee both have varargs, then any unprototyped arguments in register or memory are forwarded to the callee. Similarly, the return value of the callee is returned to the caller’s caller, even if a void return type is in use.

   Both markers imply that the callee does not access allocas, va_args, or byval arguments from the caller. As an exception to that, an alloca or byval argument may be passed to the callee as a byval argument, which can be dereferenced inside the callee. For example:

    declare void @take_byval(ptr byval(i64))
    declare void @take_ptr(ptr)

    ; Invalid (assuming @take_ptr dereferences the pointer), because %local
    ; may be de-allocated before the call to @take_ptr.
    define void @invalid_alloca() {
    entry:
      %local = alloca i64
      tail call void @take_ptr(ptr %local)
      ret void
    }

    ; Valid, the byval attribute causes the memory allocated by %local to be
    ; copied into @take_byval's stack frame.
    define void @byval_alloca() {
    entry:
      %local = alloca i64
      tail call void @take_byval(ptr byval(i64) %local)
      ret void
    }

    ; Invalid, because @use_global_va_list uses the variadic arguments from
    ; @invalid_va_list.
    %struct.va_list = type { ptr }
    @va_list = external global %struct.va_list
    define void @use_global_va_list() {
    entry:
      %arg = va_arg ptr @va_list, i64
      ret void
    }
    define void @invalid_va_list(i32 %a, ...) {
    entry:
      call void @llvm.va_start.p0(ptr @va_list)
      tail call void @use_global_va_list()
      ret void
    }

    ; Valid, byval argument forwarded to tail call as another byval argument.
    define void @forward_byval(ptr byval(i64) %x) {
    entry:
      tail call void @take_byval(ptr byval(i64) %x)
      ret void
    }

    ; Invalid (assuming @take_ptr dereferences the pointer), byval argument
    ; passed to tail callee as non-byval ptr.
    define void @invalid_byval(ptr byval(i64) %x) {
    entry:
      tail call void @take_ptr(ptr %x)
      ret void
    }


 Calls marked ``musttail`` must obey the following additional rules:

 - The call must immediately precede a :ref:`ret <i_ret>` instruction,
   or a pointer bitcast followed by a ret instruction.
 - The ret instruction must return the (possibly bitcasted) value
   produced by the call, undef, or void.
 - The calling conventions of the caller and callee must match.
 - The callee must be varargs iff the caller is varargs. Bitcasting a
   non-varargs function to the appropriate varargs type is legal so
   long as the non-varargs prefixes obey the other rules.
 - The return type must not undergo automatic conversion to an `sret` pointer.

In addition, if the calling convention is not `swifttailcc` or `tailcc`:

 - All ABI-impacting function attributes, such as sret, byval, inreg,
   returned, and inalloca, must match.
 - The caller and callee prototypes must match. Pointer types of parameters
   or return types may differ in pointee type, but not in address space.

On the other hand, if the calling convention is `swifttailcc` or `tailcc`:

 - Only these ABI-impacting attributes attributes are allowed: sret, byval,
   swiftself, and swiftasync.
 - Prototypes are not required to match.

 Tail call optimization for calls marked ``tail`` is guaranteed to occur if
 the following conditions are met:

 -  Caller and callee both have the calling convention ``fastcc`` or ``tailcc``.
 -  The call is in tail position (ret immediately follows call and ret
    uses value of call or is void).
 -  Option ``-tailcallopt`` is enabled,
    ``llvm::GuaranteedTailCallOpt`` is ``true``, or the calling convention
    is ``tailcc``
 -  `Platform-specific constraints are
    met. <CodeGenerator.html#tail-call-optimization>`_

1. The optional notail marker indicates that the optimizers should not add tail or musttail markers to the call. It is used to prevent tail call optimization from being performed on the call.

2. The optional fast-math flags marker indicates that the call has one or more fast-math flags, which are optimization hints to enable otherwise unsafe floating-point optimizations. Fast-math flags are only valid for calls that return supported floating-point types.

3. The optional “cconv” marker indicates which calling convention the call should use. If none is specified, the call defaults to using C calling conventions. The calling convention of the call must match the calling convention of the target function, or else the behavior is undefined.

4. The optional Parameter Attributes list for return values. Only ‘zeroext’, ‘signext’, ‘noext’, and ‘inreg’ attributes are valid here.

5. The optional addrspace attribute can be used to indicate the address space of the called function. If it is not specified, the program address space from the datalayout string will be used.

6. ‘ty’: the type of the call instruction itself which is also the type of the return value. Functions that return no value are marked void.

7. ‘fnty’: shall be the signature of the function being called. The argument types must match the types implied by this signature. This type can be omitted if the function is not varargs.

8. ‘fnptrval’: An LLVM value containing a pointer to a function to be called. In most cases, this is a direct function call, but indirect call’s are just as possible, calling an arbitrary pointer to function value.

9. ‘function args’: argument list whose types match the function signature argument types and parameter attributes. All arguments must be of first class type. If the function signature indicates the function accepts a variable number of arguments, the extra arguments can be specified.

10. The optional function attributes list.

11. The optional operand bundles list.

Semantics:

The ‘call’ instruction is used to cause control flow to transfer to a specified function, with its incoming arguments bound to the specified values. Upon a ‘ret’ instruction in the called function, control flow continues with the instruction after the function call, and the return value of the function is bound to the result argument.

Example:

%retval = call i32 @test(i32 %argc)
call i32 (ptr, ...) @printf(ptr %msg, i32 12, i8 42)        ; yields i32
%X = tail call i32 @foo()                                    ; yields i32
%Y = tail call fastcc i32 @foo()  ; yields i32
call void %foo(i8 signext 97)

%struct.A = type { i32, i8 }
%r = call %struct.A @foo()                        ; yields { i32, i8 }
%gr = extractvalue %struct.A %r, 0                ; yields i32
%gr1 = extractvalue %struct.A %r, 1               ; yields i8
%Z = call void @foo() noreturn                    ; indicates that %foo never returns normally
%ZZ = call zeroext i32 @bar()                     ; Return value is %zero extended

llvm treats calls to some functions with names and arguments that match the standard C99 library as being the C99 library functions, and may perform optimizations or generate code for them under that assumption. This is something we’d like to change in the future to provide better support for freestanding environments and non-C-based languages.

‘va_arg’ Instruction

Syntax:

<resultval> = va_arg <va_list*> <arglist>, <argty>

Overview:

The ‘va_arg’ instruction is used to access arguments passed through the “variable argument” area of a function call. It is used to implement the va_arg macro in C.

Arguments:

This instruction takes a va_list* value and the type of the argument. It returns a value of the specified argument type and increments the va_list to point to the next argument. The actual type of va_list is target specific.

Semantics:

The ‘va_arg’ instruction loads an argument of the specified type from the specified va_list and causes the va_list to point to the next argument. For more information, see the variable argument handling Intrinsic Functions.

It is legal for this instruction to be called in a function which does not take a variable number of arguments, for example, the vfprintf function.

va_arg is an LLVM instruction instead of an intrinsic function because it takes a type as an argument.

Example:

See the variable argument processing section.

Note that the code generator does not yet fully support va_arg on many targets. Also, it does not currently support va_arg with aggregate types on any target.

‘landingpad’ Instruction

Syntax:

<resultval> = landingpad <resultty> <clause>+
<resultval> = landingpad <resultty> cleanup <clause>*

<clause> := catch <type> <value>
<clause> := filter <array constant type> <array constant>

Overview:

The ‘landingpad’ instruction is used by LLVM’s exception handling system to specify that a basic block is a landing pad — one where the exception lands, and corresponds to the code found in the catch portion of a try/catch sequence. It defines values supplied by the personality function upon re-entry to the function. The resultval has the type resultty.

Arguments:

The optional cleanup flag indicates that the landing pad block is a cleanup.

A clause begins with the clause type — catch or filter — and contains the global variable representing the “type” that may be caught or filtered respectively. Unlike the catch clause, the filter clause takes an array constant as its argument. Use “[0 x ptr] undef” for a filter which cannot throw. The ‘landingpad’ instruction must contain at least one clause or the cleanup flag.

Semantics:

The ‘landingpad’ instruction defines the values which are set by the personality function upon re-entry to the function, and therefore the “result type” of the landingpad instruction. As with calling conventions, how the personality function results are represented in LLVM IR is target specific.

The clauses are applied in order from top to bottom. If two landingpad instructions are merged together through inlining, the clauses from the calling function are appended to the list of clauses. When the call stack is being unwound due to an exception being thrown, the exception is compared against each clause in turn. If it doesn’t match any of the clauses, and the cleanup flag is not set, then unwinding continues further up the call stack.

The landingpad instruction has several restrictions:

• A landing pad block is a basic block which is the unwind destination of an ‘invoke’ instruction.

• A landing pad block must have a ‘landingpad’ instruction as its first non-PHI instruction.

• There can be only one ‘landingpad’ instruction within the landing pad block.

• A basic block that is not a landing pad block may not include a ‘landingpad’ instruction.

Example:

;; A landing pad which can catch an integer.
%res = landingpad { ptr, i32 }
         catch ptr @_ZTIi
;; A landing pad that is a cleanup.
%res = landingpad { ptr, i32 }
         cleanup
;; A landing pad which can catch an integer and can only throw a double.
%res = landingpad { ptr, i32 }
         catch ptr @_ZTIi
         filter [1 x ptr] [ptr @_ZTId]

‘catchpad’ Instruction

Syntax:

<resultval> = catchpad within <catchswitch> [<args>*]

Overview:

The ‘catchpad’ instruction is used by LLVM’s exception handling system to specify that a basic block begins a catch handler — one where a personality routine attempts to transfer control to catch an exception.

Arguments:

The catchswitch operand must always be a token produced by a catchswitch instruction in a predecessor block. This ensures that each catchpad has exactly one predecessor block, and it always terminates in a catchswitch.

The args correspond to whatever information the personality routine requires to know if this is an appropriate handler for the exception. Control will transfer to the catchpad if this is the first appropriate handler for the exception.

The resultval has the type token and is used to match the catchpad to corresponding catchrets and other nested EH pads.

Semantics:

When the call stack is being unwound due to an exception being thrown, the exception is compared against the args. If it doesn’t match, control will not reach the catchpad instruction. The representation of args is entirely target and personality function-specific.

Like the landingpad instruction, the catchpad instruction must be the first non-phi of its parent basic block.

The meaning of the tokens produced and consumed by catchpad and other “pad” instructions is described in the Windows exception handling documentation.

When a catchpad has been “entered” but not yet “exited” (as described in the EH documentation), it is undefined behavior to execute a call or invoke that does not carry an appropriate “funclet” bundle.

Example:

dispatch:
  %cs = catchswitch within none [label %handler0] unwind to caller
  ;; A catch block which can catch an integer.
handler0:
  %tok = catchpad within %cs [ptr @_ZTIi]

‘cleanuppad’ Instruction

Syntax:

<resultval> = cleanuppad within <parent> [<args>*]

Overview:

The ‘cleanuppad’ instruction is used by LLVM’s exception handling system to specify that a basic block is a cleanup block — one where a personality routine attempts to transfer control to run cleanup actions. The args correspond to whatever additional information the personality function requires to execute the cleanup. The resultval has the type token and is used to match the cleanuppad to corresponding cleanuprets. The parent argument is the token of the funclet that contains the cleanuppad instruction. If the cleanuppad is not inside a funclet, this operand may be the token none.

Arguments:

The instruction takes a list of arbitrary values which are interpreted by the personality function.

Semantics:

When the call stack is being unwound due to an exception being thrown, the personality function transfers control to the cleanuppad with the aid of the personality-specific arguments. As with calling conventions, how the personality function results are represented in LLVM IR is target specific.

The cleanuppad instruction has several restrictions:

• A cleanup block is a basic block which is the unwind destination of an exceptional instruction.

• A cleanup block must have a ‘cleanuppad’ instruction as its first non-PHI instruction.

• There can be only one ‘cleanuppad’ instruction within the cleanup block.

• A basic block that is not a cleanup block may not include a ‘cleanuppad’ instruction.

When a cleanuppad has been “entered” but not yet “exited” (as described in the EH documentation), it is undefined behavior to execute a call or invoke that does not carry an appropriate “funclet” bundle.

Example:

%tok = cleanuppad within %cs []

Debug Records

Debug records appear interleaved with instructions, but are not instructions; they are used only to define debug information, and have no effect on generated code. They are distinguished from instructions by the use of a leading # and an extra level of indentation. As an example:

%inst1 = op1 %a, %b
  #dbg_value(%inst1, !10, !DIExpression(), !11)
%inst2 = op2 %inst1, %c

These debug records replace the prior debug intrinsics. Debug records will be disabled if --write-experimental-debuginfo=false is passed to LLVM; it is an error for both records and intrinsics to appear in the same module. More information about debug records can be found in the LLVM Source Level Debugging document.

Intrinsic Functions

LLVM supports the notion of an “intrinsic function”. These functions have well known names and semantics and are required to follow certain restrictions. Overall, these intrinsics represent an extension mechanism for the LLVM language that does not require changing all of the transformations in LLVM when adding to the language (or the bitcode reader/writer, the parser, etc…).

Intrinsic function names must all start with an “llvm.” prefix. This prefix is reserved in LLVM for intrinsic names; thus, function names may not begin with this prefix. Intrinsic functions must always be external functions: you cannot define the body of intrinsic functions. Intrinsic functions may only be used in call or invoke instructions: it is illegal to take the address of an intrinsic function. Additionally, because intrinsic functions are part of the LLVM language, it is required if any are added that they be documented here.

Some intrinsic functions can be overloaded, i.e., the intrinsic represents a family of functions that perform the same operation but on different data types. Because LLVM can represent over 8 million different integer types, overloading is used commonly to allow an intrinsic function to operate on any integer type. One or more of the argument types or the result type can be overloaded to accept any integer type. Argument types may also be defined as exactly matching a previous argument’s type or the result type. This allows an intrinsic function which accepts multiple arguments, but needs all of them to be of the same type, to only be overloaded with respect to a single argument or the result.

Overloaded intrinsics will have the names of its overloaded argument types encoded into its function name, each preceded by a period. Only those types which are overloaded result in a name suffix. Arguments whose type is matched against another type do not. For example, the llvm.ctpop function can take an integer of any width and returns an integer of exactly the same integer width. This leads to a family of functions such as i8 @llvm.ctpop.i8(i8 %val) and i29 @llvm.ctpop.i29(i29 %val). Only one type, the return type, is overloaded, and only one type suffix is required. Because the argument’s type is matched against the return type, it does not require its own name suffix.

Unnamed types are encoded as s_s. Overloaded intrinsics that depend on an unnamed type in one of its overloaded argument types get an additional .<number> suffix. This allows differentiating intrinsics with different unnamed types as arguments. (For example: llvm.ssa.copy.p0s_s.2(%42*)) The number is tracked in the LLVM module and it ensures unique names in the module. While linking together two modules, it is still possible to get a name clash. In that case one of the names will be changed by getting a new number.

For target developers who are defining intrinsics for back-end code generation, any intrinsic overloads based solely the distinction between integer or floating point types should not be relied upon for correct code generation. In such cases, the recommended approach for target maintainers when defining intrinsics is to create separate integer and FP intrinsics rather than rely on overloading. For example, if different codegen is required for llvm.target.foo(<4 x i32>) and llvm.target.foo(<4 x float>) then these should be split into different intrinsics.

To learn how to add an intrinsic function, please see the Extending LLVM Guide.

Variable Argument Handling Intrinsics

Variable argument support is defined in LLVM with the va_arg instruction and these three intrinsic functions. These functions are related to the similarly named macros defined in the <stdarg.h> header file.

All of these functions take as arguments pointers to a target-specific value type “va_list”. The LLVM assembly language reference manual does not define what this type is, so all transformations should be prepared to handle these functions regardless of the type used. The intrinsics are overloaded, and can be used for pointers to different address spaces.

This example shows how the va_arg instruction and the variable argument handling intrinsic functions are used.

; This struct is different for every platform. For most platforms,
; it is merely a ptr.
%struct.va_list = type { ptr }

; For Unix x86_64 platforms, va_list is the following struct:
; %struct.va_list = type { i32, i32, ptr, ptr }

define i32 @test(i32 %X, ...) {
  ; Initialize variable argument processing
  %ap = alloca %struct.va_list
  call void @llvm.va_start.p0(ptr %ap)

  ; Read a single integer argument
  %tmp = va_arg ptr %ap, i32

  ; Demonstrate usage of llvm.va_copy and llvm.va_end
  %aq = alloca ptr
  call void @llvm.va_copy.p0(ptr %aq, ptr %ap)
  call void @llvm.va_end.p0(ptr %aq)

  ; Stop processing of arguments.
  call void @llvm.va_end.p0(ptr %ap)
  ret i32 %tmp
}

declare void @llvm.va_start.p0(ptr)
declare void @llvm.va_copy.p0(ptr, ptr)
declare void @llvm.va_end.p0(ptr)

‘llvm.va_start’ Intrinsic

Syntax:

declare void @llvm.va_start.p0(ptr <arglist>)
declare void @llvm.va_start.p5(ptr addrspace(5) <arglist>)

Overview:

The ‘llvm.va_start’ intrinsic initializes <arglist> for subsequent use by va_arg.

Arguments:

The argument is a pointer to a va_list element to initialize.

Semantics:

The ‘llvm.va_start’ intrinsic works just like the va_start macro available in C. In a target-dependent way, it initializes the va_list element to which the argument points, so that the next call to va_arg will produce the first variable argument passed to the function. Unlike the C va_start macro, this intrinsic does not need to know the last argument of the function as the compiler can figure that out.

‘llvm.va_end’ Intrinsic

Syntax:

declare void @llvm.va_end.p0(ptr <arglist>)
declare void @llvm.va_end.p5(ptr addrspace(5) <arglist>)

Overview:

The ‘llvm.va_end’ intrinsic destroys <arglist>, which has been initialized previously with llvm.va_start or llvm.va_copy.

Arguments:

The argument is a pointer to a va_list to destroy.

Semantics:

The ‘llvm.va_end’ intrinsic works just like the va_end macro available in C. In a target-dependent way, it destroys the va_list element to which the argument points. Calls to llvm.va_start and llvm.va_copy must be matched exactly with calls to llvm.va_end.

‘llvm.va_copy’ Intrinsic

Syntax:

declare void @llvm.va_copy.p0(ptr <destarglist>, ptr <srcarglist>)
declare void @llvm.va_copy.p5(ptr addrspace(5) <destarglist>, ptr addrspace(5) <srcarglist>)

Overview:

The ‘llvm.va_copy’ intrinsic copies the current argument position from the source argument list to the destination argument list.

Arguments:

The first argument is a pointer to a va_list element to initialize. The second argument is a pointer to a va_list element to copy from. The address spaces of the two arguments must match.

Semantics:

The ‘llvm.va_copy’ intrinsic works just like the va_copy macro available in C. In a target-dependent way, it copies the source va_list element into the destination va_list element. This intrinsic is necessary because the `` llvm.va_start`` intrinsic may be arbitrarily complex and require, for example, memory allocation.

Accurate Garbage Collection Intrinsics

LLVM’s support for Accurate Garbage Collection (GC) requires the frontend to generate code containing appropriate intrinsic calls and select an appropriate GC strategy which knows how to lower these intrinsics in a manner which is appropriate for the target collector.

These intrinsics allow identification of GC roots on the stack, as well as garbage collector implementations that require read and write barriers. Frontends for type-safe garbage collected languages should generate these intrinsics to make use of the LLVM garbage collectors. For more details, see Garbage Collection with LLVM.

LLVM provides an second experimental set of intrinsics for describing garbage collection safepoints in compiled code. These intrinsics are an alternative to the llvm.gcroot intrinsics, but are compatible with the ones for read and write barriers. The differences in approach are covered in the Garbage Collection with LLVM documentation. The intrinsics themselves are described in Garbage Collection Safepoints in LLVM.

‘llvm.gcroot’ Intrinsic

Syntax:

declare void @llvm.gcroot(ptr %ptrloc, ptr %metadata)

Overview:

The ‘llvm.gcroot’ intrinsic declares the existence of a GC root to the code generator, and allows some metadata to be associated with it.

Arguments:

The first argument specifies the address of a stack object that contains the root pointer. The second pointer (which must be either a constant or a global value address) contains the meta-data to be associated with the root.

Semantics:

At runtime, a call to this intrinsic stores a null pointer into the “ptrloc” location. At compile-time, the code generator generates information to allow the runtime to find the pointer at GC safe points. The ‘llvm.gcroot’ intrinsic may only be used in a function which specifies a GC algorithm.

‘llvm.gcread’ Intrinsic

Syntax:

declare ptr @llvm.gcread(ptr %ObjPtr, ptr %Ptr)

Overview:

The ‘llvm.gcread’ intrinsic identifies reads of references from heap locations, allowing garbage collector implementations that require read barriers.

Arguments:

The second argument is the address to read from, which should be an address allocated from the garbage collector. The first object is a pointer to the start of the referenced object, if needed by the language runtime (otherwise null).

Semantics:

The ‘llvm.gcread’ intrinsic has the same semantics as a load instruction, but may be replaced with substantially more complex code by the garbage collector runtime, as needed. The ‘llvm.gcread’ intrinsic may only be used in a function which specifies a GC algorithm.

‘llvm.gcwrite’ Intrinsic

Syntax:

declare void @llvm.gcwrite(ptr %P1, ptr %Obj, ptr %P2)

Overview:

The ‘llvm.gcwrite’ intrinsic identifies writes of references to heap locations, allowing garbage collector implementations that require write barriers (such as generational or reference counting collectors).

Arguments:

The first argument is the reference to store, the second is the start of the object to store it to, and the third is the address of the field of Obj to store to. If the runtime does not require a pointer to the object, Obj may be null.

Semantics:

The ‘llvm.gcwrite’ intrinsic has the same semantics as a store instruction, but may be replaced with substantially more complex code by the garbage collector runtime, as needed. The ‘llvm.gcwrite’ intrinsic may only be used in a function which specifies a GC algorithm.

‘llvm.experimental.gc.statepoint’ Intrinsic

Syntax:

declare token
  @llvm.experimental.gc.statepoint(i64 <id>, i32 <num patch bytes>,
                 ptr elementtype(func_type) <target>,
                 i64 <#call args>, i64 <flags>,
                 ... (call parameters),
                 i64 0, i64 0)

Overview:

The statepoint intrinsic represents a call which is parse-able by the runtime.

Operands:

The ‘id’ operand is a constant integer that is reported as the ID field in the generated stackmap. LLVM does not interpret this parameter in any way and its meaning is up to the statepoint user to decide. Note that LLVM is free to duplicate code containing statepoint calls, and this may transform IR that had a unique ‘id’ per lexical call to statepoint to IR that does not.

If ‘num patch bytes’ is non-zero then the call instruction corresponding to the statepoint is not emitted and LLVM emits ‘num patch bytes’ bytes of nops in its place. LLVM will emit code to prepare the function arguments and retrieve the function return value in accordance to the calling convention; the former before the nop sequence and the latter after the nop sequence. It is expected that the user will patch over the ‘num patch bytes’ bytes of nops with a calling sequence specific to their runtime before executing the generated machine code. There are no guarantees with respect to the alignment of the nop sequence. Unlike Stack maps and patch points in LLVM statepoints do not have a concept of shadow bytes. Note that semantically the statepoint still represents a call or invoke to ‘target’, and the nop sequence after patching is expected to represent an operation equivalent to a call or invoke to ‘target’.

The ‘target’ operand is the function actually being called. The operand must have an elementtype attribute specifying the function type of the target. The target can be specified as either a symbolic LLVM function, or as an arbitrary Value of pointer type. Note that the function type must match the signature of the callee and the types of the ‘call parameters’ arguments.

The ‘#call args’ operand is the number of arguments to the actual call. It must exactly match the number of arguments passed in the ‘call parameters’ variable length section.

The ‘flags’ operand is used to specify extra information about the statepoint. This is currently only used to mark certain statepoints as GC transitions. This operand is a 64-bit integer with the following layout, where bit 0 is the least significant bit:

Bit #	Usage
0	Set if the statepoint is a GC transition, cleared otherwise.
1-63	Reserved for future use; must be cleared.

The ‘call parameters’ arguments are simply the arguments which need to be passed to the call target. They will be lowered according to the specified calling convention and otherwise handled like a normal call instruction. The number of arguments must exactly match what is specified in ‘# call args’. The types must match the signature of ‘target’.

The ‘call parameter’ attributes must be followed by two ‘i64 0’ constants. These were originally the length prefixes for ‘gc transition parameter’ and ‘deopt parameter’ arguments, but the role of these parameter sets have been entirely replaced with the corresponding operand bundles. In a future revision, these now redundant arguments will be removed.

Semantics:

A statepoint is assumed to read and write all memory. As a result, memory operations can not be reordered past a statepoint. It is illegal to mark a statepoint as being either ‘readonly’ or ‘readnone’.

Note that legal IR can not perform any memory operation on a ‘gc pointer’ argument of the statepoint in a location statically reachable from the statepoint. Instead, the explicitly relocated value (from a gc.relocate) must be used.

‘llvm.experimental.gc.result’ Intrinsic

Syntax:

declare type
  @llvm.experimental.gc.result(token %statepoint_token)

Overview:

gc.result extracts the result of the original call instruction which was replaced by the gc.statepoint. The gc.result intrinsic is actually a family of three intrinsics due to an implementation limitation. Other than the type of the return value, the semantics are the same.

Operands:

The first and only argument is the gc.statepoint which starts the safepoint sequence of which this gc.result is a part. Despite the typing of this as a generic token, only the value defined by a gc.statepoint is legal here.

Semantics:

The gc.result represents the return value of the call target of the statepoint. The type of the gc.result must exactly match the type of the target. If the call target returns void, there will be no gc.result.

A gc.result is modeled as a ‘readnone’ pure function. It has no side effects since it is just a projection of the return value of the previous call represented by the gc.statepoint.

‘llvm.experimental.gc.relocate’ Intrinsic

Syntax:

declare <pointer type>
  @llvm.experimental.gc.relocate(token %statepoint_token,
                                 i32 %base_offset,
                                 i32 %pointer_offset)

Overview:

A gc.relocate returns the potentially relocated value of a pointer at the safepoint.

Operands:

The first argument is the gc.statepoint which starts the safepoint sequence of which this gc.relocation is a part. Despite the typing of this as a generic token, only the value defined by a gc.statepoint is legal here.

The second and third arguments are both indices into operands of the corresponding statepoint’s gc-live operand bundle.

The second argument is an index which specifies the allocation for the pointer being relocated. The associated value must be within the object with which the pointer being relocated is associated. The optimizer is free to change which interior derived pointer is reported, provided that it does not replace an actual base pointer with another interior derived pointer. Collectors are allowed to rely on the base pointer operand remaining an actual base pointer if so constructed.

The third argument is an index which specify the (potentially) derived pointer being relocated. It is legal for this index to be the same as the second argument if-and-only-if a base pointer is being relocated.

Semantics:

The return value of gc.relocate is the potentially relocated value of the pointer specified by its arguments. It is unspecified how the value of the returned pointer relates to the argument to the gc.statepoint other than that a) it points to the same source language object with the same offset, and b) the ‘based-on’ relationship of the newly relocated pointers is a projection of the unrelocated pointers. In particular, the integer value of the pointer returned is unspecified.

A gc.relocate is modeled as a readnone pure function. It has no side effects since it is just a way to extract information about work done during the actual call modeled by the gc.statepoint.

‘llvm.experimental.gc.get.pointer.base’ Intrinsic

Syntax:

declare <pointer type>
  @llvm.experimental.gc.get.pointer.base(
    <pointer type> readnone nocapture %derived_ptr)
    nounwind willreturn memory(none)

Overview:

gc.get.pointer.base for a derived pointer returns its base pointer.

Operands:

The only argument is a pointer which is based on some object with an unknown offset from the base of said object.

Semantics:

This intrinsic is used in the abstract machine model for GC to represent the base pointer for an arbitrary derived pointer.

This intrinsic is inlined by the RewriteStatepointsForGC pass by replacing all uses of this callsite with the offset of a derived pointer from its base pointer value. The replacement is done as part of the lowering to the explicit statepoint model.

The return pointer type must be the same as the type of the parameter.

‘llvm.experimental.gc.get.pointer.offset’ Intrinsic

Syntax:

declare i64
  @llvm.experimental.gc.get.pointer.offset(
    <pointer type> readnone nocapture %derived_ptr)
    nounwind willreturn memory(none)

Overview:

gc.get.pointer.offset for a derived pointer returns the offset from its base pointer.

Operands:

The only argument is a pointer which is based on some object with an unknown offset from the base of said object.

Semantics:

This intrinsic is used in the abstract machine model for GC to represent the offset of an arbitrary derived pointer from its base pointer.

This intrinsic is inlined by the RewriteStatepointsForGC pass by replacing all uses of this callsite with the offset of a derived pointer from its base pointer value. The replacement is done as part of the lowering to the explicit statepoint model.

Basically this call calculates difference between the derived pointer and its base pointer (see ‘llvm.experimental.gc.get.pointer.base’ Intrinsic) both ptrtoint casted. But this cast done outside the RewriteStatepointsForGC pass could result in the pointers lost for further lowering from the abstract model to the explicit physical one.

Code Generator Intrinsics

These intrinsics are provided by LLVM to expose special features that may only be implemented with code generator support.

‘llvm.returnaddress’ Intrinsic

Syntax:

declare ptr @llvm.returnaddress(i32 <level>)

Overview:

The ‘llvm.returnaddress’ intrinsic attempts to compute a target-specific value indicating the return address of the current function or one of its callers.

Arguments:

The argument to this intrinsic indicates which function to return the address for. Zero indicates the calling function, one indicates its caller, etc. The argument is required to be a constant integer value.

Semantics:

The ‘llvm.returnaddress’ intrinsic either returns a pointer indicating the return address of the specified call frame, or zero if it cannot be identified. The value returned by this intrinsic is likely to be incorrect or 0 for arguments other than zero, so it should only be used for debugging purposes.

Note that calling this intrinsic does not prevent function inlining or other aggressive transformations, so the value returned may not be that of the obvious source-language caller.

‘llvm.addressofreturnaddress’ Intrinsic

Syntax:

declare ptr @llvm.addressofreturnaddress()

Overview:

The ‘llvm.addressofreturnaddress’ intrinsic returns a target-specific pointer to the place in the stack frame where the return address of the current function is stored.

Semantics:

Note that calling this intrinsic does not prevent function inlining or other aggressive transformations, so the value returned may not be that of the obvious source-language caller.

This intrinsic is only implemented for x86 and aarch64.

‘llvm.sponentry’ Intrinsic

Syntax:

declare ptr @llvm.sponentry()

Overview:

The ‘llvm.sponentry’ intrinsic returns the stack pointer value at the entry of the current function calling this intrinsic.

Semantics:

Note this intrinsic is only verified on AArch64 and ARM.

‘llvm.frameaddress’ Intrinsic

Syntax:

declare ptr @llvm.frameaddress(i32 <level>)

Overview:

The ‘llvm.frameaddress’ intrinsic attempts to return the target-specific frame pointer value for the specified stack frame.

Arguments:

The argument to this intrinsic indicates which function to return the frame pointer for. Zero indicates the calling function, one indicates its caller, etc. The argument is required to be a constant integer value.

Semantics:

The ‘llvm.frameaddress’ intrinsic either returns a pointer indicating the frame address of the specified call frame, or zero if it cannot be identified. The value returned by this intrinsic is likely to be incorrect or 0 for arguments other than zero, so it should only be used for debugging purposes.

Note that calling this intrinsic does not prevent function inlining or other aggressive transformations, so the value returned may not be that of the obvious source-language caller.

‘llvm.swift.async.context.addr’ Intrinsic

Syntax:

declare ptr @llvm.swift.async.context.addr()

Overview:

The ‘llvm.swift.async.context.addr’ intrinsic returns a pointer to the part of the extended frame record containing the asynchronous context of a Swift execution.

Semantics:

If the caller has a swiftasync parameter, that argument will initially be stored at the returned address. If not, it will be initialized to null.

‘llvm.localescape’ and ‘llvm.localrecover’ Intrinsics

Syntax:

declare void @llvm.localescape(...)
declare ptr @llvm.localrecover(ptr %func, ptr %fp, i32 %idx)

Overview:

The ‘llvm.localescape’ intrinsic escapes offsets of a collection of static allocas, and the ‘llvm.localrecover’ intrinsic applies those offsets to a live frame pointer to recover the address of the allocation. The offset is computed during frame layout of the caller of llvm.localescape.

Arguments:

All arguments to ‘llvm.localescape’ must be pointers to static allocas or casts of static allocas. Each function can only call ‘llvm.localescape’ once, and it can only do so from the entry block.

The func argument to ‘llvm.localrecover’ must be a constant bitcasted pointer to a function defined in the current module. The code generator cannot determine the frame allocation offset of functions defined in other modules.

The fp argument to ‘llvm.localrecover’ must be a frame pointer of a call frame that is currently live. The return value of ‘llvm.localaddress’ is one way to produce such a value, but various runtimes also expose a suitable pointer in platform-specific ways.

The idx argument to ‘llvm.localrecover’ indicates which alloca passed to ‘llvm.localescape’ to recover. It is zero-indexed.

Semantics:

These intrinsics allow a group of functions to share access to a set of local stack allocations of a one parent function. The parent function may call the ‘llvm.localescape’ intrinsic once from the function entry block, and the child functions can use ‘llvm.localrecover’ to access the escaped allocas. The ‘llvm.localescape’ intrinsic blocks inlining, as inlining changes where the escaped allocas are allocated, which would break attempts to use ‘llvm.localrecover’.

‘llvm.seh.try.begin’ and ‘llvm.seh.try.end’ Intrinsics

Syntax:

declare void @llvm.seh.try.begin()
declare void @llvm.seh.try.end()

Overview:

The ‘llvm.seh.try.begin’ and ‘llvm.seh.try.end’ intrinsics mark the boundary of a _try region for Windows SEH Asynchronous Exception Handling.

Semantics:

When a C-function is compiled with Windows SEH Asynchronous Exception option, -feh_asynch (aka MSVC -EHa), these two intrinsics are injected to mark _try boundary and to prevent potential exceptions from being moved across boundary. Any set of operations can then be confined to the region by reading their leaf inputs via volatile loads and writing their root outputs via volatile stores.

‘llvm.seh.scope.begin’ and ‘llvm.seh.scope.end’ Intrinsics

Syntax:

declare void @llvm.seh.scope.begin()
declare void @llvm.seh.scope.end()

Overview:

The ‘llvm.seh.scope.begin’ and ‘llvm.seh.scope.end’ intrinsics mark the boundary of a CPP object lifetime for Windows SEH Asynchronous Exception Handling (MSVC option -EHa).

Semantics:

LLVM’s ordinary exception-handling representation associates EH cleanups and handlers only with invoke``s, which normally correspond only to call sites.  To support arbitrary faulting instructions, it must be possible to recover the current EH scope for any instruction.  Turning every operation in LLVM that could fault into an ``invoke of a new, potentially-throwing intrinsic would require adding a large number of intrinsics, impede optimization of those operations, and make compilation slower by introducing many extra basic blocks. These intrinsics can be used instead to mark the region protected by a cleanup, such as for a local C++ object with a non-trivial destructor. llvm.seh.scope.begin is used to mark the start of the region; it is always called with invoke, with the unwind block being the desired unwind destination for any potentially-throwing instructions within the region. llvm.seh.scope.end is used to mark when the scope ends and the EH cleanup is no longer required (e.g. because the destructor is being called).

‘llvm.read_register’, ‘llvm.read_volatile_register’, and ‘llvm.write_register’ Intrinsics

Syntax:

declare i32 @llvm.read_register.i32(metadata)
declare i64 @llvm.read_register.i64(metadata)
declare i32 @llvm.read_volatile_register.i32(metadata)
declare i64 @llvm.read_volatile_register.i64(metadata)
declare void @llvm.write_register.i32(metadata, i32 @value)
declare void @llvm.write_register.i64(metadata, i64 @value)
!0 = !{!"sp\00"}

Overview:

The ‘llvm.read_register’, ‘llvm.read_volatile_register’, and ‘llvm.write_register’ intrinsics provide access to the named register. The register must be valid on the architecture being compiled to. The type needs to be compatible with the register being read.

Semantics:

The ‘llvm.read_register’ and ‘llvm.read_volatile_register’ intrinsics return the current value of the register, where possible. The ‘llvm.write_register’ intrinsic sets the current value of the register, where possible.

A call to ‘llvm.read_volatile_register’ is assumed to have side-effects and possibly return a different value each time (e.g. for a timer register).

This is useful to implement named register global variables that need to always be mapped to a specific register, as is common practice on bare-metal programs including OS kernels.

The compiler doesn’t check for register availability or use of the used register in surrounding code, including inline assembly. Because of that, allocatable registers are not supported.

Warning: So far it only works with the stack pointer on selected architectures (ARM, AArch64, PowerPC and x86_64). Significant amount of work is needed to support other registers and even more so, allocatable registers.

‘llvm.stacksave’ Intrinsic

Syntax:

declare ptr @llvm.stacksave.p0()
declare ptr addrspace(5) @llvm.stacksave.p5()

Overview:

The ‘llvm.stacksave’ intrinsic is used to remember the current state of the function stack, for use with llvm.stackrestore. This is useful for implementing language features like scoped automatic variable sized arrays in C99.

Semantics:

This intrinsic returns an opaque pointer value that can be passed to llvm.stackrestore. When an llvm.stackrestore intrinsic is executed with a value saved from llvm.stacksave, it effectively restores the state of the stack to the state it was in when the llvm.stacksave intrinsic executed. In practice, this pops any alloca blocks from the stack that were allocated after the llvm.stacksave was executed. The address space should typically be the alloca address space.

‘llvm.stackrestore’ Intrinsic

Syntax:

declare void @llvm.stackrestore.p0(ptr %ptr)
declare void @llvm.stackrestore.p5(ptr addrspace(5) %ptr)

Overview:

The ‘llvm.stackrestore’ intrinsic is used to restore the state of the function stack to the state it was in when the corresponding llvm.stacksave intrinsic executed. This is useful for implementing language features like scoped automatic variable sized arrays in C99. The address space should typically be the alloca address space.

Semantics:

See the description for llvm.stacksave.

‘llvm.get.dynamic.area.offset’ Intrinsic

Syntax:

declare i32 @llvm.get.dynamic.area.offset.i32()
declare i64 @llvm.get.dynamic.area.offset.i64()

Overview:

The ‘llvm.get.dynamic.area.offset.*’ intrinsic family is used to get the offset from native stack pointer to the address of the most recent dynamic alloca on the caller’s stack. These intrinsics are intended for use in combination with llvm.stacksave to get a pointer to the most recent dynamic alloca. This is useful, for example, for AddressSanitizer’s stack unpoisoning routines.

Semantics:

These intrinsics return a non-negative integer value that can be used to get the address of the most recent dynamic alloca, allocated by alloca on the caller’s stack. In particular, for targets where stack grows downwards, adding this offset to the native stack pointer would get the address of the most recent dynamic alloca. For targets where stack grows upwards, the situation is a bit more complicated, because subtracting this value from stack pointer would get the address one past the end of the most recent dynamic alloca.

Although for most targets llvm.get.dynamic.area.offset <int_get_dynamic_area_offset> returns just a zero, for others, such as PowerPC and PowerPC64, it returns a compile-time-known constant value.

The return value type of llvm.get.dynamic.area.offset must match the target’s default address space’s (address space 0) pointer type.

‘llvm.prefetch’ Intrinsic

Syntax:

declare void @llvm.prefetch(ptr <address>, i32 <rw>, i32 <locality>, i32 <cache type>)

Overview:

The ‘llvm.prefetch’ intrinsic is a hint to the code generator to insert a prefetch instruction if supported; otherwise, it is a noop. Prefetches have no effect on the behavior of the program but can change its performance characteristics.

Arguments:

address is the address to be prefetched, rw is the specifier determining if the fetch should be for a read (0) or write (1), and locality is a temporal locality specifier ranging from (0) - no locality, to (3) - extremely local keep in cache. The cache type specifies whether the prefetch is performed on the data (1) or instruction (0) cache. The rw, locality and cache type arguments must be constant integers.

Semantics:

This intrinsic does not modify the behavior of the program. In particular, prefetches cannot trap and do not produce a value. On targets that support this intrinsic, the prefetch can provide hints to the processor cache for better performance.

‘llvm.pcmarker’ Intrinsic

Syntax:

declare void @llvm.pcmarker(i32 <id>)

Overview:

The ‘llvm.pcmarker’ intrinsic is a method to export a Program Counter (PC) in a region of code to simulators and other tools. The method is target specific, but it is expected that the marker will use exported symbols to transmit the PC of the marker. The marker makes no guarantees that it will remain with any specific instruction after optimizations. It is possible that the presence of a marker will inhibit optimizations. The intended use is to be inserted after optimizations to allow correlations of simulation runs.

Arguments:

id is a numerical id identifying the marker.

Semantics:

This intrinsic does not modify the behavior of the program. Backends that do not support this intrinsic may ignore it.

‘llvm.readcyclecounter’ Intrinsic

Syntax:

declare i64 @llvm.readcyclecounter()

Overview:

The ‘llvm.readcyclecounter’ intrinsic provides access to the cycle counter register (or similar low latency, high accuracy clocks) on those targets that support it. On X86, it should map to RDTSC. On Alpha, it should map to RPCC. As the backing counters overflow quickly (on the order of 9 seconds on alpha), this should only be used for small timings.

Semantics:

When directly supported, reading the cycle counter should not modify any memory. Implementations are allowed to either return an application specific value or a system wide value. On backends without support, this is lowered to a constant 0.

Note that runtime support may be conditional on the privilege-level code is running at and the host platform.

‘llvm.clear_cache’ Intrinsic

Syntax:

declare void @llvm.clear_cache(ptr, ptr)

Overview:

The ‘llvm.clear_cache’ intrinsic ensures visibility of modifications in the specified range to the execution unit of the processor. On targets with non-unified instruction and data cache, the implementation flushes the instruction cache.

Semantics:

On platforms with coherent instruction and data caches (e.g. x86), this intrinsic is a nop. On platforms with non-coherent instruction and data cache (e.g. ARM, MIPS), the intrinsic is lowered either to appropriate instructions or a system call, if cache flushing requires special privileges.

The default behavior is to emit a call to __clear_cache from the run time library.

This intrinsic does not empty the instruction pipeline. Modifications of the current function are outside the scope of the intrinsic.

‘llvm.instrprof.increment’ Intrinsic

Syntax:

declare void @llvm.instrprof.increment(ptr <name>, i64 <hash>,
                                       i32 <num-counters>, i32 <index>)

Overview:

The ‘llvm.instrprof.increment’ intrinsic can be emitted by a frontend for use with instrumentation based profiling. These will be lowered by the -instrprof pass to generate execution counts of a program at runtime.

Arguments:

The first argument is a pointer to a global variable containing the name of the entity being instrumented. This should generally be the (mangled) function name for a set of counters.

The second argument is a hash value that can be used by the consumer of the profile data to detect changes to the instrumented source, and the third is the number of counters associated with name. It is an error if hash or num-counters differ between two instances of instrprof.increment that refer to the same name.

The last argument refers to which of the counters for name should be incremented. It should be a value between 0 and num-counters.

Semantics:

This intrinsic represents an increment of a profiling counter. It will cause the -instrprof pass to generate the appropriate data structures and the code to increment the appropriate value, in a format that can be written out by a compiler runtime and consumed via the llvm-profdata tool.

The intrinsic is lowered differently for contextual profiling by the -ctx-instr-lower pass. Here:

• the entry basic block increment counter is lowered as a call to compiler-rt, to either __llvm_ctx_profile_start_context or __llvm_ctx_profile_get_context. Either returns a pointer to a context object which contains a buffer into which counter increments can happen. Note that the pointer value returned by compiler-rt may have its LSB set - counter increments happen offset from the address with the LSB cleared.

• all the other lowerings of llvm.instrprof.increment[.step] happen within that context.

• the context is assumed to be a local value to the function, and no concurrency concerns need to be handled by LLVM.

‘llvm.instrprof.increment.step’ Intrinsic

Syntax:

declare void @llvm.instrprof.increment.step(ptr <name>, i64 <hash>,
                                            i32 <num-counters>,
                                            i32 <index>, i64 <step>)

Overview:

The ‘llvm.instrprof.increment.step’ intrinsic is an extension to the ‘llvm.instrprof.increment’ intrinsic with an additional fifth argument to specify the step of the increment.

Arguments:

The first four arguments are the same as ‘llvm.instrprof.increment’ intrinsic.

The last argument specifies the value of the increment of the counter variable.

Semantics:

See description of ‘llvm.instrprof.increment’ intrinsic.

‘llvm.instrprof.callsite’ Intrinsic

Syntax:

declare void @llvm.instrprof.callsite(ptr <name>, i64 <hash>,
                                      i32 <num-counters>,
                                      i32 <index>, ptr <callsite>)

Overview:

The ‘llvm.instrprof.callsite’ intrinsic should be emitted before a callsite that’s not to a “fake” callee (like another intrinsic or asm). It is used by contextual profiling and has side-effects. Its lowering happens in IR, and target-specific backends should never encounter it.

Arguments:

The first 4 arguments are similar to llvm.instrprof.increment. The indexing is specific to callsites, meaning callsites are indexed from 0, independent from the indexes used by the other intrinsics (such as llvm.instrprof.increment[.step]).

The last argument is the called value of the callsite this intrinsic precedes.

Semantics:

This is lowered by contextual profiling. In contextual profiling, functions get, from compiler-rt, a pointer to a context object. The context object consists of a buffer LLVM can use to perform counter increments (i.e. the lowering of llvm.instrprof.increment[.step]. The address range following the counter buffer, <num-counters> x sizeof(ptr) - sized, is expected to contain pointers to contexts of functions called from this function (“subcontexts”). LLVM does not dereference into that memory region, just calculates GEPs.

The lowering of llvm.instrprof.callsite consists of:

• write to __llvm_ctx_profile_expected_callee the <callsite> value;

• write to __llvm_ctx_profile_callsite the address into this function’s context of the <index> position into the subcontexts region.

__llvm_ctx_profile_{expected_callee|callsite} are initialized by compiler-rt and are TLS. They are both vectors of pointers of size 2. The index into each is determined when the current function obtains the pointer to its context from compiler-rt. The pointer’s LSB gives the index.

‘llvm.instrprof.timestamp’ Intrinsic

Syntax:

declare void @llvm.instrprof.timestamp(i8* <name>, i64 <hash>,
                                       i32 <num-counters>, i32 <index>)

Overview:

The ‘llvm.instrprof.timestamp’ intrinsic is used to implement temporal profiling.

Arguments:

The arguments are the same as ‘llvm.instrprof.increment’. The index is expected to always be zero.

Semantics:

Similar to the ‘llvm.instrprof.increment’ intrinsic, but it stores a timestamp representing when this function was executed for the first time.

‘llvm.instrprof.cover’ Intrinsic

Syntax:

declare void @llvm.instrprof.cover(ptr <name>, i64 <hash>,
                                   i32 <num-counters>, i32 <index>)

Overview:

The ‘llvm.instrprof.cover’ intrinsic is used to implement coverage instrumentation.

Arguments:

The arguments are the same as the first four arguments of ‘llvm.instrprof.increment’.

Semantics:

Similar to the ‘llvm.instrprof.increment’ intrinsic, but it stores zero to the profiling variable to signify that the function has been covered. We store zero because this is more efficient on some targets.

‘llvm.instrprof.value.profile’ Intrinsic

Syntax:

declare void @llvm.instrprof.value.profile(ptr <name>, i64 <hash>,
                                           i64 <value>, i32 <value_kind>,
                                           i32 <index>)

Overview:

The ‘llvm.instrprof.value.profile’ intrinsic can be emitted by a frontend for use with instrumentation based profiling. This will be lowered by the -instrprof pass to find out the target values, instrumented expressions take in a program at runtime.

Arguments:

The first argument is a pointer to a global variable containing the name of the entity being instrumented. name should generally be the (mangled) function name for a set of counters.

The second argument is a hash value that can be used by the consumer of the profile data to detect changes to the instrumented source. It is an error if hash differs between two instances of llvm.instrprof.* that refer to the same name.

The third argument is the value of the expression being profiled. The profiled expression’s value should be representable as an unsigned 64-bit value. The fourth argument represents the kind of value profiling that is being done. The supported value profiling kinds are enumerated through the InstrProfValueKind type declared in the <include/llvm/ProfileData/InstrProf.h> header file. The last argument is the index of the instrumented expression within name. It should be >= 0.

Semantics:

This intrinsic represents the point where a call to a runtime routine should be inserted for value profiling of target expressions. -instrprof pass will generate the appropriate data structures and replace the llvm.instrprof.value.profile intrinsic with the call to the profile runtime library with proper arguments.

‘llvm.instrprof.mcdc.parameters’ Intrinsic

Syntax:

declare void @llvm.instrprof.mcdc.parameters(ptr <name>, i64 <hash>,
                                             i32 <bitmap-bits>)

Overview:

The ‘llvm.instrprof.mcdc.parameters’ intrinsic is used to initiate MC/DC code coverage instrumentation for a function.

Arguments:

The first argument is a pointer to a global variable containing the name of the entity being instrumented. This should generally be the (mangled) function name for a set of counters.

The second argument is a hash value that can be used by the consumer of the profile data to detect changes to the instrumented source.

The third argument is the number of bitmap bits required by the function to record the number of test vectors executed for each boolean expression.

Semantics:

This intrinsic represents basic MC/DC parameters initiating one or more MC/DC instrumentation sequences in a function. It will cause the -instrprof pass to generate the appropriate data structures and the code to instrument MC/DC test vectors in a format that can be written out by a compiler runtime and consumed via the llvm-profdata tool.

‘llvm.instrprof.mcdc.tvbitmap.update’ Intrinsic

Syntax:

declare void @llvm.instrprof.mcdc.tvbitmap.update(ptr <name>, i64 <hash>,
                                                  i32 <bitmap-index>,
                                                  ptr <mcdc-temp-addr>)

Overview:

The ‘llvm.instrprof.mcdc.tvbitmap.update’ intrinsic is used to track MC/DC test vector execution after each boolean expression has been fully executed. The overall value of the condition bitmap, after it has been successively updated with the true or false evaluation of each condition, uniquely identifies an executed MC/DC test vector and is used as a bit index into the global test vector bitmap.

Arguments:

The first argument is a pointer to a global variable containing the name of the entity being instrumented. This should generally be the (mangled) function name for a set of counters.

The second argument is a hash value that can be used by the consumer of the profile data to detect changes to the instrumented source.

The third argument is the bit index into the global test vector bitmap corresponding to the function.

The fourth argument is the address of the condition bitmap, which contains a value representing an executed MC/DC test vector. It is loaded and used as the bit index of the test vector bitmap.

Semantics:

This intrinsic represents the final operation of an MC/DC instrumentation sequence and will cause the -instrprof pass to generate the code to instrument an update of a function’s global test vector bitmap to indicate that a test vector has been executed. The global test vector bitmap can be consumed by the llvm-profdata and llvm-cov tools.

‘llvm.thread.pointer’ Intrinsic

Syntax:

declare ptr @llvm.thread.pointer()

Overview:

The ‘llvm.thread.pointer’ intrinsic returns the value of the thread pointer.

Semantics:

The ‘llvm.thread.pointer’ intrinsic returns a pointer to the TLS area for the current thread. The exact semantics of this value are target specific: it may point to the start of TLS area, to the end, or somewhere in the middle. Depending on the target, this intrinsic may read a register, call a helper function, read from an alternate memory space, or perform other operations necessary to locate the TLS area. Not all targets support this intrinsic.

‘llvm.call.preallocated.setup’ Intrinsic

Syntax:

declare token @llvm.call.preallocated.setup(i32 %num_args)

Overview:

The ‘llvm.call.preallocated.setup’ intrinsic returns a token which can be used with a call’s "preallocated" operand bundle to indicate that certain arguments are allocated and initialized before the call.

Semantics:

The ‘llvm.call.preallocated.setup’ intrinsic returns a token which is associated with at most one call. The token can be passed to ‘@llvm.call.preallocated.arg’ to get a pointer to get that corresponding argument. The token must be the parameter to a "preallocated" operand bundle for the corresponding call.

Nested calls to ‘llvm.call.preallocated.setup’ are allowed, but must be properly nested. e.g.

:: code-block:: llvm

%t1 = call token @llvm.call.preallocated.setup(i32 0) %t2 = call token @llvm.call.preallocated.setup(i32 0) call void foo() [“preallocated”(token %t2)] call void foo() [“preallocated”(token %t1)]

is allowed, but not

:: code-block:: llvm

%t1 = call token @llvm.call.preallocated.setup(i32 0) %t2 = call token @llvm.call.preallocated.setup(i32 0) call void foo() [“preallocated”(token %t1)] call void foo() [“preallocated”(token %t2)]

‘llvm.call.preallocated.arg’ Intrinsic

Syntax:

declare ptr @llvm.call.preallocated.arg(token %setup_token, i32 %arg_index)

Overview:

The ‘llvm.call.preallocated.arg’ intrinsic returns a pointer to the corresponding preallocated argument for the preallocated call.

Semantics:

The ‘llvm.call.preallocated.arg’ intrinsic returns a pointer to the %arg_index``th argument with the ``preallocated attribute for the call associated with the %setup_token, which must be from ‘llvm.call.preallocated.setup’.

A call to ‘llvm.call.preallocated.arg’ must have a call site preallocated attribute. The type of the preallocated attribute must match the type used by the preallocated attribute of the corresponding argument at the preallocated call. The type is used in the case that an llvm.call.preallocated.setup does not have a corresponding call (e.g. due to DCE), where otherwise we cannot know how large the arguments are.

It is undefined behavior if this is called with a token from an ‘llvm.call.preallocated.setup’ if another ‘llvm.call.preallocated.setup’ has already been called or if the preallocated call corresponding to the ‘llvm.call.preallocated.setup’ has already been called.

‘llvm.call.preallocated.teardown’ Intrinsic

Syntax:

declare ptr @llvm.call.preallocated.teardown(token %setup_token)

Overview:

The ‘llvm.call.preallocated.teardown’ intrinsic cleans up the stack created by a ‘llvm.call.preallocated.setup’.

Semantics:

The token argument must be a ‘llvm.call.preallocated.setup’.

The ‘llvm.call.preallocated.teardown’ intrinsic cleans up the stack allocated by the corresponding ‘llvm.call.preallocated.setup’. Exactly one of this or the preallocated call must be called to prevent stack leaks. It is undefined behavior to call both a ‘llvm.call.preallocated.teardown’ and the preallocated call for a given ‘llvm.call.preallocated.setup’.

For example, if the stack is allocated for a preallocated call by a ‘llvm.call.preallocated.setup’, then an initializer function called on an allocated argument throws an exception, there should be a ‘llvm.call.preallocated.teardown’ in the exception handler to prevent stack leaks.

Following the nesting rules in ‘llvm.call.preallocated.setup’, nested calls to ‘llvm.call.preallocated.setup’ and ‘llvm.call.preallocated.teardown’ are allowed but must be properly nested.

Example:

    %cs = call token @llvm.call.preallocated.setup(i32 1)
    %x = call ptr @llvm.call.preallocated.arg(token %cs, i32 0) preallocated(i32)
    invoke void @constructor(ptr %x) to label %conta unwind label %contb
conta:
    call void @foo1(ptr preallocated(i32) %x) ["preallocated"(token %cs)]
    ret void
contb:
    %s = catchswitch within none [label %catch] unwind to caller
catch:
    %p = catchpad within %s []
    call void @llvm.call.preallocated.teardown(token %cs)
    ret void

Standard C/C++ Library Intrinsics

LLVM provides intrinsics for a few important standard C/C++ library functions. These intrinsics allow source-language front-ends to pass information about the alignment of the pointer arguments to the code generator, providing opportunity for more efficient code generation.

‘llvm.abs.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.abs on any integer bit width or any vector of integer elements.

declare i32 @llvm.abs.i32(i32 <src>, i1 <is_int_min_poison>)
declare <4 x i32> @llvm.abs.v4i32(<4 x i32> <src>, i1 <is_int_min_poison>)

Overview:

The ‘llvm.abs’ family of intrinsic functions returns the absolute value of an argument.

Arguments:

The first argument is the value for which the absolute value is to be returned. This argument may be of any integer type or a vector with integer element type. The return type must match the first argument type.

The second argument must be a constant and is a flag to indicate whether the result value of the ‘llvm.abs’ intrinsic is a poison value if the first argument is statically or dynamically an INT_MIN value.

Semantics:

The ‘llvm.abs’ intrinsic returns the magnitude (always positive) of the first argument or each element of a vector argument.”. If the first argument is INT_MIN, then the result is also INT_MIN if is_int_min_poison == 0 and poison otherwise.

‘llvm.smax.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use @llvm.smax on any integer bit width or any vector of integer elements.

declare i32 @llvm.smax.i32(i32 %a, i32 %b)
declare <4 x i32> @llvm.smax.v4i32(<4 x i32> %a, <4 x i32> %b)

Overview:

Return the larger of %a and %b comparing the values as signed integers. Vector intrinsics operate on a per-element basis. The larger element of %a and %b at a given index is returned for that index.

Arguments:

The arguments (%a and %b) may be of any integer type or a vector with integer element type. The argument types must match each other, and the return type must match the argument type.

‘llvm.smin.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use @llvm.smin on any integer bit width or any vector of integer elements.

declare i32 @llvm.smin.i32(i32 %a, i32 %b)
declare <4 x i32> @llvm.smin.v4i32(<4 x i32> %a, <4 x i32> %b)

Overview:

Return the smaller of %a and %b comparing the values as signed integers. Vector intrinsics operate on a per-element basis. The smaller element of %a and %b at a given index is returned for that index.

Arguments:

The arguments (%a and %b) may be of any integer type or a vector with integer element type. The argument types must match each other, and the return type must match the argument type.

‘llvm.umax.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use @llvm.umax on any integer bit width or any vector of integer elements.

declare i32 @llvm.umax.i32(i32 %a, i32 %b)
declare <4 x i32> @llvm.umax.v4i32(<4 x i32> %a, <4 x i32> %b)

Overview:

Return the larger of %a and %b comparing the values as unsigned integers. Vector intrinsics operate on a per-element basis. The larger element of %a and %b at a given index is returned for that index.

Arguments:

The arguments (%a and %b) may be of any integer type or a vector with integer element type. The argument types must match each other, and the return type must match the argument type.

‘llvm.umin.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use @llvm.umin on any integer bit width or any vector of integer elements.

declare i32 @llvm.umin.i32(i32 %a, i32 %b)
declare <4 x i32> @llvm.umin.v4i32(<4 x i32> %a, <4 x i32> %b)

Overview:

Return the smaller of %a and %b comparing the values as unsigned integers. Vector intrinsics operate on a per-element basis. The smaller element of %a and %b at a given index is returned for that index.

Arguments:

The arguments (%a and %b) may be of any integer type or a vector with integer element type. The argument types must match each other, and the return type must match the argument type.

‘llvm.scmp.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use @llvm.scmp on any integer bit width or any vector of integer elements.

declare i2 @llvm.scmp.i2.i32(i32 %a, i32 %b)
declare <4 x i32> @llvm.scmp.v4i32.v4i32(<4 x i32> %a, <4 x i32> %b)

Overview:

Return -1 if %a is signed less than %b, 0 if they are equal, and 1 if %a is signed greater than %b. Vector intrinsics operate on a per-element basis.

Arguments:

The arguments (%a and %b) may be of any integer type or a vector with integer element type. The argument types must match each other, and the return type must be at least as wide as i2, to hold the three possible return values.

‘llvm.ucmp.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use @llvm.ucmp on any integer bit width or any vector of integer elements.

declare i2 @llvm.ucmp.i2.i32(i32 %a, i32 %b)
declare <4 x i32> @llvm.ucmp.v4i32.v4i32(<4 x i32> %a, <4 x i32> %b)

Overview:

Return -1 if %a is unsigned less than %b, 0 if they are equal, and 1 if %a is unsigned greater than %b. Vector intrinsics operate on a per-element basis.

Arguments:

The arguments (%a and %b) may be of any integer type or a vector with integer element type. The argument types must match each other, and the return type must be at least as wide as i2, to hold the three possible return values.

‘llvm.memcpy’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.memcpy on any integer bit width and for different address spaces. Not all targets support all bit widths however.

declare void @llvm.memcpy.p0.p0.i32(ptr <dest>, ptr <src>,
                                    i32 <len>, i1 <isvolatile>)
declare void @llvm.memcpy.p0.p0.i64(ptr <dest>, ptr <src>,
                                    i64 <len>, i1 <isvolatile>)

Overview:

The ‘llvm.memcpy.*’ intrinsics copy a block of memory from the source location to the destination location.

Note that, unlike the standard libc function, the llvm.memcpy.* intrinsics do not return a value, takes extra isvolatile arguments and the pointers can be in specified address spaces.

Arguments:

The first argument is a pointer to the destination, the second is a pointer to the source. The third argument is an integer argument specifying the number of bytes to copy, and the fourth is a boolean indicating a volatile access.

The align parameter attribute can be provided for the first and second arguments.

If the isvolatile parameter is true, the llvm.memcpy call is a volatile operation. The detailed access behavior is not very cleanly specified and it is unwise to depend on it.

Semantics:

The ‘llvm.memcpy.*’ intrinsics copy a block of memory from the source location to the destination location, which must either be equal or non-overlapping. It copies “len” bytes of memory over. If the argument is known to be aligned to some boundary, this can be specified as an attribute on the argument.

If <len> is 0, it is no-op modulo the behavior of attributes attached to the arguments. If <len> is not a well-defined value, the behavior is undefined. If <len> is not zero, both <dest> and <src> should be well-defined, otherwise the behavior is undefined.

‘llvm.memcpy.inline’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.memcpy.inline on any integer bit width and for different address spaces. Not all targets support all bit widths however.

declare void @llvm.memcpy.inline.p0.p0.i32(ptr <dest>, ptr <src>,
                                           i32 <len>, i1 <isvolatile>)
declare void @llvm.memcpy.inline.p0.p0.i64(ptr <dest>, ptr <src>,
                                           i64 <len>, i1 <isvolatile>)

Overview:

The ‘llvm.memcpy.inline.*’ intrinsics copy a block of memory from the source location to the destination location and guarantees that no external functions are called.

Note that, unlike the standard libc function, the llvm.memcpy.inline.* intrinsics do not return a value, takes extra isvolatile arguments and the pointers can be in specified address spaces.

Arguments:

The first argument is a pointer to the destination, the second is a pointer to the source. The third argument is an integer argument specifying the number of bytes to copy, and the fourth is a boolean indicating a volatile access.

The align parameter attribute can be provided for the first and second arguments.

If the isvolatile parameter is true, the llvm.memcpy.inline call is a volatile operation. The detailed access behavior is not very cleanly specified and it is unwise to depend on it.

Semantics:

The ‘llvm.memcpy.inline.*’ intrinsics copy a block of memory from the source location to the destination location, which are not allowed to overlap. It copies “len” bytes of memory over. If the argument is known to be aligned to some boundary, this can be specified as an attribute on the argument. The behavior of ‘llvm.memcpy.inline.*’ is equivalent to the behavior of ‘llvm.memcpy.*’, but the generated code is guaranteed not to call any external functions.

‘llvm.memmove’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.memmove on any integer bit width and for different address space. Not all targets support all bit widths however.

declare void @llvm.memmove.p0.p0.i32(ptr <dest>, ptr <src>,
                                     i32 <len>, i1 <isvolatile>)
declare void @llvm.memmove.p0.p0.i64(ptr <dest>, ptr <src>,
                                     i64 <len>, i1 <isvolatile>)

Overview:

The ‘llvm.memmove.*’ intrinsics move a block of memory from the source location to the destination location. It is similar to the ‘llvm.memcpy’ intrinsic but allows the two memory locations to overlap.

Note that, unlike the standard libc function, the llvm.memmove.* intrinsics do not return a value, takes an extra isvolatile argument and the pointers can be in specified address spaces.

Arguments:

The first argument is a pointer to the destination, the second is a pointer to the source. The third argument is an integer argument specifying the number of bytes to copy, and the fourth is a boolean indicating a volatile access.

The align parameter attribute can be provided for the first and second arguments.

If the isvolatile parameter is true, the llvm.memmove call is a volatile operation. The detailed access behavior is not very cleanly specified and it is unwise to depend on it.

Semantics:

The ‘llvm.memmove.*’ intrinsics copy a block of memory from the source location to the destination location, which may overlap. It copies “len” bytes of memory over. If the argument is known to be aligned to some boundary, this can be specified as an attribute on the argument.

If <len> is 0, it is no-op modulo the behavior of attributes attached to the arguments. If <len> is not a well-defined value, the behavior is undefined. If <len> is not zero, both <dest> and <src> should be well-defined, otherwise the behavior is undefined.

‘llvm.memset.*’ Intrinsics

Syntax:

This is an overloaded intrinsic. You can use llvm.memset on any integer bit width and for different address spaces. However, not all targets support all bit widths.

declare void @llvm.memset.p0.i32(ptr <dest>, i8 <val>,
                                 i32 <len>, i1 <isvolatile>)
declare void @llvm.memset.p0.i64(ptr <dest>, i8 <val>,
                                 i64 <len>, i1 <isvolatile>)

Overview:

The ‘llvm.memset.*’ intrinsics fill a block of memory with a particular byte value.

Note that, unlike the standard libc function, the llvm.memset intrinsic does not return a value and takes an extra volatile argument. Also, the destination can be in an arbitrary address space.

Arguments:

The first argument is a pointer to the destination to fill, the second is the byte value with which to fill it, the third argument is an integer argument specifying the number of bytes to fill, and the fourth is a boolean indicating a volatile access.

The align parameter attribute can be provided for the first arguments.

If the isvolatile parameter is true, the llvm.memset call is a volatile operation. The detailed access behavior is not very cleanly specified and it is unwise to depend on it.

Semantics:

The ‘llvm.memset.*’ intrinsics fill “len” bytes of memory starting at the destination location. If the argument is known to be aligned to some boundary, this can be specified as an attribute on the argument.

If <len> is 0, it is no-op modulo the behavior of attributes attached to the arguments. If <len> is not a well-defined value, the behavior is undefined. If <len> is not zero, <dest> should be well-defined, otherwise the behavior is undefined.

‘llvm.memset.inline’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.memset.inline on any integer bit width and for different address spaces. Not all targets support all bit widths however.

declare void @llvm.memset.inline.p0.p0i8.i32(ptr <dest>, i8 <val>,
                                             i32 <len>, i1 <isvolatile>)
declare void @llvm.memset.inline.p0.p0.i64(ptr <dest>, i8 <val>,
                                           i64 <len>, i1 <isvolatile>)

Overview:

The ‘llvm.memset.inline.*’ intrinsics fill a block of memory with a particular byte value and guarantees that no external functions are called.

Note that, unlike the standard libc function, the llvm.memset.inline.* intrinsics do not return a value, take an extra isvolatile argument and the pointer can be in specified address spaces.

Arguments:

The first argument is a pointer to the destination to fill, the second is the byte value with which to fill it, the third argument is a constant integer argument specifying the number of bytes to fill, and the fourth is a boolean indicating a volatile access.

The align parameter attribute can be provided for the first argument.

If the isvolatile parameter is true, the llvm.memset.inline call is a volatile operation. The detailed access behavior is not very cleanly specified and it is unwise to depend on it.

Semantics:

The ‘llvm.memset.inline.*’ intrinsics fill “len” bytes of memory starting at the destination location. If the argument is known to be aligned to some boundary, this can be specified as an attribute on the argument.

If <len> is 0, it is no-op modulo the behavior of attributes attached to the arguments. If <len> is not a well-defined value, the behavior is undefined. If <len> is not zero, <dest> should be well-defined, otherwise the behavior is undefined.

The behavior of ‘llvm.memset.inline.*’ is equivalent to the behavior of ‘llvm.memset.*’, but the generated code is guaranteed not to call any external functions.

‘llvm.experimental.memset.pattern’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.experimental.memset.pattern on any integer bit width and for different address spaces. Not all targets support all bit widths however.

declare void @llvm.experimental.memset.pattern.p0.i128.i64(ptr <dest>, i128 <val>,
                                                           i64 <count>, i1 <isvolatile>)

Overview:

The ‘llvm.experimental.memset.pattern.*’ intrinsics fill a block of memory with a particular value. This may be expanded to an inline loop, a sequence of stores, or a libcall depending on what is available for the target and the expected performance and code size impact.

Arguments:

The first argument is a pointer to the destination to fill, the second is the value with which to fill it, the third argument is an integer argument specifying the number of times to fill the value, and the fourth is a boolean indicating a volatile access.

The align parameter attribute can be provided for the first argument.

If the isvolatile parameter is true, the llvm.experimental.memset.pattern call is a volatile operation. The detailed access behavior is not very cleanly specified and it is unwise to depend on it.

Semantics:

The ‘llvm.experimental.memset.pattern*’ intrinsic fills memory starting at the destination location with the given pattern <count> times, incrementing by the allocation size of the type each time. The stores follow the usual semantics of store instructions, including regarding endianness and padding. If the argument is known to be aligned to some boundary, this can be specified as an attribute on the argument.

If <count> is 0, it is no-op modulo the behavior of attributes attached to the arguments. If <count> is not a well-defined value, the behavior is undefined. If <count> is not zero, <dest> should be well-defined, otherwise the behavior is undefined.

‘llvm.sqrt.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.sqrt on any floating-point or vector of floating-point type. Not all targets support all types however.

declare float     @llvm.sqrt.f32(float %Val)
declare double    @llvm.sqrt.f64(double %Val)
declare x86_fp80  @llvm.sqrt.f80(x86_fp80 %Val)
declare fp128     @llvm.sqrt.f128(fp128 %Val)
declare ppc_fp128 @llvm.sqrt.ppcf128(ppc_fp128 %Val)

Overview:

The ‘llvm.sqrt’ intrinsics return the square root of the specified value.

Arguments:

The argument and return value are floating-point numbers of the same type.

Semantics:

Return the same value as a corresponding libm ‘sqrt’ function but without trapping or setting errno. For types specified by IEEE-754, the result matches a conforming libm implementation.

When specified with the fast-math-flag ‘afn’, the result may be approximated using a less accurate calculation.

‘llvm.powi.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.powi on any floating-point or vector of floating-point type. Not all targets support all types however.

Generally, the only supported type for the exponent is the one matching with the C type int.

declare float     @llvm.powi.f32.i32(float  %Val, i32 %power)
declare double    @llvm.powi.f64.i16(double %Val, i16 %power)
declare x86_fp80  @llvm.powi.f80.i32(x86_fp80  %Val, i32 %power)
declare fp128     @llvm.powi.f128.i32(fp128 %Val, i32 %power)
declare ppc_fp128 @llvm.powi.ppcf128.i32(ppc_fp128  %Val, i32 %power)

Overview:

The ‘llvm.powi.*’ intrinsics return the first operand raised to the specified (positive or negative) power. The order of evaluation of multiplications is not defined. When a vector of floating-point type is used, the second argument remains a scalar integer value.

Arguments:

The second argument is an integer power, and the first is a value to raise to that power.

Semantics:

This function returns the first value raised to the second power with an unspecified sequence of rounding operations.

‘llvm.sin.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.sin on any floating-point or vector of floating-point type. Not all targets support all types however.

declare float     @llvm.sin.f32(float  %Val)
declare double    @llvm.sin.f64(double %Val)
declare x86_fp80  @llvm.sin.f80(x86_fp80  %Val)
declare fp128     @llvm.sin.f128(fp128 %Val)
declare ppc_fp128 @llvm.sin.ppcf128(ppc_fp128  %Val)

Overview:

The ‘llvm.sin.*’ intrinsics return the sine of the operand.

Arguments:

The argument and return value are floating-point numbers of the same type.

Semantics:

Return the same value as a corresponding libm ‘sin’ function but without trapping or setting errno.

When specified with the fast-math-flag ‘afn’, the result may be approximated using a less accurate calculation.

‘llvm.cos.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.cos on any floating-point or vector of floating-point type. Not all targets support all types however.

declare float     @llvm.cos.f32(float  %Val)
declare double    @llvm.cos.f64(double %Val)
declare x86_fp80  @llvm.cos.f80(x86_fp80  %Val)
declare fp128     @llvm.cos.f128(fp128 %Val)
declare ppc_fp128 @llvm.cos.ppcf128(ppc_fp128  %Val)

Overview:

The ‘llvm.cos.*’ intrinsics return the cosine of the operand.

Arguments:

The argument and return value are floating-point numbers of the same type.

Semantics:

Return the same value as a corresponding libm ‘cos’ function but without trapping or setting errno.

When specified with the fast-math-flag ‘afn’, the result may be approximated using a less accurate calculation.

‘llvm.tan.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.tan on any floating-point or vector of floating-point type. Not all targets support all types however.

declare float     @llvm.tan.f32(float  %Val)
declare double    @llvm.tan.f64(double %Val)
declare x86_fp80  @llvm.tan.f80(x86_fp80  %Val)
declare fp128     @llvm.tan.f128(fp128 %Val)
declare ppc_fp128 @llvm.tan.ppcf128(ppc_fp128  %Val)

Overview:

The ‘llvm.tan.*’ intrinsics return the tangent of the operand.

Arguments:

The argument and return value are floating-point numbers of the same type.

Semantics:

Return the same value as a corresponding libm ‘tan’ function but without trapping or setting errno.

When specified with the fast-math-flag ‘afn’, the result may be approximated using a less accurate calculation.

‘llvm.asin.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.asin on any floating-point or vector of floating-point type. Not all targets support all types however.

declare float     @llvm.asin.f32(float  %Val)
declare double    @llvm.asin.f64(double %Val)
declare x86_fp80  @llvm.asin.f80(x86_fp80  %Val)
declare fp128     @llvm.asin.f128(fp128 %Val)
declare ppc_fp128 @llvm.asin.ppcf128(ppc_fp128  %Val)

Overview:

The ‘llvm.asin.*’ intrinsics return the arcsine of the operand.

Arguments:

The argument and return value are floating-point numbers of the same type.

Semantics:

Return the same value as a corresponding libm ‘asin’ function but without trapping or setting errno.

When specified with the fast-math-flag ‘afn’, the result may be approximated using a less accurate calculation.

‘llvm.acos.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.acos on any floating-point or vector of floating-point type. Not all targets support all types however.

declare float     @llvm.acos.f32(float  %Val)
declare double    @llvm.acos.f64(double %Val)
declare x86_fp80  @llvm.acos.f80(x86_fp80  %Val)
declare fp128     @llvm.acos.f128(fp128 %Val)
declare ppc_fp128 @llvm.acos.ppcf128(ppc_fp128  %Val)

Overview:

The ‘llvm.acos.*’ intrinsics return the arccosine of the operand.

Arguments:

The argument and return value are floating-point numbers of the same type.

Semantics:

Return the same value as a corresponding libm ‘acos’ function but without trapping or setting errno.

When specified with the fast-math-flag ‘afn’, the result may be approximated using a less accurate calculation.

‘llvm.atan.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.atan on any floating-point or vector of floating-point type. Not all targets support all types however.

declare float     @llvm.atan.f32(float  %Val)
declare double    @llvm.atan.f64(double %Val)
declare x86_fp80  @llvm.atan.f80(x86_fp80  %Val)
declare fp128     @llvm.atan.f128(fp128 %Val)
declare ppc_fp128 @llvm.atan.ppcf128(ppc_fp128  %Val)

Overview:

The ‘llvm.atan.*’ intrinsics return the arctangent of the operand.

Arguments:

The argument and return value are floating-point numbers of the same type.

Semantics:

Return the same value as a corresponding libm ‘atan’ function but without trapping or setting errno.

When specified with the fast-math-flag ‘afn’, the result may be approximated using a less accurate calculation.

‘llvm.atan2.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.atan2 on any floating-point or vector of floating-point type. Not all targets support all types however.

declare float     @llvm.atan2.f32(float  %Y, float %X)
declare double    @llvm.atan2.f64(double %Y, double %X)
declare x86_fp80  @llvm.atan2.f80(x86_fp80  %Y, x86_fp80 %X)
declare fp128     @llvm.atan2.f128(fp128 %Y, fp128 %X)
declare ppc_fp128 @llvm.atan2.ppcf128(ppc_fp128  %Y, ppc_fp128 %X)

Overview:

The ‘llvm.atan2.*’ intrinsics return the arctangent of Y/X accounting for the quadrant.

Arguments:

The arguments and return value are floating-point numbers of the same type.

Semantics:

Return the same value as a corresponding libm ‘atan2’ function but without trapping or setting errno.

When specified with the fast-math-flag ‘afn’, the result may be approximated using a less accurate calculation.

‘llvm.sinh.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.sinh on any floating-point or vector of floating-point type. Not all targets support all types however.

declare float     @llvm.sinh.f32(float  %Val)
declare double    @llvm.sinh.f64(double %Val)
declare x86_fp80  @llvm.sinh.f80(x86_fp80  %Val)
declare fp128     @llvm.sinh.f128(fp128 %Val)
declare ppc_fp128 @llvm.sinh.ppcf128(ppc_fp128  %Val)

Overview:

The ‘llvm.sinh.*’ intrinsics return the hyperbolic sine of the operand.

Arguments:

The argument and return value are floating-point numbers of the same type.

Semantics:

Return the same value as a corresponding libm ‘sinh’ function but without trapping or setting errno.

When specified with the fast-math-flag ‘afn’, the result may be approximated using a less accurate calculation.

‘llvm.cosh.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.cosh on any floating-point or vector of floating-point type. Not all targets support all types however.

declare float     @llvm.cosh.f32(float  %Val)
declare double    @llvm.cosh.f64(double %Val)
declare x86_fp80  @llvm.cosh.f80(x86_fp80  %Val)
declare fp128     @llvm.cosh.f128(fp128 %Val)
declare ppc_fp128 @llvm.cosh.ppcf128(ppc_fp128  %Val)

Overview:

The ‘llvm.cosh.*’ intrinsics return the hyperbolic cosine of the operand.

Arguments:

The argument and return value are floating-point numbers of the same type.

Semantics:

Return the same value as a corresponding libm ‘cosh’ function but without trapping or setting errno.

When specified with the fast-math-flag ‘afn’, the result may be approximated using a less accurate calculation.

‘llvm.tanh.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.tanh on any floating-point or vector of floating-point type. Not all targets support all types however.

declare float     @llvm.tanh.f32(float  %Val)
declare double    @llvm.tanh.f64(double %Val)
declare x86_fp80  @llvm.tanh.f80(x86_fp80  %Val)
declare fp128     @llvm.tanh.f128(fp128 %Val)
declare ppc_fp128 @llvm.tanh.ppcf128(ppc_fp128  %Val)

Overview:

The ‘llvm.tanh.*’ intrinsics return the hyperbolic tangent of the operand.

Arguments:

The argument and return value are floating-point numbers of the same type.

Semantics:

Return the same value as a corresponding libm ‘tanh’ function but without trapping or setting errno.

When specified with the fast-math-flag ‘afn’, the result may be approximated using a less accurate calculation.

‘llvm.sincos.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.sincos on any floating-point or vector of floating-point type. Not all targets support all types however.

declare { float, float }          @llvm.sincos.f32(float  %Val)
declare { double, double }        @llvm.sincos.f64(double %Val)
declare { x86_fp80, x86_fp80 }    @llvm.sincos.f80(x86_fp80  %Val)
declare { fp128, fp128 }          @llvm.sincos.f128(fp128 %Val)
declare { ppc_fp128, ppc_fp128 }  @llvm.sincos.ppcf128(ppc_fp128  %Val)
declare { <4 x float>, <4 x float> } @llvm.sincos.v4f32(<4 x float>  %Val)

Overview:

The ‘llvm.sincos.*’ intrinsics returns the sine and cosine of the operand.

Arguments:

The argument is a floating-point value or vector of floating-point values. Returns two values matching the argument type in a struct.

Semantics:

This intrinsic is equivalent to a calling both llvm.sin and llvm.cos on the argument.

The first result is the sine of the argument and the second result is the cosine of the argument.

When specified with the fast-math-flag ‘afn’, the result may be approximated using a less accurate calculation.

‘llvm.pow.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.pow on any floating-point or vector of floating-point type. Not all targets support all types however.

declare float     @llvm.pow.f32(float  %Val, float %Power)
declare double    @llvm.pow.f64(double %Val, double %Power)
declare x86_fp80  @llvm.pow.f80(x86_fp80  %Val, x86_fp80 %Power)
declare fp128     @llvm.pow.f128(fp128 %Val, fp128 %Power)
declare ppc_fp128 @llvm.pow.ppcf128(ppc_fp128  %Val, ppc_fp128 Power)

Overview:

The ‘llvm.pow.*’ intrinsics return the first operand raised to the specified (positive or negative) power.

Arguments:

The arguments and return value are floating-point numbers of the same type.

Semantics:

Return the same value as a corresponding libm ‘pow’ function but without trapping or setting errno.

When specified with the fast-math-flag ‘afn’, the result may be approximated using a less accurate calculation.

‘llvm.exp.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.exp on any floating-point or vector of floating-point type. Not all targets support all types however.

declare float     @llvm.exp.f32(float  %Val)
declare double    @llvm.exp.f64(double %Val)
declare x86_fp80  @llvm.exp.f80(x86_fp80  %Val)
declare fp128     @llvm.exp.f128(fp128 %Val)
declare ppc_fp128 @llvm.exp.ppcf128(ppc_fp128  %Val)

Overview:

The ‘llvm.exp.*’ intrinsics compute the base-e exponential of the specified value.

Arguments:

The argument and return value are floating-point numbers of the same type.

Semantics:

Return the same value as a corresponding libm ‘exp’ function but without trapping or setting errno.

When specified with the fast-math-flag ‘afn’, the result may be approximated using a less accurate calculation.

‘llvm.exp2.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.exp2 on any floating-point or vector of floating-point type. Not all targets support all types however.

declare float     @llvm.exp2.f32(float  %Val)
declare double    @llvm.exp2.f64(double %Val)
declare x86_fp80  @llvm.exp2.f80(x86_fp80  %Val)
declare fp128     @llvm.exp2.f128(fp128 %Val)
declare ppc_fp128 @llvm.exp2.ppcf128(ppc_fp128  %Val)

Overview:

The ‘llvm.exp2.*’ intrinsics compute the base-2 exponential of the specified value.

Arguments:

The argument and return value are floating-point numbers of the same type.

Semantics:

Return the same value as a corresponding libm ‘exp2’ function but without trapping or setting errno.

When specified with the fast-math-flag ‘afn’, the result may be approximated using a less accurate calculation.

‘llvm.exp10.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.exp10 on any floating-point or vector of floating-point type. Not all targets support all types however.

declare float     @llvm.exp10.f32(float  %Val)
declare double    @llvm.exp10.f64(double %Val)
declare x86_fp80  @llvm.exp10.f80(x86_fp80  %Val)
declare fp128     @llvm.exp10.f128(fp128 %Val)
declare ppc_fp128 @llvm.exp10.ppcf128(ppc_fp128  %Val)

Overview:

The ‘llvm.exp10.*’ intrinsics compute the base-10 exponential of the specified value.

Arguments:

The argument and return value are floating-point numbers of the same type.

Semantics:

Return the same value as a corresponding libm ‘exp10’ function but without trapping or setting errno.

When specified with the fast-math-flag ‘afn’, the result may be approximated using a less accurate calculation.

‘llvm.ldexp.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.ldexp on any floating point or vector of floating point type. Not all targets support all types however.

declare float     @llvm.ldexp.f32.i32(float %Val, i32 %Exp)
declare double    @llvm.ldexp.f64.i32(double %Val, i32 %Exp)
declare x86_fp80  @llvm.ldexp.f80.i32(x86_fp80 %Val, i32 %Exp)
declare fp128     @llvm.ldexp.f128.i32(fp128 %Val, i32 %Exp)
declare ppc_fp128 @llvm.ldexp.ppcf128.i32(ppc_fp128 %Val, i32 %Exp)
declare <2 x float> @llvm.ldexp.v2f32.v2i32(<2 x float> %Val, <2 x i32> %Exp)

Overview:

The ‘llvm.ldexp.*’ intrinsics perform the ldexp function.

Arguments:

The first argument and the return value are floating-point or vector of floating-point values of the same type. The second argument is an integer with the same number of elements.

Semantics:

This function multiplies the first argument by 2 raised to the second argument’s power. If the first argument is NaN or infinite, the same value is returned. If the result underflows a zero with the same sign is returned. If the result overflows, the result is an infinity with the same sign.

‘llvm.frexp.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.frexp on any floating point or vector of floating point type. Not all targets support all types however.

declare { float, i32 }     @llvm.frexp.f32.i32(float %Val)
declare { double, i32 }    @llvm.frexp.f64.i32(double %Val)
declare { x86_fp80, i32 }  @llvm.frexp.f80.i32(x86_fp80 %Val)
declare { fp128, i32 }     @llvm.frexp.f128.i32(fp128 %Val)
declare { ppc_fp128, i32 } @llvm.frexp.ppcf128.i32(ppc_fp128 %Val)
declare { <2 x float>, <2 x i32> }  @llvm.frexp.v2f32.v2i32(<2 x float> %Val)

Overview:

The ‘llvm.frexp.*’ intrinsics perform the frexp function.

Arguments:

The argument is a floating-point or vector of floating-point values. Returns two values in a struct. The first struct field matches the argument type, and the second field is an integer or a vector of integer values with the same number of elements as the argument.

Semantics:

This intrinsic splits a floating point value into a normalized fractional component and integral exponent.

For a non-zero argument, returns the argument multiplied by some power of two such that the absolute value of the returned value is in the range [0.5, 1.0), with the same sign as the argument. The second result is an integer such that the first result raised to the power of the second result is the input argument.

If the argument is a zero, returns a zero with the same sign and a 0 exponent.

If the argument is a NaN, a NaN is returned and the returned exponent is unspecified.

If the argument is an infinity, returns an infinity with the same sign and an unspecified exponent.

‘llvm.log.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.log on any floating-point or vector of floating-point type. Not all targets support all types however.

declare float     @llvm.log.f32(float  %Val)
declare double    @llvm.log.f64(double %Val)
declare x86_fp80  @llvm.log.f80(x86_fp80  %Val)
declare fp128     @llvm.log.f128(fp128 %Val)
declare ppc_fp128 @llvm.log.ppcf128(ppc_fp128  %Val)

Overview:

The ‘llvm.log.*’ intrinsics compute the base-e logarithm of the specified value.

Arguments:

The argument and return value are floating-point numbers of the same type.

Semantics:

Return the same value as a corresponding libm ‘log’ function but without trapping or setting errno.

When specified with the fast-math-flag ‘afn’, the result may be approximated using a less accurate calculation.

‘llvm.log10.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.log10 on any floating-point or vector of floating-point type. Not all targets support all types however.

declare float     @llvm.log10.f32(float  %Val)
declare double    @llvm.log10.f64(double %Val)
declare x86_fp80  @llvm.log10.f80(x86_fp80  %Val)
declare fp128     @llvm.log10.f128(fp128 %Val)
declare ppc_fp128 @llvm.log10.ppcf128(ppc_fp128  %Val)

Overview:

The ‘llvm.log10.*’ intrinsics compute the base-10 logarithm of the specified value.

Arguments:

The argument and return value are floating-point numbers of the same type.

Semantics:

Return the same value as a corresponding libm ‘log10’ function but without trapping or setting errno.

When specified with the fast-math-flag ‘afn’, the result may be approximated using a less accurate calculation.

‘llvm.log2.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.log2 on any floating-point or vector of floating-point type. Not all targets support all types however.

declare float     @llvm.log2.f32(float  %Val)
declare double    @llvm.log2.f64(double %Val)
declare x86_fp80  @llvm.log2.f80(x86_fp80  %Val)
declare fp128     @llvm.log2.f128(fp128 %Val)
declare ppc_fp128 @llvm.log2.ppcf128(ppc_fp128  %Val)

Overview:

The ‘llvm.log2.*’ intrinsics compute the base-2 logarithm of the specified value.

Arguments:

The argument and return value are floating-point numbers of the same type.

Semantics:

Return the same value as a corresponding libm ‘log2’ function but without trapping or setting errno.

When specified with the fast-math-flag ‘afn’, the result may be approximated using a less accurate calculation.

‘llvm.fma.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.fma on any floating-point or vector of floating-point type. Not all targets support all types however.

declare float     @llvm.fma.f32(float  %a, float  %b, float  %c)
declare double    @llvm.fma.f64(double %a, double %b, double %c)
declare x86_fp80  @llvm.fma.f80(x86_fp80 %a, x86_fp80 %b, x86_fp80 %c)
declare fp128     @llvm.fma.f128(fp128 %a, fp128 %b, fp128 %c)
declare ppc_fp128 @llvm.fma.ppcf128(ppc_fp128 %a, ppc_fp128 %b, ppc_fp128 %c)

Overview:

The ‘llvm.fma.*’ intrinsics perform the fused multiply-add operation.

Arguments:

The arguments and return value are floating-point numbers of the same type.

Semantics:

Return the same value as the IEEE-754 fusedMultiplyAdd operation. This is assumed to not trap or set errno.

When specified with the fast-math-flag ‘afn’, the result may be approximated using a less accurate calculation.

‘llvm.fabs.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.fabs on any floating-point or vector of floating-point type. Not all targets support all types however.

declare float     @llvm.fabs.f32(float  %Val)
declare double    @llvm.fabs.f64(double %Val)
declare x86_fp80  @llvm.fabs.f80(x86_fp80 %Val)
declare fp128     @llvm.fabs.f128(fp128 %Val)
declare ppc_fp128 @llvm.fabs.ppcf128(ppc_fp128 %Val)

Overview:

The ‘llvm.fabs.*’ intrinsics return the absolute value of the operand.

Arguments:

The argument and return value are floating-point numbers of the same type.

Semantics:

This function returns the same values as the libm fabs functions would, and handles error conditions in the same way. The returned value is completely identical to the input except for the sign bit; in particular, if the input is a NaN, then the quiet/signaling bit and payload are perfectly preserved.

‘llvm.min.*’ Intrinsics Comparation

Standard:

IEEE754 and ISO C define some min/max operations, and they have some differences on working with qNaN/sNaN and +0.0/-0.0. Here is the list:

ISO C	fmin/fmax	fmininum/fmaximum	fminimum_num/fmaximum_num
IEEE754	minNum/maxNum (2008)	minimum/maximum (2019)	minimumNumber/maximumNumber (2019)
+0.0 vs -0.0	either one	+0.0 > -0.0	+0.0 > -0.0
NUM vs sNaN	qNaN, invalid exception	qNaN, invalid exception	NUM, invalid exception
qNaN vs sNaN	qNaN, invalid exception	qNaN, invalid exception	qNaN, invalid exception
NUM vs qNaN	NUM, no exception	qNaN, no exception	NUM, no exception

LLVM Implementation:

LLVM implements all ISO C flavors as listed in this table, except in the default floating-point environment exceptions are ignored. The constrained versions of the intrinsics respect the exception behavior.

Operation	minnum/maxnum	minimum/maximum	minimumnum/maximumnum
NUM vs qNaN	NUM, no exception	qNaN, no exception	NUM, no exception
NUM vs sNaN	qNaN, invalid exception	qNaN, invalid exception	NUM, invalid exception
qNaN vs sNaN	qNaN, invalid exception	qNaN, invalid exception	qNaN, invalid exception
sNaN vs sNaN	qNaN, invalid exception	qNaN, invalid exception	qNaN, invalid exception
+0.0 vs -0.0	either one	+0.0(max)/-0.0(min)	+0.0(max)/-0.0(min)
NUM vs NUM	larger(max)/smaller(min)	larger(max)/smaller(min)	larger(max)/smaller(min)

‘llvm.minnum.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.minnum on any floating-point or vector of floating-point type. Not all targets support all types however.

declare float     @llvm.minnum.f32(float %Val0, float %Val1)
declare double    @llvm.minnum.f64(double %Val0, double %Val1)
declare x86_fp80  @llvm.minnum.f80(x86_fp80 %Val0, x86_fp80 %Val1)
declare fp128     @llvm.minnum.f128(fp128 %Val0, fp128 %Val1)
declare ppc_fp128 @llvm.minnum.ppcf128(ppc_fp128 %Val0, ppc_fp128 %Val1)

Overview:

The ‘llvm.minnum.*’ intrinsics return the minimum of the two arguments.

Arguments:

The arguments and return value are floating-point numbers of the same type.

Semantics:

Follows the IEEE-754 semantics for minNum, except for handling of signaling NaNs. This match’s the behavior of libm’s fmin.

If either operand is a NaN, returns the other non-NaN operand. Returns NaN only if both operands are NaN. If the operands compare equal, returns either one of the operands. For example, this means that fmin(+0.0, -0.0) returns either operand.

Unlike the IEEE-754 2008 behavior, this does not distinguish between signaling and quiet NaN inputs. If a target’s implementation follows the standard and returns a quiet NaN if either input is a signaling NaN, the intrinsic lowering is responsible for quieting the inputs to correctly return the non-NaN input (e.g. by using the equivalent of llvm.canonicalize).

‘llvm.maxnum.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.maxnum on any floating-point or vector of floating-point type. Not all targets support all types however.

declare float     @llvm.maxnum.f32(float  %Val0, float  %Val1)
declare double    @llvm.maxnum.f64(double %Val0, double %Val1)
declare x86_fp80  @llvm.maxnum.f80(x86_fp80  %Val0, x86_fp80  %Val1)
declare fp128     @llvm.maxnum.f128(fp128 %Val0, fp128 %Val1)
declare ppc_fp128 @llvm.maxnum.ppcf128(ppc_fp128  %Val0, ppc_fp128  %Val1)

Overview:

The ‘llvm.maxnum.*’ intrinsics return the maximum of the two arguments.

Arguments:

The arguments and return value are floating-point numbers of the same type.

Semantics:

Follows the IEEE-754 semantics for maxNum except for the handling of signaling NaNs. This matches the behavior of libm’s fmax.

If either operand is a NaN, returns the other non-NaN operand. Returns NaN only if both operands are NaN. If the operands compare equal, returns either one of the operands. For example, this means that fmax(+0.0, -0.0) returns either -0.0 or 0.0.

Unlike the IEEE-754 2008 behavior, this does not distinguish between signaling and quiet NaN inputs. If a target’s implementation follows the standard and returns a quiet NaN if either input is a signaling NaN, the intrinsic lowering is responsible for quieting the inputs to correctly return the non-NaN input (e.g. by using the equivalent of llvm.canonicalize).

‘llvm.minimum.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.minimum on any floating-point or vector of floating-point type. Not all targets support all types however.

declare float     @llvm.minimum.f32(float %Val0, float %Val1)
declare double    @llvm.minimum.f64(double %Val0, double %Val1)
declare x86_fp80  @llvm.minimum.f80(x86_fp80 %Val0, x86_fp80 %Val1)
declare fp128     @llvm.minimum.f128(fp128 %Val0, fp128 %Val1)
declare ppc_fp128 @llvm.minimum.ppcf128(ppc_fp128 %Val0, ppc_fp128 %Val1)

Overview:

The ‘llvm.minimum.*’ intrinsics return the minimum of the two arguments, propagating NaNs and treating -0.0 as less than +0.0.

Arguments:

The arguments and return value are floating-point numbers of the same type.

Semantics:

If either operand is a NaN, returns NaN. Otherwise returns the lesser of the two arguments. -0.0 is considered to be less than +0.0 for this intrinsic. Note that these are the semantics specified in the draft of IEEE 754-2019.

‘llvm.maximum.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.maximum on any floating-point or vector of floating-point type. Not all targets support all types however.

declare float     @llvm.maximum.f32(float %Val0, float %Val1)
declare double    @llvm.maximum.f64(double %Val0, double %Val1)
declare x86_fp80  @llvm.maximum.f80(x86_fp80 %Val0, x86_fp80 %Val1)
declare fp128     @llvm.maximum.f128(fp128 %Val0, fp128 %Val1)
declare ppc_fp128 @llvm.maximum.ppcf128(ppc_fp128 %Val0, ppc_fp128 %Val1)

Overview:

The ‘llvm.maximum.*’ intrinsics return the maximum of the two arguments, propagating NaNs and treating -0.0 as less than +0.0.

Arguments:

The arguments and return value are floating-point numbers of the same type.

Semantics:

If either operand is a NaN, returns NaN. Otherwise returns the greater of the two arguments. -0.0 is considered to be less than +0.0 for this intrinsic. Note that these are the semantics specified in the draft of IEEE 754-2019.

‘llvm.minimumnum.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.minimumnum on any floating-point or vector of floating-point type. Not all targets support all types however.

declare float     @llvm.minimumnum.f32(float %Val0, float %Val1)
declare double    @llvm.minimumnum.f64(double %Val0, double %Val1)
declare x86_fp80  @llvm.minimumnum.f80(x86_fp80 %Val0, x86_fp80 %Val1)
declare fp128     @llvm.minimumnum.f128(fp128 %Val0, fp128 %Val1)
declare ppc_fp128 @llvm.minimumnum.ppcf128(ppc_fp128 %Val0, ppc_fp128 %Val1)

Overview:

The ‘llvm.minimumnum.*’ intrinsics return the minimum of the two arguments, not propagating NaNs and treating -0.0 as less than +0.0.

Arguments:

The arguments and return value are floating-point numbers of the same type.

Semantics:

If both operands are NaNs (including sNaN), returns qNaN. If one operand is NaN (including sNaN) and another operand is a number, return the number. Otherwise returns the lesser of the two arguments. -0.0 is considered to be less than +0.0 for this intrinsic.

Note that these are the semantics of minimumNumber specified in IEEE 754-2019.

It has some differences with ‘llvm.minnum.*’: 1)’llvm.minnum.*’ will return qNaN if either operand is sNaN. 2)’llvm.minnum*’ may return either one if we compare +0.0 vs -0.0.

‘llvm.maximumnum.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.maximumnum on any floating-point or vector of floating-point type. Not all targets support all types however.

declare float     @llvm.maximumnum.f32(float %Val0, float %Val1)
declare double    @llvm.maximumnum.f64(double %Val0, double %Val1)
declare x86_fp80  @llvm.maximumnum.f80(x86_fp80 %Val0, x86_fp80 %Val1)
declare fp128     @llvm.maximumnum.f128(fp128 %Val0, fp128 %Val1)
declare ppc_fp128 @llvm.maximumnum.ppcf128(ppc_fp128 %Val0, ppc_fp128 %Val1)

Overview:

The ‘llvm.maximumnum.*’ intrinsics return the maximum of the two arguments, not propagating NaNs and treating -0.0 as less than +0.0.

Arguments:

The arguments and return value are floating-point numbers of the same type.

Semantics:

If both operands are NaNs (including sNaN), returns qNaN. If one operand is NaN (including sNaN) and another operand is a number, return the number. Otherwise returns the greater of the two arguments. -0.0 is considered to be less than +0.0 for this intrinsic.

Note that these are the semantics of maximumNumber specified in IEEE 754-2019.

It has some differences with ‘llvm.maxnum.*’: 1)’llvm.maxnum.*’ will return qNaN if either operand is sNaN. 2)’llvm.maxnum*’ may return either one if we compare +0.0 vs -0.0.

‘llvm.copysign.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.copysign on any floating-point or vector of floating-point type. Not all targets support all types however.

declare float     @llvm.copysign.f32(float  %Mag, float  %Sgn)
declare double    @llvm.copysign.f64(double %Mag, double %Sgn)
declare x86_fp80  @llvm.copysign.f80(x86_fp80  %Mag, x86_fp80  %Sgn)
declare fp128     @llvm.copysign.f128(fp128 %Mag, fp128 %Sgn)
declare ppc_fp128 @llvm.copysign.ppcf128(ppc_fp128  %Mag, ppc_fp128  %Sgn)

Overview:

The ‘llvm.copysign.*’ intrinsics return a value with the magnitude of the first operand and the sign of the second operand.

Arguments:

The arguments and return value are floating-point numbers of the same type.

Semantics:

This function returns the same values as the libm copysign functions would, and handles error conditions in the same way. The returned value is completely identical to the first operand except for the sign bit; in particular, if the input is a NaN, then the quiet/signaling bit and payload are perfectly preserved.

‘llvm.floor.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.floor on any floating-point or vector of floating-point type. Not all targets support all types however.

declare float     @llvm.floor.f32(float  %Val)
declare double    @llvm.floor.f64(double %Val)
declare x86_fp80  @llvm.floor.f80(x86_fp80  %Val)
declare fp128     @llvm.floor.f128(fp128 %Val)
declare ppc_fp128 @llvm.floor.ppcf128(ppc_fp128  %Val)

Overview:

The ‘llvm.floor.*’ intrinsics return the floor of the operand.

Arguments:

The argument and return value are floating-point numbers of the same type.

Semantics:

This function returns the same values as the libm floor functions would, and handles error conditions in the same way.

‘llvm.ceil.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.ceil on any floating-point or vector of floating-point type. Not all targets support all types however.

declare float     @llvm.ceil.f32(float  %Val)
declare double    @llvm.ceil.f64(double %Val)
declare x86_fp80  @llvm.ceil.f80(x86_fp80  %Val)
declare fp128     @llvm.ceil.f128(fp128 %Val)
declare ppc_fp128 @llvm.ceil.ppcf128(ppc_fp128  %Val)

Overview:

The ‘llvm.ceil.*’ intrinsics return the ceiling of the operand.

Arguments:

The argument and return value are floating-point numbers of the same type.

Semantics:

This function returns the same values as the libm ceil functions would, and handles error conditions in the same way.

‘llvm.trunc.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.trunc on any floating-point or vector of floating-point type. Not all targets support all types however.

declare float     @llvm.trunc.f32(float  %Val)
declare double    @llvm.trunc.f64(double %Val)
declare x86_fp80  @llvm.trunc.f80(x86_fp80  %Val)
declare fp128     @llvm.trunc.f128(fp128 %Val)
declare ppc_fp128 @llvm.trunc.ppcf128(ppc_fp128  %Val)

Overview:

The ‘llvm.trunc.*’ intrinsics returns the operand rounded to the nearest integer not larger in magnitude than the operand.

Arguments:

The argument and return value are floating-point numbers of the same type.

Semantics:

This function returns the same values as the libm trunc functions would, and handles error conditions in the same way.

‘llvm.rint.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.rint on any floating-point or vector of floating-point type. Not all targets support all types however.

declare float     @llvm.rint.f32(float  %Val)
declare double    @llvm.rint.f64(double %Val)
declare x86_fp80  @llvm.rint.f80(x86_fp80  %Val)
declare fp128     @llvm.rint.f128(fp128 %Val)
declare ppc_fp128 @llvm.rint.ppcf128(ppc_fp128  %Val)

Overview:

The ‘llvm.rint.*’ intrinsics returns the operand rounded to the nearest integer. It may raise an inexact floating-point exception if the operand isn’t an integer.

Arguments:

The argument and return value are floating-point numbers of the same type.

Semantics:

This function returns the same values as the libm rint functions would, and handles error conditions in the same way. Since LLVM assumes the default floating-point environment, the rounding mode is assumed to be set to “nearest”, so halfway cases are rounded to the even integer. Use Constrained Floating-Point Intrinsics to avoid that assumption.

‘llvm.nearbyint.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.nearbyint on any floating-point or vector of floating-point type. Not all targets support all types however.

declare float     @llvm.nearbyint.f32(float  %Val)
declare double    @llvm.nearbyint.f64(double %Val)
declare x86_fp80  @llvm.nearbyint.f80(x86_fp80  %Val)
declare fp128     @llvm.nearbyint.f128(fp128 %Val)
declare ppc_fp128 @llvm.nearbyint.ppcf128(ppc_fp128  %Val)

Overview:

The ‘llvm.nearbyint.*’ intrinsics returns the operand rounded to the nearest integer.

Arguments:

The argument and return value are floating-point numbers of the same type.

Semantics:

This function returns the same values as the libm nearbyint functions would, and handles error conditions in the same way. Since LLVM assumes the default floating-point environment, the rounding mode is assumed to be set to “nearest”, so halfway cases are rounded to the even integer. Use Constrained Floating-Point Intrinsics to avoid that assumption.

‘llvm.round.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.round on any floating-point or vector of floating-point type. Not all targets support all types however.

declare float     @llvm.round.f32(float  %Val)
declare double    @llvm.round.f64(double %Val)
declare x86_fp80  @llvm.round.f80(x86_fp80  %Val)
declare fp128     @llvm.round.f128(fp128 %Val)
declare ppc_fp128 @llvm.round.ppcf128(ppc_fp128  %Val)

Overview:

The ‘llvm.round.*’ intrinsics returns the operand rounded to the nearest integer.

Arguments:

The argument and return value are floating-point numbers of the same type.

Semantics:

This function returns the same values as the libm round functions would, and handles error conditions in the same way.

‘llvm.roundeven.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.roundeven on any floating-point or vector of floating-point type. Not all targets support all types however.

declare float     @llvm.roundeven.f32(float  %Val)
declare double    @llvm.roundeven.f64(double %Val)
declare x86_fp80  @llvm.roundeven.f80(x86_fp80  %Val)
declare fp128     @llvm.roundeven.f128(fp128 %Val)
declare ppc_fp128 @llvm.roundeven.ppcf128(ppc_fp128  %Val)

Overview:

The ‘llvm.roundeven.*’ intrinsics returns the operand rounded to the nearest integer in floating-point format rounding halfway cases to even (that is, to the nearest value that is an even integer).

Arguments:

The argument and return value are floating-point numbers of the same type.

Semantics:

This function implements IEEE-754 operation roundToIntegralTiesToEven. It also behaves in the same way as C standard function roundeven, except that it does not raise floating point exceptions.

‘llvm.lround.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.lround on any floating-point type or vector of floating-point type. Not all targets support all types however.

declare i32 @llvm.lround.i32.f32(float %Val)
declare i32 @llvm.lround.i32.f64(double %Val)
declare i32 @llvm.lround.i32.f80(float %Val)
declare i32 @llvm.lround.i32.f128(double %Val)
declare i32 @llvm.lround.i32.ppcf128(double %Val)

declare i64 @llvm.lround.i64.f32(float %Val)
declare i64 @llvm.lround.i64.f64(double %Val)
declare i64 @llvm.lround.i64.f80(float %Val)
declare i64 @llvm.lround.i64.f128(double %Val)
declare i64 @llvm.lround.i64.ppcf128(double %Val)

Overview:

The ‘llvm.lround.*’ intrinsics return the operand rounded to the nearest integer with ties away from zero.

Arguments:

The argument is a floating-point number and the return value is an integer type.

Semantics:

This function returns the same values as the libm lround functions would, but without setting errno. If the rounded value is too large to be stored in the result type, the return value is a non-deterministic value (equivalent to freeze poison).

‘llvm.llround.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.llround on any floating-point type. Not all targets support all types however.

declare i64 @llvm.llround.i64.f32(float %Val)
declare i64 @llvm.llround.i64.f64(double %Val)
declare i64 @llvm.llround.i64.f80(float %Val)
declare i64 @llvm.llround.i64.f128(double %Val)
declare i64 @llvm.llround.i64.ppcf128(double %Val)

Overview:

The ‘llvm.llround.*’ intrinsics return the operand rounded to the nearest integer with ties away from zero.

Arguments:

The argument is a floating-point number and the return value is an integer type.

Semantics:

This function returns the same values as the libm llround functions would, but without setting errno. If the rounded value is too large to be stored in the result type, the return value is a non-deterministic value (equivalent to freeze poison).

‘llvm.lrint.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.lrint on any floating-point type or vector of floating-point type. Not all targets support all types however.

declare i32 @llvm.lrint.i32.f32(float %Val)
declare i32 @llvm.lrint.i32.f64(double %Val)
declare i32 @llvm.lrint.i32.f80(float %Val)
declare i32 @llvm.lrint.i32.f128(double %Val)
declare i32 @llvm.lrint.i32.ppcf128(double %Val)

declare i64 @llvm.lrint.i64.f32(float %Val)
declare i64 @llvm.lrint.i64.f64(double %Val)
declare i64 @llvm.lrint.i64.f80(float %Val)
declare i64 @llvm.lrint.i64.f128(double %Val)
declare i64 @llvm.lrint.i64.ppcf128(double %Val)

Overview:

The ‘llvm.lrint.*’ intrinsics return the operand rounded to the nearest integer.

Arguments:

The argument is a floating-point number and the return value is an integer type.

Semantics:

This function returns the same values as the libm lrint functions would, but without setting errno. If the rounded value is too large to be stored in the result type, the return value is a non-deterministic value (equivalent to freeze poison).

‘llvm.llrint.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.llrint on any floating-point type or vector of floating-point type. Not all targets support all types however.

declare i64 @llvm.llrint.i64.f32(float %Val)
declare i64 @llvm.llrint.i64.f64(double %Val)
declare i64 @llvm.llrint.i64.f80(float %Val)
declare i64 @llvm.llrint.i64.f128(double %Val)
declare i64 @llvm.llrint.i64.ppcf128(double %Val)

Overview:

The ‘llvm.llrint.*’ intrinsics return the operand rounded to the nearest integer.

Arguments:

The argument is a floating-point number and the return value is an integer type.

Semantics:

This function returns the same values as the libm llrint functions would, but without setting errno. If the rounded value is too large to be stored in the result type, the return value is a non-deterministic value (equivalent to freeze poison).

Bit Manipulation Intrinsics

LLVM provides intrinsics for a few important bit manipulation operations. These allow efficient code generation for some algorithms.

‘llvm.bitreverse.*’ Intrinsics

Syntax:

This is an overloaded intrinsic function. You can use bitreverse on any integer type.

declare i16 @llvm.bitreverse.i16(i16 <id>)
declare i32 @llvm.bitreverse.i32(i32 <id>)
declare i64 @llvm.bitreverse.i64(i64 <id>)
declare <4 x i32> @llvm.bitreverse.v4i32(<4 x i32> <id>)

Overview:

The ‘llvm.bitreverse’ family of intrinsics is used to reverse the bitpattern of an integer value or vector of integer values; for example 0b10110110 becomes 0b01101101.

Semantics:

The llvm.bitreverse.iN intrinsic returns an iN value that has bit M in the input moved to bit N-M-1 in the output. The vector intrinsics, such as llvm.bitreverse.v4i32, operate on a per-element basis and the element order is not affected.

‘llvm.bswap.*’ Intrinsics

Syntax:

This is an overloaded intrinsic function. You can use bswap on any integer type that is an even number of bytes (i.e. BitWidth % 16 == 0).

declare i16 @llvm.bswap.i16(i16 <id>)
declare i32 @llvm.bswap.i32(i32 <id>)
declare i64 @llvm.bswap.i64(i64 <id>)
declare <4 x i32> @llvm.bswap.v4i32(<4 x i32> <id>)

Overview:

The ‘llvm.bswap’ family of intrinsics is used to byte swap an integer value or vector of integer values with an even number of bytes (positive multiple of 16 bits).

Semantics:

The llvm.bswap.i16 intrinsic returns an i16 value that has the high and low byte of the input i16 swapped. Similarly, the llvm.bswap.i32 intrinsic returns an i32 value that has the four bytes of the input i32 swapped, so that if the input bytes are numbered 0, 1, 2, 3 then the returned i32 will have its bytes in 3, 2, 1, 0 order. The llvm.bswap.i48, llvm.bswap.i64 and other intrinsics extend this concept to additional even-byte lengths (6 bytes, 8 bytes and more, respectively). The vector intrinsics, such as llvm.bswap.v4i32, operate on a per-element basis and the element order is not affected.

‘llvm.ctpop.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.ctpop on any integer bit width, or on any vector with integer elements. Not all targets support all bit widths or vector types, however.

declare i8 @llvm.ctpop.i8(i8  <src>)
declare i16 @llvm.ctpop.i16(i16 <src>)
declare i32 @llvm.ctpop.i32(i32 <src>)
declare i64 @llvm.ctpop.i64(i64 <src>)
declare i256 @llvm.ctpop.i256(i256 <src>)
declare <2 x i32> @llvm.ctpop.v2i32(<2 x i32> <src>)

Overview:

The ‘llvm.ctpop’ family of intrinsics counts the number of bits set in a value.

Arguments:

The only argument is the value to be counted. The argument may be of any integer type, or a vector with integer elements. The return type must match the argument type.

Semantics:

The ‘llvm.ctpop’ intrinsic counts the 1’s in a variable, or within each element of a vector.

‘llvm.ctlz.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.ctlz on any integer bit width, or any vector whose elements are integers. Not all targets support all bit widths or vector types, however.

declare i8   @llvm.ctlz.i8  (i8   <src>, i1 <is_zero_poison>)
declare <2 x i37> @llvm.ctlz.v2i37(<2 x i37> <src>, i1 <is_zero_poison>)

Overview:

The ‘llvm.ctlz’ family of intrinsic functions counts the number of leading zeros in a variable.

Arguments:

The first argument is the value to be counted. This argument may be of any integer type, or a vector with integer element type. The return type must match the first argument type.

The second argument is a constant flag that indicates whether the intrinsic returns a valid result if the first argument is zero. If the first argument is zero and the second argument is true, the result is poison. Historically some architectures did not provide a defined result for zero values as efficiently, and many algorithms are now predicated on avoiding zero-value inputs.

Semantics:

The ‘llvm.ctlz’ intrinsic counts the leading (most significant) zeros in a variable, or within each element of the vector. If src == 0 then the result is the size in bits of the type of src if is_zero_poison == 0 and poison otherwise. For example, llvm.ctlz(i32 2) = 30.

‘llvm.cttz.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.cttz on any integer bit width, or any vector of integer elements. Not all targets support all bit widths or vector types, however.

declare i42   @llvm.cttz.i42  (i42   <src>, i1 <is_zero_poison>)
declare <2 x i32> @llvm.cttz.v2i32(<2 x i32> <src>, i1 <is_zero_poison>)

Overview:

The ‘llvm.cttz’ family of intrinsic functions counts the number of trailing zeros.

Arguments:

The first argument is the value to be counted. This argument may be of any integer type, or a vector with integer element type. The return type must match the first argument type.

The second argument is a constant flag that indicates whether the intrinsic returns a valid result if the first argument is zero. If the first argument is zero and the second argument is true, the result is poison. Historically some architectures did not provide a defined result for zero values as efficiently, and many algorithms are now predicated on avoiding zero-value inputs.

Semantics:

The ‘llvm.cttz’ intrinsic counts the trailing (least significant) zeros in a variable, or within each element of a vector. If src == 0 then the result is the size in bits of the type of src if is_zero_poison == 0 and poison otherwise. For example, llvm.cttz(2) = 1.

‘llvm.fshl.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.fshl on any integer bit width or any vector of integer elements. Not all targets support all bit widths or vector types, however.

declare i8  @llvm.fshl.i8 (i8 %a, i8 %b, i8 %c)
declare i64 @llvm.fshl.i64(i64 %a, i64 %b, i64 %c)
declare <2 x i32> @llvm.fshl.v2i32(<2 x i32> %a, <2 x i32> %b, <2 x i32> %c)

Overview:

The ‘llvm.fshl’ family of intrinsic functions performs a funnel shift left: the first two values are concatenated as { %a : %b } (%a is the most significant bits of the wide value), the combined value is shifted left, and the most significant bits are extracted to produce a result that is the same size as the original arguments. If the first 2 arguments are identical, this is equivalent to a rotate left operation. For vector types, the operation occurs for each element of the vector. The shift argument is treated as an unsigned amount modulo the element size of the arguments.

Arguments:

The first two arguments are the values to be concatenated. The third argument is the shift amount. The arguments may be any integer type or a vector with integer element type. All arguments and the return value must have the same type.

Example:

%r = call i8 @llvm.fshl.i8(i8 %x, i8 %y, i8 %z)  ; %r = i8: msb_extract((concat(x, y) << (z % 8)), 8)
%r = call i8 @llvm.fshl.i8(i8 255, i8 0, i8 15)  ; %r = i8: 128 (0b10000000)
%r = call i8 @llvm.fshl.i8(i8 15, i8 15, i8 11)  ; %r = i8: 120 (0b01111000)
%r = call i8 @llvm.fshl.i8(i8 0, i8 255, i8 8)   ; %r = i8: 0   (0b00000000)

‘llvm.fshr.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.fshr on any integer bit width or any vector of integer elements. Not all targets support all bit widths or vector types, however.

declare i8  @llvm.fshr.i8 (i8 %a, i8 %b, i8 %c)
declare i64 @llvm.fshr.i64(i64 %a, i64 %b, i64 %c)
declare <2 x i32> @llvm.fshr.v2i32(<2 x i32> %a, <2 x i32> %b, <2 x i32> %c)

Overview:

The ‘llvm.fshr’ family of intrinsic functions performs a funnel shift right: the first two values are concatenated as { %a : %b } (%a is the most significant bits of the wide value), the combined value is shifted right, and the least significant bits are extracted to produce a result that is the same size as the original arguments. If the first 2 arguments are identical, this is equivalent to a rotate right operation. For vector types, the operation occurs for each element of the vector. The shift argument is treated as an unsigned amount modulo the element size of the arguments.

Arguments:

The first two arguments are the values to be concatenated. The third argument is the shift amount. The arguments may be any integer type or a vector with integer element type. All arguments and the return value must have the same type.

Example:

%r = call i8 @llvm.fshr.i8(i8 %x, i8 %y, i8 %z)  ; %r = i8: lsb_extract((concat(x, y) >> (z % 8)), 8)
%r = call i8 @llvm.fshr.i8(i8 255, i8 0, i8 15)  ; %r = i8: 254 (0b11111110)
%r = call i8 @llvm.fshr.i8(i8 15, i8 15, i8 11)  ; %r = i8: 225 (0b11100001)
%r = call i8 @llvm.fshr.i8(i8 0, i8 255, i8 8)   ; %r = i8: 255 (0b11111111)

Arithmetic with Overflow Intrinsics

LLVM provides intrinsics for fast arithmetic overflow checking.

Each of these intrinsics returns a two-element struct. The first element of this struct contains the result of the corresponding arithmetic operation modulo 2ⁿ, where n is the bit width of the result. Therefore, for example, the first element of the struct returned by llvm.sadd.with.overflow.i32 is always the same as the result of a 32-bit add instruction with the same operands, where the add is not modified by an nsw or nuw flag.

The second element of the result is an i1 that is 1 if the arithmetic operation overflowed and 0 otherwise. An operation overflows if, for any values of its operands A and B and for any N larger than the operands’ width, ext(A op B) to iN is not equal to (ext(A) to iN) op (ext(B) to iN) where ext is sext for signed overflow and zext for unsigned overflow, and op is the underlying arithmetic operation.

The behavior of these intrinsics is well-defined for all argument values.

‘llvm.sadd.with.overflow.*’ Intrinsics

Syntax:

This is an overloaded intrinsic. You can use llvm.sadd.with.overflow on any integer bit width or vectors of integers.

declare {i16, i1} @llvm.sadd.with.overflow.i16(i16 %a, i16 %b)
declare {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 %b)
declare {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 %b)
declare {<4 x i32>, <4 x i1>} @llvm.sadd.with.overflow.v4i32(<4 x i32> %a, <4 x i32> %b)

Overview:

The ‘llvm.sadd.with.overflow’ family of intrinsic functions perform a signed addition of the two arguments, and indicate whether an overflow occurred during the signed summation.

Arguments:

The arguments (%a and %b) and the first element of the result structure may be of integer types of any bit width, but they must have the same bit width. The second element of the result structure must be of type i1. %a and %b are the two values that will undergo signed addition.

Semantics:

The ‘llvm.sadd.with.overflow’ family of intrinsic functions perform a signed addition of the two variables. They return a structure — the first element of which is the signed summation, and the second element of which is a bit specifying if the signed summation resulted in an overflow.

Examples:

%res = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 %b)
%sum = extractvalue {i32, i1} %res, 0
%obit = extractvalue {i32, i1} %res, 1
br i1 %obit, label %overflow, label %normal

‘llvm.uadd.with.overflow.*’ Intrinsics

Syntax:

This is an overloaded intrinsic. You can use llvm.uadd.with.overflow on any integer bit width or vectors of integers.

declare {i16, i1} @llvm.uadd.with.overflow.i16(i16 %a, i16 %b)
declare {i32, i1} @llvm.uadd.with.overflow.i32(i32 %a, i32 %b)
declare {i64, i1} @llvm.uadd.with.overflow.i64(i64 %a, i64 %b)
declare {<4 x i32>, <4 x i1>} @llvm.uadd.with.overflow.v4i32(<4 x i32> %a, <4 x i32> %b)

Overview:

The ‘llvm.uadd.with.overflow’ family of intrinsic functions perform an unsigned addition of the two arguments, and indicate whether a carry occurred during the unsigned summation.

Arguments:

The arguments (%a and %b) and the first element of the result structure may be of integer types of any bit width, but they must have the same bit width. The second element of the result structure must be of type i1. %a and %b are the two values that will undergo unsigned addition.

Semantics:

The ‘llvm.uadd.with.overflow’ family of intrinsic functions perform an unsigned addition of the two arguments. They return a structure — the first element of which is the sum, and the second element of which is a bit specifying if the unsigned summation resulted in a carry.

Examples:

%res = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %a, i32 %b)
%sum = extractvalue {i32, i1} %res, 0
%obit = extractvalue {i32, i1} %res, 1
br i1 %obit, label %carry, label %normal

‘llvm.ssub.with.overflow.*’ Intrinsics

Syntax:

This is an overloaded intrinsic. You can use llvm.ssub.with.overflow on any integer bit width or vectors of integers.

declare {i16, i1} @llvm.ssub.with.overflow.i16(i16 %a, i16 %b)
declare {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 %b)
declare {i64, i1} @llvm.ssub.with.overflow.i64(i64 %a, i64 %b)
declare {<4 x i32>, <4 x i1>} @llvm.ssub.with.overflow.v4i32(<4 x i32> %a, <4 x i32> %b)

Overview:

The ‘llvm.ssub.with.overflow’ family of intrinsic functions perform a signed subtraction of the two arguments, and indicate whether an overflow occurred during the signed subtraction.

Arguments:

The arguments (%a and %b) and the first element of the result structure may be of integer types of any bit width, but they must have the same bit width. The second element of the result structure must be of type i1. %a and %b are the two values that will undergo signed subtraction.

Semantics:

The ‘llvm.ssub.with.overflow’ family of intrinsic functions perform a signed subtraction of the two arguments. They return a structure — the first element of which is the subtraction, and the second element of which is a bit specifying if the signed subtraction resulted in an overflow.

Examples:

%res = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 %b)
%sum = extractvalue {i32, i1} %res, 0
%obit = extractvalue {i32, i1} %res, 1
br i1 %obit, label %overflow, label %normal

‘llvm.usub.with.overflow.*’ Intrinsics

Syntax:

This is an overloaded intrinsic. You can use llvm.usub.with.overflow on any integer bit width or vectors of integers.

declare {i16, i1} @llvm.usub.with.overflow.i16(i16 %a, i16 %b)
declare {i32, i1} @llvm.usub.with.overflow.i32(i32 %a, i32 %b)
declare {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 %b)
declare {<4 x i32>, <4 x i1>} @llvm.usub.with.overflow.v4i32(<4 x i32> %a, <4 x i32> %b)

Overview:

The ‘llvm.usub.with.overflow’ family of intrinsic functions perform an unsigned subtraction of the two arguments, and indicate whether an overflow occurred during the unsigned subtraction.

Arguments:

The arguments (%a and %b) and the first element of the result structure may be of integer types of any bit width, but they must have the same bit width. The second element of the result structure must be of type i1. %a and %b are the two values that will undergo unsigned subtraction.

Semantics:

The ‘llvm.usub.with.overflow’ family of intrinsic functions perform an unsigned subtraction of the two arguments. They return a structure — the first element of which is the subtraction, and the second element of which is a bit specifying if the unsigned subtraction resulted in an overflow.

Examples:

%res = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %a, i32 %b)
%sum = extractvalue {i32, i1} %res, 0
%obit = extractvalue {i32, i1} %res, 1
br i1 %obit, label %overflow, label %normal

‘llvm.smul.with.overflow.*’ Intrinsics

Syntax:

This is an overloaded intrinsic. You can use llvm.smul.with.overflow on any integer bit width or vectors of integers.

declare {i16, i1} @llvm.smul.with.overflow.i16(i16 %a, i16 %b)
declare {i32, i1} @llvm.smul.with.overflow.i32(i32 %a, i32 %b)
declare {i64, i1} @llvm.smul.with.overflow.i64(i64 %a, i64 %b)
declare {<4 x i32>, <4 x i1>} @llvm.smul.with.overflow.v4i32(<4 x i32> %a, <4 x i32> %b)

Overview:

The ‘llvm.smul.with.overflow’ family of intrinsic functions perform a signed multiplication of the two arguments, and indicate whether an overflow occurred during the signed multiplication.

Arguments:

The arguments (%a and %b) and the first element of the result structure may be of integer types of any bit width, but they must have the same bit width. The second element of the result structure must be of type i1. %a and %b are the two values that will undergo signed multiplication.

Semantics:

The ‘llvm.smul.with.overflow’ family of intrinsic functions perform a signed multiplication of the two arguments. They return a structure — the first element of which is the multiplication, and the second element of which is a bit specifying if the signed multiplication resulted in an overflow.

Examples:

%res = call {i32, i1} @llvm.smul.with.overflow.i32(i32 %a, i32 %b)
%sum = extractvalue {i32, i1} %res, 0
%obit = extractvalue {i32, i1} %res, 1
br i1 %obit, label %overflow, label %normal

‘llvm.umul.with.overflow.*’ Intrinsics

Syntax:

This is an overloaded intrinsic. You can use llvm.umul.with.overflow on any integer bit width or vectors of integers.

declare {i16, i1} @llvm.umul.with.overflow.i16(i16 %a, i16 %b)
declare {i32, i1} @llvm.umul.with.overflow.i32(i32 %a, i32 %b)
declare {i64, i1} @llvm.umul.with.overflow.i64(i64 %a, i64 %b)
declare {<4 x i32>, <4 x i1>} @llvm.umul.with.overflow.v4i32(<4 x i32> %a, <4 x i32> %b)

Overview:

The ‘llvm.umul.with.overflow’ family of intrinsic functions perform a unsigned multiplication of the two arguments, and indicate whether an overflow occurred during the unsigned multiplication.

Arguments:

The arguments (%a and %b) and the first element of the result structure may be of integer types of any bit width, but they must have the same bit width. The second element of the result structure must be of type i1. %a and %b are the two values that will undergo unsigned multiplication.

Semantics:

The ‘llvm.umul.with.overflow’ family of intrinsic functions perform an unsigned multiplication of the two arguments. They return a structure — the first element of which is the multiplication, and the second element of which is a bit specifying if the unsigned multiplication resulted in an overflow.

Examples:

%res = call {i32, i1} @llvm.umul.with.overflow.i32(i32 %a, i32 %b)
%sum = extractvalue {i32, i1} %res, 0
%obit = extractvalue {i32, i1} %res, 1
br i1 %obit, label %overflow, label %normal

Saturation Arithmetic Intrinsics

Saturation arithmetic is a version of arithmetic in which operations are limited to a fixed range between a minimum and maximum value. If the result of an operation is greater than the maximum value, the result is set (or “clamped”) to this maximum. If it is below the minimum, it is clamped to this minimum.

‘llvm.sadd.sat.*’ Intrinsics

Syntax

This is an overloaded intrinsic. You can use llvm.sadd.sat on any integer bit width or vectors of integers.

declare i16 @llvm.sadd.sat.i16(i16 %a, i16 %b)
declare i32 @llvm.sadd.sat.i32(i32 %a, i32 %b)
declare i64 @llvm.sadd.sat.i64(i64 %a, i64 %b)
declare <4 x i32> @llvm.sadd.sat.v4i32(<4 x i32> %a, <4 x i32> %b)

Overview

The ‘llvm.sadd.sat’ family of intrinsic functions perform signed saturating addition on the 2 arguments.

Arguments

The arguments (%a and %b) and the result may be of integer types of any bit width, but they must have the same bit width. %a and %b are the two values that will undergo signed addition.

Semantics:

The maximum value this operation can clamp to is the largest signed value representable by the bit width of the arguments. The minimum value is the smallest signed value representable by this bit width.

Examples

%res = call i4 @llvm.sadd.sat.i4(i4 1, i4 2)  ; %res = 3
%res = call i4 @llvm.sadd.sat.i4(i4 5, i4 6)  ; %res = 7
%res = call i4 @llvm.sadd.sat.i4(i4 -4, i4 2)  ; %res = -2
%res = call i4 @llvm.sadd.sat.i4(i4 -4, i4 -5)  ; %res = -8

‘llvm.uadd.sat.*’ Intrinsics

Syntax

This is an overloaded intrinsic. You can use llvm.uadd.sat on any integer bit width or vectors of integers.

declare i16 @llvm.uadd.sat.i16(i16 %a, i16 %b)
declare i32 @llvm.uadd.sat.i32(i32 %a, i32 %b)
declare i64 @llvm.uadd.sat.i64(i64 %a, i64 %b)
declare <4 x i32> @llvm.uadd.sat.v4i32(<4 x i32> %a, <4 x i32> %b)

Overview

The ‘llvm.uadd.sat’ family of intrinsic functions perform unsigned saturating addition on the 2 arguments.

Arguments

The arguments (%a and %b) and the result may be of integer types of any bit width, but they must have the same bit width. %a and %b are the two values that will undergo unsigned addition.

Semantics:

The maximum value this operation can clamp to is the largest unsigned value representable by the bit width of the arguments. Because this is an unsigned operation, the result will never saturate towards zero.

Examples

%res = call i4 @llvm.uadd.sat.i4(i4 1, i4 2)  ; %res = 3
%res = call i4 @llvm.uadd.sat.i4(i4 5, i4 6)  ; %res = 11
%res = call i4 @llvm.uadd.sat.i4(i4 8, i4 8)  ; %res = 15

‘llvm.ssub.sat.*’ Intrinsics

Syntax

This is an overloaded intrinsic. You can use llvm.ssub.sat on any integer bit width or vectors of integers.

declare i16 @llvm.ssub.sat.i16(i16 %a, i16 %b)
declare i32 @llvm.ssub.sat.i32(i32 %a, i32 %b)
declare i64 @llvm.ssub.sat.i64(i64 %a, i64 %b)
declare <4 x i32> @llvm.ssub.sat.v4i32(<4 x i32> %a, <4 x i32> %b)

Overview

The ‘llvm.ssub.sat’ family of intrinsic functions perform signed saturating subtraction on the 2 arguments.

Arguments

The arguments (%a and %b) and the result may be of integer types of any bit width, but they must have the same bit width. %a and %b are the two values that will undergo signed subtraction.

Semantics:

The maximum value this operation can clamp to is the largest signed value representable by the bit width of the arguments. The minimum value is the smallest signed value representable by this bit width.

Examples

%res = call i4 @llvm.ssub.sat.i4(i4 2, i4 1)  ; %res = 1
%res = call i4 @llvm.ssub.sat.i4(i4 2, i4 6)  ; %res = -4
%res = call i4 @llvm.ssub.sat.i4(i4 -4, i4 5)  ; %res = -8
%res = call i4 @llvm.ssub.sat.i4(i4 4, i4 -5)  ; %res = 7

‘llvm.usub.sat.*’ Intrinsics

Syntax

This is an overloaded intrinsic. You can use llvm.usub.sat on any integer bit width or vectors of integers.

declare i16 @llvm.usub.sat.i16(i16 %a, i16 %b)
declare i32 @llvm.usub.sat.i32(i32 %a, i32 %b)
declare i64 @llvm.usub.sat.i64(i64 %a, i64 %b)
declare <4 x i32> @llvm.usub.sat.v4i32(<4 x i32> %a, <4 x i32> %b)

Overview

The ‘llvm.usub.sat’ family of intrinsic functions perform unsigned saturating subtraction on the 2 arguments.

Arguments

The arguments (%a and %b) and the result may be of integer types of any bit width, but they must have the same bit width. %a and %b are the two values that will undergo unsigned subtraction.

Semantics:

The minimum value this operation can clamp to is 0, which is the smallest unsigned value representable by the bit width of the unsigned arguments. Because this is an unsigned operation, the result will never saturate towards the largest possible value representable by this bit width.

Examples

%res = call i4 @llvm.usub.sat.i4(i4 2, i4 1)  ; %res = 1
%res = call i4 @llvm.usub.sat.i4(i4 2, i4 6)  ; %res = 0

‘llvm.sshl.sat.*’ Intrinsics

Syntax

This is an overloaded intrinsic. You can use llvm.sshl.sat on integers or vectors of integers of any bit width.

declare i16 @llvm.sshl.sat.i16(i16 %a, i16 %b)
declare i32 @llvm.sshl.sat.i32(i32 %a, i32 %b)
declare i64 @llvm.sshl.sat.i64(i64 %a, i64 %b)
declare <4 x i32> @llvm.sshl.sat.v4i32(<4 x i32> %a, <4 x i32> %b)

Overview

The ‘llvm.sshl.sat’ family of intrinsic functions perform signed saturating left shift on the first argument.

Arguments

The arguments (%a and %b) and the result may be of integer types of any bit width, but they must have the same bit width. %a is the value to be shifted, and %b is the amount to shift by. If b is (statically or dynamically) equal to or larger than the integer bit width of the arguments, the result is a poison value. If the arguments are vectors, each vector element of a is shifted by the corresponding shift amount in b.

Semantics:

The maximum value this operation can clamp to is the largest signed value representable by the bit width of the arguments. The minimum value is the smallest signed value representable by this bit width.

Examples

%res = call i4 @llvm.sshl.sat.i4(i4 2, i4 1)  ; %res = 4
%res = call i4 @llvm.sshl.sat.i4(i4 2, i4 2)  ; %res = 7
%res = call i4 @llvm.sshl.sat.i4(i4 -5, i4 1)  ; %res = -8
%res = call i4 @llvm.sshl.sat.i4(i4 -1, i4 1)  ; %res = -2

‘llvm.ushl.sat.*’ Intrinsics

Syntax

This is an overloaded intrinsic. You can use llvm.ushl.sat on integers or vectors of integers of any bit width.

declare i16 @llvm.ushl.sat.i16(i16 %a, i16 %b)
declare i32 @llvm.ushl.sat.i32(i32 %a, i32 %b)
declare i64 @llvm.ushl.sat.i64(i64 %a, i64 %b)
declare <4 x i32> @llvm.ushl.sat.v4i32(<4 x i32> %a, <4 x i32> %b)

Overview

The ‘llvm.ushl.sat’ family of intrinsic functions perform unsigned saturating left shift on the first argument.

Arguments

The arguments (%a and %b) and the result may be of integer types of any bit width, but they must have the same bit width. %a is the value to be shifted, and %b is the amount to shift by. If b is (statically or dynamically) equal to or larger than the integer bit width of the arguments, the result is a poison value. If the arguments are vectors, each vector element of a is shifted by the corresponding shift amount in b.

Semantics:

The maximum value this operation can clamp to is the largest unsigned value representable by the bit width of the arguments.

Examples

%res = call i4 @llvm.ushl.sat.i4(i4 2, i4 1)  ; %res = 4
%res = call i4 @llvm.ushl.sat.i4(i4 3, i4 3)  ; %res = 15

Fixed Point Arithmetic Intrinsics

A fixed point number represents a real data type for a number that has a fixed number of digits after a radix point (equivalent to the decimal point ‘.’). The number of digits after the radix point is referred as the scale. These are useful for representing fractional values to a specific precision. The following intrinsics perform fixed point arithmetic operations on 2 operands of the same scale, specified as the third argument.

The llvm.*mul.fix family of intrinsic functions represents a multiplication of fixed point numbers through scaled integers. Therefore, fixed point multiplication can be represented as

%result = call i4 @llvm.smul.fix.i4(i4 %a, i4 %b, i32 %scale)

; Expands to
%a2 = sext i4 %a to i8
%b2 = sext i4 %b to i8
%mul = mul nsw nuw i8 %a2, %b2
%scale2 = trunc i32 %scale to i8
%r = ashr i8 %mul, i8 %scale2  ; this is for a target rounding down towards negative infinity
%result = trunc i8 %r to i4

The llvm.*div.fix family of intrinsic functions represents a division of fixed point numbers through scaled integers. Fixed point division can be represented as:

%result call i4 @llvm.sdiv.fix.i4(i4 %a, i4 %b, i32 %scale)

; Expands to
%a2 = sext i4 %a to i8
%b2 = sext i4 %b to i8
%scale2 = trunc i32 %scale to i8
%a3 = shl i8 %a2, %scale2
%r = sdiv i8 %a3, %b2 ; this is for a target rounding towards zero
%result = trunc i8 %r to i4

For each of these functions, if the result cannot be represented exactly with the provided scale, the result is rounded. Rounding is unspecified since preferred rounding may vary for different targets. Rounding is specified through a target hook. Different pipelines should legalize or optimize this using the rounding specified by this hook if it is provided. Operations like constant folding, instruction combining, KnownBits, and ValueTracking should also use this hook, if provided, and not assume the direction of rounding. A rounded result must always be within one unit of precision from the true result. That is, the error between the returned result and the true result must be less than 1/2^(scale).

‘llvm.smul.fix.*’ Intrinsics

Syntax

This is an overloaded intrinsic. You can use llvm.smul.fix on any integer bit width or vectors of integers.

declare i16 @llvm.smul.fix.i16(i16 %a, i16 %b, i32 %scale)
declare i32 @llvm.smul.fix.i32(i32 %a, i32 %b, i32 %scale)
declare i64 @llvm.smul.fix.i64(i64 %a, i64 %b, i32 %scale)
declare <4 x i32> @llvm.smul.fix.v4i32(<4 x i32> %a, <4 x i32> %b, i32 %scale)

Overview

The ‘llvm.smul.fix’ family of intrinsic functions perform signed fixed point multiplication on 2 arguments of the same scale.

Arguments

The arguments (%a and %b) and the result may be of integer types of any bit width, but they must have the same bit width. The arguments may also work with int vectors of the same length and int size. %a and %b are the two values that will undergo signed fixed point multiplication. The argument %scale represents the scale of both operands, and must be a constant integer.

Semantics:

This operation performs fixed point multiplication on the 2 arguments of a specified scale. The result will also be returned in the same scale specified in the third argument.

If the result value cannot be precisely represented in the given scale, the value is rounded up or down to the closest representable value. The rounding direction is unspecified.

It is undefined behavior if the result value does not fit within the range of the fixed point type.

Examples

%res = call i4 @llvm.smul.fix.i4(i4 3, i4 2, i32 0)  ; %res = 6 (2 x 3 = 6)
%res = call i4 @llvm.smul.fix.i4(i4 3, i4 2, i32 1)  ; %res = 3 (1.5 x 1 = 1.5)
%res = call i4 @llvm.smul.fix.i4(i4 3, i4 -2, i32 1)  ; %res = -3 (1.5 x -1 = -1.5)

; The result in the following could be rounded up to -2 or down to -2.5
%res = call i4 @llvm.smul.fix.i4(i4 3, i4 -3, i32 1)  ; %res = -5 (or -4) (1.5 x -1.5 = -2.25)

‘llvm.umul.fix.*’ Intrinsics

Syntax

This is an overloaded intrinsic. You can use llvm.umul.fix on any integer bit width or vectors of integers.

declare i16 @llvm.umul.fix.i16(i16 %a, i16 %b, i32 %scale)
declare i32 @llvm.umul.fix.i32(i32 %a, i32 %b, i32 %scale)
declare i64 @llvm.umul.fix.i64(i64 %a, i64 %b, i32 %scale)
declare <4 x i32> @llvm.umul.fix.v4i32(<4 x i32> %a, <4 x i32> %b, i32 %scale)

Overview

The ‘llvm.umul.fix’ family of intrinsic functions perform unsigned fixed point multiplication on 2 arguments of the same scale.

Arguments

The arguments (%a and %b) and the result may be of integer types of any bit width, but they must have the same bit width. The arguments may also work with int vectors of the same length and int size. %a and %b are the two values that will undergo unsigned fixed point multiplication. The argument %scale represents the scale of both operands, and must be a constant integer.

Semantics:

This operation performs unsigned fixed point multiplication on the 2 arguments of a specified scale. The result will also be returned in the same scale specified in the third argument.

If the result value cannot be precisely represented in the given scale, the value is rounded up or down to the closest representable value. The rounding direction is unspecified.

It is undefined behavior if the result value does not fit within the range of the fixed point type.

Examples

%res = call i4 @llvm.umul.fix.i4(i4 3, i4 2, i32 0)  ; %res = 6 (2 x 3 = 6)
%res = call i4 @llvm.umul.fix.i4(i4 3, i4 2, i32 1)  ; %res = 3 (1.5 x 1 = 1.5)

; The result in the following could be rounded down to 3.5 or up to 4
%res = call i4 @llvm.umul.fix.i4(i4 15, i4 1, i32 1)  ; %res = 7 (or 8) (7.5 x 0.5 = 3.75)

‘llvm.smul.fix.sat.*’ Intrinsics

Syntax

This is an overloaded intrinsic. You can use llvm.smul.fix.sat on any integer bit width or vectors of integers.

declare i16 @llvm.smul.fix.sat.i16(i16 %a, i16 %b, i32 %scale)
declare i32 @llvm.smul.fix.sat.i32(i32 %a, i32 %b, i32 %scale)
declare i64 @llvm.smul.fix.sat.i64(i64 %a, i64 %b, i32 %scale)
declare <4 x i32> @llvm.smul.fix.sat.v4i32(<4 x i32> %a, <4 x i32> %b, i32 %scale)

Overview

The ‘llvm.smul.fix.sat’ family of intrinsic functions perform signed fixed point saturating multiplication on 2 arguments of the same scale.

Arguments

The arguments (%a and %b) and the result may be of integer types of any bit width, but they must have the same bit width. %a and %b are the two values that will undergo signed fixed point multiplication. The argument %scale represents the scale of both operands, and must be a constant integer.

Semantics:

This operation performs fixed point multiplication on the 2 arguments of a specified scale. The result will also be returned in the same scale specified in the third argument.

If the result value cannot be precisely represented in the given scale, the value is rounded up or down to the closest representable value. The rounding direction is unspecified.

The maximum value this operation can clamp to is the largest signed value representable by the bit width of the first 2 arguments. The minimum value is the smallest signed value representable by this bit width.

Examples

%res = call i4 @llvm.smul.fix.sat.i4(i4 3, i4 2, i32 0)  ; %res = 6 (2 x 3 = 6)
%res = call i4 @llvm.smul.fix.sat.i4(i4 3, i4 2, i32 1)  ; %res = 3 (1.5 x 1 = 1.5)
%res = call i4 @llvm.smul.fix.sat.i4(i4 3, i4 -2, i32 1)  ; %res = -3 (1.5 x -1 = -1.5)

; The result in the following could be rounded up to -2 or down to -2.5
%res = call i4 @llvm.smul.fix.sat.i4(i4 3, i4 -3, i32 1)  ; %res = -5 (or -4) (1.5 x -1.5 = -2.25)

; Saturation
%res = call i4 @llvm.smul.fix.sat.i4(i4 7, i4 2, i32 0)  ; %res = 7
%res = call i4 @llvm.smul.fix.sat.i4(i4 7, i4 4, i32 2)  ; %res = 7
%res = call i4 @llvm.smul.fix.sat.i4(i4 -8, i4 5, i32 2)  ; %res = -8
%res = call i4 @llvm.smul.fix.sat.i4(i4 -8, i4 -2, i32 1)  ; %res = 7

; Scale can affect the saturation result
%res = call i4 @llvm.smul.fix.sat.i4(i4 2, i4 4, i32 0)  ; %res = 7 (2 x 4 -> clamped to 7)
%res = call i4 @llvm.smul.fix.sat.i4(i4 2, i4 4, i32 1)  ; %res = 4 (1 x 2 = 2)

‘llvm.umul.fix.sat.*’ Intrinsics

Syntax

This is an overloaded intrinsic. You can use llvm.umul.fix.sat on any integer bit width or vectors of integers.

declare i16 @llvm.umul.fix.sat.i16(i16 %a, i16 %b, i32 %scale)
declare i32 @llvm.umul.fix.sat.i32(i32 %a, i32 %b, i32 %scale)
declare i64 @llvm.umul.fix.sat.i64(i64 %a, i64 %b, i32 %scale)
declare <4 x i32> @llvm.umul.fix.sat.v4i32(<4 x i32> %a, <4 x i32> %b, i32 %scale)

Overview

The ‘llvm.umul.fix.sat’ family of intrinsic functions perform unsigned fixed point saturating multiplication on 2 arguments of the same scale.

Arguments

The arguments (%a and %b) and the result may be of integer types of any bit width, but they must have the same bit width. %a and %b are the two values that will undergo unsigned fixed point multiplication. The argument %scale represents the scale of both operands, and must be a constant integer.

Semantics:

This operation performs fixed point multiplication on the 2 arguments of a specified scale. The result will also be returned in the same scale specified in the third argument.

If the result value cannot be precisely represented in the given scale, the value is rounded up or down to the closest representable value. The rounding direction is unspecified.

The maximum value this operation can clamp to is the largest unsigned value representable by the bit width of the first 2 arguments. The minimum value is the smallest unsigned value representable by this bit width (zero).

Examples

%res = call i4 @llvm.umul.fix.sat.i4(i4 3, i4 2, i32 0)  ; %res = 6 (2 x 3 = 6)
%res = call i4 @llvm.umul.fix.sat.i4(i4 3, i4 2, i32 1)  ; %res = 3 (1.5 x 1 = 1.5)

; The result in the following could be rounded down to 2 or up to 2.5
%res = call i4 @llvm.umul.fix.sat.i4(i4 3, i4 3, i32 1)  ; %res = 4 (or 5) (1.5 x 1.5 = 2.25)

; Saturation
%res = call i4 @llvm.umul.fix.sat.i4(i4 8, i4 2, i32 0)  ; %res = 15 (8 x 2 -> clamped to 15)
%res = call i4 @llvm.umul.fix.sat.i4(i4 8, i4 8, i32 2)  ; %res = 15 (2 x 2 -> clamped to 3.75)

; Scale can affect the saturation result
%res = call i4 @llvm.umul.fix.sat.i4(i4 2, i4 4, i32 0)  ; %res = 7 (2 x 4 -> clamped to 7)
%res = call i4 @llvm.umul.fix.sat.i4(i4 2, i4 4, i32 1)  ; %res = 4 (1 x 2 = 2)

‘llvm.sdiv.fix.*’ Intrinsics

Syntax

This is an overloaded intrinsic. You can use llvm.sdiv.fix on any integer bit width or vectors of integers.

declare i16 @llvm.sdiv.fix.i16(i16 %a, i16 %b, i32 %scale)
declare i32 @llvm.sdiv.fix.i32(i32 %a, i32 %b, i32 %scale)
declare i64 @llvm.sdiv.fix.i64(i64 %a, i64 %b, i32 %scale)
declare <4 x i32> @llvm.sdiv.fix.v4i32(<4 x i32> %a, <4 x i32> %b, i32 %scale)

Overview

The ‘llvm.sdiv.fix’ family of intrinsic functions perform signed fixed point division on 2 arguments of the same scale.

Arguments

The arguments (%a and %b) and the result may be of integer types of any bit width, but they must have the same bit width. The arguments may also work with int vectors of the same length and int size. %a and %b are the two values that will undergo signed fixed point division. The argument %scale represents the scale of both operands, and must be a constant integer.

Semantics:

This operation performs fixed point division on the 2 arguments of a specified scale. The result will also be returned in the same scale specified in the third argument.

If the result value cannot be precisely represented in the given scale, the value is rounded up or down to the closest representable value. The rounding direction is unspecified.

It is undefined behavior if the result value does not fit within the range of the fixed point type, or if the second argument is zero.

Examples

%res = call i4 @llvm.sdiv.fix.i4(i4 6, i4 2, i32 0)  ; %res = 3 (6 / 2 = 3)
%res = call i4 @llvm.sdiv.fix.i4(i4 6, i4 4, i32 1)  ; %res = 3 (3 / 2 = 1.5)
%res = call i4 @llvm.sdiv.fix.i4(i4 3, i4 -2, i32 1) ; %res = -3 (1.5 / -1 = -1.5)

; The result in the following could be rounded up to 1 or down to 0.5
%res = call i4 @llvm.sdiv.fix.i4(i4 3, i4 4, i32 1)  ; %res = 2 (or 1) (1.5 / 2 = 0.75)

‘llvm.udiv.fix.*’ Intrinsics

Syntax

This is an overloaded intrinsic. You can use llvm.udiv.fix on any integer bit width or vectors of integers.

declare i16 @llvm.udiv.fix.i16(i16 %a, i16 %b, i32 %scale)
declare i32 @llvm.udiv.fix.i32(i32 %a, i32 %b, i32 %scale)
declare i64 @llvm.udiv.fix.i64(i64 %a, i64 %b, i32 %scale)
declare <4 x i32> @llvm.udiv.fix.v4i32(<4 x i32> %a, <4 x i32> %b, i32 %scale)

Overview

The ‘llvm.udiv.fix’ family of intrinsic functions perform unsigned fixed point division on 2 arguments of the same scale.

Arguments

The arguments (%a and %b) and the result may be of integer types of any bit width, but they must have the same bit width. The arguments may also work with int vectors of the same length and int size. %a and %b are the two values that will undergo unsigned fixed point division. The argument %scale represents the scale of both operands, and must be a constant integer.

Semantics:

This operation performs fixed point division on the 2 arguments of a specified scale. The result will also be returned in the same scale specified in the third argument.

If the result value cannot be precisely represented in the given scale, the value is rounded up or down to the closest representable value. The rounding direction is unspecified.

It is undefined behavior if the result value does not fit within the range of the fixed point type, or if the second argument is zero.

Examples

%res = call i4 @llvm.udiv.fix.i4(i4 6, i4 2, i32 0)  ; %res = 3 (6 / 2 = 3)
%res = call i4 @llvm.udiv.fix.i4(i4 6, i4 4, i32 1)  ; %res = 3 (3 / 2 = 1.5)
%res = call i4 @llvm.udiv.fix.i4(i4 1, i4 -8, i32 4) ; %res = 2 (0.0625 / 0.5 = 0.125)

; The result in the following could be rounded up to 1 or down to 0.5
%res = call i4 @llvm.udiv.fix.i4(i4 3, i4 4, i32 1)  ; %res = 2 (or 1) (1.5 / 2 = 0.75)

‘llvm.sdiv.fix.sat.*’ Intrinsics

Syntax

This is an overloaded intrinsic. You can use llvm.sdiv.fix.sat on any integer bit width or vectors of integers.

declare i16 @llvm.sdiv.fix.sat.i16(i16 %a, i16 %b, i32 %scale)
declare i32 @llvm.sdiv.fix.sat.i32(i32 %a, i32 %b, i32 %scale)
declare i64 @llvm.sdiv.fix.sat.i64(i64 %a, i64 %b, i32 %scale)
declare <4 x i32> @llvm.sdiv.fix.sat.v4i32(<4 x i32> %a, <4 x i32> %b, i32 %scale)

Overview

The ‘llvm.sdiv.fix.sat’ family of intrinsic functions perform signed fixed point saturating division on 2 arguments of the same scale.

Arguments

The arguments (%a and %b) and the result may be of integer types of any bit width, but they must have the same bit width. %a and %b are the two values that will undergo signed fixed point division. The argument %scale represents the scale of both operands, and must be a constant integer.

Semantics:

This operation performs fixed point division on the 2 arguments of a specified scale. The result will also be returned in the same scale specified in the third argument.

If the result value cannot be precisely represented in the given scale, the value is rounded up or down to the closest representable value. The rounding direction is unspecified.

The maximum value this operation can clamp to is the largest signed value representable by the bit width of the first 2 arguments. The minimum value is the smallest signed value representable by this bit width.

It is undefined behavior if the second argument is zero.

Examples

%res = call i4 @llvm.sdiv.fix.sat.i4(i4 6, i4 2, i32 0)  ; %res = 3 (6 / 2 = 3)
%res = call i4 @llvm.sdiv.fix.sat.i4(i4 6, i4 4, i32 1)  ; %res = 3 (3 / 2 = 1.5)
%res = call i4 @llvm.sdiv.fix.sat.i4(i4 3, i4 -2, i32 1) ; %res = -3 (1.5 / -1 = -1.5)

; The result in the following could be rounded up to 1 or down to 0.5
%res = call i4 @llvm.sdiv.fix.sat.i4(i4 3, i4 4, i32 1)  ; %res = 2 (or 1) (1.5 / 2 = 0.75)

; Saturation
%res = call i4 @llvm.sdiv.fix.sat.i4(i4 -8, i4 -1, i32 0)  ; %res = 7 (-8 / -1 = 8 => 7)
%res = call i4 @llvm.sdiv.fix.sat.i4(i4 4, i4 2, i32 2)  ; %res = 7 (1 / 0.5 = 2 => 1.75)
%res = call i4 @llvm.sdiv.fix.sat.i4(i4 -4, i4 1, i32 2)  ; %res = -8 (-1 / 0.25 = -4 => -2)

‘llvm.udiv.fix.sat.*’ Intrinsics

Syntax

This is an overloaded intrinsic. You can use llvm.udiv.fix.sat on any integer bit width or vectors of integers.

declare i16 @llvm.udiv.fix.sat.i16(i16 %a, i16 %b, i32 %scale)
declare i32 @llvm.udiv.fix.sat.i32(i32 %a, i32 %b, i32 %scale)
declare i64 @llvm.udiv.fix.sat.i64(i64 %a, i64 %b, i32 %scale)
declare <4 x i32> @llvm.udiv.fix.sat.v4i32(<4 x i32> %a, <4 x i32> %b, i32 %scale)

Overview

The ‘llvm.udiv.fix.sat’ family of intrinsic functions perform unsigned fixed point saturating division on 2 arguments of the same scale.

Arguments

The arguments (%a and %b) and the result may be of integer types of any bit width, but they must have the same bit width. %a and %b are the two values that will undergo unsigned fixed point division. The argument %scale represents the scale of both operands, and must be a constant integer.

Semantics:

This operation performs fixed point division on the 2 arguments of a specified scale. The result will also be returned in the same scale specified in the third argument.

If the result value cannot be precisely represented in the given scale, the value is rounded up or down to the closest representable value. The rounding direction is unspecified.

The maximum value this operation can clamp to is the largest unsigned value representable by the bit width of the first 2 arguments. The minimum value is the smallest unsigned value representable by this bit width (zero).

It is undefined behavior if the second argument is zero.

Examples

%res = call i4 @llvm.udiv.fix.sat.i4(i4 6, i4 2, i32 0)  ; %res = 3 (6 / 2 = 3)
%res = call i4 @llvm.udiv.fix.sat.i4(i4 6, i4 4, i32 1)  ; %res = 3 (3 / 2 = 1.5)

; The result in the following could be rounded down to 0.5 or up to 1
%res = call i4 @llvm.udiv.fix.sat.i4(i4 3, i4 4, i32 1)  ; %res = 1 (or 2) (1.5 / 2 = 0.75)

; Saturation
%res = call i4 @llvm.udiv.fix.sat.i4(i4 8, i4 2, i32 2)  ; %res = 15 (2 / 0.5 = 4 => 3.75)

Specialized Arithmetic Intrinsics

‘llvm.canonicalize.*’ Intrinsic

Syntax:

declare float @llvm.canonicalize.f32(float %a)
declare double @llvm.canonicalize.f64(double %b)

Overview:

The ‘llvm.canonicalize.*’ intrinsic returns the platform specific canonical encoding of a floating-point number. This canonicalization is useful for implementing certain numeric primitives such as frexp. The canonical encoding is defined by IEEE-754-2008 to be:

2.1.8 canonical encoding: The preferred encoding of a floating-point
representation in a format. Applied to declets, significands of finite
numbers, infinities, and NaNs, especially in decimal formats.

This operation can also be considered equivalent to the IEEE-754-2008 conversion of a floating-point value to the same format. NaNs are handled according to section 6.2.

Examples of non-canonical encodings:

• x87 pseudo denormals, pseudo NaNs, pseudo Infinity, Unnormals. These are converted to a canonical representation per hardware-specific protocol.

• Many normal decimal floating-point numbers have non-canonical alternative encodings.

• Some machines, like GPUs or ARMv7 NEON, do not support subnormal values. These are treated as non-canonical encodings of zero and will be flushed to a zero of the same sign by this operation.

Note that per IEEE-754-2008 6.2, systems that support signaling NaNs with default exception handling must signal an invalid exception, and produce a quiet NaN result.

This function should always be implementable as multiplication by 1.0, provided that the compiler does not constant fold the operation. Likewise, division by 1.0 and llvm.minnum(x, x) are possible implementations. Addition with -0.0 is also sufficient provided that the rounding mode is not -Infinity.

@llvm.canonicalize must preserve the equality relation. That is:

• (@llvm.canonicalize(x) == x) is equivalent to (x == x)

• (@llvm.canonicalize(x) == @llvm.canonicalize(y)) is equivalent to (x == y)

Additionally, the sign of zero must be conserved: @llvm.canonicalize(-0.0) = -0.0 and @llvm.canonicalize(+0.0) = +0.0

The payload bits of a NaN must be conserved, with two exceptions. First, environments which use only a single canonical representation of NaN must perform said canonicalization. Second, SNaNs must be quieted per the usual methods.

The canonicalization operation may be optimized away if:

• The input is known to be canonical. For example, it was produced by a floating-point operation that is required by the standard to be canonical.

• The result is consumed only by (or fused with) other floating-point operations. That is, the bits of the floating-point value are not examined.

‘llvm.fmuladd.*’ Intrinsic

Syntax:

declare float @llvm.fmuladd.f32(float %a, float %b, float %c)
declare double @llvm.fmuladd.f64(double %a, double %b, double %c)

Overview:

The ‘llvm.fmuladd.*’ intrinsic functions represent multiply-add expressions that can be fused if the code generator determines that (a) the target instruction set has support for a fused operation, and (b) that the fused operation is more efficient than the equivalent, separate pair of mul and add instructions.

Arguments:

The ‘llvm.fmuladd.*’ intrinsics each take three arguments: two multiplicands, a and b, and an addend c.

Semantics:

The expression:

%0 = call float @llvm.fmuladd.f32(%a, %b, %c)

is equivalent to the expression a * b + c, except that it is unspecified whether rounding will be performed between the multiplication and addition steps. Fusion is not guaranteed, even if the target platform supports it. If a fused multiply-add is required, the corresponding llvm.fma intrinsic function should be used instead. This never sets errno, just as ‘llvm.fma.*’.

Examples:

%r2 = call float @llvm.fmuladd.f32(float %a, float %b, float %c) ; yields float:r2 = (a * b) + c

Hardware-Loop Intrinsics

LLVM support several intrinsics to mark a loop as a hardware-loop. They are hints to the backend which are required to lower these intrinsics further to target specific instructions, or revert the hardware-loop to a normal loop if target specific restriction are not met and a hardware-loop can’t be generated.

These intrinsics may be modified in the future and are not intended to be used outside the backend. Thus, front-end and mid-level optimizations should not be generating these intrinsics.

‘llvm.set.loop.iterations.*’ Intrinsic

Syntax:

This is an overloaded intrinsic.

declare void @llvm.set.loop.iterations.i32(i32)
declare void @llvm.set.loop.iterations.i64(i64)

Overview:

The ‘llvm.set.loop.iterations.*’ intrinsics are used to specify the hardware-loop trip count. They are placed in the loop preheader basic block and are marked as IntrNoDuplicate to avoid optimizers duplicating these instructions.

Arguments:

The integer operand is the loop trip count of the hardware-loop, and thus not e.g. the loop back-edge taken count.

Semantics:

The ‘llvm.set.loop.iterations.*’ intrinsics do not perform any arithmetic on their operand. It’s a hint to the backend that can use this to set up the hardware-loop count with a target specific instruction, usually a move of this value to a special register or a hardware-loop instruction.

‘llvm.start.loop.iterations.*’ Intrinsic

Syntax:

This is an overloaded intrinsic.

declare i32 @llvm.start.loop.iterations.i32(i32)
declare i64 @llvm.start.loop.iterations.i64(i64)

Overview:

The ‘llvm.start.loop.iterations.*’ intrinsics are similar to the ‘llvm.set.loop.iterations.*’ intrinsics, used to specify the hardware-loop trip count but also produce a value identical to the input that can be used as the input to the loop. They are placed in the loop preheader basic block and the output is expected to be the input to the phi for the induction variable of the loop, decremented by the ‘llvm.loop.decrement.reg.*’.

Arguments:

The integer operand is the loop trip count of the hardware-loop, and thus not e.g. the loop back-edge taken count.

Semantics:

The ‘llvm.start.loop.iterations.*’ intrinsics do not perform any arithmetic on their operand. It’s a hint to the backend that can use this to set up the hardware-loop count with a target specific instruction, usually a move of this value to a special register or a hardware-loop instruction.

‘llvm.test.set.loop.iterations.*’ Intrinsic

Syntax:

This is an overloaded intrinsic.

declare i1 @llvm.test.set.loop.iterations.i32(i32)
declare i1 @llvm.test.set.loop.iterations.i64(i64)

Overview:

The ‘llvm.test.set.loop.iterations.*’ intrinsics are used to specify the the loop trip count, and also test that the given count is not zero, allowing it to control entry to a while-loop. They are placed in the loop preheader’s predecessor basic block, and are marked as IntrNoDuplicate to avoid optimizers duplicating these instructions.

Arguments:

The integer operand is the loop trip count of the hardware-loop, and thus not e.g. the loop back-edge taken count.

Semantics:

The ‘llvm.test.set.loop.iterations.*’ intrinsics do not perform any arithmetic on their operand. It’s a hint to the backend that can use this to set up the hardware-loop count with a target specific instruction, usually a move of this value to a special register or a hardware-loop instruction. The result is the conditional value of whether the given count is not zero.

‘llvm.test.start.loop.iterations.*’ Intrinsic

Syntax:

This is an overloaded intrinsic.

declare {i32, i1} @llvm.test.start.loop.iterations.i32(i32)
declare {i64, i1} @llvm.test.start.loop.iterations.i64(i64)

Overview:

The ‘llvm.test.start.loop.iterations.*’ intrinsics are similar to the ‘llvm.test.set.loop.iterations.*’ and ‘llvm.start.loop.iterations.*’ intrinsics, used to specify the hardware-loop trip count, but also produce a value identical to the input that can be used as the input to the loop. The second i1 output controls entry to a while-loop.

Arguments:

The integer operand is the loop trip count of the hardware-loop, and thus not e.g. the loop back-edge taken count.

Semantics:

The ‘llvm.test.start.loop.iterations.*’ intrinsics do not perform any arithmetic on their operand. It’s a hint to the backend that can use this to set up the hardware-loop count with a target specific instruction, usually a move of this value to a special register or a hardware-loop instruction. The result is a pair of the input and a conditional value of whether the given count is not zero.

‘llvm.loop.decrement.reg.*’ Intrinsic

Syntax:

This is an overloaded intrinsic.

declare i32 @llvm.loop.decrement.reg.i32(i32, i32)
declare i64 @llvm.loop.decrement.reg.i64(i64, i64)

Overview:

The ‘llvm.loop.decrement.reg.*’ intrinsics are used to lower the loop iteration counter and return an updated value that will be used in the next loop test check.

Arguments:

Both arguments must have identical integer types. The first operand is the loop iteration counter. The second operand is the maximum number of elements processed in an iteration.

Semantics:

The ‘llvm.loop.decrement.reg.*’ intrinsics do an integer SUB of its two operands, which is not allowed to wrap. They return the remaining number of iterations still to be executed, and can be used together with a PHI, ICMP and BR to control the number of loop iterations executed. Any optimizations are allowed to treat it is a SUB, and it is supported by SCEV, so it’s the backends responsibility to handle cases where it may be optimized. These intrinsics are marked as IntrNoDuplicate to avoid optimizers duplicating these instructions.

‘llvm.loop.decrement.*’ Intrinsic

Syntax:

This is an overloaded intrinsic.

declare i1 @llvm.loop.decrement.i32(i32)
declare i1 @llvm.loop.decrement.i64(i64)

Overview:

The HardwareLoops pass allows the loop decrement value to be specified with an option. It defaults to a loop decrement value of 1, but it can be an unsigned integer value provided by this option. The ‘llvm.loop.decrement.*’ intrinsics decrement the loop iteration counter with this value, and return a false predicate if the loop should exit, and true otherwise. This is emitted if the loop counter is not updated via a PHI node, which can also be controlled with an option.

Arguments:

The integer argument is the loop decrement value used to decrement the loop iteration counter.

Semantics:

The ‘llvm.loop.decrement.*’ intrinsics do a SUB of the loop iteration counter with the given loop decrement value, and return false if the loop should exit, this SUB is not allowed to wrap. The result is a condition that is used by the conditional branch controlling the loop.

Vector Reduction Intrinsics

Horizontal reductions of vectors can be expressed using the following intrinsics. Each one takes a vector operand as an input and applies its respective operation across all elements of the vector, returning a single scalar result of the same element type.

‘llvm.vector.reduce.add.*’ Intrinsic

Syntax:

declare i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %a)
declare i64 @llvm.vector.reduce.add.v2i64(<2 x i64> %a)

Overview:

The ‘llvm.vector.reduce.add.*’ intrinsics do an integer ADD reduction of a vector, returning the result as a scalar. The return type matches the element-type of the vector input.

Arguments:

The argument to this intrinsic must be a vector of integer values.

‘llvm.vector.reduce.fadd.*’ Intrinsic

Syntax:

declare float @llvm.vector.reduce.fadd.v4f32(float %start_value, <4 x float> %a)
declare double @llvm.vector.reduce.fadd.v2f64(double %start_value, <2 x double> %a)

Overview:

The ‘llvm.vector.reduce.fadd.*’ intrinsics do a floating-point ADD reduction of a vector, returning the result as a scalar. The return type matches the element-type of the vector input.

If the intrinsic call has the ‘reassoc’ flag set, then the reduction will not preserve the associativity of an equivalent scalarized counterpart. Otherwise the reduction will be sequential, thus implying that the operation respects the associativity of a scalarized reduction. That is, the reduction begins with the start value and performs an fadd operation with consecutively increasing vector element indices. See the following pseudocode:

float sequential_fadd(start_value, input_vector)
  result = start_value
  for i = 0 to length(input_vector)
    result = result + input_vector[i]
  return result

Arguments:

The first argument to this intrinsic is a scalar start value for the reduction. The type of the start value matches the element-type of the vector input. The second argument must be a vector of floating-point values.

To ignore the start value, negative zero (-0.0) can be used, as it is the neutral value of floating point addition.

Examples:

%unord = call reassoc float @llvm.vector.reduce.fadd.v4f32(float -0.0, <4 x float> %input) ; relaxed reduction
%ord = call float @llvm.vector.reduce.fadd.v4f32(float %start_value, <4 x float> %input) ; sequential reduction

‘llvm.vector.reduce.mul.*’ Intrinsic

Syntax:

declare i32 @llvm.vector.reduce.mul.v4i32(<4 x i32> %a)
declare i64 @llvm.vector.reduce.mul.v2i64(<2 x i64> %a)

Overview:

The ‘llvm.vector.reduce.mul.*’ intrinsics do an integer MUL reduction of a vector, returning the result as a scalar. The return type matches the element-type of the vector input.

Arguments:

The argument to this intrinsic must be a vector of integer values.

‘llvm.vector.reduce.fmul.*’ Intrinsic

Syntax:

declare float @llvm.vector.reduce.fmul.v4f32(float %start_value, <4 x float> %a)
declare double @llvm.vector.reduce.fmul.v2f64(double %start_value, <2 x double> %a)

Overview:

The ‘llvm.vector.reduce.fmul.*’ intrinsics do a floating-point MUL reduction of a vector, returning the result as a scalar. The return type matches the element-type of the vector input.

If the intrinsic call has the ‘reassoc’ flag set, then the reduction will not preserve the associativity of an equivalent scalarized counterpart. Otherwise the reduction will be sequential, thus implying that the operation respects the associativity of a scalarized reduction. That is, the reduction begins with the start value and performs an fmul operation with consecutively increasing vector element indices. See the following pseudocode:

float sequential_fmul(start_value, input_vector)
  result = start_value
  for i = 0 to length(input_vector)
    result = result * input_vector[i]
  return result

Arguments:

The first argument to this intrinsic is a scalar start value for the reduction. The type of the start value matches the element-type of the vector input. The second argument must be a vector of floating-point values.

To ignore the start value, one (1.0) can be used, as it is the neutral value of floating point multiplication.

Examples:

%unord = call reassoc float @llvm.vector.reduce.fmul.v4f32(float 1.0, <4 x float> %input) ; relaxed reduction
%ord = call float @llvm.vector.reduce.fmul.v4f32(float %start_value, <4 x float> %input) ; sequential reduction

‘llvm.vector.reduce.and.*’ Intrinsic

Syntax:

declare i32 @llvm.vector.reduce.and.v4i32(<4 x i32> %a)

Overview:

The ‘llvm.vector.reduce.and.*’ intrinsics do a bitwise AND reduction of a vector, returning the result as a scalar. The return type matches the element-type of the vector input.

Arguments:

The argument to this intrinsic must be a vector of integer values.

‘llvm.vector.reduce.or.*’ Intrinsic

Syntax:

declare i32 @llvm.vector.reduce.or.v4i32(<4 x i32> %a)

Overview:

The ‘llvm.vector.reduce.or.*’ intrinsics do a bitwise OR reduction of a vector, returning the result as a scalar. The return type matches the element-type of the vector input.

Arguments:

The argument to this intrinsic must be a vector of integer values.

‘llvm.vector.reduce.xor.*’ Intrinsic

Syntax:

declare i32 @llvm.vector.reduce.xor.v4i32(<4 x i32> %a)

Overview:

The ‘llvm.vector.reduce.xor.*’ intrinsics do a bitwise XOR reduction of a vector, returning the result as a scalar. The return type matches the element-type of the vector input.

Arguments:

The argument to this intrinsic must be a vector of integer values.

‘llvm.vector.reduce.smax.*’ Intrinsic

Syntax:

declare i32 @llvm.vector.reduce.smax.v4i32(<4 x i32> %a)

Overview:

The ‘llvm.vector.reduce.smax.*’ intrinsics do a signed integer MAX reduction of a vector, returning the result as a scalar. The return type matches the element-type of the vector input.

Arguments:

The argument to this intrinsic must be a vector of integer values.

‘llvm.vector.reduce.smin.*’ Intrinsic

Syntax:

declare i32 @llvm.vector.reduce.smin.v4i32(<4 x i32> %a)

Overview:

The ‘llvm.vector.reduce.smin.*’ intrinsics do a signed integer MIN reduction of a vector, returning the result as a scalar. The return type matches the element-type of the vector input.

Arguments:

The argument to this intrinsic must be a vector of integer values.

‘llvm.vector.reduce.umax.*’ Intrinsic

Syntax:

declare i32 @llvm.vector.reduce.umax.v4i32(<4 x i32> %a)

Overview:

The ‘llvm.vector.reduce.umax.*’ intrinsics do an unsigned integer MAX reduction of a vector, returning the result as a scalar. The return type matches the element-type of the vector input.

Arguments:

The argument to this intrinsic must be a vector of integer values.

‘llvm.vector.reduce.umin.*’ Intrinsic

Syntax:

declare i32 @llvm.vector.reduce.umin.v4i32(<4 x i32> %a)

Overview:

The ‘llvm.vector.reduce.umin.*’ intrinsics do an unsigned integer MIN reduction of a vector, returning the result as a scalar. The return type matches the element-type of the vector input.

Arguments:

The argument to this intrinsic must be a vector of integer values.

‘llvm.vector.reduce.fmax.*’ Intrinsic

Syntax:

declare float @llvm.vector.reduce.fmax.v4f32(<4 x float> %a)
declare double @llvm.vector.reduce.fmax.v2f64(<2 x double> %a)

Overview:

The ‘llvm.vector.reduce.fmax.*’ intrinsics do a floating-point MAX reduction of a vector, returning the result as a scalar. The return type matches the element-type of the vector input.

This instruction has the same comparison semantics as the ‘llvm.maxnum.*’ intrinsic. That is, the result will always be a number unless all elements of the vector are NaN. For a vector with maximum element magnitude 0.0 and containing both +0.0 and -0.0 elements, the sign of the result is unspecified.

If the intrinsic call has the nnan fast-math flag, then the operation can assume that NaNs are not present in the input vector.

Arguments:

The argument to this intrinsic must be a vector of floating-point values.

‘llvm.vector.reduce.fmin.*’ Intrinsic

Syntax:

This is an overloaded intrinsic.

declare float @llvm.vector.reduce.fmin.v4f32(<4 x float> %a)
declare double @llvm.vector.reduce.fmin.v2f64(<2 x double> %a)

Overview:

The ‘llvm.vector.reduce.fmin.*’ intrinsics do a floating-point MIN reduction of a vector, returning the result as a scalar. The return type matches the element-type of the vector input.

This instruction has the same comparison semantics as the ‘llvm.minnum.*’ intrinsic. That is, the result will always be a number unless all elements of the vector are NaN. For a vector with minimum element magnitude 0.0 and containing both +0.0 and -0.0 elements, the sign of the result is unspecified.

If the intrinsic call has the nnan fast-math flag, then the operation can assume that NaNs are not present in the input vector.

Arguments:

The argument to this intrinsic must be a vector of floating-point values.

‘llvm.vector.reduce.fmaximum.*’ Intrinsic

Syntax:

This is an overloaded intrinsic.

declare float @llvm.vector.reduce.fmaximum.v4f32(<4 x float> %a)
declare double @llvm.vector.reduce.fmaximum.v2f64(<2 x double> %a)

Overview:

The ‘llvm.vector.reduce.fmaximum.*’ intrinsics do a floating-point MAX reduction of a vector, returning the result as a scalar. The return type matches the element-type of the vector input.

This instruction has the same comparison semantics as the ‘llvm.maximum.*’ intrinsic. That is, this intrinsic propagates NaNs and +0.0 is considered greater than -0.0. If any element of the vector is a NaN, the result is NaN.

Arguments:

The argument to this intrinsic must be a vector of floating-point values.

‘llvm.vector.reduce.fminimum.*’ Intrinsic

Syntax:

This is an overloaded intrinsic.

declare float @llvm.vector.reduce.fminimum.v4f32(<4 x float> %a)
declare double @llvm.vector.reduce.fminimum.v2f64(<2 x double> %a)

Overview:

The ‘llvm.vector.reduce.fminimum.*’ intrinsics do a floating-point MIN reduction of a vector, returning the result as a scalar. The return type matches the element-type of the vector input.

This instruction has the same comparison semantics as the ‘llvm.minimum.*’ intrinsic. That is, this intrinsic propagates NaNs and -0.0 is considered less than +0.0. If any element of the vector is a NaN, the result is NaN.

Arguments:

The argument to this intrinsic must be a vector of floating-point values.

‘llvm.vector.insert’ Intrinsic

Syntax:

This is an overloaded intrinsic.

; Insert fixed type into scalable type
declare <vscale x 4 x float> @llvm.vector.insert.nxv4f32.v4f32(<vscale x 4 x float> %vec, <4 x float> %subvec, i64 <idx>)
declare <vscale x 2 x double> @llvm.vector.insert.nxv2f64.v2f64(<vscale x 2 x double> %vec, <2 x double> %subvec, i64 <idx>)

; Insert scalable type into scalable type
declare <vscale x 4 x float> @llvm.vector.insert.nxv4f64.nxv2f64(<vscale x 4 x float> %vec, <vscale x 2 x float> %subvec, i64 <idx>)

; Insert fixed type into fixed type
declare <4 x double> @llvm.vector.insert.v4f64.v2f64(<4 x double> %vec, <2 x double> %subvec, i64 <idx>)

Overview:

The ‘llvm.vector.insert.*’ intrinsics insert a vector into another vector starting from a given index. The return type matches the type of the vector we insert into. Conceptually, this can be used to build a scalable vector out of non-scalable vectors, however this intrinsic can also be used on purely fixed types.

Scalable vectors can only be inserted into other scalable vectors.

Arguments:

The vec is the vector which subvec will be inserted into. The subvec is the vector that will be inserted.

idx represents the starting element number at which subvec will be inserted. idx must be a constant multiple of subvec’s known minimum vector length. If subvec is a scalable vector, idx is first scaled by the runtime scaling factor of subvec. The elements of vec starting at idx are overwritten with subvec. Elements idx through (idx + num_elements(subvec) - 1) must be valid vec indices. If this condition cannot be determined statically but is false at runtime, then the result vector is a poison value.

‘llvm.vector.extract’ Intrinsic

Syntax:

This is an overloaded intrinsic.

; Extract fixed type from scalable type
declare <4 x float> @llvm.vector.extract.v4f32.nxv4f32(<vscale x 4 x float> %vec, i64 <idx>)
declare <2 x double> @llvm.vector.extract.v2f64.nxv2f64(<vscale x 2 x double> %vec, i64 <idx>)

; Extract scalable type from scalable type
declare <vscale x 2 x float> @llvm.vector.extract.nxv2f32.nxv4f32(<vscale x 4 x float> %vec, i64 <idx>)

; Extract fixed type from fixed type
declare <2 x double> @llvm.vector.extract.v2f64.v4f64(<4 x double> %vec, i64 <idx>)

Overview:

The ‘llvm.vector.extract.*’ intrinsics extract a vector from within another vector starting from a given index. The return type must be explicitly specified. Conceptually, this can be used to decompose a scalable vector into non-scalable parts, however this intrinsic can also be used on purely fixed types.

Scalable vectors can only be extracted from other scalable vectors.

Arguments:

The vec is the vector from which we will extract a subvector.

The idx specifies the starting element number within vec from which a subvector is extracted. idx must be a constant multiple of the known-minimum vector length of the result type. If the result type is a scalable vector, idx is first scaled by the result type’s runtime scaling factor. Elements idx through (idx + num_elements(result_type) - 1) must be valid vector indices. If this condition cannot be determined statically but is false at runtime, then the result vector is a poison value. The idx parameter must be a vector index constant type (for most targets this will be an integer pointer type).

‘llvm.vector.reverse’ Intrinsic

Syntax:

This is an overloaded intrinsic.

declare <2 x i8> @llvm.vector.reverse.v2i8(<2 x i8> %a)
declare <vscale x 4 x i32> @llvm.vector.reverse.nxv4i32(<vscale x 4 x i32> %a)

Overview:

The ‘llvm.vector.reverse.*’ intrinsics reverse a vector. The intrinsic takes a single vector and returns a vector of matching type but with the original lane order reversed. These intrinsics work for both fixed and scalable vectors. While this intrinsic supports all vector types the recommended way to express this operation for fixed-width vectors is still to use a shufflevector, as that may allow for more optimization opportunities.

Arguments:

The argument to this intrinsic must be a vector.

‘llvm.vector.deinterleave2’ Intrinsic

Syntax:

This is an overloaded intrinsic.

declare {<2 x double>, <2 x double>} @llvm.vector.deinterleave2.v4f64(<4 x double> %vec1)
declare {<vscale x 4 x i32>, <vscale x 4 x i32>}  @llvm.vector.deinterleave2.nxv8i32(<vscale x 8 x i32> %vec1)

Overview:

The ‘llvm.vector.deinterleave2’ intrinsic constructs two vectors by deinterleaving the even and odd lanes of the input vector.

This intrinsic works for both fixed and scalable vectors. While this intrinsic supports all vector types the recommended way to express this operation for fixed-width vectors is still to use a shufflevector, as that may allow for more optimization opportunities.

For example:

{<2 x i64>, <2 x i64>} llvm.vector.deinterleave2.v4i64(<4 x i64> <i64 0, i64 1, i64 2, i64 3>); ==> {<2 x i64> <i64 0, i64 2>, <2 x i64> <i64 1, i64 3>}

Arguments:

The argument is a vector whose type corresponds to the logical concatenation of the two result types.

‘llvm.vector.interleave2’ Intrinsic

Syntax:

This is an overloaded intrinsic.

declare <4 x double> @llvm.vector.interleave2.v4f64(<2 x double> %vec1, <2 x double> %vec2)
declare <vscale x 8 x i32> @llvm.vector.interleave2.nxv8i32(<vscale x 4 x i32> %vec1, <vscale x 4 x i32> %vec2)

Overview:

The ‘llvm.vector.interleave2’ intrinsic constructs a vector by interleaving two input vectors.

This intrinsic works for both fixed and scalable vectors. While this intrinsic supports all vector types the recommended way to express this operation for fixed-width vectors is still to use a shufflevector, as that may allow for more optimization opportunities.

For example:

<4 x i64> llvm.vector.interleave2.v4i64(<2 x i64> <i64 0, i64 2>, <2 x i64> <i64 1, i64 3>); ==> <4 x i64> <i64 0, i64 1, i64 2, i64 3>

Arguments:

Both arguments must be vectors of the same type whereby their logical concatenation matches the result type.

‘llvm.experimental.cttz.elts’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use `llvm.experimental.cttz.elts` on any vector of integer elements, both fixed width and scalable.

declare i8 @llvm.experimental.cttz.elts.i8.v8i1(<8 x i1> <src>, i1 <is_zero_poison>)

Overview:

The ‘llvm.experimental.cttz.elts’ intrinsic counts the number of trailing zero elements of a vector.

Arguments:

The first argument is the vector to be counted. This argument must be a vector with integer element type. The return type must also be an integer type which is wide enough to hold the maximum number of elements of the source vector. The behavior of this intrinsic is undefined if the return type is not wide enough for the number of elements in the input vector.

The second argument is a constant flag that indicates whether the intrinsic returns a valid result if the first argument is all zero. If the first argument is all zero and the second argument is true, the result is poison.

Semantics:

The ‘llvm.experimental.cttz.elts’ intrinsic counts the trailing (least significant) zero elements in a vector. If src == 0 the result is the number of elements in the input vector.

‘llvm.vector.splice’ Intrinsic

Syntax:

This is an overloaded intrinsic.

declare <2 x double> @llvm.vector.splice.v2f64(<2 x double> %vec1, <2 x double> %vec2, i32 %imm)
declare <vscale x 4 x i32> @llvm.vector.splice.nxv4i32(<vscale x 4 x i32> %vec1, <vscale x 4 x i32> %vec2, i32 %imm)

Overview:

The ‘llvm.vector.splice.*’ intrinsics construct a vector by concatenating elements from the first input vector with elements of the second input vector, returning a vector of the same type as the input vectors. The signed immediate, modulo the number of elements in the vector, is the index into the first vector from which to extract the result value. This means conceptually that for a positive immediate, a vector is extracted from concat(%vec1, %vec2) starting at index imm, whereas for a negative immediate, it extracts -imm trailing elements from the first vector, and the remaining elements from %vec2.

These intrinsics work for both fixed and scalable vectors. While this intrinsic supports all vector types the recommended way to express this operation for fixed-width vectors is still to use a shufflevector, as that may allow for more optimization opportunities.

For example:

llvm.vector.splice(<A,B,C,D>, <E,F,G,H>, 1);  ==> <B, C, D, E> index
llvm.vector.splice(<A,B,C,D>, <E,F,G,H>, -3); ==> <B, C, D, E> trailing elements

Arguments:

The first two operands are vectors with the same type. The start index is imm modulo the runtime number of elements in the source vector. For a fixed-width vector <N x eltty>, imm is a signed integer constant in the range -N <= imm < N. For a scalable vector <vscale x N x eltty>, imm is a signed integer constant in the range -X <= imm < X where X=vscale_range_min * N.

‘llvm.stepvector’ Intrinsic

This is an overloaded intrinsic. You can use llvm.stepvector to generate a vector whose lane values comprise the linear sequence <0, 1, 2, …>. It is primarily intended for scalable vectors.

declare <vscale x 4 x i32> @llvm.stepvector.nxv4i32()
declare <vscale x 8 x i16> @llvm.stepvector.nxv8i16()

The ‘llvm.stepvector’ intrinsics are used to create vectors of integers whose elements contain a linear sequence of values starting from 0 with a step of 1. This intrinsic can only be used for vectors with integer elements that are at least 8 bits in size. If the sequence value exceeds the allowed limit for the element type then the result for that lane is a poison value.

These intrinsics work for both fixed and scalable vectors. While this intrinsic supports all vector types, the recommended way to express this operation for fixed-width vectors is still to generate a constant vector instead.

Arguments:

None.

‘llvm.experimental.get.vector.length’ Intrinsic

Syntax:

This is an overloaded intrinsic.

declare i32 @llvm.experimental.get.vector.length.i32(i32 %cnt, i32 immarg %vf, i1 immarg %scalable)
declare i32 @llvm.experimental.get.vector.length.i64(i64 %cnt, i32 immarg %vf, i1 immarg %scalable)

Overview:

The ‘llvm.experimental.get.vector.length.*’ intrinsics take a number of elements to process and returns how many of the elements can be processed with the requested vectorization factor.

Arguments:

The first argument is an unsigned value of any scalar integer type and specifies the total number of elements to be processed. The second argument is an i32 immediate for the vectorization factor. The third argument indicates if the vectorization factor should be multiplied by vscale.

Semantics:

Returns a non-negative i32 value (explicit vector length) that is unknown at compile time and depends on the hardware specification. If the result value does not fit in the result type, then the result is a poison value.

This intrinsic is intended to be used by loop vectorization with VP intrinsics in order to get the number of elements to process on each loop iteration. The result should be used to decrease the count for the next iteration until the count reaches zero.

Let %max_lanes be the number of lanes in the type described by %vf and %scalable, here are the constraints on the returned value:

• If %cnt equals to 0, returns 0.

• The returned value is always less than or equal to %max_lanes.

• The returned value is always greater than or equal to ceil(%cnt / ceil(%cnt / %max_lanes)), if %cnt is non-zero.

• The returned values are monotonically non-increasing in each loop iteration. That is, the returned value of an iteration is at least as large as that of any later iteration.

Note that it has the following implications:

• For a loop that uses this intrinsic, the number of iterations is equal to ceil(%C / %max_lanes) where %C is the initial %cnt value.

• If %cnt is non-zero, the return value is non-zero as well.

• If %cnt is less than or equal to %max_lanes, the return value is equal to %cnt.

‘llvm.experimental.vector.partial.reduce.add.*’ Intrinsic

Syntax:

This is an overloaded intrinsic.

declare <4 x i32> @llvm.experimental.vector.partial.reduce.add.v4i32.v4i32.v8i32(<4 x i32> %a, <8 x i32> %b)
declare <4 x i32> @llvm.experimental.vector.partial.reduce.add.v4i32.v4i32.v16i32(<4 x i32> %a, <16 x i32> %b)
declare <vscale x 4 x i32> @llvm.experimental.vector.partial.reduce.add.nxv4i32.nxv4i32.nxv8i32(<vscale x 4 x i32> %a, <vscale x 8 x i32> %b)
declare <vscale x 4 x i32> @llvm.experimental.vector.partial.reduce.add.nxv4i32.nxv4i32.nxv16i32(<vscale x 4 x i32> %a, <vscale x 16 x i32> %b)

Overview:

The ‘llvm.vector.experimental.partial.reduce.add.*’ intrinsics reduce the concatenation of the two vector operands down to the number of elements dictated by the result type. The result type is a vector type that matches the type of the first operand vector.

Arguments:

Both arguments must be vectors of matching element types. The first argument type must match the result type, while the second argument type must have a vector length that is a positive integer multiple of the first vector/result type. The arguments must be either be both fixed or both scalable vectors.

‘llvm.experimental.vector.histogram.*’ Intrinsic

These intrinsics are overloaded.

These intrinsics represent histogram-like operations; that is, updating values in memory that may not be contiguous, and where multiple elements within a single vector may be updating the same value in memory.

The update operation must be specified as part of the intrinsic name. For a simple histogram like the following the add operation would be used.

void simple_histogram(int *restrict buckets, unsigned *indices, int N, int inc) {
  for (int i = 0; i < N; ++i)
    buckets[indices[i]] += inc;
}

More update operation types may be added in the future.

declare void @llvm.experimental.vector.histogram.add.v8p0.i32(<8 x ptr> %ptrs, i32 %inc, <8 x i1> %mask)
declare void @llvm.experimental.vector.histogram.add.nxv2p0.i64(<vscale x 2 x ptr> %ptrs, i64 %inc, <vscale x 2 x i1> %mask)

Arguments:

The first argument is a vector of pointers to the memory locations to be updated. The second argument is a scalar used to update the value from memory; it must match the type of value to be updated. The final argument is a mask value to exclude locations from being modified.

Semantics:

The ‘llvm.experimental.vector.histogram.*’ intrinsics are used to perform updates on potentially overlapping values in memory. The intrinsics represent the follow sequence of operations:

1. Gather load from the ptrs operand, with element type matching that of the inc operand.

2. Update of the values loaded from memory. In the case of the add update operation, this means:

   1. Perform a cross-vector histogram operation on the ptrs operand.

   2. Multiply the result by the inc operand.

   3. Add the result to the values loaded from memory

3. Scatter the result of the update operation to the memory locations from the ptrs operand.

The mask operand will apply to at least the gather and scatter operations.

‘llvm.experimental.vector.extract.last.active’ Intrinsic

This is an overloaded intrinsic.

declare i32 @llvm.experimental.vector.extract.last.active.v4i32(<4 x i32> %data, <4 x i1> %mask, i32 %passthru)
declare i16 @llvm.experimental.vector.extract.last.active.nxv8i16(<vscale x 8 x i16> %data, <vscale x 8 x i1> %mask, i16 %passthru)

Arguments:

The first argument is the data vector to extract a lane from. The second is a mask vector controlling the extraction. The third argument is a passthru value.

The two input vectors must have the same number of elements, and the type of the passthru value must match that of the elements of the data vector.

Semantics:

The ‘llvm.experimental.vector.extract.last.active’ intrinsic will extract an element from the data vector at the index matching the highest active lane of the mask vector. If no mask lanes are active then the passthru value is returned instead.

‘llvm.experimental.vector.compress.*’ Intrinsics

LLVM provides an intrinsic for compressing data within a vector based on a selection mask. Semantically, this is similar to llvm.masked.compressstore but with weaker assumptions and without storing the results to memory, i.e., the data remains in the vector.

Syntax:

This is an overloaded intrinsic. A number of scalar values of integer, floating point or pointer data type are collected from an input vector and placed adjacently within the result vector. A mask defines which elements to collect from the vector. The remaining lanes are filled with values from passthru.

declare <8 x i32> @llvm.experimental.vector.compress.v8i32(<8 x i32> <value>, <8 x i1> <mask>, <8 x i32> <passthru>)
declare <16 x float> @llvm.experimental.vector.compress.v16f32(<16 x float> <value>, <16 x i1> <mask>, <16 x float> undef)

Overview:

Selects elements from input vector value according to the mask. All selected elements are written into adjacent lanes in the result vector, from lower to higher. The mask holds an entry for each vector lane, and is used to select elements to be kept. If a passthru vector is given, all remaining lanes are filled with the corresponding lane’s value from passthru. The main difference to llvm.masked.compressstore is that the we do not need to guard against memory access for unselected lanes. This allows for branchless code and better optimization for all targets that do not support or have inefficient instructions of the explicit semantics of llvm.masked.compressstore but still have some form of compress operations. The result vector can be written with a similar effect, as all the selected values are at the lower positions of the vector, but without requiring branches to avoid writes where the mask is false.

Arguments:

The first operand is the input vector, from which elements are selected. The second operand is the mask, a vector of boolean values. The third operand is the passthru vector, from which elements are filled into remaining lanes. The mask and the input vector must have the same number of vector elements. The input and passthru vectors must have the same type.

Semantics:

The llvm.experimental.vector.compress intrinsic compresses data within a vector. It collects elements from possibly non-adjacent lanes of a vector and places them contiguously in the result vector based on a selection mask, filling the remaining lanes with values from passthru. This intrinsic performs the logic of the following C++ example. All values in out after the last selected one are undefined if passthru is undefined. If all entries in the mask are 0, the out vector is passthru. If any element of the mask is poison, all elements of the result are poison. Otherwise, if any element of the mask is undef, all elements of the result are undef. If passthru is undefined, the number of valid lanes is equal to the number of true entries in the mask, i.e., all lanes >= number-of-selected-values are undefined.

// Consecutively place selected values in a vector.
using VecT __attribute__((vector_size(N))) = int;
VecT compress(VecT vec, VecT mask, VecT passthru) {
  VecT out;
  int idx = 0;
  for (int i = 0; i < N / sizeof(int); ++i) {
    out[idx] = vec[i];
    idx += static_cast<bool>(mask[i]);
  }
  for (; idx < N / sizeof(int); ++idx) {
    out[idx] = passthru[idx];
  }
  return out;
}

‘llvm.experimental.vector.match.*’ Intrinsic

Syntax:

This is an overloaded intrinsic.

declare <<n> x i1> @llvm.experimental.vector.match(<<n> x <ty>> %op1, <<m> x <ty>> %op2, <<n> x i1> %mask)
declare <vscale x <n> x i1> @llvm.experimental.vector.match(<vscale x <n> x <ty>> %op1, <<m> x <ty>> %op2, <vscale x <n> x i1> %mask)

Overview:

Find active elements of the first argument matching any elements of the second.

Arguments:

The first argument is the search vector, the second argument the vector of elements we are searching for (i.e. for which we consider a match successful), and the third argument is a mask that controls which elements of the first argument are active. The first two arguments must be vectors of matching integer element types. The first and third arguments and the result type must have matching element counts (fixed or scalable). The second argument must be a fixed vector, but its length may be different from the remaining arguments.

Semantics:

The ‘llvm.experimental.vector.match’ intrinsic compares each active element in the first argument against the elements of the second argument, placing 1 in the corresponding element of the output vector if any equality comparison is successful, and 0 otherwise. Inactive elements in the mask are set to 0 in the output.

Matrix Intrinsics

Operations on matrixes requiring shape information (like number of rows/columns or the memory layout) can be expressed using the matrix intrinsics. These intrinsics require matrix dimensions to be passed as immediate arguments, and matrixes are passed and returned as vectors. This means that for a R x C matrix, element i of column j is at index j * R + i in the corresponding vector, with indices starting at 0. Currently column-major layout is assumed. The intrinsics support both integer and floating point matrixes.

‘llvm.matrix.transpose.*’ Intrinsic

Syntax:

This is an overloaded intrinsic.

declare vectorty @llvm.matrix.transpose.*(vectorty %In, i32 <Rows>, i32 <Cols>)

Overview:

The ‘llvm.matrix.transpose.*’ intrinsics treat %In as a <Rows> x <Cols> matrix and return the transposed matrix in the result vector.

Arguments:

The first argument %In is a vector that corresponds to a <Rows> x <Cols> matrix. Thus, arguments <Rows> and <Cols> correspond to the number of rows and columns, respectively, and must be positive, constant integers. The returned vector must have <Rows> * <Cols> elements, and have the same float or integer element type as %In.

‘llvm.matrix.multiply.*’ Intrinsic

Syntax:

This is an overloaded intrinsic.

declare vectorty @llvm.matrix.multiply.*(vectorty %A, vectorty %B, i32 <OuterRows>, i32 <Inner>, i32 <OuterColumns>)

Overview:

The ‘llvm.matrix.multiply.*’ intrinsics treat %A as a <OuterRows> x <Inner> matrix, %B as a <Inner> x <OuterColumns> matrix, and multiplies them. The result matrix is returned in the result vector.

Arguments:

The first vector argument %A corresponds to a matrix with <OuterRows> * <Inner> elements, and the second argument %B to a matrix with <Inner> * <OuterColumns> elements. Arguments <OuterRows>, <Inner> and <OuterColumns> must be positive, constant integers. The returned vector must have <OuterRows> * <OuterColumns> elements. Vectors %A, %B, and the returned vector all have the same float or integer element type.

‘llvm.matrix.column.major.load.*’ Intrinsic

Syntax:

This is an overloaded intrinsic.

declare vectorty @llvm.matrix.column.major.load.*(
    ptrty %Ptr, i64 %Stride, i1 <IsVolatile>, i32 <Rows>, i32 <Cols>)

Overview:

The ‘llvm.matrix.column.major.load.*’ intrinsics load a <Rows> x <Cols> matrix using a stride of %Stride to compute the start address of the different columns. The offset is computed using %Stride’s bitwidth. This allows for convenient loading of sub matrixes. If <IsVolatile> is true, the intrinsic is considered a volatile memory access. The result matrix is returned in the result vector. If the %Ptr argument is known to be aligned to some boundary, this can be specified as an attribute on the argument.

Arguments:

The first argument %Ptr is a pointer type to the returned vector type, and corresponds to the start address to load from. The second argument %Stride is a positive, constant integer with %Stride >= <Rows>. %Stride is used to compute the column memory addresses. I.e., for a column C, its start memory addresses is calculated with %Ptr + C * %Stride. The third Argument <IsVolatile> is a boolean value. The fourth and fifth arguments, <Rows> and <Cols>, correspond to the number of rows and columns, respectively, and must be positive, constant integers. The returned vector must have <Rows> * <Cols> elements.

The align parameter attribute can be provided for the %Ptr arguments.

‘llvm.matrix.column.major.store.*’ Intrinsic

Syntax:

declare void @llvm.matrix.column.major.store.*(
    vectorty %In, ptrty %Ptr, i64 %Stride, i1 <IsVolatile>, i32 <Rows>, i32 <Cols>)

Overview:

The ‘llvm.matrix.column.major.store.*’ intrinsics store the <Rows> x <Cols> matrix in %In to memory using a stride of %Stride between columns. The offset is computed using %Stride’s bitwidth. If <IsVolatile> is true, the intrinsic is considered a volatile memory access.

If the %Ptr argument is known to be aligned to some boundary, this can be specified as an attribute on the argument.

Arguments:

The first argument %In is a vector that corresponds to a <Rows> x <Cols> matrix to be stored to memory. The second argument %Ptr is a pointer to the vector type of %In, and is the start address of the matrix in memory. The third argument %Stride is a positive, constant integer with %Stride >= <Rows>. %Stride is used to compute the column memory addresses. I.e., for a column C, its start memory addresses is calculated with %Ptr + C * %Stride. The fourth argument <IsVolatile> is a boolean value. The arguments <Rows> and <Cols> correspond to the number of rows and columns, respectively, and must be positive, constant integers.

The align parameter attribute can be provided for the %Ptr arguments.

Half Precision Floating-Point Intrinsics

For most target platforms, half precision floating-point is a storage-only format. This means that it is a dense encoding (in memory) but does not support computation in the format.

This means that code must first load the half-precision floating-point value as an i16, then convert it to float with llvm.convert.from.fp16. Computation can then be performed on the float value (including extending to double etc). To store the value back to memory, it is first converted to float if needed, then converted to i16 with llvm.convert.to.fp16, then storing as an i16 value.

‘llvm.convert.to.fp16’ Intrinsic

Syntax:

declare i16 @llvm.convert.to.fp16.f32(float %a)
declare i16 @llvm.convert.to.fp16.f64(double %a)

Overview:

The ‘llvm.convert.to.fp16’ intrinsic function performs a conversion from a conventional floating-point type to half precision floating-point format.

Arguments:

The intrinsic function contains single argument - the value to be converted.

Semantics:

The ‘llvm.convert.to.fp16’ intrinsic function performs a conversion from a conventional floating-point format to half precision floating-point format. The return value is an i16 which contains the converted number.

Examples:

%res = call i16 @llvm.convert.to.fp16.f32(float %a)
store i16 %res, i16* @x, align 2

‘llvm.convert.from.fp16’ Intrinsic

Syntax:

declare float @llvm.convert.from.fp16.f32(i16 %a)
declare double @llvm.convert.from.fp16.f64(i16 %a)

Overview:

The ‘llvm.convert.from.fp16’ intrinsic function performs a conversion from half precision floating-point format to single precision floating-point format.

Arguments:

The intrinsic function contains single argument - the value to be converted.

Semantics:

The ‘llvm.convert.from.fp16’ intrinsic function performs a conversion from half single precision floating-point format to single precision floating-point format. The input half-float value is represented by an i16 value.

Examples:

%a = load i16, ptr @x, align 2
%res = call float @llvm.convert.from.fp16(i16 %a)

Saturating floating-point to integer conversions

The fptoui and fptosi instructions return a poison value if the rounded-towards-zero value is not representable by the result type. These intrinsics provide an alternative conversion, which will saturate towards the smallest and largest representable integer values instead.

‘llvm.fptoui.sat.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.fptoui.sat on any floating-point argument type and any integer result type, or vectors thereof. Not all targets may support all types, however.

declare i32 @llvm.fptoui.sat.i32.f32(float %f)
declare i19 @llvm.fptoui.sat.i19.f64(double %f)
declare <4 x i100> @llvm.fptoui.sat.v4i100.v4f128(<4 x fp128> %f)

Overview:

This intrinsic converts the argument into an unsigned integer using saturating semantics.

Arguments:

The argument may be any floating-point or vector of floating-point type. The return value may be any integer or vector of integer type. The number of vector elements in argument and return must be the same.

Semantics:

The conversion to integer is performed subject to the following rules:

• If the argument is any NaN, zero is returned.

• If the argument is smaller than zero (this includes negative infinity), zero is returned.

• If the argument is larger than the largest representable unsigned integer of the result type (this includes positive infinity), the largest representable unsigned integer is returned.

• Otherwise, the result of rounding the argument towards zero is returned.

Example:

%a = call i8 @llvm.fptoui.sat.i8.f32(float 123.875)            ; yields i8: 123
%b = call i8 @llvm.fptoui.sat.i8.f32(float -5.75)              ; yields i8:   0
%c = call i8 @llvm.fptoui.sat.i8.f32(float 377.0)              ; yields i8: 255
%d = call i8 @llvm.fptoui.sat.i8.f32(float 0xFFF8000000000000) ; yields i8:   0

‘llvm.fptosi.sat.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.fptosi.sat on any floating-point argument type and any integer result type, or vectors thereof. Not all targets may support all types, however.

declare i32 @llvm.fptosi.sat.i32.f32(float %f)
declare i19 @llvm.fptosi.sat.i19.f64(double %f)
declare <4 x i100> @llvm.fptosi.sat.v4i100.v4f128(<4 x fp128> %f)

Overview:

This intrinsic converts the argument into a signed integer using saturating semantics.

Arguments:

The argument may be any floating-point or vector of floating-point type. The return value may be any integer or vector of integer type. The number of vector elements in argument and return must be the same.

Semantics:

The conversion to integer is performed subject to the following rules:

• If the argument is any NaN, zero is returned.

• If the argument is smaller than the smallest representable signed integer of the result type (this includes negative infinity), the smallest representable signed integer is returned.

• If the argument is larger than the largest representable signed integer of the result type (this includes positive infinity), the largest representable signed integer is returned.

• Otherwise, the result of rounding the argument towards zero is returned.

Example:

%a = call i8 @llvm.fptosi.sat.i8.f32(float 23.875)             ; yields i8:   23
%b = call i8 @llvm.fptosi.sat.i8.f32(float -130.75)            ; yields i8: -128
%c = call i8 @llvm.fptosi.sat.i8.f32(float 999.0)              ; yields i8:  127
%d = call i8 @llvm.fptosi.sat.i8.f32(float 0xFFF8000000000000) ; yields i8:    0

Convergence Intrinsics

The LLVM convergence intrinsics for controlling the semantics of convergent operations, which all start with the llvm.experimental.convergence. prefix, are described in the Convergent Operation Semantics document.

Debugger Intrinsics

The LLVM debugger intrinsics (which all start with llvm.dbg. prefix), are described in the LLVM Source Level Debugging document.

Exception Handling Intrinsics

The LLVM exception handling intrinsics (which all start with llvm.eh. prefix), are described in the LLVM Exception Handling document.

Pointer Authentication Intrinsics

The LLVM pointer authentication intrinsics (which all start with llvm.ptrauth. prefix), are described in the Pointer Authentication document.

Trampoline Intrinsics

These intrinsics make it possible to excise one parameter, marked with the nest attribute, from a function. The result is a callable function pointer lacking the nest parameter - the caller does not need to provide a value for it. Instead, the value to use is stored in advance in a “trampoline”, a block of memory usually allocated on the stack, which also contains code to splice the nest value into the argument list. This is used to implement the GCC nested function address extension.

For example, if the function is i32 f(ptr nest %c, i32 %x, i32 %y) then the resulting function pointer has signature i32 (i32, i32). It can be created as follows:

%tramp = alloca [10 x i8], align 4 ; size and alignment only correct for X86
call ptr @llvm.init.trampoline(ptr %tramp, ptr @f, ptr %nval)
%fp = call ptr @llvm.adjust.trampoline(ptr %tramp)

The call %val = call i32 %fp(i32 %x, i32 %y) is then equivalent to %val = call i32 %f(ptr %nval, i32 %x, i32 %y).

‘llvm.init.trampoline’ Intrinsic

Syntax:

declare void @llvm.init.trampoline(ptr <tramp>, ptr <func>, ptr <nval>)

Overview:

This fills the memory pointed to by tramp with executable code, turning it into a trampoline.

Arguments:

The llvm.init.trampoline intrinsic takes three arguments, all pointers. The tramp argument must point to a sufficiently large and sufficiently aligned block of memory; this memory is written to by the intrinsic. Note that the size and the alignment are target-specific - LLVM currently provides no portable way of determining them, so a front-end that generates this intrinsic needs to have some target-specific knowledge. The func argument must hold a function.

Semantics:

The block of memory pointed to by tramp is filled with target dependent code, turning it into a function. Then tramp needs to be passed to llvm.adjust.trampoline to get a pointer which can be bitcast (to a new function) and called. The new function’s signature is the same as that of func with any arguments marked with the nest attribute removed. At most one such nest argument is allowed, and it must be of pointer type. Calling the new function is equivalent to calling func with the same argument list, but with nval used for the missing nest argument. If, after calling llvm.init.trampoline, the memory pointed to by tramp is modified, then the effect of any later call to the returned function pointer is undefined.

‘llvm.adjust.trampoline’ Intrinsic

Syntax:

declare ptr @llvm.adjust.trampoline(ptr <tramp>)

Overview:

This performs any required machine-specific adjustment to the address of a trampoline (passed as tramp).

Arguments:

tramp must point to a block of memory which already has trampoline code filled in by a previous call to llvm.init.trampoline.

Semantics:

On some architectures the address of the code to be executed needs to be different than the address where the trampoline is actually stored. This intrinsic returns the executable address corresponding to tramp after performing the required machine specific adjustments. The pointer returned can then be bitcast and executed.

Vector Predication Intrinsics

VP intrinsics are intended for predicated SIMD/vector code. A typical VP operation takes a vector mask and an explicit vector length parameter as in:

<W x T> llvm.vp.<opcode>.*(<W x T> %x, <W x T> %y, <W x i1> %mask, i32 %evl)

The vector mask parameter (%mask) always has a vector of i1 type, for example <32 x i1>. The explicit vector length parameter always has the type i32 and is an unsigned integer value. The explicit vector length parameter (%evl) is in the range:

0 <= %evl <= W,  where W is the number of vector elements

Note that for scalable vector types W is the runtime length of the vector.

The VP intrinsic has undefined behavior if %evl > W. The explicit vector length (%evl) creates a mask, %EVLmask, with all elements 0 <= i < %evl set to True, and all other lanes %evl <= i < W to False. A new mask %M is calculated with an element-wise AND from %mask and %EVLmask:

M = %mask AND %EVLmask

A vector operation <opcode> on vectors A and B calculates:

A <opcode> B =  {  A[i] <opcode> B[i]   M[i] = True, and
                {  undef otherwise

Optimization Hint

Some targets, such as AVX512, do not support the %evl parameter in hardware. The use of an effective %evl is discouraged for those targets. The function TargetTransformInfo::hasActiveVectorLength() returns true when the target has native support for %evl.

‘llvm.vp.select.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x i32>  @llvm.vp.select.v16i32 (<16 x i1> <condition>, <16 x i32> <on_true>, <16 x i32> <on_false>, i32 <evl>)
declare <vscale x 4 x i64>  @llvm.vp.select.nxv4i64 (<vscale x 4 x i1> <condition>, <vscale x 4 x i64> <on_true>, <vscale x 4 x i64> <on_false>, i32 <evl>)

Overview:

The ‘llvm.vp.select’ intrinsic is used to choose one value based on a condition vector, without IR-level branching.

Arguments:

The first argument is a vector of i1 and indicates the condition. The second argument is the value that is selected where the condition vector is true. The third argument is the value that is selected where the condition vector is false. The vectors must be of the same size. The fourth argument is the explicit vector length.

1. The optional fast-math flags marker indicates that the select has one or more fast-math flags. These are optimization hints to enable otherwise unsafe floating-point optimizations. Fast-math flags are only valid for selects that return supported floating-point types.

Semantics:

The intrinsic selects lanes from the second and third argument depending on a condition vector.

All result lanes at positions greater or equal than %evl are undefined. For all lanes below %evl where the condition vector is true the lane is taken from the second argument. Otherwise, the lane is taken from the third argument.

Example:

%r = call <4 x i32> @llvm.vp.select.v4i32(<4 x i1> %cond, <4 x i32> %on_true, <4 x i32> %on_false, i32 %evl)

;;; Expansion.
;; Any result is legal on lanes at and above %evl.
%also.r = select <4 x i1> %cond, <4 x i32> %on_true, <4 x i32> %on_false

‘llvm.vp.merge.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x i32>  @llvm.vp.merge.v16i32 (<16 x i1> <condition>, <16 x i32> <on_true>, <16 x i32> <on_false>, i32 <pivot>)
declare <vscale x 4 x i64>  @llvm.vp.merge.nxv4i64 (<vscale x 4 x i1> <condition>, <vscale x 4 x i64> <on_true>, <vscale x 4 x i64> <on_false>, i32 <pivot>)

Overview:

The ‘llvm.vp.merge’ intrinsic is used to choose one value based on a condition vector and an index argument, without IR-level branching.

Arguments:

The first argument is a vector of i1 and indicates the condition. The second argument is the value that is merged where the condition vector is true. The third argument is the value that is selected where the condition vector is false or the lane position is greater equal than the pivot. The fourth argument is the pivot.

1. The optional fast-math flags marker indicates that the merge has one or more fast-math flags. These are optimization hints to enable otherwise unsafe floating-point optimizations. Fast-math flags are only valid for merges that return supported floating-point types.

Semantics:

The intrinsic selects lanes from the second and third argument depending on a condition vector and pivot value.

For all lanes where the condition vector is true and the lane position is less than %pivot the lane is taken from the second argument. Otherwise, the lane is taken from the third argument.

Example:

%r = call <4 x i32> @llvm.vp.merge.v4i32(<4 x i1> %cond, <4 x i32> %on_true, <4 x i32> %on_false, i32 %pivot)

;;; Expansion.
;; Lanes at and above %pivot are taken from %on_false
%atfirst = insertelement <4 x i32> poison, i32 %pivot, i32 0
%splat = shufflevector <4 x i32> %atfirst, <4 x i32> poison, <4 x i32> zeroinitializer
%pivotmask = icmp ult <4 x i32> <i32 0, i32 1, i32 2, i32 3>, <4 x i32> %splat
%mergemask = and <4 x i1> %cond, <4 x i1> %pivotmask
%also.r = select <4 x i1> %mergemask, <4 x i32> %on_true, <4 x i32> %on_false

‘llvm.vp.add.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x i32>  @llvm.vp.add.v16i32 (<16 x i32> <left_op>, <16 x i32> <right_op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x i32>  @llvm.vp.add.nxv4i32 (<vscale x 4 x i32> <left_op>, <vscale x 4 x i32> <right_op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x i64>  @llvm.vp.add.v256i64 (<256 x i64> <left_op>, <256 x i64> <right_op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated integer addition of two vectors of integers.

Arguments:

The first two arguments and the result have the same vector of integer type. The third argument is the vector mask and has the same number of elements as the result vector type. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.add’ intrinsic performs integer addition (add) of the first and second vector arguments on each enabled lane. The result on disabled lanes is a poison value.

Examples:

%r = call <4 x i32> @llvm.vp.add.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = add <4 x i32> %a, %b
%also.r = select <4 x i1> %mask, <4 x i32> %t, <4 x i32> poison

‘llvm.vp.sub.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x i32>  @llvm.vp.sub.v16i32 (<16 x i32> <left_op>, <16 x i32> <right_op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x i32>  @llvm.vp.sub.nxv4i32 (<vscale x 4 x i32> <left_op>, <vscale x 4 x i32> <right_op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x i64>  @llvm.vp.sub.v256i64 (<256 x i64> <left_op>, <256 x i64> <right_op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated integer subtraction of two vectors of integers.

Arguments:

The first two arguments and the result have the same vector of integer type. The third argument is the vector mask and has the same number of elements as the result vector type. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.sub’ intrinsic performs integer subtraction (sub) of the first and second vector arguments on each enabled lane. The result on disabled lanes is a poison value.

Examples:

%r = call <4 x i32> @llvm.vp.sub.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = sub <4 x i32> %a, %b
%also.r = select <4 x i1> %mask, <4 x i32> %t, <4 x i32> poison

‘llvm.vp.mul.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x i32>  @llvm.vp.mul.v16i32 (<16 x i32> <left_op>, <16 x i32> <right_op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x i32>  @llvm.vp.mul.nxv46i32 (<vscale x 4 x i32> <left_op>, <vscale x 4 x i32> <right_op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x i64>  @llvm.vp.mul.v256i64 (<256 x i64> <left_op>, <256 x i64> <right_op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated integer multiplication of two vectors of integers.

Arguments:

The first two arguments and the result have the same vector of integer type. The third argument is the vector mask and has the same number of elements as the result vector type. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.mul’ intrinsic performs integer multiplication (mul) of the first and second vector arguments on each enabled lane. The result on disabled lanes is a poison value.

Examples:

%r = call <4 x i32> @llvm.vp.mul.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = mul <4 x i32> %a, %b
%also.r = select <4 x i1> %mask, <4 x i32> %t, <4 x i32> poison

‘llvm.vp.sdiv.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x i32>  @llvm.vp.sdiv.v16i32 (<16 x i32> <left_op>, <16 x i32> <right_op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x i32>  @llvm.vp.sdiv.nxv4i32 (<vscale x 4 x i32> <left_op>, <vscale x 4 x i32> <right_op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x i64>  @llvm.vp.sdiv.v256i64 (<256 x i64> <left_op>, <256 x i64> <right_op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated, signed division of two vectors of integers.

Arguments:

The first two arguments and the result have the same vector of integer type. The third argument is the vector mask and has the same number of elements as the result vector type. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.sdiv’ intrinsic performs signed division (sdiv) of the first and second vector arguments on each enabled lane. The result on disabled lanes is a poison value.

Examples:

%r = call <4 x i32> @llvm.vp.sdiv.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = sdiv <4 x i32> %a, %b
%also.r = select <4 x i1> %mask, <4 x i32> %t, <4 x i32> poison

‘llvm.vp.udiv.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x i32>  @llvm.vp.udiv.v16i32 (<16 x i32> <left_op>, <16 x i32> <right_op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x i32>  @llvm.vp.udiv.nxv4i32 (<vscale x 4 x i32> <left_op>, <vscale x 4 x i32> <right_op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x i64>  @llvm.vp.udiv.v256i64 (<256 x i64> <left_op>, <256 x i64> <right_op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated, unsigned division of two vectors of integers.

Arguments:

The first two arguments and the result have the same vector of integer type. The third argument is the vector mask and has the same number of elements as the result vector type. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.udiv’ intrinsic performs unsigned division (udiv) of the first and second vector arguments on each enabled lane. The result on disabled lanes is a poison value.

Examples:

%r = call <4 x i32> @llvm.vp.udiv.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = udiv <4 x i32> %a, %b
%also.r = select <4 x i1> %mask, <4 x i32> %t, <4 x i32> poison

‘llvm.vp.srem.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x i32>  @llvm.vp.srem.v16i32 (<16 x i32> <left_op>, <16 x i32> <right_op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x i32>  @llvm.vp.srem.nxv4i32 (<vscale x 4 x i32> <left_op>, <vscale x 4 x i32> <right_op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x i64>  @llvm.vp.srem.v256i64 (<256 x i64> <left_op>, <256 x i64> <right_op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated computations of the signed remainder of two integer vectors.

Arguments:

The first two arguments and the result have the same vector of integer type. The third argument is the vector mask and has the same number of elements as the result vector type. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.srem’ intrinsic computes the remainder of the signed division (srem) of the first and second vector arguments on each enabled lane. The result on disabled lanes is a poison value.

Examples:

%r = call <4 x i32> @llvm.vp.srem.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = srem <4 x i32> %a, %b
%also.r = select <4 x i1> %mask, <4 x i32> %t, <4 x i32> poison

‘llvm.vp.urem.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x i32>  @llvm.vp.urem.v16i32 (<16 x i32> <left_op>, <16 x i32> <right_op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x i32>  @llvm.vp.urem.nxv4i32 (<vscale x 4 x i32> <left_op>, <vscale x 4 x i32> <right_op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x i64>  @llvm.vp.urem.v256i64 (<256 x i64> <left_op>, <256 x i64> <right_op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated computation of the unsigned remainder of two integer vectors.

Arguments:

The first two arguments and the result have the same vector of integer type. The third argument is the vector mask and has the same number of elements as the result vector type. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.urem’ intrinsic computes the remainder of the unsigned division (urem) of the first and second vector arguments on each enabled lane. The result on disabled lanes is a poison value.

Examples:

%r = call <4 x i32> @llvm.vp.urem.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = urem <4 x i32> %a, %b
%also.r = select <4 x i1> %mask, <4 x i32> %t, <4 x i32> poison

‘llvm.vp.ashr.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x i32>  @llvm.vp.ashr.v16i32 (<16 x i32> <left_op>, <16 x i32> <right_op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x i32>  @llvm.vp.ashr.nxv4i32 (<vscale x 4 x i32> <left_op>, <vscale x 4 x i32> <right_op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x i64>  @llvm.vp.ashr.v256i64 (<256 x i64> <left_op>, <256 x i64> <right_op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Vector-predicated arithmetic right-shift.

Arguments:

The first two arguments and the result have the same vector of integer type. The third argument is the vector mask and has the same number of elements as the result vector type. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.ashr’ intrinsic computes the arithmetic right shift (ashr) of the first argument by the second argument on each enabled lane. The result on disabled lanes is a poison value.

Examples:

%r = call <4 x i32> @llvm.vp.ashr.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = ashr <4 x i32> %a, %b
%also.r = select <4 x i1> %mask, <4 x i32> %t, <4 x i32> poison

‘llvm.vp.lshr.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x i32>  @llvm.vp.lshr.v16i32 (<16 x i32> <left_op>, <16 x i32> <right_op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x i32>  @llvm.vp.lshr.nxv4i32 (<vscale x 4 x i32> <left_op>, <vscale x 4 x i32> <right_op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x i64>  @llvm.vp.lshr.v256i64 (<256 x i64> <left_op>, <256 x i64> <right_op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Vector-predicated logical right-shift.

Arguments:

The first two arguments and the result have the same vector of integer type. The third argument is the vector mask and has the same number of elements as the result vector type. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.lshr’ intrinsic computes the logical right shift (lshr) of the first argument by the second argument on each enabled lane. The result on disabled lanes is a poison value.

Examples:

%r = call <4 x i32> @llvm.vp.lshr.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = lshr <4 x i32> %a, %b
%also.r = select <4 x i1> %mask, <4 x i32> %t, <4 x i32> poison

‘llvm.vp.shl.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x i32>  @llvm.vp.shl.v16i32 (<16 x i32> <left_op>, <16 x i32> <right_op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x i32>  @llvm.vp.shl.nxv4i32 (<vscale x 4 x i32> <left_op>, <vscale x 4 x i32> <right_op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x i64>  @llvm.vp.shl.v256i64 (<256 x i64> <left_op>, <256 x i64> <right_op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Vector-predicated left shift.

Arguments:

The first two arguments and the result have the same vector of integer type. The third argument is the vector mask and has the same number of elements as the result vector type. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.shl’ intrinsic computes the left shift (shl) of the first argument by the second argument on each enabled lane. The result on disabled lanes is a poison value.

Examples:

%r = call <4 x i32> @llvm.vp.shl.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = shl <4 x i32> %a, %b
%also.r = select <4 x i1> %mask, <4 x i32> %t, <4 x i32> poison

‘llvm.vp.or.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x i32>  @llvm.vp.or.v16i32 (<16 x i32> <left_op>, <16 x i32> <right_op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x i32>  @llvm.vp.or.nxv4i32 (<vscale x 4 x i32> <left_op>, <vscale x 4 x i32> <right_op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x i64>  @llvm.vp.or.v256i64 (<256 x i64> <left_op>, <256 x i64> <right_op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Vector-predicated or.

Arguments:

The first two arguments and the result have the same vector of integer type. The third argument is the vector mask and has the same number of elements as the result vector type. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.or’ intrinsic performs a bitwise or (or) of the first two arguments on each enabled lane. The result on disabled lanes is a poison value.

Examples:

%r = call <4 x i32> @llvm.vp.or.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = or <4 x i32> %a, %b
%also.r = select <4 x i1> %mask, <4 x i32> %t, <4 x i32> poison

‘llvm.vp.and.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x i32>  @llvm.vp.and.v16i32 (<16 x i32> <left_op>, <16 x i32> <right_op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x i32>  @llvm.vp.and.nxv4i32 (<vscale x 4 x i32> <left_op>, <vscale x 4 x i32> <right_op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x i64>  @llvm.vp.and.v256i64 (<256 x i64> <left_op>, <256 x i64> <right_op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Vector-predicated and.

Arguments:

The first two arguments and the result have the same vector of integer type. The third argument is the vector mask and has the same number of elements as the result vector type. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.and’ intrinsic performs a bitwise and (and) of the first two arguments on each enabled lane. The result on disabled lanes is a poison value.

Examples:

%r = call <4 x i32> @llvm.vp.and.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = and <4 x i32> %a, %b
%also.r = select <4 x i1> %mask, <4 x i32> %t, <4 x i32> poison

‘llvm.vp.xor.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x i32>  @llvm.vp.xor.v16i32 (<16 x i32> <left_op>, <16 x i32> <right_op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x i32>  @llvm.vp.xor.nxv4i32 (<vscale x 4 x i32> <left_op>, <vscale x 4 x i32> <right_op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x i64>  @llvm.vp.xor.v256i64 (<256 x i64> <left_op>, <256 x i64> <right_op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Vector-predicated, bitwise xor.

Arguments:

The first two arguments and the result have the same vector of integer type. The third argument is the vector mask and has the same number of elements as the result vector type. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.xor’ intrinsic performs a bitwise xor (xor) of the first two arguments on each enabled lane. The result on disabled lanes is a poison value.

Examples:

%r = call <4 x i32> @llvm.vp.xor.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = xor <4 x i32> %a, %b
%also.r = select <4 x i1> %mask, <4 x i32> %t, <4 x i32> poison

‘llvm.vp.abs.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x i32>  @llvm.vp.abs.v16i32 (<16 x i32> <op>, i1 <is_int_min_poison>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x i32>  @llvm.vp.abs.nxv4i32 (<vscale x 4 x i32> <op>, i1 <is_int_min_poison>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x i64>  @llvm.vp.abs.v256i64 (<256 x i64> <op>, i1 <is_int_min_poison>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated abs of a vector of integers.

Arguments:

The first argument and the result have the same vector of integer type. The second argument must be a constant and is a flag to indicate whether the result value of the ‘llvm.vp.abs’ intrinsic is a poison value if the first argument is statically or dynamically an INT_MIN value. The third argument is the vector mask and has the same number of elements as the result vector type. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.abs’ intrinsic performs abs (abs) of the first argument on each enabled lane. The result on disabled lanes is a poison value.

Examples:

%r = call <4 x i32> @llvm.vp.abs.v4i32(<4 x i32> %a, i1 false, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = call <4 x i32> @llvm.abs.v4i32(<4 x i32> %a, i1 false)
%also.r = select <4 x i1> %mask, <4 x i32> %t, <4 x i32> poison

‘llvm.vp.smax.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x i32>  @llvm.vp.smax.v16i32 (<16 x i32> <left_op>, <16 x i32> <right_op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x i32>  @llvm.vp.smax.nxv4i32 (<vscale x 4 x i32> <left_op>, <vscale x 4 x i32> <right_op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x i64>  @llvm.vp.smax.v256i64 (<256 x i64> <left_op>, <256 x i64> <right_op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated integer signed maximum of two vectors of integers.

Arguments:

The first two arguments and the result have the same vector of integer type. The third argument is the vector mask and has the same number of elements as the result vector type. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.smax’ intrinsic performs integer signed maximum (smax) of the first and second vector arguments on each enabled lane. The result on disabled lanes is a poison value.

Examples:

%r = call <4 x i32> @llvm.vp.smax.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = call <4 x i32> @llvm.smax.v4i32(<4 x i32> %a, <4 x i32> %b)
%also.r = select <4 x i1> %mask, <4 x i32> %t, <4 x i32> poison

‘llvm.vp.smin.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x i32>  @llvm.vp.smin.v16i32 (<16 x i32> <left_op>, <16 x i32> <right_op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x i32>  @llvm.vp.smin.nxv4i32 (<vscale x 4 x i32> <left_op>, <vscale x 4 x i32> <right_op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x i64>  @llvm.vp.smin.v256i64 (<256 x i64> <left_op>, <256 x i64> <right_op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated integer signed minimum of two vectors of integers.

Arguments:

The first two arguments and the result have the same vector of integer type. The third argument is the vector mask and has the same number of elements as the result vector type. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.smin’ intrinsic performs integer signed minimum (smin) of the first and second vector arguments on each enabled lane. The result on disabled lanes is a poison value.

Examples:

%r = call <4 x i32> @llvm.vp.smin.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = call <4 x i32> @llvm.smin.v4i32(<4 x i32> %a, <4 x i32> %b)
%also.r = select <4 x i1> %mask, <4 x i32> %t, <4 x i32> poison

‘llvm.vp.umax.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x i32>  @llvm.vp.umax.v16i32 (<16 x i32> <left_op>, <16 x i32> <right_op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x i32>  @llvm.vp.umax.nxv4i32 (<vscale x 4 x i32> <left_op>, <vscale x 4 x i32> <right_op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x i64>  @llvm.vp.umax.v256i64 (<256 x i64> <left_op>, <256 x i64> <right_op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated integer unsigned maximum of two vectors of integers.

Arguments:

The first two arguments and the result have the same vector of integer type. The third argument is the vector mask and has the same number of elements as the result vector type. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.umax’ intrinsic performs integer unsigned maximum (umax) of the first and second vector arguments on each enabled lane. The result on disabled lanes is a poison value.

Examples:

%r = call <4 x i32> @llvm.vp.umax.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = call <4 x i32> @llvm.umax.v4i32(<4 x i32> %a, <4 x i32> %b)
%also.r = select <4 x i1> %mask, <4 x i32> %t, <4 x i32> poison

‘llvm.vp.umin.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x i32>  @llvm.vp.umin.v16i32 (<16 x i32> <left_op>, <16 x i32> <right_op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x i32>  @llvm.vp.umin.nxv4i32 (<vscale x 4 x i32> <left_op>, <vscale x 4 x i32> <right_op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x i64>  @llvm.vp.umin.v256i64 (<256 x i64> <left_op>, <256 x i64> <right_op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated integer unsigned minimum of two vectors of integers.

Arguments:

The first two arguments and the result have the same vector of integer type. The third argument is the vector mask and has the same number of elements as the result vector type. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.umin’ intrinsic performs integer unsigned minimum (umin) of the first and second vector arguments on each enabled lane. The result on disabled lanes is a poison value.

Examples:

%r = call <4 x i32> @llvm.vp.umin.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = call <4 x i32> @llvm.umin.v4i32(<4 x i32> %a, <4 x i32> %b)
%also.r = select <4 x i1> %mask, <4 x i32> %t, <4 x i32> poison

‘llvm.vp.copysign.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x float>  @llvm.vp.copysign.v16f32 (<16 x float> <mag_op>, <16 x float> <sign_op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x float>  @llvm.vp.copysign.nxv4f32 (<vscale x 4 x float> <mag_op>, <vscale x 4 x float> <sign_op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x double>  @llvm.vp.copysign.v256f64 (<256 x double> <mag_op>, <256 x double> <sign_op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated floating-point copysign of two vectors of floating-point values.

Arguments:

The first two arguments and the result have the same vector of floating-point type. The third argument is the vector mask and has the same number of elements as the result vector type. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.copysign’ intrinsic performs floating-point copysign (copysign) of the first and second vector arguments on each enabled lane. The result on disabled lanes is a poison value. The operation is performed in the default floating-point environment.

Examples:

%r = call <4 x float> @llvm.vp.copysign.v4f32(<4 x float> %mag, <4 x float> %sign, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = call <4 x float> @llvm.copysign.v4f32(<4 x float> %mag, <4 x float> %sign)
%also.r = select <4 x i1> %mask, <4 x float> %t, <4 x float> poison

‘llvm.vp.minnum.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x float>  @llvm.vp.minnum.v16f32 (<16 x float> <left_op>, <16 x float> <right_op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x float>  @llvm.vp.minnum.nxv4f32 (<vscale x 4 x float> <left_op>, <vscale x 4 x float> <right_op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x double>  @llvm.vp.minnum.v256f64 (<256 x double> <left_op>, <256 x double> <right_op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated floating-point IEEE-754 minNum of two vectors of floating-point values.

Arguments:

The first two arguments and the result have the same vector of floating-point type. The third argument is the vector mask and has the same number of elements as the result vector type. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.minnum’ intrinsic performs floating-point minimum (minnum) of the first and second vector arguments on each enabled lane. The result on disabled lanes is a poison value. The operation is performed in the default floating-point environment.

Examples:

%r = call <4 x float> @llvm.vp.minnum.v4f32(<4 x float> %a, <4 x float> %b, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = call <4 x float> @llvm.minnum.v4f32(<4 x float> %a, <4 x float> %b)
%also.r = select <4 x i1> %mask, <4 x float> %t, <4 x float> poison

‘llvm.vp.maxnum.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x float>  @llvm.vp.maxnum.v16f32 (<16 x float> <left_op>, <16 x float> <right_op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x float>  @llvm.vp.maxnum.nxv4f32 (<vscale x 4 x float> <left_op>, <vscale x 4 x float> <right_op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x double>  @llvm.vp.maxnum.v256f64 (<256 x double> <left_op>, <256 x double> <right_op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated floating-point IEEE-754 maxNum of two vectors of floating-point values.

Arguments:

The first two arguments and the result have the same vector of floating-point type. The third argument is the vector mask and has the same number of elements as the result vector type. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.maxnum’ intrinsic performs floating-point maximum (maxnum) of the first and second vector arguments on each enabled lane. The result on disabled lanes is a poison value. The operation is performed in the default floating-point environment.

Examples:

%r = call <4 x float> @llvm.vp.maxnum.v4f32(<4 x float> %a, <4 x float> %b, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = call <4 x float> @llvm.maxnum.v4f32(<4 x float> %a, <4 x float> %b, <4 x i1> %mask, i32 %evl)
%also.r = select <4 x i1> %mask, <4 x float> %t, <4 x float> poison

‘llvm.vp.minimum.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x float>  @llvm.vp.minimum.v16f32 (<16 x float> <left_op>, <16 x float> <right_op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x float>  @llvm.vp.minimum.nxv4f32 (<vscale x 4 x float> <left_op>, <vscale x 4 x float> <right_op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x double>  @llvm.vp.minimum.v256f64 (<256 x double> <left_op>, <256 x double> <right_op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated floating-point minimum of two vectors of floating-point values, propagating NaNs and treating -0.0 as less than +0.0.

Arguments:

The first two arguments and the result have the same vector of floating-point type. The third argument is the vector mask and has the same number of elements as the result vector type. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.minimum’ intrinsic performs floating-point minimum (minimum) of the first and second vector arguments on each enabled lane, the result being NaN if either argument is a NaN. -0.0 is considered to be less than +0.0 for this intrinsic. The result on disabled lanes is a poison value. The operation is performed in the default floating-point environment.

Examples:

%r = call <4 x float> @llvm.vp.minimum.v4f32(<4 x float> %a, <4 x float> %b, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = call <4 x float> @llvm.minimum.v4f32(<4 x float> %a, <4 x float> %b)
%also.r = select <4 x i1> %mask, <4 x float> %t, <4 x float> poison

‘llvm.vp.maximum.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x float>  @llvm.vp.maximum.v16f32 (<16 x float> <left_op>, <16 x float> <right_op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x float>  @llvm.vp.maximum.nxv4f32 (<vscale x 4 x float> <left_op>, <vscale x 4 x float> <right_op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x double>  @llvm.vp.maximum.v256f64 (<256 x double> <left_op>, <256 x double> <right_op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated floating-point maximum of two vectors of floating-point values, propagating NaNs and treating -0.0 as less than +0.0.

Arguments:

The first two arguments and the result have the same vector of floating-point type. The third argument is the vector mask and has the same number of elements as the result vector type. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.maximum’ intrinsic performs floating-point maximum (maximum) of the first and second vector arguments on each enabled lane, the result being NaN if either argument is a NaN. -0.0 is considered to be less than +0.0 for this intrinsic. The result on disabled lanes is a poison value. The operation is performed in the default floating-point environment.

Examples:

%r = call <4 x float> @llvm.vp.maximum.v4f32(<4 x float> %a, <4 x float> %b, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = call <4 x float> @llvm.maximum.v4f32(<4 x float> %a, <4 x float> %b, <4 x i1> %mask, i32 %evl)
%also.r = select <4 x i1> %mask, <4 x float> %t, <4 x float> poison

‘llvm.vp.fadd.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x float>  @llvm.vp.fadd.v16f32 (<16 x float> <left_op>, <16 x float> <right_op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x float>  @llvm.vp.fadd.nxv4f32 (<vscale x 4 x float> <left_op>, <vscale x 4 x float> <right_op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x double>  @llvm.vp.fadd.v256f64 (<256 x double> <left_op>, <256 x double> <right_op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated floating-point addition of two vectors of floating-point values.

Arguments:

The first two arguments and the result have the same vector of floating-point type. The third argument is the vector mask and has the same number of elements as the result vector type. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.fadd’ intrinsic performs floating-point addition (fadd) of the first and second vector arguments on each enabled lane. The result on disabled lanes is a poison value. The operation is performed in the default floating-point environment.

Examples:

%r = call <4 x float> @llvm.vp.fadd.v4f32(<4 x float> %a, <4 x float> %b, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = fadd <4 x float> %a, %b
%also.r = select <4 x i1> %mask, <4 x float> %t, <4 x float> poison

‘llvm.vp.fsub.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x float>  @llvm.vp.fsub.v16f32 (<16 x float> <left_op>, <16 x float> <right_op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x float>  @llvm.vp.fsub.nxv4f32 (<vscale x 4 x float> <left_op>, <vscale x 4 x float> <right_op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x double>  @llvm.vp.fsub.v256f64 (<256 x double> <left_op>, <256 x double> <right_op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated floating-point subtraction of two vectors of floating-point values.

Arguments:

The first two arguments and the result have the same vector of floating-point type. The third argument is the vector mask and has the same number of elements as the result vector type. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.fsub’ intrinsic performs floating-point subtraction (fsub) of the first and second vector arguments on each enabled lane. The result on disabled lanes is a poison value. The operation is performed in the default floating-point environment.

Examples:

%r = call <4 x float> @llvm.vp.fsub.v4f32(<4 x float> %a, <4 x float> %b, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = fsub <4 x float> %a, %b
%also.r = select <4 x i1> %mask, <4 x float> %t, <4 x float> poison

‘llvm.vp.fmul.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x float>  @llvm.vp.fmul.v16f32 (<16 x float> <left_op>, <16 x float> <right_op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x float>  @llvm.vp.fmul.nxv4f32 (<vscale x 4 x float> <left_op>, <vscale x 4 x float> <right_op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x double>  @llvm.vp.fmul.v256f64 (<256 x double> <left_op>, <256 x double> <right_op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated floating-point multiplication of two vectors of floating-point values.

Arguments:

The first two arguments and the result have the same vector of floating-point type. The third argument is the vector mask and has the same number of elements as the result vector type. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.fmul’ intrinsic performs floating-point multiplication (fmul) of the first and second vector arguments on each enabled lane. The result on disabled lanes is a poison value. The operation is performed in the default floating-point environment.

Examples:

%r = call <4 x float> @llvm.vp.fmul.v4f32(<4 x float> %a, <4 x float> %b, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = fmul <4 x float> %a, %b
%also.r = select <4 x i1> %mask, <4 x float> %t, <4 x float> poison

‘llvm.vp.fdiv.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x float>  @llvm.vp.fdiv.v16f32 (<16 x float> <left_op>, <16 x float> <right_op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x float>  @llvm.vp.fdiv.nxv4f32 (<vscale x 4 x float> <left_op>, <vscale x 4 x float> <right_op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x double>  @llvm.vp.fdiv.v256f64 (<256 x double> <left_op>, <256 x double> <right_op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated floating-point division of two vectors of floating-point values.

Arguments:

The first two arguments and the result have the same vector of floating-point type. The third argument is the vector mask and has the same number of elements as the result vector type. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.fdiv’ intrinsic performs floating-point division (fdiv) of the first and second vector arguments on each enabled lane. The result on disabled lanes is a poison value. The operation is performed in the default floating-point environment.

Examples:

%r = call <4 x float> @llvm.vp.fdiv.v4f32(<4 x float> %a, <4 x float> %b, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = fdiv <4 x float> %a, %b
%also.r = select <4 x i1> %mask, <4 x float> %t, <4 x float> poison

‘llvm.vp.frem.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x float>  @llvm.vp.frem.v16f32 (<16 x float> <left_op>, <16 x float> <right_op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x float>  @llvm.vp.frem.nxv4f32 (<vscale x 4 x float> <left_op>, <vscale x 4 x float> <right_op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x double>  @llvm.vp.frem.v256f64 (<256 x double> <left_op>, <256 x double> <right_op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated floating-point remainder of two vectors of floating-point values.

Arguments:

The first two arguments and the result have the same vector of floating-point type. The third argument is the vector mask and has the same number of elements as the result vector type. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.frem’ intrinsic performs floating-point remainder (frem) of the first and second vector arguments on each enabled lane. The result on disabled lanes is a poison value. The operation is performed in the default floating-point environment.

Examples:

%r = call <4 x float> @llvm.vp.frem.v4f32(<4 x float> %a, <4 x float> %b, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = frem <4 x float> %a, %b
%also.r = select <4 x i1> %mask, <4 x float> %t, <4 x float> poison

‘llvm.vp.fneg.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x float>  @llvm.vp.fneg.v16f32 (<16 x float> <op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x float>  @llvm.vp.fneg.nxv4f32 (<vscale x 4 x float> <op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x double>  @llvm.vp.fneg.v256f64 (<256 x double> <op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated floating-point negation of a vector of floating-point values.

Arguments:

The first argument and the result have the same vector of floating-point type. The second argument is the vector mask and has the same number of elements as the result vector type. The third argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.fneg’ intrinsic performs floating-point negation (fneg) of the first vector argument on each enabled lane. The result on disabled lanes is a poison value.

Examples:

%r = call <4 x float> @llvm.vp.fneg.v4f32(<4 x float> %a, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = fneg <4 x float> %a
%also.r = select <4 x i1> %mask, <4 x float> %t, <4 x float> poison

‘llvm.vp.fabs.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x float>  @llvm.vp.fabs.v16f32 (<16 x float> <op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x float>  @llvm.vp.fabs.nxv4f32 (<vscale x 4 x float> <op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x double>  @llvm.vp.fabs.v256f64 (<256 x double> <op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated floating-point absolute value of a vector of floating-point values.

Arguments:

The first argument and the result have the same vector of floating-point type. The second argument is the vector mask and has the same number of elements as the result vector type. The third argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.fabs’ intrinsic performs floating-point absolute value (fabs) of the first vector argument on each enabled lane. The result on disabled lanes is a poison value.

Examples:

%r = call <4 x float> @llvm.vp.fabs.v4f32(<4 x float> %a, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = call <4 x float> @llvm.fabs.v4f32(<4 x float> %a)
%also.r = select <4 x i1> %mask, <4 x float> %t, <4 x float> poison

‘llvm.vp.sqrt.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x float>  @llvm.vp.sqrt.v16f32 (<16 x float> <op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x float>  @llvm.vp.sqrt.nxv4f32 (<vscale x 4 x float> <op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x double>  @llvm.vp.sqrt.v256f64 (<256 x double> <op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated floating-point square root of a vector of floating-point values.

Arguments:

The first argument and the result have the same vector of floating-point type. The second argument is the vector mask and has the same number of elements as the result vector type. The third argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.sqrt’ intrinsic performs floating-point square root (sqrt) of the first vector argument on each enabled lane. The result on disabled lanes is a poison value. The operation is performed in the default floating-point environment.

Examples:

%r = call <4 x float> @llvm.vp.sqrt.v4f32(<4 x float> %a, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = call <4 x float> @llvm.sqrt.v4f32(<4 x float> %a)
%also.r = select <4 x i1> %mask, <4 x float> %t, <4 x float> poison

‘llvm.vp.fma.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x float>  @llvm.vp.fma.v16f32 (<16 x float> <left_op>, <16 x float> <middle_op>, <16 x float> <right_op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x float>  @llvm.vp.fma.nxv4f32 (<vscale x 4 x float> <left_op>, <vscale x 4 x float> <middle_op>, <vscale x 4 x float> <right_op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x double>  @llvm.vp.fma.v256f64 (<256 x double> <left_op>, <256 x double> <middle_op>, <256 x double> <right_op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated floating-point fused multiply-add of two vectors of floating-point values.

Arguments:

The first three arguments and the result have the same vector of floating-point type. The fourth argument is the vector mask and has the same number of elements as the result vector type. The fifth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.fma’ intrinsic performs floating-point fused multiply-add (llvm.fma) of the first, second, and third vector argument on each enabled lane. The result on disabled lanes is a poison value. The operation is performed in the default floating-point environment.

Examples:

%r = call <4 x float> @llvm.vp.fma.v4f32(<4 x float> %a, <4 x float> %b, <4 x float> %c, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = call <4 x float> @llvm.fma(<4 x float> %a, <4 x float> %b, <4 x float> %c)
%also.r = select <4 x i1> %mask, <4 x float> %t, <4 x float> poison

‘llvm.vp.fmuladd.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x float>  @llvm.vp.fmuladd.v16f32 (<16 x float> <left_op>, <16 x float> <middle_op>, <16 x float> <right_op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x float>  @llvm.vp.fmuladd.nxv4f32 (<vscale x 4 x float> <left_op>, <vscale x 4 x float> <middle_op>, <vscale x 4 x float> <right_op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x double>  @llvm.vp.fmuladd.v256f64 (<256 x double> <left_op>, <256 x double> <middle_op>, <256 x double> <right_op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated floating-point multiply-add of two vectors of floating-point values that can be fused if code generator determines that (a) the target instruction set has support for a fused operation, and (b) that the fused operation is more efficient than the equivalent, separate pair of mul and add instructions.

Arguments:

The first three arguments and the result have the same vector of floating-point type. The fourth argument is the vector mask and has the same number of elements as the result vector type. The fifth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.fmuladd’ intrinsic performs floating-point multiply-add (llvm.fuladd) of the first, second, and third vector argument on each enabled lane. The result on disabled lanes is a poison value. The operation is performed in the default floating-point environment.

Examples:

%r = call <4 x float> @llvm.vp.fmuladd.v4f32(<4 x float> %a, <4 x float> %b, <4 x float> %c, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = call <4 x float> @llvm.fmuladd(<4 x float> %a, <4 x float> %b, <4 x float> %c)
%also.r = select <4 x i1> %mask, <4 x float> %t, <4 x float> poison

‘llvm.vp.reduce.add.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare i32 @llvm.vp.reduce.add.v4i32(i32 <start_value>, <4 x i32> <val>, <4 x i1> <mask>, i32 <vector_length>)
declare i16 @llvm.vp.reduce.add.nxv8i16(i16 <start_value>, <vscale x 8 x i16> <val>, <vscale x 8 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated integer ADD reduction of a vector and a scalar starting value, returning the result as a scalar.

Arguments:

The first argument is the start value of the reduction, which must be a scalar integer type equal to the result type. The second argument is the vector on which the reduction is performed and must be a vector of integer values whose element type is the result/start type. The third argument is the vector mask and is a vector of boolean values with the same number of elements as the vector argument. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.reduce.add’ intrinsic performs the integer ADD reduction (llvm.vector.reduce.add) of the vector argument val on each enabled lane, adding it to the scalar start_value. Disabled lanes are treated as containing the neutral value 0 (i.e. having no effect on the reduction operation). If the vector length is zero, the result is equal to start_value.

To ignore the start value, the neutral value can be used.

Examples:

%r = call i32 @llvm.vp.reduce.add.v4i32(i32 %start, <4 x i32> %a, <4 x i1> %mask, i32 %evl)
; %r is equivalent to %also.r, where lanes greater than or equal to %evl
; are treated as though %mask were false for those lanes.

%masked.a = select <4 x i1> %mask, <4 x i32> %a, <4 x i32> zeroinitializer
%reduction = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %masked.a)
%also.r = add i32 %reduction, %start

‘llvm.vp.reduce.fadd.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare float @llvm.vp.reduce.fadd.v4f32(float <start_value>, <4 x float> <val>, <4 x i1> <mask>, i32 <vector_length>)
declare double @llvm.vp.reduce.fadd.nxv8f64(double <start_value>, <vscale x 8 x double> <val>, <vscale x 8 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated floating-point ADD reduction of a vector and a scalar starting value, returning the result as a scalar.

Arguments:

The first argument is the start value of the reduction, which must be a scalar floating-point type equal to the result type. The second argument is the vector on which the reduction is performed and must be a vector of floating-point values whose element type is the result/start type. The third argument is the vector mask and is a vector of boolean values with the same number of elements as the vector argument. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.reduce.fadd’ intrinsic performs the floating-point ADD reduction (llvm.vector.reduce.fadd) of the vector argument val on each enabled lane, adding it to the scalar start_value. Disabled lanes are treated as containing the neutral value -0.0 (i.e. having no effect on the reduction operation). If no lanes are enabled, the resulting value will be equal to start_value.

To ignore the start value, the neutral value can be used.

See the unpredicated version (llvm.vector.reduce.fadd) for more detail on the semantics of the reduction.

Examples:

%r = call float @llvm.vp.reduce.fadd.v4f32(float %start, <4 x float> %a, <4 x i1> %mask, i32 %evl)
; %r is equivalent to %also.r, where lanes greater than or equal to %evl
; are treated as though %mask were false for those lanes.

%masked.a = select <4 x i1> %mask, <4 x float> %a, <4 x float> <float -0.0, float -0.0, float -0.0, float -0.0>
%also.r = call float @llvm.vector.reduce.fadd.v4f32(float %start, <4 x float> %masked.a)

‘llvm.vp.reduce.mul.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare i32 @llvm.vp.reduce.mul.v4i32(i32 <start_value>, <4 x i32> <val>, <4 x i1> <mask>, i32 <vector_length>)
declare i16 @llvm.vp.reduce.mul.nxv8i16(i16 <start_value>, <vscale x 8 x i16> <val>, <vscale x 8 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated integer MUL reduction of a vector and a scalar starting value, returning the result as a scalar.

Arguments:

The first argument is the start value of the reduction, which must be a scalar integer type equal to the result type. The second argument is the vector on which the reduction is performed and must be a vector of integer values whose element type is the result/start type. The third argument is the vector mask and is a vector of boolean values with the same number of elements as the vector argument. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.reduce.mul’ intrinsic performs the integer MUL reduction (llvm.vector.reduce.mul) of the vector argument val on each enabled lane, multiplying it by the scalar start_value. Disabled lanes are treated as containing the neutral value 1 (i.e. having no effect on the reduction operation). If the vector length is zero, the result is the start value.

To ignore the start value, the neutral value can be used.

Examples:

%r = call i32 @llvm.vp.reduce.mul.v4i32(i32 %start, <4 x i32> %a, <4 x i1> %mask, i32 %evl)
; %r is equivalent to %also.r, where lanes greater than or equal to %evl
; are treated as though %mask were false for those lanes.

%masked.a = select <4 x i1> %mask, <4 x i32> %a, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
%reduction = call i32 @llvm.vector.reduce.mul.v4i32(<4 x i32> %masked.a)
%also.r = mul i32 %reduction, %start

‘llvm.vp.reduce.fmul.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare float @llvm.vp.reduce.fmul.v4f32(float <start_value>, <4 x float> <val>, <4 x i1> <mask>, i32 <vector_length>)
declare double @llvm.vp.reduce.fmul.nxv8f64(double <start_value>, <vscale x 8 x double> <val>, <vscale x 8 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated floating-point MUL reduction of a vector and a scalar starting value, returning the result as a scalar.

Arguments:

The first argument is the start value of the reduction, which must be a scalar floating-point type equal to the result type. The second argument is the vector on which the reduction is performed and must be a vector of floating-point values whose element type is the result/start type. The third argument is the vector mask and is a vector of boolean values with the same number of elements as the vector argument. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.reduce.fmul’ intrinsic performs the floating-point MUL reduction (llvm.vector.reduce.fmul) of the vector argument val on each enabled lane, multiplying it by the scalar start_value`. Disabled lanes are treated as containing the neutral value 1.0 (i.e. having no effect on the reduction operation). If no lanes are enabled, the resulting value will be equal to the starting value.

To ignore the start value, the neutral value can be used.

See the unpredicated version (llvm.vector.reduce.fmul) for more detail on the semantics.

Examples:

%r = call float @llvm.vp.reduce.fmul.v4f32(float %start, <4 x float> %a, <4 x i1> %mask, i32 %evl)
; %r is equivalent to %also.r, where lanes greater than or equal to %evl
; are treated as though %mask were false for those lanes.

%masked.a = select <4 x i1> %mask, <4 x float> %a, <4 x float> <float 1.0, float 1.0, float 1.0, float 1.0>
%also.r = call float @llvm.vector.reduce.fmul.v4f32(float %start, <4 x float> %masked.a)

‘llvm.vp.reduce.and.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare i32 @llvm.vp.reduce.and.v4i32(i32 <start_value>, <4 x i32> <val>, <4 x i1> <mask>, i32 <vector_length>)
declare i16 @llvm.vp.reduce.and.nxv8i16(i16 <start_value>, <vscale x 8 x i16> <val>, <vscale x 8 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated integer AND reduction of a vector and a scalar starting value, returning the result as a scalar.

Arguments:

The first argument is the start value of the reduction, which must be a scalar integer type equal to the result type. The second argument is the vector on which the reduction is performed and must be a vector of integer values whose element type is the result/start type. The third argument is the vector mask and is a vector of boolean values with the same number of elements as the vector argument. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.reduce.and’ intrinsic performs the integer AND reduction (llvm.vector.reduce.and) of the vector argument val on each enabled lane, performing an ‘and’ of that with with the scalar start_value. Disabled lanes are treated as containing the neutral value UINT_MAX, or -1 (i.e. having no effect on the reduction operation). If the vector length is zero, the result is the start value.

To ignore the start value, the neutral value can be used.

Examples:

%r = call i32 @llvm.vp.reduce.and.v4i32(i32 %start, <4 x i32> %a, <4 x i1> %mask, i32 %evl)
; %r is equivalent to %also.r, where lanes greater than or equal to %evl
; are treated as though %mask were false for those lanes.

%masked.a = select <4 x i1> %mask, <4 x i32> %a, <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>
%reduction = call i32 @llvm.vector.reduce.and.v4i32(<4 x i32> %masked.a)
%also.r = and i32 %reduction, %start

‘llvm.vp.reduce.or.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare i32 @llvm.vp.reduce.or.v4i32(i32 <start_value>, <4 x i32> <val>, <4 x i1> <mask>, i32 <vector_length>)
declare i16 @llvm.vp.reduce.or.nxv8i16(i16 <start_value>, <vscale x 8 x i16> <val>, <vscale x 8 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated integer OR reduction of a vector and a scalar starting value, returning the result as a scalar.

Arguments:

The first argument is the start value of the reduction, which must be a scalar integer type equal to the result type. The second argument is the vector on which the reduction is performed and must be a vector of integer values whose element type is the result/start type. The third argument is the vector mask and is a vector of boolean values with the same number of elements as the vector argument. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.reduce.or’ intrinsic performs the integer OR reduction (llvm.vector.reduce.or) of the vector argument val on each enabled lane, performing an ‘or’ of that with the scalar start_value. Disabled lanes are treated as containing the neutral value 0 (i.e. having no effect on the reduction operation). If the vector length is zero, the result is the start value.

To ignore the start value, the neutral value can be used.

Examples:

%r = call i32 @llvm.vp.reduce.or.v4i32(i32 %start, <4 x i32> %a, <4 x i1> %mask, i32 %evl)
; %r is equivalent to %also.r, where lanes greater than or equal to %evl
; are treated as though %mask were false for those lanes.

%masked.a = select <4 x i1> %mask, <4 x i32> %a, <4 x i32> <i32 0, i32 0, i32 0, i32 0>
%reduction = call i32 @llvm.vector.reduce.or.v4i32(<4 x i32> %masked.a)
%also.r = or i32 %reduction, %start

‘llvm.vp.reduce.xor.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare i32 @llvm.vp.reduce.xor.v4i32(i32 <start_value>, <4 x i32> <val>, <4 x i1> <mask>, i32 <vector_length>)
declare i16 @llvm.vp.reduce.xor.nxv8i16(i16 <start_value>, <vscale x 8 x i16> <val>, <vscale x 8 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated integer XOR reduction of a vector and a scalar starting value, returning the result as a scalar.

Arguments:

The first argument is the start value of the reduction, which must be a scalar integer type equal to the result type. The second argument is the vector on which the reduction is performed and must be a vector of integer values whose element type is the result/start type. The third argument is the vector mask and is a vector of boolean values with the same number of elements as the vector argument. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.reduce.xor’ intrinsic performs the integer XOR reduction (llvm.vector.reduce.xor) of the vector argument val on each enabled lane, performing an ‘xor’ of that with the scalar start_value. Disabled lanes are treated as containing the neutral value 0 (i.e. having no effect on the reduction operation). If the vector length is zero, the result is the start value.

To ignore the start value, the neutral value can be used.

Examples:

%r = call i32 @llvm.vp.reduce.xor.v4i32(i32 %start, <4 x i32> %a, <4 x i1> %mask, i32 %evl)
; %r is equivalent to %also.r, where lanes greater than or equal to %evl
; are treated as though %mask were false for those lanes.

%masked.a = select <4 x i1> %mask, <4 x i32> %a, <4 x i32> <i32 0, i32 0, i32 0, i32 0>
%reduction = call i32 @llvm.vector.reduce.xor.v4i32(<4 x i32> %masked.a)
%also.r = xor i32 %reduction, %start

‘llvm.vp.reduce.smax.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare i32 @llvm.vp.reduce.smax.v4i32(i32 <start_value>, <4 x i32> <val>, <4 x i1> <mask>, i32 <vector_length>)
declare i16 @llvm.vp.reduce.smax.nxv8i16(i16 <start_value>, <vscale x 8 x i16> <val>, <vscale x 8 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated signed-integer MAX reduction of a vector and a scalar starting value, returning the result as a scalar.

Arguments:

The first argument is the start value of the reduction, which must be a scalar integer type equal to the result type. The second argument is the vector on which the reduction is performed and must be a vector of integer values whose element type is the result/start type. The third argument is the vector mask and is a vector of boolean values with the same number of elements as the vector argument. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.reduce.smax’ intrinsic performs the signed-integer MAX reduction (llvm.vector.reduce.smax) of the vector argument val on each enabled lane, and taking the maximum of that and the scalar start_value. Disabled lanes are treated as containing the neutral value INT_MIN (i.e. having no effect on the reduction operation). If the vector length is zero, the result is the start value.

To ignore the start value, the neutral value can be used.

Examples:

%r = call i8 @llvm.vp.reduce.smax.v4i8(i8 %start, <4 x i8> %a, <4 x i1> %mask, i32 %evl)
; %r is equivalent to %also.r, where lanes greater than or equal to %evl
; are treated as though %mask were false for those lanes.

%masked.a = select <4 x i1> %mask, <4 x i8> %a, <4 x i8> <i8 -128, i8 -128, i8 -128, i8 -128>
%reduction = call i8 @llvm.vector.reduce.smax.v4i8(<4 x i8> %masked.a)
%also.r = call i8 @llvm.smax.i8(i8 %reduction, i8 %start)

‘llvm.vp.reduce.smin.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare i32 @llvm.vp.reduce.smin.v4i32(i32 <start_value>, <4 x i32> <val>, <4 x i1> <mask>, i32 <vector_length>)
declare i16 @llvm.vp.reduce.smin.nxv8i16(i16 <start_value>, <vscale x 8 x i16> <val>, <vscale x 8 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated signed-integer MIN reduction of a vector and a scalar starting value, returning the result as a scalar.

Arguments:

The first argument is the start value of the reduction, which must be a scalar integer type equal to the result type. The second argument is the vector on which the reduction is performed and must be a vector of integer values whose element type is the result/start type. The third argument is the vector mask and is a vector of boolean values with the same number of elements as the vector argument. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.reduce.smin’ intrinsic performs the signed-integer MIN reduction (llvm.vector.reduce.smin) of the vector argument val on each enabled lane, and taking the minimum of that and the scalar start_value. Disabled lanes are treated as containing the neutral value INT_MAX (i.e. having no effect on the reduction operation). If the vector length is zero, the result is the start value.

To ignore the start value, the neutral value can be used.

Examples:

%r = call i8 @llvm.vp.reduce.smin.v4i8(i8 %start, <4 x i8> %a, <4 x i1> %mask, i32 %evl)
; %r is equivalent to %also.r, where lanes greater than or equal to %evl
; are treated as though %mask were false for those lanes.

%masked.a = select <4 x i1> %mask, <4 x i8> %a, <4 x i8> <i8 127, i8 127, i8 127, i8 127>
%reduction = call i8 @llvm.vector.reduce.smin.v4i8(<4 x i8> %masked.a)
%also.r = call i8 @llvm.smin.i8(i8 %reduction, i8 %start)

‘llvm.vp.reduce.umax.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare i32 @llvm.vp.reduce.umax.v4i32(i32 <start_value>, <4 x i32> <val>, <4 x i1> <mask>, i32 <vector_length>)
declare i16 @llvm.vp.reduce.umax.nxv8i16(i16 <start_value>, <vscale x 8 x i16> <val>, <vscale x 8 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated unsigned-integer MAX reduction of a vector and a scalar starting value, returning the result as a scalar.

Arguments:

The first argument is the start value of the reduction, which must be a scalar integer type equal to the result type. The second argument is the vector on which the reduction is performed and must be a vector of integer values whose element type is the result/start type. The third argument is the vector mask and is a vector of boolean values with the same number of elements as the vector argument. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.reduce.umax’ intrinsic performs the unsigned-integer MAX reduction (llvm.vector.reduce.umax) of the vector argument val on each enabled lane, and taking the maximum of that and the scalar start_value. Disabled lanes are treated as containing the neutral value 0 (i.e. having no effect on the reduction operation). If the vector length is zero, the result is the start value.

To ignore the start value, the neutral value can be used.

Examples:

%r = call i32 @llvm.vp.reduce.umax.v4i32(i32 %start, <4 x i32> %a, <4 x i1> %mask, i32 %evl)
; %r is equivalent to %also.r, where lanes greater than or equal to %evl
; are treated as though %mask were false for those lanes.

%masked.a = select <4 x i1> %mask, <4 x i32> %a, <4 x i32> <i32 0, i32 0, i32 0, i32 0>
%reduction = call i32 @llvm.vector.reduce.umax.v4i32(<4 x i32> %masked.a)
%also.r = call i32 @llvm.umax.i32(i32 %reduction, i32 %start)

‘llvm.vp.reduce.umin.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare i32 @llvm.vp.reduce.umin.v4i32(i32 <start_value>, <4 x i32> <val>, <4 x i1> <mask>, i32 <vector_length>)
declare i16 @llvm.vp.reduce.umin.nxv8i16(i16 <start_value>, <vscale x 8 x i16> <val>, <vscale x 8 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated unsigned-integer MIN reduction of a vector and a scalar starting value, returning the result as a scalar.

Arguments:

The first argument is the start value of the reduction, which must be a scalar integer type equal to the result type. The second argument is the vector on which the reduction is performed and must be a vector of integer values whose element type is the result/start type. The third argument is the vector mask and is a vector of boolean values with the same number of elements as the vector argument. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.reduce.umin’ intrinsic performs the unsigned-integer MIN reduction (llvm.vector.reduce.umin) of the vector argument val on each enabled lane, taking the minimum of that and the scalar start_value. Disabled lanes are treated as containing the neutral value UINT_MAX, or -1 (i.e. having no effect on the reduction operation). If the vector length is zero, the result is the start value.

To ignore the start value, the neutral value can be used.

Examples:

%r = call i32 @llvm.vp.reduce.umin.v4i32(i32 %start, <4 x i32> %a, <4 x i1> %mask, i32 %evl)
; %r is equivalent to %also.r, where lanes greater than or equal to %evl
; are treated as though %mask were false for those lanes.

%masked.a = select <4 x i1> %mask, <4 x i32> %a, <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>
%reduction = call i32 @llvm.vector.reduce.umin.v4i32(<4 x i32> %masked.a)
%also.r = call i32 @llvm.umin.i32(i32 %reduction, i32 %start)

‘llvm.vp.reduce.fmax.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare float @llvm.vp.reduce.fmax.v4f32(float <start_value>, <4 x float> <val>, <4 x i1> <mask>, i32 <vector_length>)
declare double @llvm.vp.reduce.fmax.nxv8f64(double <start_value>, <vscale x 8 x double> <val>, <vscale x 8 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated floating-point MAX reduction of a vector and a scalar starting value, returning the result as a scalar.

Arguments:

The first argument is the start value of the reduction, which must be a scalar floating-point type equal to the result type. The second argument is the vector on which the reduction is performed and must be a vector of floating-point values whose element type is the result/start type. The third argument is the vector mask and is a vector of boolean values with the same number of elements as the vector argument. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.reduce.fmax’ intrinsic performs the floating-point MAX reduction (llvm.vector.reduce.fmax) of the vector argument val on each enabled lane, taking the maximum of that and the scalar start_value. Disabled lanes are treated as containing the neutral value (i.e. having no effect on the reduction operation). If the vector length is zero, the result is the start value.

The neutral value is dependent on the fast-math flags. If no flags are set, the neutral value is -QNAN. If nnan and ninf are both set, then the neutral value is the smallest floating-point value for the result type. If only nnan is set then the neutral value is -Infinity.

This instruction has the same comparison semantics as the llvm.vector.reduce.fmax intrinsic (and thus the ‘llvm.maxnum.*’ intrinsic). That is, the result will always be a number unless all elements of the vector and the starting value are NaN. For a vector with maximum element magnitude 0.0 and containing both +0.0 and -0.0 elements, the sign of the result is unspecified.

To ignore the start value, the neutral value can be used.

Examples:

%r = call float @llvm.vp.reduce.fmax.v4f32(float %float, <4 x float> %a, <4 x i1> %mask, i32 %evl)
; %r is equivalent to %also.r, where lanes greater than or equal to %evl
; are treated as though %mask were false for those lanes.

%masked.a = select <4 x i1> %mask, <4 x float> %a, <4 x float> <float QNAN, float QNAN, float QNAN, float QNAN>
%reduction = call float @llvm.vector.reduce.fmax.v4f32(<4 x float> %masked.a)
%also.r = call float @llvm.maxnum.f32(float %reduction, float %start)

‘llvm.vp.reduce.fmin.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare float @llvm.vp.reduce.fmin.v4f32(float <start_value>, <4 x float> <val>, <4 x i1> <mask>, i32 <vector_length>)
declare double @llvm.vp.reduce.fmin.nxv8f64(double <start_value>, <vscale x 8 x double> <val>, <vscale x 8 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated floating-point MIN reduction of a vector and a scalar starting value, returning the result as a scalar.

Arguments:

The first argument is the start value of the reduction, which must be a scalar floating-point type equal to the result type. The second argument is the vector on which the reduction is performed and must be a vector of floating-point values whose element type is the result/start type. The third argument is the vector mask and is a vector of boolean values with the same number of elements as the vector argument. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.reduce.fmin’ intrinsic performs the floating-point MIN reduction (llvm.vector.reduce.fmin) of the vector argument val on each enabled lane, taking the minimum of that and the scalar start_value. Disabled lanes are treated as containing the neutral value (i.e. having no effect on the reduction operation). If the vector length is zero, the result is the start value.

The neutral value is dependent on the fast-math flags. If no flags are set, the neutral value is +QNAN. If nnan and ninf are both set, then the neutral value is the largest floating-point value for the result type. If only nnan is set then the neutral value is +Infinity.

This instruction has the same comparison semantics as the llvm.vector.reduce.fmin intrinsic (and thus the ‘llvm.minnum.*’ intrinsic). That is, the result will always be a number unless all elements of the vector and the starting value are NaN. For a vector with maximum element magnitude 0.0 and containing both +0.0 and -0.0 elements, the sign of the result is unspecified.

To ignore the start value, the neutral value can be used.

Examples:

%r = call float @llvm.vp.reduce.fmin.v4f32(float %start, <4 x float> %a, <4 x i1> %mask, i32 %evl)
; %r is equivalent to %also.r, where lanes greater than or equal to %evl
; are treated as though %mask were false for those lanes.

%masked.a = select <4 x i1> %mask, <4 x float> %a, <4 x float> <float QNAN, float QNAN, float QNAN, float QNAN>
%reduction = call float @llvm.vector.reduce.fmin.v4f32(<4 x float> %masked.a)
%also.r = call float @llvm.minnum.f32(float %reduction, float %start)

‘llvm.vp.reduce.fmaximum.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare float @llvm.vp.reduce.fmaximum.v4f32(float <start_value>, <4 x float> <val>, <4 x i1> <mask>, i32 <vector_length>)
declare double @llvm.vp.reduce.fmaximum.nxv8f64(double <start_value>, <vscale x 8 x double> <val>, <vscale x 8 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated floating-point MAX reduction of a vector and a scalar starting value, returning the result as a scalar.

Arguments:

The first argument is the start value of the reduction, which must be a scalar floating-point type equal to the result type. The second argument is the vector on which the reduction is performed and must be a vector of floating-point values whose element type is the result/start type. The third argument is the vector mask and is a vector of boolean values with the same number of elements as the vector argument. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.reduce.fmaximum’ intrinsic performs the floating-point MAX reduction (llvm.vector.reduce.fmaximum) of the vector argument val on each enabled lane, taking the maximum of that and the scalar start_value. Disabled lanes are treated as containing the neutral value (i.e. having no effect on the reduction operation). If the vector length is zero, the result is the start value.

The neutral value is dependent on the fast-math flags. If no flags are set or only the nnan is set, the neutral value is -Infinity. If ninf is set, then the neutral value is the smallest floating-point value for the result type.

This instruction has the same comparison semantics as the llvm.vector.reduce.fmaximum intrinsic (and thus the ‘llvm.maximum.*’ intrinsic). That is, the result will always be a number unless any of the elements in the vector or the starting value is NaN. Namely, this intrinsic propagates NaN. Also, -0.0 is considered less than +0.0.

To ignore the start value, the neutral value can be used.

Examples:

%r = call float @llvm.vp.reduce.fmaximum.v4f32(float %float, <4 x float> %a, <4 x i1> %mask, i32 %evl)
; %r is equivalent to %also.r, where lanes greater than or equal to %evl
; are treated as though %mask were false for those lanes.

%masked.a = select <4 x i1> %mask, <4 x float> %a, <4 x float> <float -infinity, float -infinity, float -infinity, float -infinity>
%reduction = call float @llvm.vector.reduce.fmaximum.v4f32(<4 x float> %masked.a)
%also.r = call float @llvm.maximum.f32(float %reduction, float %start)

‘llvm.vp.reduce.fminimum.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare float @llvm.vp.reduce.fminimum.v4f32(float <start_value>, <4 x float> <val>, <4 x i1> <mask>, i32 <vector_length>)
declare double @llvm.vp.reduce.fminimum.nxv8f64(double <start_value>, <vscale x 8 x double> <val>, <vscale x 8 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated floating-point MIN reduction of a vector and a scalar starting value, returning the result as a scalar.

Arguments:

The first argument is the start value of the reduction, which must be a scalar floating-point type equal to the result type. The second argument is the vector on which the reduction is performed and must be a vector of floating-point values whose element type is the result/start type. The third argument is the vector mask and is a vector of boolean values with the same number of elements as the vector argument. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.reduce.fminimum’ intrinsic performs the floating-point MIN reduction (llvm.vector.reduce.fminimum) of the vector argument val on each enabled lane, taking the minimum of that and the scalar start_value. Disabled lanes are treated as containing the neutral value (i.e. having no effect on the reduction operation). If the vector length is zero, the result is the start value.

The neutral value is dependent on the fast-math flags. If no flags are set or only the nnan is set, the neutral value is +Infinity. If ninf is set, then the neutral value is the largest floating-point value for the result type.

This instruction has the same comparison semantics as the llvm.vector.reduce.fminimum intrinsic (and thus the ‘llvm.minimum.*’ intrinsic). That is, the result will always be a number unless any of the elements in the vector or the starting value is NaN. Namely, this intrinsic propagates NaN. Also, -0.0 is considered less than +0.0.

To ignore the start value, the neutral value can be used.

Examples:

%r = call float @llvm.vp.reduce.fminimum.v4f32(float %start, <4 x float> %a, <4 x i1> %mask, i32 %evl)
; %r is equivalent to %also.r, where lanes greater than or equal to %evl
; are treated as though %mask were false for those lanes.

%masked.a = select <4 x i1> %mask, <4 x float> %a, <4 x float> <float infinity, float infinity, float infinity, float infinity>
%reduction = call float @llvm.vector.reduce.fminimum.v4f32(<4 x float> %masked.a)
%also.r = call float @llvm.minimum.f32(float %reduction, float %start)

‘llvm.get.active.lane.mask.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 %base, i32 %n)
declare <8 x i1> @llvm.get.active.lane.mask.v8i1.i64(i64 %base, i64 %n)
declare <16 x i1> @llvm.get.active.lane.mask.v16i1.i64(i64 %base, i64 %n)
declare <vscale x 16 x i1> @llvm.get.active.lane.mask.nxv16i1.i64(i64 %base, i64 %n)

Overview:

Create a mask representing active and inactive vector lanes.

Arguments:

Both arguments have the same scalar integer type. The result is a vector with the i1 element type.

Semantics:

The ‘llvm.get.active.lane.mask.*’ intrinsics are semantically equivalent to:

%m[i] = icmp ult (%base + i), %n

where %m is a vector (mask) of active/inactive lanes with its elements indexed by i, and %base, %n are the two arguments to llvm.get.active.lane.mask.*, %icmp is an integer compare and ult the unsigned less-than comparison operator. Overflow cannot occur in (%base + i) and its comparison against %n as it is performed in integer numbers and not in machine numbers. If %n is 0, then the result is a poison value. The above is equivalent to:

%m = @llvm.get.active.lane.mask(%base, %n)

This can, for example, be emitted by the loop vectorizer in which case %base is the first element of the vector induction variable (VIV) and %n is the loop tripcount. Thus, these intrinsics perform an element-wise less than comparison of VIV with the loop tripcount, producing a mask of true/false values representing active/inactive vector lanes, except if the VIV overflows in which case they return false in the lanes where the VIV overflows. The arguments are scalar types to accommodate scalable vector types, for which it is unknown what the type of the step vector needs to be that enumerate its lanes without overflow.

This mask %m can e.g. be used in masked load/store instructions. These intrinsics provide a hint to the backend. I.e., for a vector loop, the back-edge taken count of the original scalar loop is explicit as the second argument.

Examples:

%active.lane.mask = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i64(i64 %elem0, i64 429)
%wide.masked.load = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* %3, i32 4, <4 x i1> %active.lane.mask, <4 x i32> poison)

‘llvm.experimental.vp.splice’ Intrinsic

Syntax:

This is an overloaded intrinsic.

declare <2 x double> @llvm.experimental.vp.splice.v2f64(<2 x double> %vec1, <2 x double> %vec2, i32 %imm, <2 x i1> %mask, i32 %evl1, i32 %evl2)
declare <vscale x 4 x i32> @llvm.experimental.vp.splice.nxv4i32(<vscale x 4 x i32> %vec1, <vscale x 4 x i32> %vec2, i32 %imm, <vscale x 4 x i1> %mask, i32 %evl1, i32 %evl2)

Overview:

The ‘llvm.experimental.vp.splice.*’ intrinsic is the vector length predicated version of the ‘llvm.vector.splice.*’ intrinsic.

Arguments:

The result and the first two arguments vec1 and vec2 are vectors with the same type. The third argument imm is an immediate signed integer that indicates the offset index. The fourth argument mask is a vector mask and has the same number of elements as the result. The last two arguments evl1 and evl2 are unsigned integers indicating the explicit vector lengths of vec1 and vec2 respectively. imm, evl1 and evl2 should respect the following constraints: -evl1 <= imm < evl1, 0 <= evl1 <= VL and 0 <= evl2 <= VL, where VL is the runtime vector factor. If these constraints are not satisfied the intrinsic has undefined behavior.

Semantics:

Effectively, this intrinsic concatenates vec1[0..evl1-1] and vec2[0..evl2-1] and creates the result vector by selecting the elements in a window of size evl2, starting at index imm (for a positive immediate) of the concatenated vector. Elements in the result vector beyond evl2 are undef. If imm is negative the starting index is evl1 + imm. The result vector of active vector length evl2 contains evl1 - imm (-imm for negative imm) elements from indices [imm..evl1 - 1] ([evl1 + imm..evl1 -1] for negative imm) of vec1 followed by the first evl2 - (evl1 - imm) (evl2 + imm for negative imm) elements of vec2. If evl1 - imm (-imm) >= evl2, only the first evl2 elements are considered and the remaining are undef. The lanes in the result vector disabled by mask are poison.

Examples:

llvm.experimental.vp.splice(<A,B,C,D>, <E,F,G,H>, 1, 2, 3);  ==> <B, E, F, poison> index
llvm.experimental.vp.splice(<A,B,C,D>, <E,F,G,H>, -2, 3, 2); ==> <B, C, poison, poison> trailing elements

‘llvm.experimental.vp.splat’ Intrinsic

Syntax:

This is an overloaded intrinsic.

declare <2 x double> @llvm.experimental.vp.splat.v2f64(double %scalar, <2 x i1> %mask, i32 %evl)
declare <vscale x 4 x i32> @llvm.experimental.vp.splat.nxv4i32(i32 %scalar, <vscale x 4 x i1> %mask, i32 %evl)

Overview:

The ‘llvm.experimental.vp.splat.*’ intrinsic is to create a predicated splat with specific effective vector length.

Arguments:

The result is a vector and it is a splat of the first scalar argument. The second argument mask is a vector mask and has the same number of elements as the result. The third argument is the explicit vector length of the operation.

Semantics:

This intrinsic splats a vector with evl elements of a scalar argument. The lanes in the result vector disabled by mask are poison. The elements past evl are poison.

Examples:

%r = call <4 x float> @llvm.vp.splat.v4f32(float %a, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r
%e = insertelement <4 x float> poison, float %a, i32 0
%s = shufflevector <4 x float> %e, <4 x float> poison, <4 x i32> zeroinitializer
%also.r = select <4 x i1> %mask, <4 x float> %s, <4 x float> poison

‘llvm.experimental.vp.reverse’ Intrinsic

Syntax:

This is an overloaded intrinsic.

declare <2 x double> @llvm.experimental.vp.reverse.v2f64(<2 x double> %vec, <2 x i1> %mask, i32 %evl)
declare <vscale x 4 x i32> @llvm.experimental.vp.reverse.nxv4i32(<vscale x 4 x i32> %vec, <vscale x 4 x i1> %mask, i32 %evl)

Overview:

The ‘llvm.experimental.vp.reverse.*’ intrinsic is the vector length predicated version of the ‘llvm.vector.reverse.*’ intrinsic.

Arguments:

The result and the first argument vec are vectors with the same type. The second argument mask is a vector mask and has the same number of elements as the result. The third argument is the explicit vector length of the operation.

Semantics:

This intrinsic reverses the order of the first evl elements in a vector. The lanes in the result vector disabled by mask are poison. The elements past evl are poison.

‘llvm.vp.load’ Intrinsic

Syntax:

This is an overloaded intrinsic.

declare <4 x float> @llvm.vp.load.v4f32.p0(ptr %ptr, <4 x i1> %mask, i32 %evl)
declare <vscale x 2 x i16> @llvm.vp.load.nxv2i16.p0(ptr %ptr, <vscale x 2 x i1> %mask, i32 %evl)
declare <8 x float> @llvm.vp.load.v8f32.p1(ptr addrspace(1) %ptr, <8 x i1> %mask, i32 %evl)
declare <vscale x 1 x i64> @llvm.vp.load.nxv1i64.p6(ptr addrspace(6) %ptr, <vscale x 1 x i1> %mask, i32 %evl)

Overview:

The ‘llvm.vp.load.*’ intrinsic is the vector length predicated version of the llvm.masked.load intrinsic.

Arguments:

The first argument is the base pointer for the load. The second argument is a vector of boolean values with the same number of elements as the return type. The third is the explicit vector length of the operation. The return type and underlying type of the base pointer are the same vector types.

The align parameter attribute can be provided for the first argument.

Semantics:

The ‘llvm.vp.load’ intrinsic reads a vector from memory in the same way as the ‘llvm.masked.load’ intrinsic, where the mask is taken from the combination of the ‘mask’ and ‘evl’ arguments in the usual VP way. Certain ‘llvm.masked.load’ arguments do not have corresponding arguments in ‘llvm.vp.load’: the ‘passthru’ argument is implicitly poison; the ‘alignment’ argument is taken as the align parameter attribute, if provided. The default alignment is taken as the ABI alignment of the return type as specified by the datalayout string.

Examples:

%r = call <8 x i8> @llvm.vp.load.v8i8.p0(ptr align 2 %ptr, <8 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%also.r = call <8 x i8> @llvm.masked.load.v8i8.p0(ptr %ptr, i32 2, <8 x i1> %mask, <8 x i8> poison)

‘llvm.vp.store’ Intrinsic

Syntax:

This is an overloaded intrinsic.

declare void @llvm.vp.store.v4f32.p0(<4 x float> %val, ptr %ptr, <4 x i1> %mask, i32 %evl)
declare void @llvm.vp.store.nxv2i16.p0(<vscale x 2 x i16> %val, ptr %ptr, <vscale x 2 x i1> %mask, i32 %evl)
declare void @llvm.vp.store.v8f32.p1(<8 x float> %val, ptr addrspace(1) %ptr, <8 x i1> %mask, i32 %evl)
declare void @llvm.vp.store.nxv1i64.p6(<vscale x 1 x i64> %val, ptr addrspace(6) %ptr, <vscale x 1 x i1> %mask, i32 %evl)

Overview:

The ‘llvm.vp.store.*’ intrinsic is the vector length predicated version of the llvm.masked.store intrinsic.

Arguments:

The first argument is the vector value to be written to memory. The second argument is the base pointer for the store. It has the same underlying type as the value argument. The third argument is a vector of boolean values with the same number of elements as the return type. The fourth is the explicit vector length of the operation.

The align parameter attribute can be provided for the second argument.

Semantics:

The ‘llvm.vp.store’ intrinsic reads a vector from memory in the same way as the ‘llvm.masked.store’ intrinsic, where the mask is taken from the combination of the ‘mask’ and ‘evl’ arguments in the usual VP way. The alignment of the operation (corresponding to the ‘alignment’ argument of ‘llvm.masked.store’) is specified by the align parameter attribute (see above). If it is not provided then the ABI alignment of the type of the ‘value’ argument as specified by the datalayout string is used instead.

Examples:

call void @llvm.vp.store.v8i8.p0(<8 x i8> %val, ptr align 4 %ptr, <8 x i1> %mask, i32 %evl)
;; For all lanes below %evl, the call above is lane-wise equivalent to the call below.

call void @llvm.masked.store.v8i8.p0(<8 x i8> %val, ptr %ptr, i32 4, <8 x i1> %mask)

‘llvm.experimental.vp.strided.load’ Intrinsic

Syntax:

This is an overloaded intrinsic.

declare <4 x float> @llvm.experimental.vp.strided.load.v4f32.i64(ptr %ptr, i64 %stride, <4 x i1> %mask, i32 %evl)
declare <vscale x 2 x i16> @llvm.experimental.vp.strided.load.nxv2i16.i64(ptr %ptr, i64 %stride, <vscale x 2 x i1> %mask, i32 %evl)

Overview:

The ‘llvm.experimental.vp.strided.load’ intrinsic loads, into a vector, scalar values from memory locations evenly spaced apart by ‘stride’ number of bytes, starting from ‘ptr’.

Arguments:

The first argument is the base pointer for the load. The second argument is the stride value expressed in bytes. The third argument is a vector of boolean values with the same number of elements as the return type. The fourth is the explicit vector length of the operation. The base pointer underlying type matches the type of the scalar elements of the return argument.

The align parameter attribute can be provided for the first argument.

Semantics:

The ‘llvm.experimental.vp.strided.load’ intrinsic loads, into a vector, multiple scalar values from memory in the same way as the llvm.vp.gather intrinsic, where the vector of pointers is in the form:

%ptrs = <%ptr, %ptr + %stride, %ptr + 2 * %stride, ... >,

with ‘ptr’ previously casted to a pointer ‘i8’, ‘stride’ always interpreted as a signed integer and all arithmetic occurring in the pointer type.

Examples:

%r = call <8 x i64> @llvm.experimental.vp.strided.load.v8i64.i64(i64* %ptr, i64 %stride, <8 x i64> %mask, i32 %evl)
;; The operation can also be expressed like this:

%addr = bitcast i64* %ptr to i8*
;; Create a vector of pointers %addrs in the form:
;; %addrs = <%addr, %addr + %stride, %addr + 2 * %stride, ...>
%ptrs = bitcast <8 x i8* > %addrs to <8 x i64* >
%also.r = call <8 x i64> @llvm.vp.gather.v8i64.v8p0i64(<8 x i64* > %ptrs, <8 x i64> %mask, i32 %evl)

‘llvm.experimental.vp.strided.store’ Intrinsic

Syntax:

This is an overloaded intrinsic.

declare void @llvm.experimental.vp.strided.store.v4f32.i64(<4 x float> %val, ptr %ptr, i64 %stride, <4 x i1> %mask, i32 %evl)
declare void @llvm.experimental.vp.strided.store.nxv2i16.i64(<vscale x 2 x i16> %val, ptr %ptr, i64 %stride, <vscale x 2 x i1> %mask, i32 %evl)

Overview:

The ‘@llvm.experimental.vp.strided.store’ intrinsic stores the elements of ‘val’ into memory locations evenly spaced apart by ‘stride’ number of bytes, starting from ‘ptr’.

Arguments:

The first argument is the vector value to be written to memory. The second argument is the base pointer for the store. Its underlying type matches the scalar element type of the value argument. The third argument is the stride value expressed in bytes. The fourth argument is a vector of boolean values with the same number of elements as the return type. The fifth is the explicit vector length of the operation.

The align parameter attribute can be provided for the second argument.

Semantics:

The ‘llvm.experimental.vp.strided.store’ intrinsic stores the elements of ‘val’ in the same way as the llvm.vp.scatter intrinsic, where the vector of pointers is in the form:

%ptrs = <%ptr, %ptr + %stride, %ptr + 2 * %stride, ... >,

with ‘ptr’ previously casted to a pointer ‘i8’, ‘stride’ always interpreted as a signed integer and all arithmetic occurring in the pointer type.

Examples:

call void @llvm.experimental.vp.strided.store.v8i64.i64(<8 x i64> %val, i64* %ptr, i64 %stride, <8 x i1> %mask, i32 %evl)
;; The operation can also be expressed like this:

%addr = bitcast i64* %ptr to i8*
;; Create a vector of pointers %addrs in the form:
;; %addrs = <%addr, %addr + %stride, %addr + 2 * %stride, ...>
%ptrs = bitcast <8 x i8* > %addrs to <8 x i64* >
call void @llvm.vp.scatter.v8i64.v8p0i64(<8 x i64> %val, <8 x i64*> %ptrs, <8 x i1> %mask, i32 %evl)

‘llvm.vp.gather’ Intrinsic

Syntax:

This is an overloaded intrinsic.

declare <4 x double> @llvm.vp.gather.v4f64.v4p0(<4 x ptr> %ptrs, <4 x i1> %mask, i32 %evl)
declare <vscale x 2 x i8> @llvm.vp.gather.nxv2i8.nxv2p0(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %mask, i32 %evl)
declare <2 x float> @llvm.vp.gather.v2f32.v2p2(<2 x ptr addrspace(2)> %ptrs, <2 x i1> %mask, i32 %evl)
declare <vscale x 4 x i32> @llvm.vp.gather.nxv4i32.nxv4p4(<vscale x 4 x ptr addrspace(4)> %ptrs, <vscale x 4 x i1> %mask, i32 %evl)

Overview:

The ‘llvm.vp.gather.*’ intrinsic is the vector length predicated version of the llvm.masked.gather intrinsic.

Arguments:

The first argument is a vector of pointers which holds all memory addresses to read. The second argument is a vector of boolean values with the same number of elements as the return type. The third is the explicit vector length of the operation. The return type and underlying type of the vector of pointers are the same vector types.

The align parameter attribute can be provided for the first argument.

Semantics:

The ‘llvm.vp.gather’ intrinsic reads multiple scalar values from memory in the same way as the ‘llvm.masked.gather’ intrinsic, where the mask is taken from the combination of the ‘mask’ and ‘evl’ arguments in the usual VP way. Certain ‘llvm.masked.gather’ arguments do not have corresponding arguments in ‘llvm.vp.gather’: the ‘passthru’ argument is implicitly poison; the ‘alignment’ argument is taken as the align parameter, if provided. The default alignment is taken as the ABI alignment of the source addresses as specified by the datalayout string.

Examples:

%r = call <8 x i8> @llvm.vp.gather.v8i8.v8p0(<8 x ptr>  align 8 %ptrs, <8 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%also.r = call <8 x i8> @llvm.masked.gather.v8i8.v8p0(<8 x ptr> %ptrs, i32 8, <8 x i1> %mask, <8 x i8> poison)

‘llvm.vp.scatter’ Intrinsic

Syntax:

This is an overloaded intrinsic.

declare void @llvm.vp.scatter.v4f64.v4p0(<4 x double> %val, <4 x ptr> %ptrs, <4 x i1> %mask, i32 %evl)
declare void @llvm.vp.scatter.nxv2i8.nxv2p0(<vscale x 2 x i8> %val, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %mask, i32 %evl)
declare void @llvm.vp.scatter.v2f32.v2p2(<2 x float> %val, <2 x ptr addrspace(2)> %ptrs, <2 x i1> %mask, i32 %evl)
declare void @llvm.vp.scatter.nxv4i32.nxv4p4(<vscale x 4 x i32> %val, <vscale x 4 x ptr addrspace(4)> %ptrs, <vscale x 4 x i1> %mask, i32 %evl)

Overview:

The ‘llvm.vp.scatter.*’ intrinsic is the vector length predicated version of the llvm.masked.scatter intrinsic.

Arguments:

The first argument is a vector value to be written to memory. The second argument is a vector of pointers, pointing to where the value elements should be stored. The third argument is a vector of boolean values with the same number of elements as the return type. The fourth is the explicit vector length of the operation.

The align parameter attribute can be provided for the second argument.

Semantics:

The ‘llvm.vp.scatter’ intrinsic writes multiple scalar values to memory in the same way as the ‘llvm.masked.scatter’ intrinsic, where the mask is taken from the combination of the ‘mask’ and ‘evl’ arguments in the usual VP way. The ‘alignment’ argument of the ‘llvm.masked.scatter’ does not have a corresponding argument in ‘llvm.vp.scatter’: it is instead provided via the optional align parameter attribute on the vector-of-pointers argument. Otherwise it is taken as the ABI alignment of the destination addresses as specified by the datalayout string.

Examples:

call void @llvm.vp.scatter.v8i8.v8p0(<8 x i8> %val, <8 x ptr> align 1 %ptrs, <8 x i1> %mask, i32 %evl)
;; For all lanes below %evl, the call above is lane-wise equivalent to the call below.

call void @llvm.masked.scatter.v8i8.v8p0(<8 x i8> %val, <8 x ptr> %ptrs, i32 1, <8 x i1> %mask)

‘llvm.vp.trunc.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x i16>  @llvm.vp.trunc.v16i16.v16i32 (<16 x i32> <op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x i16>  @llvm.vp.trunc.nxv4i16.nxv4i32 (<vscale x 4 x i32> <op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)

Overview:

The ‘llvm.vp.trunc’ intrinsic truncates its first argument to the return type. The operation has a mask and an explicit vector length parameter.

Arguments:

The ‘llvm.vp.trunc’ intrinsic takes a value to cast as its first argument. The return type is the type to cast the value to. Both types must be vector of integer type. The bit size of the value must be larger than the bit size of the return type. The second argument is the vector mask. The return type, the value to cast, and the vector mask have the same number of elements. The third argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.trunc’ intrinsic truncates the high order bits in value and converts the remaining bits to return type. Since the source size must be larger than the destination size, ‘llvm.vp.trunc’ cannot be a no-op cast. It will always truncate bits. The conversion is performed on lane positions below the explicit vector length and where the vector mask is true. Masked-off lanes are poison.

Examples:

%r = call <4 x i16> @llvm.vp.trunc.v4i16.v4i32(<4 x i32> %a, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = trunc <4 x i32> %a to <4 x i16>
%also.r = select <4 x i1> %mask, <4 x i16> %t, <4 x i16> poison

‘llvm.vp.zext.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x i32>  @llvm.vp.zext.v16i32.v16i16 (<16 x i16> <op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x i32>  @llvm.vp.zext.nxv4i32.nxv4i16 (<vscale x 4 x i16> <op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)

Overview:

The ‘llvm.vp.zext’ intrinsic zero extends its first argument to the return type. The operation has a mask and an explicit vector length parameter.

Arguments:

The ‘llvm.vp.zext’ intrinsic takes a value to cast as its first argument. The return type is the type to cast the value to. Both types must be vectors of integer type. The bit size of the value must be smaller than the bit size of the return type. The second argument is the vector mask. The return type, the value to cast, and the vector mask have the same number of elements. The third argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.zext’ intrinsic fill the high order bits of the value with zero bits until it reaches the size of the return type. When zero extending from i1, the result will always be either 0 or 1. The conversion is performed on lane positions below the explicit vector length and where the vector mask is true. Masked-off lanes are poison.

Examples:

%r = call <4 x i32> @llvm.vp.zext.v4i32.v4i16(<4 x i16> %a, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = zext <4 x i16> %a to <4 x i32>
%also.r = select <4 x i1> %mask, <4 x i32> %t, <4 x i32> poison

‘llvm.vp.sext.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x i32>  @llvm.vp.sext.v16i32.v16i16 (<16 x i16> <op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x i32>  @llvm.vp.sext.nxv4i32.nxv4i16 (<vscale x 4 x i16> <op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)

Overview:

The ‘llvm.vp.sext’ intrinsic sign extends its first argument to the return type. The operation has a mask and an explicit vector length parameter.

Arguments:

The ‘llvm.vp.sext’ intrinsic takes a value to cast as its first argument. The return type is the type to cast the value to. Both types must be vectors of integer type. The bit size of the value must be smaller than the bit size of the return type. The second argument is the vector mask. The return type, the value to cast, and the vector mask have the same number of elements. The third argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.sext’ intrinsic performs a sign extension by copying the sign bit (highest order bit) of the value until it reaches the size of the return type. When sign extending from i1, the result will always be either -1 or 0. The conversion is performed on lane positions below the explicit vector length and where the vector mask is true. Masked-off lanes are poison.

Examples:

%r = call <4 x i32> @llvm.vp.sext.v4i32.v4i16(<4 x i16> %a, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = sext <4 x i16> %a to <4 x i32>
%also.r = select <4 x i1> %mask, <4 x i32> %t, <4 x i32> poison

‘llvm.vp.fptrunc.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x float>  @llvm.vp.fptrunc.v16f32.v16f64 (<16 x double> <op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x float>  @llvm.vp.trunc.nxv4f32.nxv4f64 (<vscale x 4 x double> <op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)

Overview:

The ‘llvm.vp.fptrunc’ intrinsic truncates its first argument to the return type. The operation has a mask and an explicit vector length parameter.

Arguments:

The ‘llvm.vp.fptrunc’ intrinsic takes a value to cast as its first argument. The return type is the type to cast the value to. Both types must be vector of floating-point type. The bit size of the value must be larger than the bit size of the return type. This implies that ‘llvm.vp.fptrunc’ cannot be used to make a no-op cast. The second argument is the vector mask. The return type, the value to cast, and the vector mask have the same number of elements. The third argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.fptrunc’ intrinsic casts a value from a larger floating-point type to a smaller floating-point type. This instruction is assumed to execute in the default floating-point environment. The conversion is performed on lane positions below the explicit vector length and where the vector mask is true. Masked-off lanes are poison.

Examples:

%r = call <4 x float> @llvm.vp.fptrunc.v4f32.v4f64(<4 x double> %a, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = fptrunc <4 x double> %a to <4 x float>
%also.r = select <4 x i1> %mask, <4 x float> %t, <4 x float> poison

‘llvm.vp.fpext.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x double>  @llvm.vp.fpext.v16f64.v16f32 (<16 x float> <op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x double>  @llvm.vp.fpext.nxv4f64.nxv4f32 (<vscale x 4 x float> <op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)

Overview:

The ‘llvm.vp.fpext’ intrinsic extends its first argument to the return type. The operation has a mask and an explicit vector length parameter.

Arguments:

The ‘llvm.vp.fpext’ intrinsic takes a value to cast as its first argument. The return type is the type to cast the value to. Both types must be vector of floating-point type. The bit size of the value must be smaller than the bit size of the return type. This implies that ‘llvm.vp.fpext’ cannot be used to make a no-op cast. The second argument is the vector mask. The return type, the value to cast, and the vector mask have the same number of elements. The third argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.fpext’ intrinsic extends the value from a smaller floating-point type to a larger floating-point type. The ‘llvm.vp.fpext’ cannot be used to make a no-op cast because it always changes bits. Use bitcast to make a no-op cast for a floating-point cast. The conversion is performed on lane positions below the explicit vector length and where the vector mask is true. Masked-off lanes are poison.

Examples:

%r = call <4 x double> @llvm.vp.fpext.v4f64.v4f32(<4 x float> %a, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = fpext <4 x float> %a to <4 x double>
%also.r = select <4 x i1> %mask, <4 x double> %t, <4 x double> poison

‘llvm.vp.fptoui.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x i32>  @llvm.vp.fptoui.v16i32.v16f32 (<16 x float> <op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x i32>  @llvm.vp.fptoui.nxv4i32.nxv4f32 (<vscale x 4 x float> <op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x i64>  @llvm.vp.fptoui.v256i64.v256f64 (<256 x double> <op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

The ‘llvm.vp.fptoui’ intrinsic converts the floating-point argument to the unsigned integer return type. The operation has a mask and an explicit vector length parameter.

Arguments:

The ‘llvm.vp.fptoui’ intrinsic takes a value to cast as its first argument. The value to cast must be a vector of floating-point type. The return type is the type to cast the value to. The return type must be vector of integer type. The second argument is the vector mask. The return type, the value to cast, and the vector mask have the same number of elements. The third argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.fptoui’ intrinsic converts its floating-point argument into the nearest (rounding towards zero) unsigned integer value where the lane position is below the explicit vector length and the vector mask is true. Masked-off lanes are poison. On enabled lanes where conversion takes place and the value cannot fit in the return type, the result on that lane is a poison value.

Examples:

%r = call <4 x i32> @llvm.vp.fptoui.v4i32.v4f32(<4 x float> %a, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = fptoui <4 x float> %a to <4 x i32>
%also.r = select <4 x i1> %mask, <4 x i32> %t, <4 x i32> poison

‘llvm.vp.fptosi.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x i32>  @llvm.vp.fptosi.v16i32.v16f32 (<16 x float> <op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x i32>  @llvm.vp.fptosi.nxv4i32.nxv4f32 (<vscale x 4 x float> <op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x i64>  @llvm.vp.fptosi.v256i64.v256f64 (<256 x double> <op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

The ‘llvm.vp.fptosi’ intrinsic converts the floating-point argument to the signed integer return type. The operation has a mask and an explicit vector length parameter.

Arguments:

The ‘llvm.vp.fptosi’ intrinsic takes a value to cast as its first argument. The value to cast must be a vector of floating-point type. The return type is the type to cast the value to. The return type must be vector of integer type. The second argument is the vector mask. The return type, the value to cast, and the vector mask have the same number of elements. The third argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.fptosi’ intrinsic converts its floating-point argument into the nearest (rounding towards zero) signed integer value where the lane position is below the explicit vector length and the vector mask is true. Masked-off lanes are poison. On enabled lanes where conversion takes place and the value cannot fit in the return type, the result on that lane is a poison value.

Examples:

%r = call <4 x i32> @llvm.vp.fptosi.v4i32.v4f32(<4 x float> %a, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = fptosi <4 x float> %a to <4 x i32>
%also.r = select <4 x i1> %mask, <4 x i32> %t, <4 x i32> poison

‘llvm.vp.uitofp.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x float>  @llvm.vp.uitofp.v16f32.v16i32 (<16 x i32> <op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x float>  @llvm.vp.uitofp.nxv4f32.nxv4i32 (<vscale x 4 x i32> <op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x double>  @llvm.vp.uitofp.v256f64.v256i64 (<256 x i64> <op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

The ‘llvm.vp.uitofp’ intrinsic converts its unsigned integer argument to the floating-point return type. The operation has a mask and an explicit vector length parameter.

Arguments:

The ‘llvm.vp.uitofp’ intrinsic takes a value to cast as its first argument. The value to cast must be vector of integer type. The return type is the type to cast the value to. The return type must be a vector of floating-point type. The second argument is the vector mask. The return type, the value to cast, and the vector mask have the same number of elements. The third argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.uitofp’ intrinsic interprets its first argument as an unsigned integer quantity and converts it to the corresponding floating-point value. If the value cannot be exactly represented, it is rounded using the default rounding mode. The conversion is performed on lane positions below the explicit vector length and where the vector mask is true. Masked-off lanes are poison.

Examples:

%r = call <4 x float> @llvm.vp.uitofp.v4f32.v4i32(<4 x i32> %a, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = uitofp <4 x i32> %a to <4 x float>
%also.r = select <4 x i1> %mask, <4 x float> %t, <4 x float> poison

‘llvm.vp.sitofp.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x float>  @llvm.vp.sitofp.v16f32.v16i32 (<16 x i32> <op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x float>  @llvm.vp.sitofp.nxv4f32.nxv4i32 (<vscale x 4 x i32> <op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x double>  @llvm.vp.sitofp.v256f64.v256i64 (<256 x i64> <op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

The ‘llvm.vp.sitofp’ intrinsic converts its signed integer argument to the floating-point return type. The operation has a mask and an explicit vector length parameter.

Arguments:

The ‘llvm.vp.sitofp’ intrinsic takes a value to cast as its first argument. The value to cast must be vector of integer type. The return type is the type to cast the value to. The return type must be a vector of floating-point type. The second argument is the vector mask. The return type, the value to cast, and the vector mask have the same number of elements. The third argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.sitofp’ intrinsic interprets its first argument as a signed integer quantity and converts it to the corresponding floating-point value. If the value cannot be exactly represented, it is rounded using the default rounding mode. The conversion is performed on lane positions below the explicit vector length and where the vector mask is true. Masked-off lanes are poison.

Examples:

%r = call <4 x float> @llvm.vp.sitofp.v4f32.v4i32(<4 x i32> %a, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = sitofp <4 x i32> %a to <4 x float>
%also.r = select <4 x i1> %mask, <4 x float> %t, <4 x float> poison

‘llvm.vp.ptrtoint.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x i8>  @llvm.vp.ptrtoint.v16i8.v16p0(<16 x ptr> <op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x i8>  @llvm.vp.ptrtoint.nxv4i8.nxv4p0(<vscale x 4 x ptr> <op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x i64>  @llvm.vp.ptrtoint.v16i64.v16p0(<256 x ptr> <op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

The ‘llvm.vp.ptrtoint’ intrinsic converts its pointer to the integer return type. The operation has a mask and an explicit vector length parameter.

Arguments:

The ‘llvm.vp.ptrtoint’ intrinsic takes a value to cast as its first argument , which must be a vector of pointers, and a type to cast it to return type, which must be a vector of integer type. The second argument is the vector mask. The return type, the value to cast, and the vector mask have the same number of elements. The third argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.ptrtoint’ intrinsic converts value to return type by interpreting the pointer value as an integer and either truncating or zero extending that value to the size of the integer type. If value is smaller than return type, then a zero extension is done. If value is larger than return type, then a truncation is done. If they are the same size, then nothing is done (no-op cast) other than a type change. The conversion is performed on lane positions below the explicit vector length and where the vector mask is true. Masked-off lanes are poison.

Examples:

%r = call <4 x i8> @llvm.vp.ptrtoint.v4i8.v4p0i32(<4 x ptr> %a, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = ptrtoint <4 x ptr> %a to <4 x i8>
%also.r = select <4 x i1> %mask, <4 x i8> %t, <4 x i8> poison

‘llvm.vp.inttoptr.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x ptr>  @llvm.vp.inttoptr.v16p0.v16i32 (<16 x i32> <op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x ptr>  @llvm.vp.inttoptr.nxv4p0.nxv4i32 (<vscale x 4 x i32> <op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x ptr>  @llvm.vp.inttoptr.v256p0.v256i32 (<256 x i32> <op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

The ‘llvm.vp.inttoptr’ intrinsic converts its integer value to the point return type. The operation has a mask and an explicit vector length parameter.

Arguments:

The ‘llvm.vp.inttoptr’ intrinsic takes a value to cast as its first argument , which must be a vector of integer type, and a type to cast it to return type, which must be a vector of pointers type. The second argument is the vector mask. The return type, the value to cast, and the vector mask have the same number of elements. The third argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.inttoptr’ intrinsic converts value to return type by applying either a zero extension or a truncation depending on the size of the integer value. If value is larger than the size of a pointer, then a truncation is done. If value is smaller than the size of a pointer, then a zero extension is done. If they are the same size, nothing is done (no-op cast). The conversion is performed on lane positions below the explicit vector length and where the vector mask is true. Masked-off lanes are poison.

Examples:

%r = call <4 x ptr> @llvm.vp.inttoptr.v4p0i32.v4i32(<4 x i32> %a, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = inttoptr <4 x i32> %a to <4 x ptr>
%also.r = select <4 x i1> %mask, <4 x ptr> %t, <4 x ptr> poison

‘llvm.vp.fcmp.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x i1> @llvm.vp.fcmp.v16f32(<16 x float> <left_op>, <16 x float> <right_op>, metadata <condition code>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x i1> @llvm.vp.fcmp.nxv4f32(<vscale x 4 x float> <left_op>, <vscale x 4 x float> <right_op>, metadata <condition code>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x i1> @llvm.vp.fcmp.v256f64(<256 x double> <left_op>, <256 x double> <right_op>, metadata <condition code>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

The ‘llvm.vp.fcmp’ intrinsic returns a vector of boolean values based on the comparison of its arguments. The operation has a mask and an explicit vector length parameter.

Arguments:

The ‘llvm.vp.fcmp’ intrinsic takes the two values to compare as its first and second arguments. These two values must be vectors of floating-point types. The return type is the result of the comparison. The return type must be a vector of i1 type. The fourth argument is the vector mask. The return type, the values to compare, and the vector mask have the same number of elements. The third argument is the condition code indicating the kind of comparison to perform. It must be a metadata string with one of the supported floating-point condition code values. The fifth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.fcmp’ compares its first two arguments according to the condition code given as the third argument. The arguments are compared element by element on each enabled lane, where the semantics of the comparison are defined according to the condition code. Masked-off lanes are poison.

Examples:

%r = call <4 x i1> @llvm.vp.fcmp.v4f32(<4 x float> %a, <4 x float> %b, metadata !"oeq", <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = fcmp oeq <4 x float> %a, %b
%also.r = select <4 x i1> %mask, <4 x i1> %t, <4 x i1> poison

‘llvm.vp.icmp.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <32 x i1> @llvm.vp.icmp.v32i32(<32 x i32> <left_op>, <32 x i32> <right_op>, metadata <condition code>, <32 x i1> <mask>, i32 <vector_length>)
declare <vscale x 2 x i1> @llvm.vp.icmp.nxv2i32(<vscale x 2 x i32> <left_op>, <vscale x 2 x i32> <right_op>, metadata <condition code>, <vscale x 2 x i1> <mask>, i32 <vector_length>)
declare <128 x i1> @llvm.vp.icmp.v128i8(<128 x i8> <left_op>, <128 x i8> <right_op>, metadata <condition code>, <128 x i1> <mask>, i32 <vector_length>)

Overview:

The ‘llvm.vp.icmp’ intrinsic returns a vector of boolean values based on the comparison of its arguments. The operation has a mask and an explicit vector length parameter.

Arguments:

The ‘llvm.vp.icmp’ intrinsic takes the two values to compare as its first and second arguments. These two values must be vectors of integer types. The return type is the result of the comparison. The return type must be a vector of i1 type. The fourth argument is the vector mask. The return type, the values to compare, and the vector mask have the same number of elements. The third argument is the condition code indicating the kind of comparison to perform. It must be a metadata string with one of the supported integer condition code values. The fifth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.icmp’ compares its first two arguments according to the condition code given as the third argument. The arguments are compared element by element on each enabled lane, where the semantics of the comparison are defined according to the condition code. Masked-off lanes are poison.

Examples:

%r = call <4 x i1> @llvm.vp.icmp.v4i32(<4 x i32> %a, <4 x i32> %b, metadata !"ne", <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = icmp ne <4 x i32> %a, %b
%also.r = select <4 x i1> %mask, <4 x i1> %t, <4 x i1> poison

‘llvm.vp.ceil.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x float>  @llvm.vp.ceil.v16f32 (<16 x float> <op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x float>  @llvm.vp.ceil.nxv4f32 (<vscale x 4 x float> <op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x double>  @llvm.vp.ceil.v256f64 (<256 x double> <op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated floating-point ceiling of a vector of floating-point values.

Arguments:

The first argument and the result have the same vector of floating-point type. The second argument is the vector mask and has the same number of elements as the result vector type. The third argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.ceil’ intrinsic performs floating-point ceiling (ceil) of the first vector argument on each enabled lane. The result on disabled lanes is a poison value.

Examples:

%r = call <4 x float> @llvm.vp.ceil.v4f32(<4 x float> %a, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = call <4 x float> @llvm.ceil.v4f32(<4 x float> %a)
%also.r = select <4 x i1> %mask, <4 x float> %t, <4 x float> poison

‘llvm.vp.floor.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x float>  @llvm.vp.floor.v16f32 (<16 x float> <op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x float>  @llvm.vp.floor.nxv4f32 (<vscale x 4 x float> <op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x double>  @llvm.vp.floor.v256f64 (<256 x double> <op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated floating-point floor of a vector of floating-point values.

Arguments:

The first argument and the result have the same vector of floating-point type. The second argument is the vector mask and has the same number of elements as the result vector type. The third argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.floor’ intrinsic performs floating-point floor (floor) of the first vector argument on each enabled lane. The result on disabled lanes is a poison value.

Examples:

%r = call <4 x float> @llvm.vp.floor.v4f32(<4 x float> %a, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = call <4 x float> @llvm.floor.v4f32(<4 x float> %a)
%also.r = select <4 x i1> %mask, <4 x float> %t, <4 x float> poison

‘llvm.vp.rint.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x float>  @llvm.vp.rint.v16f32 (<16 x float> <op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x float>  @llvm.vp.rint.nxv4f32 (<vscale x 4 x float> <op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x double>  @llvm.vp.rint.v256f64 (<256 x double> <op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated floating-point rint of a vector of floating-point values.

Arguments:

The first argument and the result have the same vector of floating-point type. The second argument is the vector mask and has the same number of elements as the result vector type. The third argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.rint’ intrinsic performs floating-point rint (rint) of the first vector argument on each enabled lane. The result on disabled lanes is a poison value.

Examples:

%r = call <4 x float> @llvm.vp.rint.v4f32(<4 x float> %a, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = call <4 x float> @llvm.rint.v4f32(<4 x float> %a)
%also.r = select <4 x i1> %mask, <4 x float> %t, <4 x float> poison

‘llvm.vp.nearbyint.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x float>  @llvm.vp.nearbyint.v16f32 (<16 x float> <op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x float>  @llvm.vp.nearbyint.nxv4f32 (<vscale x 4 x float> <op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x double>  @llvm.vp.nearbyint.v256f64 (<256 x double> <op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated floating-point nearbyint of a vector of floating-point values.

Arguments:

The first argument and the result have the same vector of floating-point type. The second argument is the vector mask and has the same number of elements as the result vector type. The third argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.nearbyint’ intrinsic performs floating-point nearbyint (nearbyint) of the first vector argument on each enabled lane. The result on disabled lanes is a poison value.

Examples:

%r = call <4 x float> @llvm.vp.nearbyint.v4f32(<4 x float> %a, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = call <4 x float> @llvm.nearbyint.v4f32(<4 x float> %a)
%also.r = select <4 x i1> %mask, <4 x float> %t, <4 x float> poison

‘llvm.vp.round.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x float>  @llvm.vp.round.v16f32 (<16 x float> <op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x float>  @llvm.vp.round.nxv4f32 (<vscale x 4 x float> <op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x double>  @llvm.vp.round.v256f64 (<256 x double> <op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated floating-point round of a vector of floating-point values.

Arguments:

The first argument and the result have the same vector of floating-point type. The second argument is the vector mask and has the same number of elements as the result vector type. The third argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.round’ intrinsic performs floating-point round (round) of the first vector argument on each enabled lane. The result on disabled lanes is a poison value.

Examples:

%r = call <4 x float> @llvm.vp.round.v4f32(<4 x float> %a, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = call <4 x float> @llvm.round.v4f32(<4 x float> %a)
%also.r = select <4 x i1> %mask, <4 x float> %t, <4 x float> poison

‘llvm.vp.roundeven.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x float>  @llvm.vp.roundeven.v16f32 (<16 x float> <op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x float>  @llvm.vp.roundeven.nxv4f32 (<vscale x 4 x float> <op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x double>  @llvm.vp.roundeven.v256f64 (<256 x double> <op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated floating-point roundeven of a vector of floating-point values.

Arguments:

The first argument and the result have the same vector of floating-point type. The second argument is the vector mask and has the same number of elements as the result vector type. The third argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.roundeven’ intrinsic performs floating-point roundeven (roundeven) of the first vector argument on each enabled lane. The result on disabled lanes is a poison value.

Examples:

%r = call <4 x float> @llvm.vp.roundeven.v4f32(<4 x float> %a, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = call <4 x float> @llvm.roundeven.v4f32(<4 x float> %a)
%also.r = select <4 x i1> %mask, <4 x float> %t, <4 x float> poison

‘llvm.vp.roundtozero.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x float>  @llvm.vp.roundtozero.v16f32 (<16 x float> <op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x float>  @llvm.vp.roundtozero.nxv4f32 (<vscale x 4 x float> <op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x double>  @llvm.vp.roundtozero.v256f64 (<256 x double> <op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated floating-point round-to-zero of a vector of floating-point values.

Arguments:

The first argument and the result have the same vector of floating-point type. The second argument is the vector mask and has the same number of elements as the result vector type. The third argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.roundtozero’ intrinsic performs floating-point roundeven (llvm.trunc) of the first vector argument on each enabled lane. The result on disabled lanes is a poison value.

Examples:

%r = call <4 x float> @llvm.vp.roundtozero.v4f32(<4 x float> %a, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = call <4 x float> @llvm.trunc.v4f32(<4 x float> %a)
%also.r = select <4 x i1> %mask, <4 x float> %t, <4 x float> poison

‘llvm.vp.lrint.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x i32> @llvm.vp.lrint.v16i32.v16f32(<16 x float> <op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x i32> @llvm.vp.lrint.nxv4i32.nxv4f32(<vscale x 4 x float> <op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x i64> @llvm.vp.lrint.v256i64.v256f64(<256 x double> <op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated lrint of a vector of floating-point values.

Arguments:

The result is an integer vector and the first argument is a vector of floating-point type with the same number of elements as the result vector type. The second argument is the vector mask and has the same number of elements as the result vector type. The third argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.lrint’ intrinsic performs lrint (lrint) of the first vector argument on each enabled lane. The result on disabled lanes is a poison value.

Examples:

%r = call <4 x i32> @llvm.vp.lrint.v4i32.v4f32(<4 x float> %a, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = call <4 x i32> @llvm.lrint.v4f32(<4 x float> %a)
%also.r = select <4 x i1> %mask, <4 x i32> %t, <4 x i32> poison

‘llvm.vp.llrint.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x i32> @llvm.vp.llrint.v16i32.v16f32(<16 x float> <op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x i32> @llvm.vp.llrint.nxv4i32.nxv4f32(<vscale x 4 x float> <op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x i64> @llvm.vp.llrint.v256i64.v256f64(<256 x double> <op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated llrint of a vector of floating-point values.

Arguments:

The result is an integer vector and the first argument is a vector of floating-point type with the same number of elements as the result vector type. The second argument is the vector mask and has the same number of elements as the result vector type. The third argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.llrint’ intrinsic performs lrint (llrint) of the first vector argument on each enabled lane. The result on disabled lanes is a poison value.

Examples:

%r = call <4 x i32> @llvm.vp.llrint.v4i32.v4f32(<4 x float> %a, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = call <4 x i32> @llvm.llrint.v4f32(<4 x float> %a)
%also.r = select <4 x i1> %mask, <4 x i32> %t, <4 x i32> poison

‘llvm.vp.bitreverse.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x i32>  @llvm.vp.bitreverse.v16i32 (<16 x i32> <op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x i32>  @llvm.vp.bitreverse.nxv4i32 (<vscale x 4 x i32> <op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x i64>  @llvm.vp.bitreverse.v256i64 (<256 x i64> <op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated bitreverse of a vector of integers.

Arguments:

The first argument and the result have the same vector of integer type. The second argument is the vector mask and has the same number of elements as the result vector type. The third argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.bitreverse’ intrinsic performs bitreverse (bitreverse) of the first argument on each enabled lane. The result on disabled lanes is a poison value.

Examples:

%r = call <4 x i32> @llvm.vp.bitreverse.v4i32(<4 x i32> %a, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = call <4 x i32> @llvm.bitreverse.v4i32(<4 x i32> %a)
%also.r = select <4 x i1> %mask, <4 x i32> %t, <4 x i32> poison

‘llvm.vp.bswap.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x i32>  @llvm.vp.bswap.v16i32 (<16 x i32> <op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x i32>  @llvm.vp.bswap.nxv4i32 (<vscale x 4 x i32> <op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x i64>  @llvm.vp.bswap.v256i64 (<256 x i64> <op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated bswap of a vector of integers.

Arguments:

The first argument and the result have the same vector of integer type. The second argument is the vector mask and has the same number of elements as the result vector type. The third argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.bswap’ intrinsic performs bswap (bswap) of the first argument on each enabled lane. The result on disabled lanes is a poison value.

Examples:

%r = call <4 x i32> @llvm.vp.bswap.v4i32(<4 x i32> %a, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %a)
%also.r = select <4 x i1> %mask, <4 x i32> %t, <4 x i32> poison

‘llvm.vp.ctpop.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x i32>  @llvm.vp.ctpop.v16i32 (<16 x i32> <op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x i32>  @llvm.vp.ctpop.nxv4i32 (<vscale x 4 x i32> <op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x i64>  @llvm.vp.ctpop.v256i64 (<256 x i64> <op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated ctpop of a vector of integers.

Arguments:

The first argument and the result have the same vector of integer type. The second argument is the vector mask and has the same number of elements as the result vector type. The third argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.ctpop’ intrinsic performs ctpop (ctpop) of the first argument on each enabled lane. The result on disabled lanes is a poison value.

Examples:

%r = call <4 x i32> @llvm.vp.ctpop.v4i32(<4 x i32> %a, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %a)
%also.r = select <4 x i1> %mask, <4 x i32> %t, <4 x i32> poison

‘llvm.vp.ctlz.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x i32>  @llvm.vp.ctlz.v16i32 (<16 x i32> <op>, i1 <is_zero_poison>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x i32>  @llvm.vp.ctlz.nxv4i32 (<vscale x 4 x i32> <op>, i1 <is_zero_poison>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x i64>  @llvm.vp.ctlz.v256i64 (<256 x i64> <op>, i1 <is_zero_poison>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated ctlz of a vector of integers.

Arguments:

The first argument and the result have the same vector of integer type. The second argument is a constant flag that indicates whether the intrinsic returns a valid result if the first argument is zero. The third argument is the vector mask and has the same number of elements as the result vector type. the fourth argument is the explicit vector length of the operation. If the first argument is zero and the second argument is true, the result is poison.

Semantics:

The ‘llvm.vp.ctlz’ intrinsic performs ctlz (ctlz) of the first argument on each enabled lane. The result on disabled lanes is a poison value.

Examples:

%r = call <4 x i32> @llvm.vp.ctlz.v4i32(<4 x i32> %a, i1 false, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %a, i1 false)
%also.r = select <4 x i1> %mask, <4 x i32> %t, <4 x i32> poison

‘llvm.vp.cttz.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x i32>  @llvm.vp.cttz.v16i32 (<16 x i32> <op>, i1 <is_zero_poison>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x i32>  @llvm.vp.cttz.nxv4i32 (<vscale x 4 x i32> <op>, i1 <is_zero_poison>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x i64>  @llvm.vp.cttz.v256i64 (<256 x i64> <op>, i1 <is_zero_poison>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated cttz of a vector of integers.

Arguments:

The first argument and the result have the same vector of integer type. The second argument is a constant flag that indicates whether the intrinsic returns a valid result if the first argument is zero. The third argument is the vector mask and has the same number of elements as the result vector type. The fourth argument is the explicit vector length of the operation. If the first argument is zero and the second argument is true, the result is poison.

Semantics:

The ‘llvm.vp.cttz’ intrinsic performs cttz (cttz) of the first argument on each enabled lane. The result on disabled lanes is a poison value.

Examples:

%r = call <4 x i32> @llvm.vp.cttz.v4i32(<4 x i32> %a, i1 false, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = call <4 x i32> @llvm.cttz.v4i32(<4 x i32> %a, i1 false)
%also.r = select <4 x i1> %mask, <4 x i32> %t, <4 x i32> poison

‘llvm.vp.cttz.elts.*’ Intrinsics

Syntax:

This is an overloaded intrinsic. You can use `llvm.vp.cttz.elts` on any vector of integer elements, both fixed width and scalable.

declare i32  @llvm.vp.cttz.elts.i32.v16i32 (<16 x i32> <op>, i1 <is_zero_poison>, <16 x i1> <mask>, i32 <vector_length>)
declare i64  @llvm.vp.cttz.elts.i64.nxv4i32 (<vscale x 4 x i32> <op>, i1 <is_zero_poison>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare i64  @llvm.vp.cttz.elts.i64.v256i1 (<256 x i1> <op>, i1 <is_zero_poison>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

This ‘`llvm.vp.cttz.elts`’ intrinsic counts the number of trailing zero elements of a vector. This is basically the vector-predicated version of ‘`llvm.experimental.cttz.elts`’.

Arguments:

The first argument is the vector to be counted. This argument must be a vector with integer element type. The return type must also be an integer type which is wide enough to hold the maximum number of elements of the source vector. The behavior of this intrinsic is undefined if the return type is not wide enough for the number of elements in the input vector.

The second argument is a constant flag that indicates whether the intrinsic returns a valid result if the first argument is all zero.

The third argument is the vector mask and has the same number of elements as the input vector type. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.cttz.elts’ intrinsic counts the trailing (least significant / lowest-numbered) zero elements in the first argument on each enabled lane. If the first argument is all zero and the second argument is true, the result is poison. Otherwise, it returns the explicit vector length (i.e. the fourth argument).

‘llvm.vp.sadd.sat.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x i32>  @llvm.vp.sadd.sat.v16i32 (<16 x i32> <left_op> <16 x i32> <right_op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x i32>  @llvm.vp.sadd.sat.nxv4i32 (<vscale x 4 x i32> <left_op>, <vscale x 4 x i32> <right_op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x i64>  @llvm.vp.sadd.sat.v256i64 (<256 x i64> <left_op>, <256 x i64> <right_op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated signed saturating addition of two vectors of integers.

Arguments:

The first two arguments and the result have the same vector of integer type. The third argument is the vector mask and has the same number of elements as the result vector type. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.sadd.sat’ intrinsic performs sadd.sat (sadd.sat) of the first and second vector arguments on each enabled lane. The result on disabled lanes is a poison value.

Examples:

%r = call <4 x i32> @llvm.vp.sadd.sat.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = call <4 x i32> @llvm.sadd.sat.v4i32(<4 x i32> %a, <4 x i32> %b)
%also.r = select <4 x i1> %mask, <4 x i32> %t, <4 x i32> poison

‘llvm.vp.uadd.sat.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x i32>  @llvm.vp.uadd.sat.v16i32 (<16 x i32> <left_op> <16 x i32> <right_op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x i32>  @llvm.vp.uadd.sat.nxv4i32 (<vscale x 4 x i32> <left_op>, <vscale x 4 x i32> <right_op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x i64>  @llvm.vp.uadd.sat.v256i64 (<256 x i64> <left_op>, <256 x i64> <right_op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated unsigned saturating addition of two vectors of integers.

Arguments:

The first two arguments and the result have the same vector of integer type. The third argument is the vector mask and has the same number of elements as the result vector type. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.uadd.sat’ intrinsic performs uadd.sat (uadd.sat) of the first and second vector arguments on each enabled lane. The result on disabled lanes is a poison value.

Examples:

%r = call <4 x i32> @llvm.vp.uadd.sat.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = call <4 x i32> @llvm.uadd.sat.v4i32(<4 x i32> %a, <4 x i32> %b)
%also.r = select <4 x i1> %mask, <4 x i32> %t, <4 x i32> poison

‘llvm.vp.ssub.sat.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x i32>  @llvm.vp.ssub.sat.v16i32 (<16 x i32> <left_op> <16 x i32> <right_op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x i32>  @llvm.vp.ssub.sat.nxv4i32 (<vscale x 4 x i32> <left_op>, <vscale x 4 x i32> <right_op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x i64>  @llvm.vp.ssub.sat.v256i64 (<256 x i64> <left_op>, <256 x i64> <right_op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated signed saturating subtraction of two vectors of integers.

Arguments:

The first two arguments and the result have the same vector of integer type. The third argument is the vector mask and has the same number of elements as the result vector type. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.ssub.sat’ intrinsic performs ssub.sat (ssub.sat) of the first and second vector arguments on each enabled lane. The result on disabled lanes is a poison value.

Examples:

%r = call <4 x i32> @llvm.vp.ssub.sat.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = call <4 x i32> @llvm.ssub.sat.v4i32(<4 x i32> %a, <4 x i32> %b)
%also.r = select <4 x i1> %mask, <4 x i32> %t, <4 x i32> poison

‘llvm.vp.usub.sat.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x i32>  @llvm.vp.usub.sat.v16i32 (<16 x i32> <left_op> <16 x i32> <right_op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x i32>  @llvm.vp.usub.sat.nxv4i32 (<vscale x 4 x i32> <left_op>, <vscale x 4 x i32> <right_op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x i64>  @llvm.vp.usub.sat.v256i64 (<256 x i64> <left_op>, <256 x i64> <right_op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated unsigned saturating subtraction of two vectors of integers.

Arguments:

The first two arguments and the result have the same vector of integer type. The third argument is the vector mask and has the same number of elements as the result vector type. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.usub.sat’ intrinsic performs usub.sat (usub.sat) of the first and second vector arguments on each enabled lane. The result on disabled lanes is a poison value.

Examples:

%r = call <4 x i32> @llvm.vp.usub.sat.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = call <4 x i32> @llvm.usub.sat.v4i32(<4 x i32> %a, <4 x i32> %b)
%also.r = select <4 x i1> %mask, <4 x i32> %t, <4 x i32> poison

‘llvm.vp.fshl.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x i32>  @llvm.vp.fshl.v16i32 (<16 x i32> <left_op>, <16 x i32> <middle_op>, <16 x i32> <right_op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x i32>  @llvm.vp.fshl.nxv4i32  (<vscale x 4 x i32> <left_op>, <vscale x 4 x i32> <middle_op>, <vscale x 4 x i32> <right_op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x i64>  @llvm.vp.fshl.v256i64 (<256 x i64> <left_op>, <256 x i64> <middle_op>, <256 x i64> <right_op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated fshl of three vectors of integers.

Arguments:

The first three arguments and the result have the same vector of integer type. The fourth argument is the vector mask and has the same number of elements as the result vector type. The fifth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.fshl’ intrinsic performs fshl (fshl) of the first, second, and third vector argument on each enabled lane. The result on disabled lanes is a poison value.

Examples:

%r = call <4 x i32> @llvm.vp.fshl.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = call <4 x i32> @llvm.fshl.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c)
%also.r = select <4 x i1> %mask, <4 x i32> %t, <4 x i32> poison

‘llvm.vp.fshr.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <16 x i32>  @llvm.vp.fshr.v16i32 (<16 x i32> <left_op>, <16 x i32> <middle_op>, <16 x i32> <right_op>, <16 x i1> <mask>, i32 <vector_length>)
declare <vscale x 4 x i32>  @llvm.vp.fshr.nxv4i32  (<vscale x 4 x i32> <left_op>, <vscale x 4 x i32> <middle_op>, <vscale x 4 x i32> <right_op>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
declare <256 x i64>  @llvm.vp.fshr.v256i64 (<256 x i64> <left_op>, <256 x i64> <middle_op>, <256 x i64> <right_op>, <256 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated fshr of three vectors of integers.

Arguments:

The first three arguments and the result have the same vector of integer type. The fourth argument is the vector mask and has the same number of elements as the result vector type. The fifth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.fshr’ intrinsic performs fshr (fshr) of the first, second, and third vector argument on each enabled lane. The result on disabled lanes is a poison value.

Examples:

%r = call <4 x i32> @llvm.vp.fshr.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c, <4 x i1> %mask, i32 %evl)
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r

%t = call <4 x i32> @llvm.fshr.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c)
%also.r = select <4 x i1> %mask, <4 x i32> %t, <4 x i32> poison

‘llvm.vp.is.fpclass.*’ Intrinsics

Syntax:

This is an overloaded intrinsic.

declare <vscale x 2 x i1> @llvm.vp.is.fpclass.nxv2f32(<vscale x 2 x float> <op>, i32 <test>, <vscale x 2 x i1> <mask>, i32 <vector_length>)
declare <2 x i1> @llvm.vp.is.fpclass.v2f16(<2 x half> <op>, i32 <test>, <2 x i1> <mask>, i32 <vector_length>)

Overview:

Predicated llvm.is.fpclass llvm.is.fpclass

Arguments:

The first argument is a floating-point vector, the result type is a vector of boolean with the same number of elements as the first argument. The second argument specifies, which tests to perform llvm.is.fpclass. The third argument is the vector mask and has the same number of elements as the result vector type. The fourth argument is the explicit vector length of the operation.

Semantics:

The ‘llvm.vp.is.fpclass’ intrinsic performs llvm.is.fpclass (llvm.is.fpclass).

Examples:

%r = call <2 x i1> @llvm.vp.is.fpclass.v2f16(<2 x half> %x, i32 3, <2 x i1> %m, i32 %evl)
%t = call <vscale x 2 x i1> @llvm.vp.is.fpclass.nxv2f16(<vscale x 2 x half> %x, i32 3, <vscale x 2 x i1> %m, i32 %evl)

Masked Vector Load and Store Intrinsics

LLVM provides intrinsics for predicated vector load and store operations. The predicate is specified by a mask argument, which holds one bit per vector element, switching the associated vector lane on or off. The memory addresses corresponding to the “off” lanes are not accessed. When all bits of the mask are on, the intrinsic is identical to a regular vector load or store. When all bits are off, no memory is accessed.

‘llvm.masked.load.*’ Intrinsics

Syntax:

This is an overloaded intrinsic. The loaded data is a vector of any integer, floating-point or pointer data type.

declare <16 x float>  @llvm.masked.load.v16f32.p0(ptr <ptr>, i32 <alignment>, <16 x i1> <mask>, <16 x float> <passthru>)
declare <2 x double>  @llvm.masked.load.v2f64.p0(ptr <ptr>, i32 <alignment>, <2 x i1>  <mask>, <2 x double> <passthru>)
;; The data is a vector of pointers
declare <8 x ptr> @llvm.masked.load.v8p0.p0(ptr <ptr>, i32 <alignment>, <8 x i1> <mask>, <8 x ptr> <passthru>)

Overview:

Reads a vector from memory according to the provided mask. The mask holds a bit for each vector lane, and is used to prevent memory accesses to the masked-off lanes. The masked-off lanes in the result vector are taken from the corresponding lanes of the ‘passthru’ argument.

Arguments:

The first argument is the base pointer for the load. The second argument is the alignment of the source location. It must be a power of two constant integer value. The third argument, mask, is a vector of boolean values with the same number of elements as the return type. The fourth is a pass-through value that is used to fill the masked-off lanes of the result. The return type, underlying type of the base pointer and the type of the ‘passthru’ argument are the same vector types.

Semantics:

The ‘llvm.masked.load’ intrinsic is designed for conditional reading of selected vector elements in a single IR operation. It is useful for targets that support vector masked loads and allows vectorizing predicated basic blocks on these targets. Other targets may support this intrinsic differently, for example by lowering it into a sequence of branches that guard scalar load operations. The result of this operation is equivalent to a regular vector load instruction followed by a ‘select’ between the loaded and the passthru values, predicated on the same mask, except that the masked-off lanes are not accessed. Only the masked-on lanes of the vector need to be inbounds of an allocation (but all these lanes need to be inbounds of the same allocation). In particular, using this intrinsic prevents exceptions on memory accesses to masked-off lanes. Masked-off lanes are also not considered accessed for the purpose of data races or noalias constraints.

%res = call <16 x float> @llvm.masked.load.v16f32.p0(ptr %ptr, i32 4, <16 x i1>%mask, <16 x float> %passthru)

;; The result of the two following instructions is identical aside from potential memory access exception
%loadlal = load <16 x float>, ptr %ptr, align 4
%res = select <16 x i1> %mask, <16 x float> %loadlal, <16 x float> %passthru

‘llvm.masked.store.*’ Intrinsics

Syntax:

This is an overloaded intrinsic. The data stored in memory is a vector of any integer, floating-point or pointer data type.

declare void @llvm.masked.store.v8i32.p0 (<8  x i32>   <value>, ptr <ptr>, i32 <alignment>, <8  x i1> <mask>)
declare void @llvm.masked.store.v16f32.p0(<16 x float> <value>, ptr <ptr>, i32 <alignment>, <16 x i1> <mask>)
;; The data is a vector of pointers
declare void @llvm.masked.store.v8p0.p0  (<8 x ptr>    <value>, ptr <ptr>, i32 <alignment>, <8 x i1> <mask>)

Overview:

Writes a vector to memory according to the provided mask. The mask holds a bit for each vector lane, and is used to prevent memory accesses to the masked-off lanes.

Arguments:

The first argument is the vector value to be written to memory. The second argument is the base pointer for the store, it has the same underlying type as the value argument. The third argument is the alignment of the destination location. It must be a power of two constant integer value. The fourth argument, mask, is a vector of boolean values. The types of the mask and the value argument must have the same number of vector elements.

Semantics:

The ‘llvm.masked.store’ intrinsics is designed for conditional writing of selected vector elements in a single IR operation. It is useful for targets that support vector masked store and allows vectorizing predicated basic blocks on these targets. Other targets may support this intrinsic differently, for example by lowering it into a sequence of branches that guard scalar store operations. The result of this operation is equivalent to a load-modify-store sequence, except that the masked-off lanes are not accessed. Only the masked-on lanes of the vector need to be inbounds of an allocation (but all these lanes need to be inbounds of the same allocation). In particular, using this intrinsic prevents exceptions on memory accesses to masked-off lanes. Masked-off lanes are also not considered accessed for the purpose of data races or noalias constraints.

call void @llvm.masked.store.v16f32.p0(<16 x float> %value, ptr %ptr, i32 4,  <16 x i1> %mask)

;; The result of the following instructions is identical aside from potential data races and memory access exceptions
%oldval = load <16 x float>, ptr %ptr, align 4
%res = select <16 x i1> %mask, <16 x float> %value, <16 x float> %oldval
store <16 x float> %res, ptr %ptr, align 4

Masked Vector Gather and Scatter Intrinsics

LLVM provides intrinsics for vector gather and scatter operations. They are similar to Masked Vector Load and Store, except they are designed for arbitrary memory accesses, rather than sequential memory accesses. Gather and scatter also employ a mask argument, which holds one bit per vector element, switching the associated vector lane on or off. The memory addresses corresponding to the “off” lanes are not accessed. When all bits are off, no memory is accessed.

‘llvm.masked.gather.*’ Intrinsics

Syntax:

This is an overloaded intrinsic. The loaded data are multiple scalar values of any integer, floating-point or pointer data type gathered together into one vector.

declare <16 x float> @llvm.masked.gather.v16f32.v16p0(<16 x ptr> <ptrs>, i32 <alignment>, <16 x i1> <mask>, <16 x float> <passthru>)
declare <2 x double> @llvm.masked.gather.v2f64.v2p1(<2 x ptr addrspace(1)> <ptrs>, i32 <alignment>, <2 x i1>  <mask>, <2 x double> <passthru>)
declare <8 x ptr> @llvm.masked.gather.v8p0.v8p0(<8 x ptr> <ptrs>, i32 <alignment>, <8 x i1>  <mask>, <8 x ptr> <passthru>)

Overview:

Reads scalar values from arbitrary memory locations and gathers them into one vector. The memory locations are provided in the vector of pointers ‘ptrs’. The memory is accessed according to the provided mask. The mask holds a bit for each vector lane, and is used to prevent memory accesses to the masked-off lanes. The masked-off lanes in the result vector are taken from the corresponding lanes of the ‘passthru’ argument.

Arguments:

The first argument is a vector of pointers which holds all memory addresses to read. The second argument is an alignment of the source addresses. It must be 0 or a power of two constant integer value. The third argument, mask, is a vector of boolean values with the same number of elements as the return type. The fourth is a pass-through value that is used to fill the masked-off lanes of the result. The return type, underlying type of the vector of pointers and the type of the ‘passthru’ argument are the same vector types.

Semantics:

The ‘llvm.masked.gather’ intrinsic is designed for conditional reading of multiple scalar values from arbitrary memory locations in a single IR operation. It is useful for targets that support vector masked gathers and allows vectorizing basic blocks with data and control divergence. Other targets may support this intrinsic differently, for example by lowering it into a sequence of scalar load operations. The semantics of this operation are equivalent to a sequence of conditional scalar loads with subsequent gathering all loaded values into a single vector. The mask restricts memory access to certain lanes and facilitates vectorization of predicated basic blocks.

%res = call <4 x double> @llvm.masked.gather.v4f64.v4p0(<4 x ptr> %ptrs, i32 8, <4 x i1> <i1 true, i1 true, i1 true, i1 true>, <4 x double> poison)

;; The gather with all-true mask is equivalent to the following instruction sequence
%ptr0 = extractelement <4 x ptr> %ptrs, i32 0
%ptr1 = extractelement <4 x ptr> %ptrs, i32 1
%ptr2 = extractelement <4 x ptr> %ptrs, i32 2
%ptr3 = extractelement <4 x ptr> %ptrs, i32 3

%val0 = load double, ptr %ptr0, align 8
%val1 = load double, ptr %ptr1, align 8
%val2 = load double, ptr %ptr2, align 8
%val3 = load double, ptr %ptr3, align 8

%vec0    = insertelement <4 x double> poison, %val0, 0
%vec01   = insertelement <4 x double> %vec0, %val1, 1
%vec012  = insertelement <4 x double> %vec01, %val2, 2
%vec0123 = insertelement <4 x double> %vec012, %val3, 3

‘llvm.masked.scatter.*’ Intrinsics

Syntax:

This is an overloaded intrinsic. The data stored in memory is a vector of any integer, floating-point or pointer data type. Each vector element is stored in an arbitrary memory address. Scatter with overlapping addresses is guaranteed to be ordered from least-significant to most-significant element.

declare void @llvm.masked.scatter.v8i32.v8p0  (<8 x i32>    <value>, <8 x ptr>               <ptrs>, i32 <alignment>, <8 x i1>  <mask>)
declare void @llvm.masked.scatter.v16f32.v16p1(<16 x float> <value>, <16 x ptr addrspace(1)> <ptrs>, i32 <alignment>, <16 x i1> <mask>)
declare void @llvm.masked.scatter.v4p0.v4p0   (<4 x ptr>    <value>, <4 x ptr>               <ptrs>, i32 <alignment>, <4 x i1>  <mask>)

Overview:

Writes each element from the value vector to the corresponding memory address. The memory addresses are represented as a vector of pointers. Writing is done according to the provided mask. The mask holds a bit for each vector lane, and is used to prevent memory accesses to the masked-off lanes.

Arguments:

The first argument is a vector value to be written to memory. The second argument is a vector of pointers, pointing to where the value elements should be stored. It has the same underlying type as the value argument. The third argument is an alignment of the destination addresses. It must be 0 or a power of two constant integer value. The fourth argument, mask, is a vector of boolean values. The types of the mask and the value argument must have the same number of vector elements.

Semantics:

The ‘llvm.masked.scatter’ intrinsics is designed for writing selected vector elements to arbitrary memory addresses in a single IR operation. The operation may be conditional, when not all bits in the mask are switched on. It is useful for targets that support vector masked scatter and allows vectorizing basic blocks with data and control divergence. Other targets may support this intrinsic differently, for example by lowering it into a sequence of branches that guard scalar store operations.

;; This instruction unconditionally stores data vector in multiple addresses
call @llvm.masked.scatter.v8i32.v8p0(<8 x i32> %value, <8 x ptr> %ptrs, i32 4,  <8 x i1>  <true, true, .. true>)

;; It is equivalent to a list of scalar stores
%val0 = extractelement <8 x i32> %value, i32 0
%val1 = extractelement <8 x i32> %value, i32 1
..
%val7 = extractelement <8 x i32> %value, i32 7
%ptr0 = extractelement <8 x ptr> %ptrs, i32 0
%ptr1 = extractelement <8 x ptr> %ptrs, i32 1
..
%ptr7 = extractelement <8 x ptr> %ptrs, i32 7
;; Note: the order of the following stores is important when they overlap:
store i32 %val0, ptr %ptr0, align 4
store i32 %val1, ptr %ptr1, align 4
..
store i32 %val7, ptr %ptr7, align 4

Masked Vector Expanding Load and Compressing Store Intrinsics

LLVM provides intrinsics for expanding load and compressing store operations. Data selected from a vector according to a mask is stored in consecutive memory addresses (compressed store), and vice-versa (expanding load). These operations effective map to “if (cond.i) a[j++] = v.i” and “if (cond.i) v.i = a[j++]” patterns, respectively. Note that when the mask starts with ‘1’ bits followed by ‘0’ bits, these operations are identical to llvm.masked.store and llvm.masked.load.

‘llvm.masked.expandload.*’ Intrinsics

Syntax:

This is an overloaded intrinsic. Several values of integer, floating point or pointer data type are loaded from consecutive memory addresses and stored into the elements of a vector according to the mask.

declare <16 x float>  @llvm.masked.expandload.v16f32 (ptr <ptr>, <16 x i1> <mask>, <16 x float> <passthru>)
declare <2 x i64>     @llvm.masked.expandload.v2i64 (ptr <ptr>, <2 x i1>  <mask>, <2 x i64> <passthru>)

Overview:

Reads a number of scalar values sequentially from memory location provided in ‘ptr’ and spreads them in a vector. The ‘mask’ holds a bit for each vector lane. The number of elements read from memory is equal to the number of ‘1’ bits in the mask. The loaded elements are positioned in the destination vector according to the sequence of ‘1’ and ‘0’ bits in the mask. E.g., if the mask vector is ‘10010001’, “expandload” reads 3 values from memory addresses ptr, ptr+1, ptr+2 and places them in lanes 0, 3 and 7 accordingly. The masked-off lanes are filled by elements from the corresponding lanes of the ‘passthru’ argument.

Arguments:

The first argument is the base pointer for the load. It has the same underlying type as the element of the returned vector. The second argument, mask, is a vector of boolean values with the same number of elements as the return type. The third is a pass-through value that is used to fill the masked-off lanes of the result. The return type and the type of the ‘passthru’ argument have the same vector type.

The align parameter attribute can be provided for the first argument. The pointer alignment defaults to 1.

Semantics:

The ‘llvm.masked.expandload’ intrinsic is designed for reading multiple scalar values from adjacent memory addresses into possibly non-adjacent vector lanes. It is useful for targets that support vector expanding loads and allows vectorizing loop with cross-iteration dependency like in the following example:

// In this loop we load from B and spread the elements into array A.
double *A, B; int *C;
for (int i = 0; i < size; ++i) {
  if (C[i] != 0)
    A[i] = B[j++];
}

; Load several elements from array B and expand them in a vector.
; The number of loaded elements is equal to the number of '1' elements in the Mask.
%Tmp = call <8 x double> @llvm.masked.expandload.v8f64(ptr %Bptr, <8 x i1> %Mask, <8 x double> poison)
; Store the result in A
call void @llvm.masked.store.v8f64.p0(<8 x double> %Tmp, ptr %Aptr, i32 8, <8 x i1> %Mask)

; %Bptr should be increased on each iteration according to the number of '1' elements in the Mask.
%MaskI = bitcast <8 x i1> %Mask to i8
%MaskIPopcnt = call i8 @llvm.ctpop.i8(i8 %MaskI)
%MaskI64 = zext i8 %MaskIPopcnt to i64
%BNextInd = add i64 %BInd, %MaskI64

Other targets may support this intrinsic differently, for example, by lowering it into a sequence of conditional scalar load operations and shuffles. If all mask elements are ‘1’, the intrinsic behavior is equivalent to the regular unmasked vector load.

‘llvm.masked.compressstore.*’ Intrinsics

Syntax:

This is an overloaded intrinsic. A number of scalar values of integer, floating point or pointer data type are collected from an input vector and stored into adjacent memory addresses. A mask defines which elements to collect from the vector.

declare void @llvm.masked.compressstore.v8i32  (<8  x i32>   <value>, ptr <ptr>, <8  x i1> <mask>)
declare void @llvm.masked.compressstore.v16f32 (<16 x float> <value>, ptr <ptr>, <16 x i1> <mask>)

Overview:

Selects elements from input vector ‘value’ according to the ‘mask’. All selected elements are written into adjacent memory addresses starting at address ‘ptr’, from lower to higher. The mask holds a bit for each vector lane, and is used to select elements to be stored. The number of elements to be stored is equal to the number of active bits in the mask.

Arguments:

The first argument is the input vector, from which elements are collected and written to memory. The second argument is the base pointer for the store, it has the same underlying type as the element of the input vector argument. The third argument is the mask, a vector of boolean values. The mask and the input vector must have the same number of vector elements.

The align parameter attribute can be provided for the second argument. The pointer alignment defaults to 1.

Semantics:

The ‘llvm.masked.compressstore’ intrinsic is designed for compressing data in memory. It allows to collect elements from possibly non-adjacent lanes of a vector and store them contiguously in memory in one IR operation. It is useful for targets that support compressing store operations and allows vectorizing loops with cross-iteration dependencies like in the following example:

// In this loop we load elements from A and store them consecutively in B
double *A, B; int *C;
for (int i = 0; i < size; ++i) {
  if (C[i] != 0)
    B[j++] = A[i]
}

; Load elements from A.
%Tmp = call <8 x double> @llvm.masked.load.v8f64.p0(ptr %Aptr, i32 8, <8 x i1> %Mask, <8 x double> poison)
; Store all selected elements consecutively in array B
call <void> @llvm.masked.compressstore.v8f64(<8 x double> %Tmp, ptr %Bptr, <8 x i1> %Mask)

; %Bptr should be increased on each iteration according to the number of '1' elements in the Mask.
%MaskI = bitcast <8 x i1> %Mask to i8
%MaskIPopcnt = call i8 @llvm.ctpop.i8(i8 %MaskI)
%MaskI64 = zext i8 %MaskIPopcnt to i64
%BNextInd = add i64 %BInd, %MaskI64

Other targets may support this intrinsic differently, for example, by lowering it into a sequence of branches that guard scalar store operations.

Memory Use Markers

This class of intrinsics provides information about the lifetime of memory objects and ranges where variables are immutable.

‘llvm.lifetime.start’ Intrinsic

Syntax:

declare void @llvm.lifetime.start(i64 <size>, ptr nocapture <ptr>)

Overview:

The ‘llvm.lifetime.start’ intrinsic specifies the start of a memory object’s lifetime.

Arguments:

The first argument is a constant integer representing the size of the object, or -1 if it is variable sized. The second argument is a pointer to the object.

Semantics:

If ptr is a stack-allocated object and it points to the first byte of the object, the object is initially marked as dead. ptr is conservatively considered as a non-stack-allocated object if the stack coloring algorithm that is used in the optimization pipeline cannot conclude that ptr is a stack-allocated object.

After ‘llvm.lifetime.start’, the stack object that ptr points is marked as alive and has an uninitialized value. The stack object is marked as dead when either llvm.lifetime.end to the alloca is executed or the function returns.

After llvm.lifetime.end is called, ‘llvm.lifetime.start’ on the stack object can be called again. The second ‘llvm.lifetime.start’ call marks the object as alive, but it does not change the address of the object.

If ptr is a non-stack-allocated object, it does not point to the first byte of the object or it is a stack object that is already alive, it simply fills all bytes of the object with poison.

‘llvm.lifetime.end’ Intrinsic

Syntax:

declare void @llvm.lifetime.end(i64 <size>, ptr nocapture <ptr>)

Overview:

The ‘llvm.lifetime.end’ intrinsic specifies the end of a memory object’s lifetime.

Arguments:

The first argument is a constant integer representing the size of the object, or -1 if it is variable sized. The second argument is a pointer to the object.

Semantics:

If ptr is a stack-allocated object and it points to the first byte of the object, the object is dead. ptr is conservatively considered as a non-stack-allocated object if the stack coloring algorithm that is used in the optimization pipeline cannot conclude that ptr is a stack-allocated object.

Calling llvm.lifetime.end on an already dead alloca is no-op.

If ptr is a non-stack-allocated object or it does not point to the first byte of the object, it is equivalent to simply filling all bytes of the object with poison.

‘llvm.invariant.start’ Intrinsic

Syntax:

This is an overloaded intrinsic. The memory object can belong to any address space.

declare ptr @llvm.invariant.start.p0(i64 <size>, ptr nocapture <ptr>)

Overview:

The ‘llvm.invariant.start’ intrinsic specifies that the contents of a memory object will not change.

Arguments:

The first argument is a constant integer representing the size of the object, or -1 if it is variable sized. The second argument is a pointer to the object.

Semantics:

This intrinsic indicates that until an llvm.invariant.end that uses the return value, the referenced memory location is constant and unchanging.

‘llvm.invariant.end’ Intrinsic

Syntax:

This is an overloaded intrinsic. The memory object can belong to any address space.

declare void @llvm.invariant.end.p0(ptr <start>, i64 <size>, ptr nocapture <ptr>)

Overview:

The ‘llvm.invariant.end’ intrinsic specifies that the contents of a memory object are mutable.

Arguments:

The first argument is the matching llvm.invariant.start intrinsic. The second argument is a constant integer representing the size of the object, or -1 if it is variable sized and the third argument is a pointer to the object.

Semantics:

This intrinsic indicates that the memory is mutable again.

‘llvm.launder.invariant.group’ Intrinsic

Syntax:

This is an overloaded intrinsic. The memory object can belong to any address space. The returned pointer must belong to the same address space as the argument.

declare ptr @llvm.launder.invariant.group.p0(ptr <ptr>)

Overview:

The ‘llvm.launder.invariant.group’ intrinsic can be used when an invariant established by invariant.group metadata no longer holds, to obtain a new pointer value that carries fresh invariant group information. It is an experimental intrinsic, which means that its semantics might change in the future.

Arguments:

The llvm.launder.invariant.group takes only one argument, which is a pointer to the memory.

Semantics:

Returns another pointer that aliases its argument but which is considered different for the purposes of load/store invariant.group metadata. It does not read any accessible memory and the execution can be speculated.

‘llvm.strip.invariant.group’ Intrinsic

Syntax:

This is an overloaded intrinsic. The memory object can belong to any address space. The returned pointer must belong to the same address space as the argument.

declare ptr @llvm.strip.invariant.group.p0(ptr <ptr>)

Overview:

The ‘llvm.strip.invariant.group’ intrinsic can be used when an invariant established by invariant.group metadata no longer holds, to obtain a new pointer value that does not carry the invariant information. It is an experimental intrinsic, which means that its semantics might change in the future.

Arguments:

The llvm.strip.invariant.group takes only one argument, which is a pointer to the memory.

Semantics:

Returns another pointer that aliases its argument but which has no associated invariant.group metadata. It does not read any memory and can be speculated.

Constrained Floating-Point Intrinsics

These intrinsics are used to provide special handling of floating-point operations when specific rounding mode or floating-point exception behavior is required. By default, LLVM optimization passes assume that the rounding mode is round-to-nearest and that floating-point exceptions will not be monitored. Constrained FP intrinsics are used to support non-default rounding modes and accurately preserve exception behavior without compromising LLVM’s ability to optimize FP code when the default behavior is used.

If any FP operation in a function is constrained then they all must be constrained. This is required for correct LLVM IR. Optimizations that move code around can create miscompiles if mixing of constrained and normal operations is done. The correct way to mix constrained and less constrained operations is to use the rounding mode and exception handling metadata to mark constrained intrinsics as having LLVM’s default behavior.

Each of these intrinsics corresponds to a normal floating-point operation. The data arguments and the return value are the same as the corresponding FP operation.

The rounding mode argument is a metadata string specifying what assumptions, if any, the optimizer can make when transforming constant values. Some constrained FP intrinsics omit this argument. If required by the intrinsic, this argument must be one of the following strings:

"round.dynamic"
"round.tonearest"
"round.downward"
"round.upward"
"round.towardzero"
"round.tonearestaway"

If this argument is “round.dynamic” optimization passes must assume that the rounding mode is unknown and may change at runtime. No transformations that depend on rounding mode may be performed in this case.

The other possible values for the rounding mode argument correspond to the similarly named IEEE rounding modes. If the argument is any of these values optimization passes may perform transformations as long as they are consistent with the specified rounding mode.

For example, ‘x-0’->’x’ is not a valid transformation if the rounding mode is “round.downward” or “round.dynamic” because if the value of ‘x’ is +0 then ‘x-0’ should evaluate to ‘-0’ when rounding downward. However, this transformation is legal for all other rounding modes.

For values other than “round.dynamic” optimization passes may assume that the actual runtime rounding mode (as defined in a target-specific manner) matches the specified rounding mode, but this is not guaranteed. Using a specific non-dynamic rounding mode which does not match the actual rounding mode at runtime results in undefined behavior.

The exception behavior argument is a metadata string describing the floating point exception semantics that required for the intrinsic. This argument must be one of the following strings:

"fpexcept.ignore"
"fpexcept.maytrap"
"fpexcept.strict"

If this argument is “fpexcept.ignore” optimization passes may assume that the exception status flags will not be read and that floating-point exceptions will be masked. This allows transformations to be performed that may change the exception semantics of the original code. For example, FP operations may be speculatively executed in this case whereas they must not be for either of the other possible values of this argument.

If the exception behavior argument is “fpexcept.maytrap” optimization passes must avoid transformations that may raise exceptions that would not have been raised by the original code (such as speculatively executing FP operations), but passes are not required to preserve all exceptions that are implied by the original code. For example, exceptions may be potentially hidden by constant folding.

If the exception behavior argument is “fpexcept.strict” all transformations must strictly preserve the floating-point exception semantics of the original code. Any FP exception that would have been raised by the original code must be raised by the transformed code, and the transformed code must not raise any FP exceptions that would not have been raised by the original code. This is the exception behavior argument that will be used if the code being compiled reads the FP exception status flags, but this mode can also be used with code that unmasks FP exceptions.

The number and order of floating-point exceptions is NOT guaranteed. For example, a series of FP operations that each may raise exceptions may be vectorized into a single instruction that raises each unique exception a single time.

Proper function attributes usage is required for the constrained intrinsics to function correctly.

All function calls done in a function that uses constrained floating point intrinsics must have the strictfp attribute either on the calling instruction or on the declaration or definition of the function being called.

All function definitions that use constrained floating point intrinsics must have the strictfp attribute.

‘llvm.experimental.constrained.fadd’ Intrinsic

Syntax:

declare <type>
@llvm.experimental.constrained.fadd(<type> <op1>, <type> <op2>,
                                    metadata <rounding mode>,
                                    metadata <exception behavior>)

Overview:

The ‘llvm.experimental.constrained.fadd’ intrinsic returns the sum of its two arguments.

Arguments:

The first two arguments to the ‘llvm.experimental.constrained.fadd’ intrinsic must be floating-point or vector of floating-point values. Both arguments must have identical types.

The third and fourth arguments specify the rounding mode and exception behavior as described above.

Semantics:

The value produced is the floating-point sum of the two value arguments and has the same type as the arguments.

‘llvm.experimental.constrained.fsub’ Intrinsic

Syntax:

declare <type>
@llvm.experimental.constrained.fsub(<type> <op1>, <type> <op2>,
                                    metadata <rounding mode>,
                                    metadata <exception behavior>)

Overview:

The ‘llvm.experimental.constrained.fsub’ intrinsic returns the difference of its two arguments.

Arguments:

The first two arguments to the ‘llvm.experimental.constrained.fsub’ intrinsic must be floating-point or vector of floating-point values. Both arguments must have identical types.

The third and fourth arguments specify the rounding mode and exception behavior as described above.

Semantics:

The value produced is the floating-point difference of the two value arguments and has the same type as the arguments.

‘llvm.experimental.constrained.fmul’ Intrinsic

Syntax:

declare <type>
@llvm.experimental.constrained.fmul(<type> <op1>, <type> <op2>,
                                    metadata <rounding mode>,
                                    metadata <exception behavior>)

Overview:

The ‘llvm.experimental.constrained.fmul’ intrinsic returns the product of its two arguments.

Arguments:

The first two arguments to the ‘llvm.experimental.constrained.fmul’ intrinsic must be floating-point or vector of floating-point values. Both arguments must have identical types.

The third and fourth arguments specify the rounding mode and exception behavior as described above.

Semantics:

The value produced is the floating-point product of the two value arguments and has the same type as the arguments.

‘llvm.experimental.constrained.fdiv’ Intrinsic

Syntax:

declare <type>
@llvm.experimental.constrained.fdiv(<type> <op1>, <type> <op2>,
                                    metadata <rounding mode>,
                                    metadata <exception behavior>)

Overview:

The ‘llvm.experimental.constrained.fdiv’ intrinsic returns the quotient of its two arguments.

Arguments:

The first two arguments to the ‘llvm.experimental.constrained.fdiv’ intrinsic must be floating-point or vector of floating-point values. Both arguments must have identical types.

The third and fourth arguments specify the rounding mode and exception behavior as described above.

Semantics:

The value produced is the floating-point quotient of the two value arguments and has the same type as the arguments.

‘llvm.experimental.constrained.frem’ Intrinsic

Syntax:

declare <type>
@llvm.experimental.constrained.frem(<type> <op1>, <type> <op2>,
                                    metadata <rounding mode>,
                                    metadata <exception behavior>)

Overview:

The ‘llvm.experimental.constrained.frem’ intrinsic returns the remainder from the division of its two arguments.

Arguments:

The first two arguments to the ‘llvm.experimental.constrained.frem’ intrinsic must be floating-point or vector of floating-point values. Both arguments must have identical types.

The third and fourth arguments specify the rounding mode and exception behavior as described above. The rounding mode argument has no effect, since the result of frem is never rounded, but the argument is included for consistency with the other constrained floating-point intrinsics.

Semantics:

The value produced is the floating-point remainder from the division of the two value arguments and has the same type as the arguments. The remainder has the same sign as the dividend.

‘llvm.experimental.constrained.fma’ Intrinsic

Syntax:

declare <type>
@llvm.experimental.constrained.fma(<type> <op1>, <type> <op2>, <type> <op3>,
                                    metadata <rounding mode>,
                                    metadata <exception behavior>)

Overview:

The ‘llvm.experimental.constrained.fma’ intrinsic returns the result of a fused-multiply-add operation on its arguments.

Arguments:

The first three arguments to the ‘llvm.experimental.constrained.fma’ intrinsic must be floating-point or vector of floating-point values. All arguments must have identical types.

The fourth and fifth arguments specify the rounding mode and exception behavior as described above.

Semantics:

The result produced is the product of the first two arguments added to the third argument computed with infinite precision, and then rounded to the target precision.

‘llvm.experimental.constrained.fptoui’ Intrinsic

Syntax:

declare <ty2>
@llvm.experimental.constrained.fptoui(<type> <value>,
                                    metadata <exception behavior>)

Overview:

The ‘llvm.experimental.constrained.fptoui’ intrinsic converts a floating-point value to its unsigned integer equivalent of type ty2.

Arguments:

The first argument to the ‘llvm.experimental.constrained.fptoui’ intrinsic must be floating point or vector of floating point values.

The second argument specifies the exception behavior as described above.

Semantics:

The result produced is an unsigned integer converted from the floating point argument. The value is truncated, so it is rounded towards zero.

‘llvm.experimental.constrained.fptosi’ Intrinsic

Syntax:

declare <ty2>
@llvm.experimental.constrained.fptosi(<type> <value>,
                                    metadata <exception behavior>)

Overview:

The ‘llvm.experimental.constrained.fptosi’ intrinsic converts floating-point value to type ty2.

Arguments:

The first argument to the ‘llvm.experimental.constrained.fptosi’ intrinsic must be floating point or vector of floating point values.

The second argument specifies the exception behavior as described above.

Semantics:

The result produced is a signed integer converted from the floating point argument. The value is truncated, so it is rounded towards zero.

‘llvm.experimental.constrained.uitofp’ Intrinsic

Syntax:

declare <ty2>
@llvm.experimental.constrained.uitofp(<type> <value>,
                                    metadata <rounding mode>,
                                    metadata <exception behavior>)

Overview:

The ‘llvm.experimental.constrained.uitofp’ intrinsic converts an unsigned integer value to a floating-point of type ty2.

Arguments:

The first argument to the ‘llvm.experimental.constrained.uitofp’ intrinsic must be an integer or vector of integer values.

The second and third arguments specify the rounding mode and exception behavior as described above.

Semantics:

An inexact floating-point exception will be raised if rounding is required. Any result produced is a floating point value converted from the input integer argument.

‘llvm.experimental.constrained.sitofp’ Intrinsic

Syntax:

declare <ty2>
@llvm.experimental.constrained.sitofp(<type> <value>,
                                    metadata <rounding mode>,
                                    metadata <exception behavior>)

Overview:

The ‘llvm.experimental.constrained.sitofp’ intrinsic converts a signed integer value to a floating-point of type ty2.

Arguments:

The first argument to the ‘llvm.experimental.constrained.sitofp’ intrinsic must be an integer or vector of integer values.

The second and third arguments specify the rounding mode and exception behavior as described above.

Semantics:

An inexact floating-point exception will be raised if rounding is required. Any result produced is a floating point value converted from the input integer argument.

‘llvm.experimental.constrained.fptrunc’ Intrinsic

Syntax:

declare <ty2>
@llvm.experimental.constrained.fptrunc(<type> <value>,
                                    metadata <rounding mode>,
                                    metadata <exception behavior>)

Overview:

The ‘llvm.experimental.constrained.fptrunc’ intrinsic truncates value to type ty2.

Arguments:

The first argument to the ‘llvm.experimental.constrained.fptrunc’ intrinsic must be floating point or vector of floating point values. This argument must be larger in size than the result.

The second and third arguments specify the rounding mode and exception behavior as described above.

Semantics:

The result produced is a floating point value truncated to be smaller in size than the argument.

‘llvm.experimental.constrained.fpext’ Intrinsic

Syntax:

declare <ty2>
@llvm.experimental.constrained.fpext(<type> <value>,
                                    metadata <exception behavior>)

Overview:

The ‘llvm.experimental.constrained.fpext’ intrinsic extends a floating-point value to a larger floating-point value.

Arguments:

The first argument to the ‘llvm.experimental.constrained.fpext’ intrinsic must be floating point or vector of floating point values. This argument must be smaller in size than the result.

The second argument specifies the exception behavior as described above.

Semantics:

The result produced is a floating point value extended to be larger in size than the argument. All restrictions that apply to the fpext instruction also apply to this intrinsic.

‘llvm.experimental.constrained.fcmp’ and ‘llvm.experimental.constrained.fcmps’ Intrinsics

Syntax:

declare <ty2>
@llvm.experimental.constrained.fcmp(<type> <op1>, <type> <op2>,
                                    metadata <condition code>,
                                    metadata <exception behavior>)
declare <ty2>
@llvm.experimental.constrained.fcmps(<type> <op1>, <type> <op2>,
                                     metadata <condition code>,
                                     metadata <exception behavior>)

Overview:

The ‘llvm.experimental.constrained.fcmp’ and ‘llvm.experimental.constrained.fcmps’ intrinsics return a boolean value or vector of boolean values based on comparison of its arguments.

If the arguments are floating-point scalars, then the result type is a boolean (i1).

If the arguments are floating-point vectors, then the result type is a vector of boolean with the same number of elements as the arguments being compared.

The ‘llvm.experimental.constrained.fcmp’ intrinsic performs a quiet comparison operation while the ‘llvm.experimental.constrained.fcmps’ intrinsic performs a signaling comparison operation.

Arguments:

The first two arguments to the ‘llvm.experimental.constrained.fcmp’ and ‘llvm.experimental.constrained.fcmps’ intrinsics must be floating-point or vector of floating-point values. Both arguments must have identical types.

The third argument is the condition code indicating the kind of comparison to perform. It must be a metadata string with one of the following values:

• “oeq”: ordered and equal

• “ogt”: ordered and greater than

• “oge”: ordered and greater than or equal

• “olt”: ordered and less than

• “ole”: ordered and less than or equal

• “one”: ordered and not equal

• “ord”: ordered (no nans)

• “ueq”: unordered or equal

• “ugt”: unordered or greater than

• “uge”: unordered or greater than or equal

• “ult”: unordered or less than

• “ule”: unordered or less than or equal

• “une”: unordered or not equal

• “uno”: unordered (either nans)

Ordered means that neither argument is a NAN while unordered means that either argument may be a NAN.

The fourth argument specifies the exception behavior as described above.

Semantics:

op1 and op2 are compared according to the condition code given as the third argument. If the arguments are vectors, then the vectors are compared element by element. Each comparison performed always yields an i1 result, as follows:

• “oeq”: yields true if both arguments are not a NAN and op1 is equal to op2.

• “ogt”: yields true if both arguments are not a NAN and op1 is greater than op2.

• “oge”: yields true if both arguments are not a NAN and op1 is greater than or equal to op2.

• “olt”: yields true if both arguments are not a NAN and op1 is less than op2.

• “ole”: yields true if both arguments are not a NAN and op1 is less than or equal to op2.

• “one”: yields true if both arguments are not a NAN and op1 is not equal to op2.

• “ord”: yields true if both arguments are not a NAN.

• “ueq”: yields true if either argument is a NAN or op1 is equal to op2.

• “ugt”: yields true if either argument is a NAN or op1 is greater than op2.

• “uge”: yields true if either argument is a NAN or op1 is greater than or equal to op2.

• “ult”: yields true if either argument is a NAN or op1 is less than op2.

• “ule”: yields true if either argument is a NAN or op1 is less than or equal to op2.

• “une”: yields true if either argument is a NAN or op1 is not equal to op2.

• “uno”: yields true if either argument is a NAN.

The quiet comparison operation performed by ‘llvm.experimental.constrained.fcmp’ will only raise an exception if either argument is a SNAN. The signaling comparison operation performed by ‘llvm.experimental.constrained.fcmps’ will raise an exception if either argument is a NAN (QNAN or SNAN). Such an exception does not preclude a result being produced (e.g. exception might only set a flag), therefore the distinction between ordered and unordered comparisons is also relevant for the ‘llvm.experimental.constrained.fcmps’ intrinsic.

‘llvm.experimental.constrained.fmuladd’ Intrinsic

Syntax:

declare <type>
@llvm.experimental.constrained.fmuladd(<type> <op1>, <type> <op2>,
                                       <type> <op3>,
                                       metadata <rounding mode>,
                                       metadata <exception behavior>)

Overview:

The ‘llvm.experimental.constrained.fmuladd’ intrinsic represents multiply-add expressions that can be fused if the code generator determines that (a) the target instruction set has support for a fused operation, and (b) that the fused operation is more efficient than the equivalent, separate pair of mul and add instructions.

Arguments:

The first three arguments to the ‘llvm.experimental.constrained.fmuladd’ intrinsic must be floating-point or vector of floating-point values. All three arguments must have identical types.

The fourth and fifth arguments specify the rounding mode and exception behavior as described above.

Semantics:

The expression:

%0 = call float @llvm.experimental.constrained.fmuladd.f32(%a, %b, %c,
                                                           metadata <rounding mode>,
                                                           metadata <exception behavior>)

is equivalent to the expression:

%0 = call float @llvm.experimental.constrained.fmul.f32(%a, %b,
                                                        metadata <rounding mode>,
                                                        metadata <exception behavior>)
%1 = call float @llvm.experimental.constrained.fadd.f32(%0, %c,
                                                        metadata <rounding mode>,
                                                        metadata <exception behavior>)

except that it is unspecified whether rounding will be performed between the multiplication and addition steps. Fusion is not guaranteed, even if the target platform supports it. If a fused multiply-add is required, the corresponding llvm.experimental.constrained.fma intrinsic function should be used instead. This never sets errno, just as ‘llvm.experimental.constrained.fma.*’.

Constrained libm-equivalent Intrinsics

In addition to the basic floating-point operations for which constrained intrinsics are described above, there are constrained versions of various operations which provide equivalent behavior to a corresponding libm function. These intrinsics allow the precise behavior of these operations with respect to rounding mode and exception behavior to be controlled.

As with the basic constrained floating-point intrinsics, the rounding mode and exception behavior arguments only control the behavior of the optimizer. They do not change the runtime floating-point environment.

‘llvm.experimental.constrained.sqrt’ Intrinsic

Syntax:

declare <type>
@llvm.experimental.constrained.sqrt(<type> <op1>,
                                    metadata <rounding mode>,
                                    metadata <exception behavior>)

Overview:

The ‘llvm.experimental.constrained.sqrt’ intrinsic returns the square root of the specified value, returning the same value as the libm ‘sqrt’ functions would, but without setting errno.

Arguments:

The first argument and the return type are floating-point numbers of the same type.

The second and third arguments specify the rounding mode and exception behavior as described above.

Semantics:

This function returns the nonnegative square root of the specified value. If the value is less than negative zero, a floating-point exception occurs and the return value is architecture specific.

‘llvm.experimental.constrained.pow’ Intrinsic

Syntax:

declare <type>
@llvm.experimental.constrained.pow(<type> <op1>, <type> <op2>,
                                   metadata <rounding mode>,
                                   metadata <exception behavior>)

Overview:

The ‘llvm.experimental.constrained.pow’ intrinsic returns the first argument raised to the (positive or negative) power specified by the second argument.

Arguments:

The first two arguments and the return value are floating-point numbers of the same type. The second argument specifies the power to which the first argument should be raised.

The third and fourth arguments specify the rounding mode and exception behavior as described above.

Semantics:

This function returns the first value raised to the second power, returning the same values as the libm pow functions would, and handles error conditions in the same way.

‘llvm.experimental.constrained.powi’ Intrinsic

Syntax:

declare <type>
@llvm.experimental.constrained.powi(<type> <op1>, i32 <op2>,
                                    metadata <rounding mode>,
                                    metadata <exception behavior>)

Overview:

The ‘llvm.experimental.constrained.powi’ intrinsic returns the first argument raised to the (positive or negative) power specified by the second argument. The order of evaluation of multiplications is not defined. When a vector of floating-point type is used, the second argument remains a scalar integer value.

Arguments:

The first argument and the return value are floating-point numbers of the same type. The second argument is a 32-bit signed integer specifying the power to which the first argument should be raised.

The third and fourth arguments specify the rounding mode and exception behavior as described above.

Semantics:

This function returns the first value raised to the second power with an unspecified sequence of rounding operations.

‘llvm.experimental.constrained.ldexp’ Intrinsic

Syntax:

declare <type0>
@llvm.experimental.constrained.ldexp(<type0> <op1>, <type1> <op2>,
                                    metadata <rounding mode>,
                                    metadata <exception behavior>)

Overview:

The ‘llvm.experimental.constrained.ldexp’ performs the ldexp function.

Arguments:

The first argument and the return value are floating-point or vector of floating-point values of the same type. The second argument is an integer with the same number of elements.

The third and fourth arguments specify the rounding mode and exception behavior as described above.

Semantics:

This function multiplies the first argument by 2 raised to the second argument’s power. If the first argument is NaN or infinite, the same value is returned. If the result underflows a zero with the same sign is returned. If the result overflows, the result is an infinity with the same sign.

‘llvm.experimental.constrained.sin’ Intrinsic

Syntax:

declare <type>
@llvm.experimental.constrained.sin(<type> <op1>,
                                   metadata <rounding mode>,
                                   metadata <exception behavior>)

Overview:

The ‘llvm.experimental.constrained.sin’ intrinsic returns the sine of the first argument.

Arguments:

The first argument and the return type are floating-point numbers of the same type.

The second and third arguments specify the rounding mode and exception behavior as described above.

Semantics:

This function returns the sine of the specified argument, returning the same values as the libm sin functions would, and handles error conditions in the same way.

‘llvm.experimental.constrained.cos’ Intrinsic

Syntax:

declare <type>
@llvm.experimental.constrained.cos(<type> <op1>,
                                   metadata <rounding mode>,
                                   metadata <exception behavior>)

Overview:

The ‘llvm.experimental.constrained.cos’ intrinsic returns the cosine of the first argument.

Arguments:

The first argument and the return type are floating-point numbers of the same type.

The second and third arguments specify the rounding mode and exception behavior as described above.

Semantics:

This function returns the cosine of the specified argument, returning the same values as the libm cos functions would, and handles error conditions in the same way.

‘llvm.experimental.constrained.tan’ Intrinsic

Syntax:

declare <type>
@llvm.experimental.constrained.tan(<type> <op1>,
                                   metadata <rounding mode>,
                                   metadata <exception behavior>)

Overview:

The ‘llvm.experimental.constrained.tan’ intrinsic returns the tangent of the first argument.

Arguments:

The first argument and the return type are floating-point numbers of the same type.

The second and third arguments specify the rounding mode and exception behavior as described above.

Semantics:

This function returns the tangent of the specified argument, returning the same values as the libm tan functions would, and handles error conditions in the same way.

‘llvm.experimental.constrained.asin’ Intrinsic

Syntax:

declare <type>
@llvm.experimental.constrained.asin(<type> <op1>,
                                    metadata <rounding mode>,
                                    metadata <exception behavior>)

Overview:

The ‘llvm.experimental.constrained.asin’ intrinsic returns the arcsine of the first operand.

Arguments:

The first argument and the return type are floating-point numbers of the same type.

The second and third arguments specify the rounding mode and exception behavior as described above.

Semantics:

This function returns the arcsine of the specified operand, returning the same values as the libm asin functions would, and handles error conditions in the same way.

‘llvm.experimental.constrained.acos’ Intrinsic

Syntax:

declare <type>
@llvm.experimental.constrained.acos(<type> <op1>,
                                    metadata <rounding mode>,
                                    metadata <exception behavior>)

Overview:

The ‘llvm.experimental.constrained.acos’ intrinsic returns the arccosine of the first operand.

Arguments:

The first argument and the return type are floating-point numbers of the same type.

The second and third arguments specify the rounding mode and exception behavior as described above.

Semantics:

This function returns the arccosine of the specified operand, returning the same values as the libm acos functions would, and handles error conditions in the same way.

‘llvm.experimental.constrained.atan’ Intrinsic

Syntax:

declare <type>
@llvm.experimental.constrained.atan(<type> <op1>,
                                    metadata <rounding mode>,
                                    metadata <exception behavior>)

Overview:

The ‘llvm.experimental.constrained.atan’ intrinsic returns the arctangent of the first operand.

Arguments:

The first argument and the return type are floating-point numbers of the same type.

The second and third arguments specify the rounding mode and exception behavior as described above.

Semantics:

This function returns the arctangent of the specified operand, returning the same values as the libm atan functions would, and handles error conditions in the same way.

‘llvm.experimental.constrained.atan2’ Intrinsic

Syntax:

declare <type>
@llvm.experimental.constrained.atan2(<type> <op1>,
                                     <type> <op2>,
                                     metadata <rounding mode>,
                                     metadata <exception behavior>)

Overview:

The ‘llvm.experimental.constrained.atan2’ intrinsic returns the arctangent of <op1> divided by <op2> accounting for the quadrant.

Arguments:

The first two arguments and the return value are floating-point numbers of the same type.

The third and fourth arguments specify the rounding mode and exception behavior as described above.

Semantics:

This function returns the quadrant-specific arctangent using the specified operands, returning the same values as the libm atan2 functions would, and handles error conditions in the same way.

‘llvm.experimental.constrained.sinh’ Intrinsic

Syntax:

declare <type>
@llvm.experimental.constrained.sinh(<type> <op1>,
                                    metadata <rounding mode>,
                                    metadata <exception behavior>)

Overview:

The ‘llvm.experimental.constrained.sinh’ intrinsic returns the hyperbolic sine of the first operand.

Arguments:

The first argument and the return type are floating-point numbers of the same type.

The second and third arguments specify the rounding mode and exception behavior as described above.

Semantics:

This function returns the hyperbolic sine of the specified operand, returning the same values as the libm sinh functions would, and handles error conditions in the same way.

‘llvm.experimental.constrained.cosh’ Intrinsic

Syntax:

declare <type>
@llvm.experimental.constrained.cosh(<type> <op1>,
                                    metadata <rounding mode>,
                                    metadata <exception behavior>)

Overview:

The ‘llvm.experimental.constrained.cosh’ intrinsic returns the hyperbolic cosine of the first operand.

Arguments:

The first argument and the return type are floating-point numbers of the same type.

The second and third arguments specify the rounding mode and exception behavior as described above.

Semantics:

This function returns the hyperbolic cosine of the specified operand, returning the same values as the libm cosh functions would, and handles error conditions in the same way.

‘llvm.experimental.constrained.tanh’ Intrinsic

Syntax:

declare <type>
@llvm.experimental.constrained.tanh(<type> <op1>,
                                    metadata <rounding mode>,
                                    metadata <exception behavior>)

Overview:

The ‘llvm.experimental.constrained.tanh’ intrinsic returns the hyperbolic tangent of the first operand.

Arguments:

The first argument and the return type are floating-point numbers of the same type.

The second and third arguments specify the rounding mode and exception behavior as described above.

Semantics:

This function returns the hyperbolic tangent of the specified operand, returning the same values as the libm tanh functions would, and handles error conditions in the same way.

‘llvm.experimental.constrained.exp’ Intrinsic

Syntax:

declare <type>
@llvm.experimental.constrained.exp(<type> <op1>,
                                   metadata <rounding mode>,
                                   metadata <exception behavior>)

Overview:

The ‘llvm.experimental.constrained.exp’ intrinsic computes the base-e exponential of the specified value.

Arguments:

The first argument and the return value are floating-point numbers of the same type.

The second and third arguments specify the rounding mode and exception behavior as described above.

Semantics:

This function returns the same values as the libm exp functions would, and handles error conditions in the same way.

‘llvm.experimental.constrained.exp2’ Intrinsic

Syntax:

declare <type>
@llvm.experimental.constrained.exp2(<type> <op1>,
                                    metadata <rounding mode>,
                                    metadata <exception behavior>)

Overview:

The ‘llvm.experimental.constrained.exp2’ intrinsic computes the base-2 exponential of the specified value.

Arguments:

The first argument and the return value are floating-point numbers of the same type.

The second and third arguments specify the rounding mode and exception behavior as described above.

Semantics:

This function returns the same values as the libm exp2 functions would, and handles error conditions in the same way.

‘llvm.experimental.constrained.log’ Intrinsic

Syntax:

declare <type>
@llvm.experimental.constrained.log(<type> <op1>,
                                   metadata <rounding mode>,
                                   metadata <exception behavior>)

Overview:

The ‘llvm.experimental.constrained.log’ intrinsic computes the base-e logarithm of the specified value.

Arguments:

The first argument and the return value are floating-point numbers of the same type.

The second and third arguments specify the rounding mode and exception behavior as described above.

Semantics:

This function returns the same values as the libm log functions would, and handles error conditions in the same way.

‘llvm.experimental.constrained.log10’ Intrinsic

Syntax:

declare <type>
@llvm.experimental.constrained.log10(<type> <op1>,
                                     metadata <rounding mode>,
                                     metadata <exception behavior>)

Overview:

The ‘llvm.experimental.constrained.log10’ intrinsic computes the base-10 logarithm of the specified value.

Arguments:

The first argument and the return value are floating-point numbers of the same type.

The second and third arguments specify the rounding mode and exception behavior as described above.

Semantics:

This function returns the same values as the libm log10 functions would, and handles error conditions in the same way.

‘llvm.experimental.constrained.log2’ Intrinsic

Syntax:

declare <type>
@llvm.experimental.constrained.log2(<type> <op1>,
                                    metadata <rounding mode>,
                                    metadata <exception behavior>)

Overview:

The ‘llvm.experimental.constrained.log2’ intrinsic computes the base-2 logarithm of the specified value.

Arguments:

The first argument and the return value are floating-point numbers of the same type.

The second and third arguments specify the rounding mode and exception behavior as described above.

Semantics:

This function returns the same values as the libm log2 functions would, and handles error conditions in the same way.

‘llvm.experimental.constrained.rint’ Intrinsic

Syntax:

declare <type>
@llvm.experimental.constrained.rint(<type> <op1>,
                                    metadata <rounding mode>,
                                    metadata <exception behavior>)

Overview:

The ‘llvm.experimental.constrained.rint’ intrinsic returns the first argument rounded to the nearest integer. It may raise an inexact floating-point exception if the argument is not an integer.

Arguments:

The first argument and the return value are floating-point numbers of the same type.

The second and third arguments specify the rounding mode and exception behavior as described above.

Semantics:

This function returns the same values as the libm rint functions would, and handles error conditions in the same way. The rounding mode is described, not determined, by the rounding mode argument. The actual rounding mode is determined by the runtime floating-point environment. The rounding mode argument is only intended as information to the compiler.

‘llvm.experimental.constrained.lrint’ Intrinsic

Syntax:

declare <inttype>
@llvm.experimental.constrained.lrint(<fptype> <op1>,
                                     metadata <rounding mode>,
                                     metadata <exception behavior>)

Overview:

The ‘llvm.experimental.constrained.lrint’ intrinsic returns the first argument rounded to the nearest integer. An inexact floating-point exception will be raised if the argument is not an integer. An invalid exception is raised if the result is too large to fit into a supported integer type, and in this case the result is undefined.

Arguments:

The first argument is a floating-point number. The return value is an integer type. Not all types are supported on all targets. The supported types are the same as the llvm.lrint intrinsic and the lrint libm functions.

The second and third arguments specify the rounding mode and exception behavior as described above.

Semantics:

This function returns the same values as the libm lrint functions would, and handles error conditions in the same way.

The rounding mode is described, not determined, by the rounding mode argument. The actual rounding mode is determined by the runtime floating-point environment. The rounding mode argument is only intended as information to the compiler.

If the runtime floating-point environment is using the default rounding mode then the results will be the same as the llvm.lrint intrinsic.

‘llvm.experimental.constrained.llrint’ Intrinsic

Syntax:

declare <inttype>
@llvm.experimental.constrained.llrint(<fptype> <op1>,
                                      metadata <rounding mode>,
                                      metadata <exception behavior>)

Overview:

The ‘llvm.experimental.constrained.llrint’ intrinsic returns the first argument rounded to the nearest integer. An inexact floating-point exception will be raised if the argument is not an integer. An invalid exception is raised if the result is too large to fit into a supported integer type, and in this case the result is undefined.

Arguments:

The first argument is a floating-point number. The return value is an integer type. Not all types are supported on all targets. The supported types are the same as the llvm.llrint intrinsic and the llrint libm functions.

The second and third arguments specify the rounding mode and exception behavior as described above.

Semantics:

This function returns the same values as the libm llrint functions would, and handles error conditions in the same way.

The rounding mode is described, not determined, by the rounding mode argument. The actual rounding mode is determined by the runtime floating-point environment. The rounding mode argument is only intended as information to the compiler.

If the runtime floating-point environment is using the default rounding mode then the results will be the same as the llvm.llrint intrinsic.

‘llvm.experimental.constrained.nearbyint’ Intrinsic

Syntax:

declare <type>
@llvm.experimental.constrained.nearbyint(<type> <op1>,
                                         metadata <rounding mode>,
                                         metadata <exception behavior>)

Overview:

The ‘llvm.experimental.constrained.nearbyint’ intrinsic returns the first argument rounded to the nearest integer. It will not raise an inexact floating-point exception if the argument is not an integer.

Arguments:

The first argument and the return value are floating-point numbers of the same type.

The second and third arguments specify the rounding mode and exception behavior as described above.

Semantics:

This function returns the same values as the libm nearbyint functions would, and handles error conditions in the same way. The rounding mode is described, not determined, by the rounding mode argument. The actual rounding mode is determined by the runtime floating-point environment. The rounding mode argument is only intended as information to the compiler.

‘llvm.experimental.constrained.maxnum’ Intrinsic

Syntax:

declare <type>
@llvm.experimental.constrained.maxnum(<type> <op1>, <type> <op2>
                                      metadata <exception behavior>)

Overview:

The ‘llvm.experimental.constrained.maxnum’ intrinsic returns the maximum of the two arguments.

Arguments:

The first two arguments and the return value are floating-point numbers of the same type.

The third argument specifies the exception behavior as described above.

Semantics:

This function follows the IEEE-754 semantics for maxNum.

‘llvm.experimental.constrained.minnum’ Intrinsic

Syntax:

declare <type>
@llvm.experimental.constrained.minnum(<type> <op1>, <type> <op2>
                                      metadata <exception behavior>)

Overview:

The ‘llvm.experimental.constrained.minnum’ intrinsic returns the minimum of the two arguments.

Arguments:

The first two arguments and the return value are floating-point numbers of the same type.

The third argument specifies the exception behavior as described above.

Semantics:

This function follows the IEEE-754 semantics for minNum.

‘llvm.experimental.constrained.maximum’ Intrinsic

Syntax:

declare <type>
@llvm.experimental.constrained.maximum(<type> <op1>, <type> <op2>
                                       metadata <exception behavior>)

Overview:

The ‘llvm.experimental.constrained.maximum’ intrinsic returns the maximum of the two arguments, propagating NaNs and treating -0.0 as less than +0.0.

Arguments:

The first two arguments and the return value are floating-point numbers of the same type.

The third argument specifies the exception behavior as described above.

Semantics:

This function follows semantics specified in the draft of IEEE 754-2019.

‘llvm.experimental.constrained.minimum’ Intrinsic

Syntax:

declare <type>
@llvm.experimental.constrained.minimum(<type> <op1>, <type> <op2>
                                       metadata <exception behavior>)

Overview:

The ‘llvm.experimental.constrained.minimum’ intrinsic returns the minimum of the two arguments, propagating NaNs and treating -0.0 as less than +0.0.

Arguments:

The first two arguments and the return value are floating-point numbers of the same type.

The third argument specifies the exception behavior as described above.

Semantics:

This function follows semantics specified in the draft of IEEE 754-2019.

‘llvm.experimental.constrained.ceil’ Intrinsic

Syntax:

declare <type>
@llvm.experimental.constrained.ceil(<type> <op1>,
                                    metadata <exception behavior>)

Overview:

The ‘llvm.experimental.constrained.ceil’ intrinsic returns the ceiling of the first argument.

Arguments:

The first argument and the return value are floating-point numbers of the same type.

The second argument specifies the exception behavior as described above.

Semantics:

This function returns the same values as the libm ceil functions would and handles error conditions in the same way.

‘llvm.experimental.constrained.floor’ Intrinsic

Syntax:

declare <type>
@llvm.experimental.constrained.floor(<type> <op1>,
                                     metadata <exception behavior>)

Overview:

The ‘llvm.experimental.constrained.floor’ intrinsic returns the floor of the first argument.

Arguments:

The first argument and the return value are floating-point numbers of the same type.

The second argument specifies the exception behavior as described above.

Semantics:

This function returns the same values as the libm floor functions would and handles error conditions in the same way.

‘llvm.experimental.constrained.round’ Intrinsic

Syntax:

declare <type>
@llvm.experimental.constrained.round(<type> <op1>,
                                     metadata <exception behavior>)

Overview:

The ‘llvm.experimental.constrained.round’ intrinsic returns the first argument rounded to the nearest integer.

Arguments:

The first argument and the return value are floating-point numbers of the same type.

The second argument specifies the exception behavior as described above.

Semantics:

This function returns the same values as the libm round functions would and handles error conditions in the same way.

‘llvm.experimental.constrained.roundeven’ Intrinsic

Syntax:

declare <type>
@llvm.experimental.constrained.roundeven(<type> <op1>,
                                         metadata <exception behavior>)

Overview:

The ‘llvm.experimental.constrained.roundeven’ intrinsic returns the first argument rounded to the nearest integer in floating-point format, rounding halfway cases to even (that is, to the nearest value that is an even integer), regardless of the current rounding direction.

Arguments:

The first argument and the return value are floating-point numbers of the same type.

The second argument specifies the exception behavior as described above.

Semantics:

This function implements IEEE-754 operation roundToIntegralTiesToEven. It also behaves in the same way as C standard function roundeven and can signal the invalid operation exception for a SNAN argument.

‘llvm.experimental.constrained.lround’ Intrinsic

Syntax:

declare <inttype>
@llvm.experimental.constrained.lround(<fptype> <op1>,
                                      metadata <exception behavior>)

Overview:

The ‘llvm.experimental.constrained.lround’ intrinsic returns the first argument rounded to the nearest integer with ties away from zero. It will raise an inexact floating-point exception if the argument is not an integer. An invalid exception is raised if the result is too large to fit into a supported integer type, and in this case the result is undefined.

Arguments:

The first argument is a floating-point number. The return value is an integer type. Not all types are supported on all targets. The supported types are the same as the llvm.lround intrinsic and the lround libm functions.

The second argument specifies the exception behavior as described above.

Semantics:

This function returns the same values as the libm lround functions would and handles error conditions in the same way.

‘llvm.experimental.constrained.llround’ Intrinsic

Syntax:

declare <inttype>
@llvm.experimental.constrained.llround(<fptype> <op1>,
                                       metadata <exception behavior>)

Overview:

The ‘llvm.experimental.constrained.llround’ intrinsic returns the first argument rounded to the nearest integer with ties away from zero. It will raise an inexact floating-point exception if the argument is not an integer. An invalid exception is raised if the result is too large to fit into a supported integer type, and in this case the result is undefined.

Arguments:

The first argument is a floating-point number. The return value is an integer type. Not all types are supported on all targets. The supported types are the same as the llvm.llround intrinsic and the llround libm functions.

The second argument specifies the exception behavior as described above.

Semantics:

This function returns the same values as the libm llround functions would and handles error conditions in the same way.

‘llvm.experimental.constrained.trunc’ Intrinsic

Syntax:

declare <type>
@llvm.experimental.constrained.trunc(<type> <op1>,
                                     metadata <exception behavior>)

Overview:

The ‘llvm.experimental.constrained.trunc’ intrinsic returns the first argument rounded to the nearest integer not larger in magnitude than the argument.

Arguments:

The first argument and the return value are floating-point numbers of the same type.

The second argument specifies the exception behavior as described above.

Semantics:

This function returns the same values as the libm trunc functions would and handles error conditions in the same way.

‘llvm.experimental.noalias.scope.decl’ Intrinsic

Syntax:

declare void @llvm.experimental.noalias.scope.decl(metadata !id.scope.list)

Overview:

The llvm.experimental.noalias.scope.decl intrinsic identifies where a noalias scope is declared. When the intrinsic is duplicated, a decision must also be made about the scope: depending on the reason of the duplication, the scope might need to be duplicated as well.

Arguments:

The !id.scope.list argument is metadata that is a list of noalias metadata references. The format is identical to that required for noalias metadata. This list must have exactly one element.

Semantics:

The llvm.experimental.noalias.scope.decl intrinsic identifies where a noalias scope is declared. When the intrinsic is duplicated, a decision must also be made about the scope: depending on the reason of the duplication, the scope might need to be duplicated as well.

For example, when the intrinsic is used inside a loop body, and that loop is unrolled, the associated noalias scope must also be duplicated. Otherwise, the noalias property it signifies would spill across loop iterations, whereas it was only valid within a single iteration.

; This examples shows two possible positions for noalias.decl and how they impact the semantics:
; If it is outside the loop (Version 1), then %a and %b are noalias across *all* iterations.
; If it is inside the loop (Version 2), then %a and %b are noalias only within *one* iteration.
declare void @decl_in_loop(ptr %a.base, ptr %b.base) {
entry:
  ; call void @llvm.experimental.noalias.scope.decl(metadata !2) ; Version 1: noalias decl outside loop
  br label %loop

loop:
  %a = phi ptr [ %a.base, %entry ], [ %a.inc, %loop ]
  %b = phi ptr [ %b.base, %entry ], [ %b.inc, %loop ]
  ; call void @llvm.experimental.noalias.scope.decl(metadata !2) ; Version 2: noalias decl inside loop
  %val = load i8, ptr %a, !alias.scope !2
  store i8 %val, ptr %b, !noalias !2
  %a.inc = getelementptr inbounds i8, ptr %a, i64 1
  %b.inc = getelementptr inbounds i8, ptr %b, i64 1
  %cond = call i1 @cond()
  br i1 %cond, label %loop, label %exit

exit:
  ret void
}

!0 = !{!0} ; domain
!1 = !{!1, !0} ; scope
!2 = !{!1} ; scope list

Multiple calls to @llvm.experimental.noalias.scope.decl for the same scope are possible, but one should never dominate another. Violations are pointed out by the verifier as they indicate a problem in either a transformation pass or the input.

Floating Point Environment Manipulation intrinsics

These functions read or write floating point environment, such as rounding mode or state of floating point exceptions. Altering the floating point environment requires special care. See Floating Point Environment.

‘llvm.get.rounding’ Intrinsic

Syntax:

declare i32 @llvm.get.rounding()

Overview:

The ‘llvm.get.rounding’ intrinsic reads the current rounding mode.

Semantics:

The ‘llvm.get.rounding’ intrinsic returns the current rounding mode. Encoding of the returned values is same as the result of FLT_ROUNDS, specified by C standard:

0  - toward zero
1  - to nearest, ties to even
2  - toward positive infinity
3  - toward negative infinity
4  - to nearest, ties away from zero

Other values may be used to represent additional rounding modes, supported by a target. These values are target-specific.

‘llvm.set.rounding’ Intrinsic

Syntax:

declare void @llvm.set.rounding(i32 <val>)

Overview:

The ‘llvm.set.rounding’ intrinsic sets current rounding mode.

Arguments:

The argument is the required rounding mode. Encoding of rounding mode is the same as used by ‘llvm.get.rounding’.

Semantics:

The ‘llvm.set.rounding’ intrinsic sets the current rounding mode. It is similar to C library function ‘fesetround’, however this intrinsic does not return any value and uses platform-independent representation of IEEE rounding modes.

‘llvm.get.fpenv’ Intrinsic

Syntax:

declare <integer_type> @llvm.get.fpenv()

Overview:

The ‘llvm.get.fpenv’ intrinsic returns bits of the current floating-point environment. The return value type is platform-specific.

Semantics:

The ‘llvm.get.fpenv’ intrinsic reads the current floating-point environment and returns it as an integer value.

‘llvm.set.fpenv’ Intrinsic

Syntax:

declare void @llvm.set.fpenv(<integer_type> <val>)

Overview:

The ‘llvm.set.fpenv’ intrinsic sets the current floating-point environment.

Arguments:

The argument is an integer representing the new floating-point environment. The integer type is platform-specific.

Semantics:

The ‘llvm.set.fpenv’ intrinsic sets the current floating-point environment to the state specified by the argument. The state may be previously obtained by a call to ‘llvm.get.fpenv’ or synthesized in a platform-dependent way.

‘llvm.reset.fpenv’ Intrinsic

Syntax:

declare void @llvm.reset.fpenv()

Overview:

The ‘llvm.reset.fpenv’ intrinsic sets the default floating-point environment.

Semantics:

The ‘llvm.reset.fpenv’ intrinsic sets the current floating-point environment to default state. It is similar to the call ‘fesetenv(FE_DFL_ENV)’, except it does not return any value.

‘llvm.get.fpmode’ Intrinsic

Syntax:

The ‘llvm.get.fpmode’ intrinsic returns bits of the current floating-point control modes. The return value type is platform-specific.

declare <integer_type> @llvm.get.fpmode()

Overview:

The ‘llvm.get.fpmode’ intrinsic reads the current dynamic floating-point control modes and returns it as an integer value.

Arguments:

None.

Semantics:

The ‘llvm.get.fpmode’ intrinsic reads the current dynamic floating-point control modes, such as rounding direction, precision, treatment of denormals and so on. It is similar to the C library function ‘fegetmode’, however this function does not store the set of control modes into memory but returns it as an integer value. Interpretation of the bits in this value is target-dependent.

‘llvm.set.fpmode’ Intrinsic

Syntax:

The ‘llvm.set.fpmode’ intrinsic sets the current floating-point control modes.

declare void @llvm.set.fpmode(<integer_type> <val>)

Overview:

The ‘llvm.set.fpmode’ intrinsic sets the current dynamic floating-point control modes.

Arguments:

The argument is a set of floating-point control modes, represented as an integer value in a target-dependent way.

Semantics:

The ‘llvm.set.fpmode’ intrinsic sets the current dynamic floating-point control modes to the state specified by the argument, which must be obtained by a call to ‘llvm.get.fpmode’ or constructed in a target-specific way. It is similar to the C library function ‘fesetmode’, however this function does not read the set of control modes from memory but gets it as integer value.

‘llvm.reset.fpmode’ Intrinsic

Syntax:

declare void @llvm.reset.fpmode()

Overview:

The ‘llvm.reset.fpmode’ intrinsic sets the default dynamic floating-point control modes.

Arguments:

None.

Semantics:

The ‘llvm.reset.fpmode’ intrinsic sets the current dynamic floating-point environment to default state. It is similar to the C library function call ‘fesetmode(FE_DFL_MODE)’, however this function does not return any value.

Floating-Point Test Intrinsics

These functions get properties of floating-point values.

‘llvm.is.fpclass’ Intrinsic

Syntax:

declare i1 @llvm.is.fpclass(<fptype> <op>, i32 <test>)
declare <N x i1> @llvm.is.fpclass(<vector-fptype> <op>, i32 <test>)

Overview:

The ‘llvm.is.fpclass’ intrinsic returns a boolean value or vector of boolean values depending on whether the first argument satisfies the test specified by the second argument.

If the first argument is a floating-point scalar, then the result type is a boolean (i1).

If the first argument is a floating-point vector, then the result type is a vector of boolean with the same number of elements as the first argument.

Arguments:

The first argument to the ‘llvm.is.fpclass’ intrinsic must be floating-point or vector of floating-point values.

The second argument specifies, which tests to perform. It must be a compile-time integer constant, each bit in which specifies floating-point class:

Bit #	floating-point class
0	Signaling NaN
1	Quiet NaN
2	Negative infinity
3	Negative normal
4	Negative subnormal
5	Negative zero
6	Positive zero
7	Positive subnormal
8	Positive normal
9	Positive infinity

Semantics:

The function checks if op belongs to any of the floating-point classes specified by test. If op is a vector, then the check is made element by element. Each check yields an i1 result, which is true, if the element value satisfies the specified test. The argument test is a bit mask where each bit specifies floating-point class to test. For example, the value 0x108 makes test for normal value, - bits 3 and 8 in it are set, which means that the function returns true if op is a positive or negative normal value. The function never raises floating-point exceptions. The function does not canonicalize its input value and does not depend on the floating-point environment. If the floating-point environment has a zeroing treatment of subnormal input values (such as indicated by the "denormal-fp-math" attribute), a subnormal value will be observed (will not be implicitly treated as zero).

General Intrinsics

This class of intrinsics is designed to be generic and has no specific purpose.

‘llvm.var.annotation’ Intrinsic

Syntax:

declare void @llvm.var.annotation(ptr <val>, ptr <str>, ptr <str>, i32  <int>)

Overview:

The ‘llvm.var.annotation’ intrinsic.

Arguments:

The first argument is a pointer to a value, the second is a pointer to a global string, the third is a pointer to a global string which is the source file name, and the last argument is the line number.

Semantics:

This intrinsic allows annotation of local variables with arbitrary strings. This can be useful for special purpose optimizations that want to look for these annotations. These have no other defined use; they are ignored by code generation and optimization.

‘llvm.ptr.annotation.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use ‘llvm.ptr.annotation’ on a pointer to an integer of any width. NOTE you must specify an address space for the pointer. The identifier for the default address space is the integer ‘0’.

declare ptr @llvm.ptr.annotation.p0(ptr <val>, ptr <str>, ptr <str>, i32 <int>)
declare ptr @llvm.ptr.annotation.p1(ptr addrspace(1) <val>, ptr <str>, ptr <str>, i32 <int>)

Overview:

The ‘llvm.ptr.annotation’ intrinsic.

Arguments:

The first argument is a pointer to an integer value of arbitrary bitwidth (result of some expression), the second is a pointer to a global string, the third is a pointer to a global string which is the source file name, and the last argument is the line number. It returns the value of the first argument.

Semantics:

This intrinsic allows annotation of a pointer to an integer with arbitrary strings. This can be useful for special purpose optimizations that want to look for these annotations. These have no other defined use; transformations preserve annotations on a best-effort basis but are allowed to replace the intrinsic with its first argument without breaking semantics and the intrinsic is completely dropped during instruction selection.

‘llvm.annotation.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use ‘llvm.annotation’ on any integer bit width.

declare i8 @llvm.annotation.i8(i8 <val>, ptr <str>, ptr <str>, i32  <int>)
declare i16 @llvm.annotation.i16(i16 <val>, ptr <str>, ptr <str>, i32  <int>)
declare i32 @llvm.annotation.i32(i32 <val>, ptr <str>, ptr <str>, i32  <int>)
declare i64 @llvm.annotation.i64(i64 <val>, ptr <str>, ptr <str>, i32  <int>)
declare i256 @llvm.annotation.i256(i256 <val>, ptr <str>, ptr <str>, i32  <int>)

Overview:

The ‘llvm.annotation’ intrinsic.

Arguments:

The first argument is an integer value (result of some expression), the second is a pointer to a global string, the third is a pointer to a global string which is the source file name, and the last argument is the line number. It returns the value of the first argument.

Semantics:

This intrinsic allows annotations to be put on arbitrary expressions with arbitrary strings. This can be useful for special purpose optimizations that want to look for these annotations. These have no other defined use; transformations preserve annotations on a best-effort basis but are allowed to replace the intrinsic with its first argument without breaking semantics and the intrinsic is completely dropped during instruction selection.

‘llvm.codeview.annotation’ Intrinsic

Syntax:

This annotation emits a label at its program point and an associated S_ANNOTATION codeview record with some additional string metadata. This is used to implement MSVC’s __annotation intrinsic. It is marked noduplicate, so calls to this intrinsic prevent inlining and should be considered expensive.

declare void @llvm.codeview.annotation(metadata)

Arguments:

The argument should be an MDTuple containing any number of MDStrings.

‘llvm.trap’ Intrinsic

Syntax:

declare void @llvm.trap() cold noreturn nounwind

Overview:

The ‘llvm.trap’ intrinsic.

Arguments:

None.

Semantics:

This intrinsic is lowered to the target dependent trap instruction. If the target does not have a trap instruction, this intrinsic will be lowered to a call of the abort() function.

‘llvm.debugtrap’ Intrinsic

Syntax:

declare void @llvm.debugtrap() nounwind

Overview:

The ‘llvm.debugtrap’ intrinsic.

Arguments:

None.

Semantics:

This intrinsic is lowered to code which is intended to cause an execution trap with the intention of requesting the attention of a debugger.

‘llvm.ubsantrap’ Intrinsic

Syntax:

declare void @llvm.ubsantrap(i8 immarg) cold noreturn nounwind

Overview:

The ‘llvm.ubsantrap’ intrinsic.

Arguments:

An integer describing the kind of failure detected.

Semantics:

This intrinsic is lowered to code which is intended to cause an execution trap, embedding the argument into encoding of that trap somehow to discriminate crashes if possible.

Equivalent to @llvm.trap for targets that do not support this behavior.

‘llvm.stackprotector’ Intrinsic

Syntax:

declare void @llvm.stackprotector(ptr <guard>, ptr <slot>)

Overview:

The llvm.stackprotector intrinsic takes the guard and stores it onto the stack at slot. The stack slot is adjusted to ensure that it is placed on the stack before local variables.

Arguments:

The llvm.stackprotector intrinsic requires two pointer arguments. The first argument is the value loaded from the stack guard @__stack_chk_guard. The second variable is an alloca that has enough space to hold the value of the guard.

Semantics:

This intrinsic causes the prologue/epilogue inserter to force the position of the AllocaInst stack slot to be before local variables on the stack. This is to ensure that if a local variable on the stack is overwritten, it will destroy the value of the guard. When the function exits, the guard on the stack is checked against the original guard by llvm.stackprotectorcheck. If they are different, then llvm.stackprotectorcheck causes the program to abort by calling the __stack_chk_fail() function.

‘llvm.stackguard’ Intrinsic

Syntax:

declare ptr @llvm.stackguard()

Overview:

The llvm.stackguard intrinsic returns the system stack guard value.

It should not be generated by frontends, since it is only for internal usage. The reason why we create this intrinsic is that we still support IR form Stack Protector in FastISel.

Arguments:

None.

Semantics:

On some platforms, the value returned by this intrinsic remains unchanged between loads in the same thread. On other platforms, it returns the same global variable value, if any, e.g. @__stack_chk_guard.

Currently some platforms have IR-level customized stack guard loading (e.g. X86 Linux) that is not handled by llvm.stackguard(), while they should be in the future.

‘llvm.objectsize’ Intrinsic

Syntax:

declare i32 @llvm.objectsize.i32(ptr <object>, i1 <min>, i1 <nullunknown>, i1 <dynamic>)
declare i64 @llvm.objectsize.i64(ptr <object>, i1 <min>, i1 <nullunknown>, i1 <dynamic>)

Overview:

The llvm.objectsize intrinsic is designed to provide information to the optimizer to determine whether a) an operation (like memcpy) will overflow a buffer that corresponds to an object, or b) that a runtime check for overflow isn’t necessary. An object in this context means an allocation of a specific class, structure, array, or other object.

Arguments:

The llvm.objectsize intrinsic takes four arguments. The first argument is a pointer to or into the object. The second argument determines whether llvm.objectsize returns 0 (if true) or -1 (if false) when the object size is unknown. The third argument controls how llvm.objectsize acts when null in address space 0 is used as its pointer argument. If it’s false, llvm.objectsize reports 0 bytes available when given null. Otherwise, if the null is in a non-zero address space or if true is given for the third argument of llvm.objectsize, we assume its size is unknown. The fourth argument to llvm.objectsize determines if the value should be evaluated at runtime.

The second, third, and fourth arguments only accept constants.

Semantics:

The llvm.objectsize intrinsic is lowered to a value representing the size of the object concerned. If the size cannot be determined, llvm.objectsize returns i32/i64 -1 or 0 (depending on the min argument).

‘llvm.expect’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.expect on any integer bit width.

declare i1 @llvm.expect.i1(i1 <val>, i1 <expected_val>)
declare i32 @llvm.expect.i32(i32 <val>, i32 <expected_val>)
declare i64 @llvm.expect.i64(i64 <val>, i64 <expected_val>)

Overview:

The llvm.expect intrinsic provides information about expected (the most probable) value of val, which can be used by optimizers.

Arguments:

The llvm.expect intrinsic takes two arguments. The first argument is a value. The second argument is an expected value.

Semantics:

This intrinsic is lowered to the val.

‘llvm.expect.with.probability’ Intrinsic

Syntax:

This intrinsic is similar to llvm.expect. This is an overloaded intrinsic. You can use llvm.expect.with.probability on any integer bit width.

declare i1 @llvm.expect.with.probability.i1(i1 <val>, i1 <expected_val>, double <prob>)
declare i32 @llvm.expect.with.probability.i32(i32 <val>, i32 <expected_val>, double <prob>)
declare i64 @llvm.expect.with.probability.i64(i64 <val>, i64 <expected_val>, double <prob>)

Overview:

The llvm.expect.with.probability intrinsic provides information about expected value of val with probability(or confidence) prob, which can be used by optimizers.

Arguments:

The llvm.expect.with.probability intrinsic takes three arguments. The first argument is a value. The second argument is an expected value. The third argument is a probability.

Semantics:

This intrinsic is lowered to the val.

‘llvm.assume’ Intrinsic

Syntax:

declare void @llvm.assume(i1 %cond)

Overview:

The llvm.assume allows the optimizer to assume that the provided condition is true. This information can then be used in simplifying other parts of the code.

More complex assumptions can be encoded as assume operand bundles.

Arguments:

The argument of the call is the condition which the optimizer may assume is always true.

Semantics:

The intrinsic allows the optimizer to assume that the provided condition is always true whenever the control flow reaches the intrinsic call. No code is generated for this intrinsic, and instructions that contribute only to the provided condition are not used for code generation. If the condition is violated during execution, the behavior is undefined.

Note that the optimizer might limit the transformations performed on values used by the llvm.assume intrinsic in order to preserve the instructions only used to form the intrinsic’s input argument. This might prove undesirable if the extra information provided by the llvm.assume intrinsic does not cause sufficient overall improvement in code quality. For this reason, llvm.assume should not be used to document basic mathematical invariants that the optimizer can otherwise deduce or facts that are of little use to the optimizer.

‘llvm.ssa.copy’ Intrinsic

Syntax:

declare type @llvm.ssa.copy(type returned %operand) memory(none)

Arguments:

The first argument is an operand which is used as the returned value.

Overview:

The llvm.ssa.copy intrinsic can be used to attach information to operations by copying them and giving them new names. For example, the PredicateInfo utility uses it to build Extended SSA form, and attach various forms of information to operands that dominate specific uses. It is not meant for general use, only for building temporary renaming forms that require value splits at certain points.

‘llvm.type.test’ Intrinsic

Syntax:

declare i1 @llvm.type.test(ptr %ptr, metadata %type) nounwind memory(none)

Arguments:

The first argument is a pointer to be tested. The second argument is a metadata object representing a type identifier.

Overview:

The llvm.type.test intrinsic tests whether the given pointer is associated with the given type identifier.

‘llvm.type.checked.load’ Intrinsic

Syntax:

declare {ptr, i1} @llvm.type.checked.load(ptr %ptr, i32 %offset, metadata %type) nounwind memory(argmem: read)

Arguments:

The first argument is a pointer from which to load a function pointer. The second argument is the byte offset from which to load the function pointer. The third argument is a metadata object representing a type identifier.

Overview:

The llvm.type.checked.load intrinsic safely loads a function pointer from a virtual table pointer using type metadata. This intrinsic is used to implement control flow integrity in conjunction with virtual call optimization. The virtual call optimization pass will optimize away llvm.type.checked.load intrinsics associated with devirtualized calls, thereby removing the type check in cases where it is not needed to enforce the control flow integrity constraint.

If the given pointer is associated with a type metadata identifier, this function returns true as the second element of its return value. (Note that the function may also return true if the given pointer is not associated with a type metadata identifier.) If the function’s return value’s second element is true, the following rules apply to the first element:

• If the given pointer is associated with the given type metadata identifier, it is the function pointer loaded from the given byte offset from the given pointer.

• If the given pointer is not associated with the given type metadata identifier, it is one of the following (the choice of which is unspecified):

  1. The function pointer that would have been loaded from an arbitrarily chosen (through an unspecified mechanism) pointer associated with the type metadata.

  2. If the function has a non-void return type, a pointer to a function that returns an unspecified value without causing side effects.

If the function’s return value’s second element is false, the value of the first element is undefined.

‘llvm.type.checked.load.relative’ Intrinsic

Syntax:

declare {ptr, i1} @llvm.type.checked.load.relative(ptr %ptr, i32 %offset, metadata %type) nounwind memory(argmem: read)

Overview:

The llvm.type.checked.load.relative intrinsic loads a relative pointer to a function from a virtual table pointer using metadata. Otherwise, its semantic is identical to the llvm.type.checked.load intrinsic.

A relative pointer is a pointer to an offset to the pointed to value. The address of the underlying pointer of the relative pointer is obtained by adding the offset to the address of the offset value.

‘llvm.arithmetic.fence’ Intrinsic

Syntax:

declare <type>
@llvm.arithmetic.fence(<type> <op>)

Overview:

The purpose of the llvm.arithmetic.fence intrinsic is to prevent the optimizer from performing fast-math optimizations, particularly reassociation, between the argument and the expression that contains the argument. It can be used to preserve the parentheses in the source language.

Arguments:

The llvm.arithmetic.fence intrinsic takes only one argument. The argument and the return value are floating-point numbers, or vector floating-point numbers, of the same type.

Semantics:

This intrinsic returns the value of its operand. The optimizer can optimize the argument, but the optimizer cannot hoist any component of the operand to the containing context, and the optimizer cannot move the calculation of any expression in the containing context into the operand.

‘llvm.donothing’ Intrinsic

Syntax:

declare void @llvm.donothing() nounwind memory(none)

Overview:

The llvm.donothing intrinsic doesn’t perform any operation. It’s one of only three intrinsics (besides llvm.experimental.patchpoint and llvm.experimental.gc.statepoint) that can be called with an invoke instruction.

Arguments:

None.

Semantics:

This intrinsic does nothing, and it’s removed by optimizers and ignored by codegen.

‘llvm.experimental.deoptimize’ Intrinsic

Syntax:

declare type @llvm.experimental.deoptimize(...) [ "deopt"(...) ]

Overview:

This intrinsic, together with deoptimization operand bundles, allow frontends to express transfer of control and frame-local state from the currently executing (typically more specialized, hence faster) version of a function into another (typically more generic, hence slower) version.

In languages with a fully integrated managed runtime like Java and JavaScript this intrinsic can be used to implement “uncommon trap” or “side exit” like functionality. In unmanaged languages like C and C++, this intrinsic can be used to represent the slow paths of specialized functions.

Arguments:

The intrinsic takes an arbitrary number of arguments, whose meaning is decided by the lowering strategy.

Semantics:

The @llvm.experimental.deoptimize intrinsic executes an attached deoptimization continuation (denoted using a deoptimization operand bundle) and returns the value returned by the deoptimization continuation. Defining the semantic properties of the continuation itself is out of scope of the language reference – as far as LLVM is concerned, the deoptimization continuation can invoke arbitrary side effects, including reading from and writing to the entire heap.

Deoptimization continuations expressed using "deopt" operand bundles always continue execution to the end of the physical frame containing them, so all calls to @llvm.experimental.deoptimize must be in “tail position”:

• @llvm.experimental.deoptimize cannot be invoked.

• The call must immediately precede a ret instruction.

• The ret instruction must return the value produced by the @llvm.experimental.deoptimize call if there is one, or void.

Note that the above restrictions imply that the return type for a call to @llvm.experimental.deoptimize will match the return type of its immediate caller.

The inliner composes the "deopt" continuations of the caller into the "deopt" continuations present in the inlinee, and also updates calls to this intrinsic to return directly from the frame of the function it inlined into.

All declarations of @llvm.experimental.deoptimize must share the same calling convention.

Lowering:

Calls to @llvm.experimental.deoptimize are lowered to calls to the symbol __llvm_deoptimize (it is the frontend’s responsibility to ensure that this symbol is defined). The call arguments to @llvm.experimental.deoptimize are lowered as if they were formal arguments of the specified types, and not as varargs.

‘llvm.experimental.guard’ Intrinsic

Syntax:

declare void @llvm.experimental.guard(i1, ...) [ "deopt"(...) ]

Overview:

This intrinsic, together with deoptimization operand bundles, allows frontends to express guards or checks on optimistic assumptions made during compilation. The semantics of @llvm.experimental.guard is defined in terms of @llvm.experimental.deoptimize – its body is defined to be equivalent to:

define void @llvm.experimental.guard(i1 %pred, <args...>) {
  %realPred = and i1 %pred, undef
  br i1 %realPred, label %continue, label %leave [, !make.implicit !{}]

leave:
  call void @llvm.experimental.deoptimize(<args...>) [ "deopt"() ]
  ret void

continue:
  ret void
}

with the optional [, !make.implicit !{}] present if and only if it is present on the call site. For more details on !make.implicit, see FaultMaps and implicit checks.

In words, @llvm.experimental.guard executes the attached "deopt" continuation if (but not only if) its first argument is false. Since the optimizer is allowed to replace the undef with an arbitrary value, it can optimize guard to fail “spuriously”, i.e. without the original condition being false (hence the “not only if”); and this allows for “check widening” type optimizations.

@llvm.experimental.guard cannot be invoked.

After @llvm.experimental.guard was first added, a more general formulation was found in @llvm.experimental.widenable.condition. Support for @llvm.experimental.guard is slowly being rephrased in terms of this alternate.

‘llvm.experimental.widenable.condition’ Intrinsic

Syntax:

declare i1 @llvm.experimental.widenable.condition()

Overview:

This intrinsic represents a “widenable condition” which is boolean expressions with the following property: whether this expression is true or false, the program is correct and well-defined.

Together with deoptimization operand bundles, @llvm.experimental.widenable.condition allows frontends to express guards or checks on optimistic assumptions made during compilation and represent them as branch instructions on special conditions.

While this may appear similar in semantics to undef, it is very different in that an invocation produces a particular, singular value. It is also intended to be lowered late, and remain available for specific optimizations and transforms that can benefit from its special properties.

Arguments:

None.

Semantics:

The intrinsic @llvm.experimental.widenable.condition() returns either true or false. For each evaluation of a call to this intrinsic, the program must be valid and correct both if it returns true and if it returns false. This allows transformation passes to replace evaluations of this intrinsic with either value whenever one is beneficial.

When used in a branch condition, it allows us to choose between two alternative correct solutions for the same problem, like in example below:

  %cond = call i1 @llvm.experimental.widenable.condition()
  br i1 %cond, label %fast_path, label %slow_path

fast_path:
  ; Apply memory-consuming but fast solution for a task.

slow_path:
  ; Cheap in memory but slow solution.

Whether the result of intrinsic’s call is true or false, it should be correct to pick either solution. We can switch between them by replacing the result of @llvm.experimental.widenable.condition with different i1 expressions.

This is how it can be used to represent guards as widenable branches:

block:
  ; Unguarded instructions
  call void @llvm.experimental.guard(i1 %cond, <args...>) ["deopt"(<deopt_args...>)]
  ; Guarded instructions

Can be expressed in an alternative equivalent form of explicit branch using @llvm.experimental.widenable.condition:

block:
  ; Unguarded instructions
  %widenable_condition = call i1 @llvm.experimental.widenable.condition()
  %guard_condition = and i1 %cond, %widenable_condition
  br i1 %guard_condition, label %guarded, label %deopt

guarded:
  ; Guarded instructions

deopt:
  call type @llvm.experimental.deoptimize(<args...>) [ "deopt"(<deopt_args...>) ]

So the block guarded is only reachable when %cond is true, and it should be valid to go to the block deopt whenever %cond is true or false.

@llvm.experimental.widenable.condition will never throw, thus it cannot be invoked.

Guard widening:

When @llvm.experimental.widenable.condition() is used in condition of a guard represented as explicit branch, it is legal to widen the guard’s condition with any additional conditions.

Guard widening looks like replacement of

%widenable_cond = call i1 @llvm.experimental.widenable.condition()
%guard_cond = and i1 %cond, %widenable_cond
br i1 %guard_cond, label %guarded, label %deopt

with

%widenable_cond = call i1 @llvm.experimental.widenable.condition()
%new_cond = and i1 %any_other_cond, %widenable_cond
%new_guard_cond = and i1 %cond, %new_cond
br i1 %new_guard_cond, label %guarded, label %deopt

for this branch. Here %any_other_cond is an arbitrarily chosen well-defined i1 value. By making guard widening, we may impose stricter conditions on guarded block and bail to the deopt when the new condition is not met.

Lowering:

Default lowering strategy is replacing the result of call of @llvm.experimental.widenable.condition with constant true. However it is always correct to replace it with any other i1 value. Any pass can freely do it if it can benefit from non-default lowering.

‘llvm.allow.ubsan.check’ Intrinsic

Syntax:

declare i1 @llvm.allow.ubsan.check(i8 immarg %kind)

Overview:

This intrinsic returns true if and only if the compiler opted to enable the ubsan check in the current basic block.

Rules to allow ubsan checks are not part of the intrinsic declaration, and controlled by compiler options.

This intrinsic is the ubsan specific version of @llvm.allow.runtime.check().

Arguments:

An integer describing the kind of ubsan check guarded by the intrinsic.

Semantics:

The intrinsic @llvm.allow.ubsan.check() returns either true or false, depending on compiler options.

For each evaluation of a call to this intrinsic, the program must be valid and correct both if it returns true and if it returns false.

When used in a branch condition, it selects one of the two paths:

• true`: Executes the UBSan check and reports any failures.

• false: Bypasses the check, assuming it always succeeds.

Example:

  %allow = call i1 @llvm.allow.ubsan.check(i8 5)
  %not.allow = xor i1 %allow, true
  %cond = or i1 %ubcheck, %not.allow
  br i1 %cond, label %cont, label %trap

cont:
  ; Proceed

trap:
  call void @llvm.ubsantrap(i8 5)
  unreachable

‘llvm.allow.runtime.check’ Intrinsic

Syntax:

declare i1 @llvm.allow.runtime.check(metadata %kind)

Overview:

This intrinsic returns true if and only if the compiler opted to enable runtime checks in the current basic block.

Rules to allow runtime checks are not part of the intrinsic declaration, and controlled by compiler options.

This intrinsic is non-ubsan specific version of @llvm.allow.ubsan.check().

Arguments:

A string identifying the kind of runtime check guarded by the intrinsic. The string can be used to control rules to allow checks.

Semantics:

The intrinsic @llvm.allow.runtime.check() returns either true or false, depending on compiler options.

For each evaluation of a call to this intrinsic, the program must be valid and correct both if it returns true and if it returns false.

When used in a branch condition, it allows us to choose between two alternative correct solutions for the same problem.

If the intrinsic is evaluated as true, program should execute a guarded check. If the intrinsic is evaluated as false, the program should avoid any unnecessary checks.

Example:

  %allow = call i1 @llvm.allow.runtime.check(metadata !"my_check")
  br i1 %allow, label %fast_path, label %slow_path

fast_path:
  ; Omit diagnostics.

slow_path:
  ; Additional diagnostics.

‘llvm.load.relative’ Intrinsic

Syntax:

declare ptr @llvm.load.relative.iN(ptr %ptr, iN %offset) nounwind memory(argmem: read)

Overview:

This intrinsic loads a 32-bit value from the address %ptr + %offset, adds %ptr to that value and returns it. The constant folder specifically recognizes the form of this intrinsic and the constant initializers it may load from; if a loaded constant initializer is known to have the form i32 trunc(x - %ptr), the intrinsic call is folded to x.

LLVM provides that the calculation of such a constant initializer will not overflow at link time under the medium code model if x is an unnamed_addr function. However, it does not provide this guarantee for a constant initializer folded into a function body. This intrinsic can be used to avoid the possibility of overflows when loading from such a constant.

‘llvm.sideeffect’ Intrinsic

Syntax:

declare void @llvm.sideeffect() inaccessiblememonly nounwind willreturn

Overview:

The llvm.sideeffect intrinsic doesn’t perform any operation. Optimizers treat it as having side effects, so it can be inserted into a loop to indicate that the loop shouldn’t be assumed to terminate (which could potentially lead to the loop being optimized away entirely), even if it’s an infinite loop with no other side effects.

Arguments:

None.

Semantics:

This intrinsic actually does nothing, but optimizers must assume that it has externally observable side effects.

‘llvm.is.constant.*’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.is.constant with any argument type.

declare i1 @llvm.is.constant.i32(i32 %operand) nounwind memory(none)
declare i1 @llvm.is.constant.f32(float %operand) nounwind memory(none)
declare i1 @llvm.is.constant.TYPENAME(TYPE %operand) nounwind memory(none)

Overview:

The ‘llvm.is.constant’ intrinsic will return true if the argument is known to be a manifest compile-time constant. It is guaranteed to fold to either true or false before generating machine code.

Semantics:

This intrinsic generates no code. If its argument is known to be a manifest compile-time constant value, then the intrinsic will be converted to a constant true value. Otherwise, it will be converted to a constant false value.

In particular, note that if the argument is a constant expression which refers to a global (the address of which _is_ a constant, but not manifest during the compile), then the intrinsic evaluates to false.

The result also intentionally depends on the result of optimization passes – e.g., the result can change depending on whether a function gets inlined or not. A function’s parameters are obviously not constant. However, a call like llvm.is.constant.i32(i32 %param) can return true after the function is inlined, if the value passed to the function parameter was a constant.

‘llvm.ptrmask’ Intrinsic

Syntax:

declare ptrty llvm.ptrmask(ptrty %ptr, intty %mask) speculatable memory(none)

Arguments:

The first argument is a pointer or vector of pointers. The second argument is an integer or vector of integers with the same bit width as the index type size of the first argument.

Overview:

The llvm.ptrmask intrinsic masks out bits of the pointer according to a mask. This allows stripping data from tagged pointers without converting them to an integer (ptrtoint/inttoptr). As a consequence, we can preserve more information to facilitate alias analysis and underlying-object detection.

Semantics:

The result of ptrmask(%ptr, %mask) is equivalent to the following expansion, where iPtrIdx is the index type size of the pointer:

%intptr = ptrtoint ptr %ptr to iPtrIdx ; this may truncate
%masked = and iPtrIdx %intptr, %mask
%diff = sub iPtrIdx %masked, %intptr
%result = getelementptr i8, ptr %ptr, iPtrIdx %diff

If the pointer index type size is smaller than the pointer type size, this implies that pointer bits beyond the index size are not affected by this intrinsic. For integral pointers, it behaves as if the mask were extended with 1 bits to the pointer type size.

Both the returned pointer(s) and the first argument are based on the same underlying object (for more information on the based on terminology see the pointer aliasing rules).

The intrinsic only captures the pointer argument through the return value.

‘llvm.threadlocal.address’ Intrinsic

Syntax:

declare ptr @llvm.threadlocal.address(ptr) nounwind willreturn memory(none)

Arguments:

The llvm.threadlocal.address intrinsic requires a global value argument (a global variable or alias) that is thread local.

Semantics:

The address of a thread local global is not a constant, since it depends on the calling thread. The llvm.threadlocal.address intrinsic returns the address of the given thread local global in the calling thread.

‘llvm.vscale’ Intrinsic

Syntax:

declare i32 llvm.vscale.i32()
declare i64 llvm.vscale.i64()

Overview:

The llvm.vscale intrinsic returns the value for vscale in scalable vectors such as <vscale x 16 x i8>.

Semantics:

vscale is a positive value that is constant throughout program execution, but is unknown at compile time. If the result value does not fit in the result type, then the result is a poison value.

‘llvm.fake.use’ Intrinsic

Syntax:

declare void @llvm.fake.use(...)

Overview:

The llvm.fake.use intrinsic is a no-op. It takes a single value as an operand and is treated as a use of that operand, to force the optimizer to preserve that value prior to the fake use. This is used for extending the lifetimes of variables, where this intrinsic placed at the end of a variable’s scope helps prevent that variable from being optimized out.

Arguments:

The llvm.fake.use intrinsic takes one argument, which may be any function-local SSA value. Note that the signature is variadic so that the intrinsic can take any type of argument, but passing more than one argument will result in an error.

Semantics:

This intrinsic does nothing, but optimizers must consider it a use of its single operand and should try to preserve the intrinsic and its position in the function.

Stack Map Intrinsics

LLVM provides experimental intrinsics to support runtime patching mechanisms commonly desired in dynamic language JITs. These intrinsics are described in Stack maps and patch points in LLVM.

Element Wise Atomic Memory Intrinsics

These intrinsics are similar to the standard library memory intrinsics except that they perform memory transfer as a sequence of atomic memory accesses.

‘llvm.memcpy.element.unordered.atomic’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.memcpy.element.unordered.atomic on any integer bit width and for different address spaces. Not all targets support all bit widths however.

declare void @llvm.memcpy.element.unordered.atomic.p0.p0.i32(ptr <dest>,
                                                             ptr <src>,
                                                             i32 <len>,
                                                             i32 <element_size>)
declare void @llvm.memcpy.element.unordered.atomic.p0.p0.i64(ptr <dest>,
                                                             ptr <src>,
                                                             i64 <len>,
                                                             i32 <element_size>)

Overview:

The ‘llvm.memcpy.element.unordered.atomic.*’ intrinsic is a specialization of the ‘llvm.memcpy.*’ intrinsic. It differs in that the dest and src are treated as arrays with elements that are exactly element_size bytes, and the copy between buffers uses a sequence of unordered atomic load/store operations that are a positive integer multiple of the element_size in size.

Arguments:

The first three arguments are the same as they are in the @llvm.memcpy intrinsic, with the added constraint that len is required to be a positive integer multiple of the element_size. If len is not a positive integer multiple of element_size, then the behavior of the intrinsic is undefined.

element_size must be a compile-time constant positive power of two no greater than target-specific atomic access size limit.

For each of the input pointers align parameter attribute must be specified. It must be a power of two no less than the element_size. Caller guarantees that both the source and destination pointers are aligned to that boundary.

Semantics:

The ‘llvm.memcpy.element.unordered.atomic.*’ intrinsic copies len bytes of memory from the source location to the destination location. These locations are not allowed to overlap. The memory copy is performed as a sequence of load/store operations where each access is guaranteed to be a multiple of element_size bytes wide and aligned at an element_size boundary.

The order of the copy is unspecified. The same value may be read from the source buffer many times, but only one write is issued to the destination buffer per element. It is well defined to have concurrent reads and writes to both source and destination provided those reads and writes are unordered atomic when specified.

This intrinsic does not provide any additional ordering guarantees over those provided by a set of unordered loads from the source location and stores to the destination.

Lowering:

In the most general case call to the ‘llvm.memcpy.element.unordered.atomic.*’ is lowered to a call to the symbol __llvm_memcpy_element_unordered_atomic_*. Where ‘*’ is replaced with an actual element size. See RewriteStatepointsForGC intrinsic lowering for details on GC specific lowering.

Optimizer is allowed to inline memory copy when it’s profitable to do so.

‘llvm.memmove.element.unordered.atomic’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.memmove.element.unordered.atomic on any integer bit width and for different address spaces. Not all targets support all bit widths however.

declare void @llvm.memmove.element.unordered.atomic.p0.p0.i32(ptr <dest>,
                                                              ptr <src>,
                                                              i32 <len>,
                                                              i32 <element_size>)
declare void @llvm.memmove.element.unordered.atomic.p0.p0.i64(ptr <dest>,
                                                              ptr <src>,
                                                              i64 <len>,
                                                              i32 <element_size>)

Overview:

The ‘llvm.memmove.element.unordered.atomic.*’ intrinsic is a specialization of the ‘llvm.memmove.*’ intrinsic. It differs in that the dest and src are treated as arrays with elements that are exactly element_size bytes, and the copy between buffers uses a sequence of unordered atomic load/store operations that are a positive integer multiple of the element_size in size.

Arguments:

The first three arguments are the same as they are in the @llvm.memmove intrinsic, with the added constraint that len is required to be a positive integer multiple of the element_size. If len is not a positive integer multiple of element_size, then the behavior of the intrinsic is undefined.

element_size must be a compile-time constant positive power of two no greater than a target-specific atomic access size limit.

For each of the input pointers the align parameter attribute must be specified. It must be a power of two no less than the element_size. Caller guarantees that both the source and destination pointers are aligned to that boundary.

Semantics:

The ‘llvm.memmove.element.unordered.atomic.*’ intrinsic copies len bytes of memory from the source location to the destination location. These locations are allowed to overlap. The memory copy is performed as a sequence of load/store operations where each access is guaranteed to be a multiple of element_size bytes wide and aligned at an element_size boundary.

The order of the copy is unspecified. The same value may be read from the source buffer many times, but only one write is issued to the destination buffer per element. It is well defined to have concurrent reads and writes to both source and destination provided those reads and writes are unordered atomic when specified.

This intrinsic does not provide any additional ordering guarantees over those provided by a set of unordered loads from the source location and stores to the destination.

Lowering:

In the most general case call to the ‘llvm.memmove.element.unordered.atomic.*’ is lowered to a call to the symbol __llvm_memmove_element_unordered_atomic_*. Where ‘*’ is replaced with an actual element size. See RewriteStatepointsForGC intrinsic lowering for details on GC specific lowering.

The optimizer is allowed to inline the memory copy when it’s profitable to do so.

‘llvm.memset.element.unordered.atomic’ Intrinsic

Syntax:

This is an overloaded intrinsic. You can use llvm.memset.element.unordered.atomic on any integer bit width and for different address spaces. Not all targets support all bit widths however.

declare void @llvm.memset.element.unordered.atomic.p0.i32(ptr <dest>,
                                                          i8 <value>,
                                                          i32 <len>,
                                                          i32 <element_size>)
declare void @llvm.memset.element.unordered.atomic.p0.i64(ptr <dest>,
                                                          i8 <value>,
                                                          i64 <len>,
                                                          i32 <element_size>)

Overview:

The ‘llvm.memset.element.unordered.atomic.*’ intrinsic is a specialization of the ‘llvm.memset.*’ intrinsic. It differs in that the dest is treated as an array with elements that are exactly element_size bytes, and the assignment to that array uses uses a sequence of unordered atomic store operations that are a positive integer multiple of the element_size in size.

Arguments:

The first three arguments are the same as they are in the @llvm.memset intrinsic, with the added constraint that len is required to be a positive integer multiple of the element_size. If len is not a positive integer multiple of element_size, then the behavior of the intrinsic is undefined.

element_size must be a compile-time constant positive power of two no greater than target-specific atomic access size limit.

The dest input pointer must have the align parameter attribute specified. It must be a power of two no less than the element_size. Caller guarantees that the destination pointer is aligned to that boundary.

Semantics:

The ‘llvm.memset.element.unordered.atomic.*’ intrinsic sets the len bytes of memory starting at the destination location to the given value. The memory is set with a sequence of store operations where each access is guaranteed to be a multiple of element_size bytes wide and aligned at an element_size boundary.

The order of the assignment is unspecified. Only one write is issued to the destination buffer per element. It is well defined to have concurrent reads and writes to the destination provided those reads and writes are unordered atomic when specified.

This intrinsic does not provide any additional ordering guarantees over those provided by a set of unordered stores to the destination.

Lowering:

In the most general case call to the ‘llvm.memset.element.unordered.atomic.*’ is lowered to a call to the symbol __llvm_memset_element_unordered_atomic_*. Where ‘*’ is replaced with an actual element size.

The optimizer is allowed to inline the memory assignment when it’s profitable to do so.

Objective-C ARC Runtime Intrinsics

LLVM provides intrinsics that lower to Objective-C ARC runtime entry points. LLVM is aware of the semantics of these functions, and optimizes based on that knowledge. You can read more about the details of Objective-C ARC here.

‘llvm.objc.autorelease’ Intrinsic

Syntax:

declare ptr @llvm.objc.autorelease(ptr)

Lowering:

Lowers to a call to objc_autorelease.

‘llvm.objc.autoreleasePoolPop’ Intrinsic

Syntax:

declare void @llvm.objc.autoreleasePoolPop(ptr)

Lowering:

Lowers to a call to objc_autoreleasePoolPop.

‘llvm.objc.autoreleasePoolPush’ Intrinsic

Syntax:

declare ptr @llvm.objc.autoreleasePoolPush()

Lowering:

Lowers to a call to objc_autoreleasePoolPush.

‘llvm.objc.autoreleaseReturnValue’ Intrinsic

Syntax:

declare ptr @llvm.objc.autoreleaseReturnValue(ptr)

Lowering:

Lowers to a call to objc_autoreleaseReturnValue.

‘llvm.objc.copyWeak’ Intrinsic

Syntax:

declare void @llvm.objc.copyWeak(ptr, ptr)

Lowering:

Lowers to a call to objc_copyWeak.

‘llvm.objc.destroyWeak’ Intrinsic

Syntax:

declare void @llvm.objc.destroyWeak(ptr)

Lowering:

Lowers to a call to objc_destroyWeak.

‘llvm.objc.initWeak’ Intrinsic

Syntax:

declare ptr @llvm.objc.initWeak(ptr, ptr)

Lowering:

Lowers to a call to objc_initWeak.

‘llvm.objc.loadWeak’ Intrinsic

Syntax:

declare ptr @llvm.objc.loadWeak(ptr)

Lowering:

Lowers to a call to objc_loadWeak.

‘llvm.objc.loadWeakRetained’ Intrinsic

Syntax:

declare ptr @llvm.objc.loadWeakRetained(ptr)

Lowering:

Lowers to a call to objc_loadWeakRetained.

‘llvm.objc.moveWeak’ Intrinsic

Syntax:

declare void @llvm.objc.moveWeak(ptr, ptr)

Lowering:

Lowers to a call to objc_moveWeak.

‘llvm.objc.release’ Intrinsic

Syntax:

declare void @llvm.objc.release(ptr)

Lowering:

Lowers to a call to objc_release.

‘llvm.objc.retain’ Intrinsic

Syntax:

declare ptr @llvm.objc.retain(ptr)

Lowering:

Lowers to a call to objc_retain.

‘llvm.objc.retainAutorelease’ Intrinsic

Syntax:

declare ptr @llvm.objc.retainAutorelease(ptr)

Lowering:

Lowers to a call to objc_retainAutorelease.

‘llvm.objc.retainAutoreleaseReturnValue’ Intrinsic

Syntax:

declare ptr @llvm.objc.retainAutoreleaseReturnValue(ptr)

Lowering:

Lowers to a call to objc_retainAutoreleaseReturnValue.

‘llvm.objc.retainAutoreleasedReturnValue’ Intrinsic

Syntax:

declare ptr @llvm.objc.retainAutoreleasedReturnValue(ptr)

Lowering:

Lowers to a call to objc_retainAutoreleasedReturnValue.

‘llvm.objc.retainBlock’ Intrinsic

Syntax:

declare ptr @llvm.objc.retainBlock(ptr)

Lowering:

Lowers to a call to objc_retainBlock.

‘llvm.objc.storeStrong’ Intrinsic

Syntax:

declare void @llvm.objc.storeStrong(ptr, ptr)

Lowering:

Lowers to a call to objc_storeStrong.

‘llvm.objc.storeWeak’ Intrinsic

Syntax:

declare ptr @llvm.objc.storeWeak(ptr, ptr)

Lowering:

Lowers to a call to objc_storeWeak.

Preserving Debug Information Intrinsics

These intrinsics are used to carry certain debuginfo together with IR-level operations. For example, it may be desirable to know the structure/union name and the original user-level field indices. Such information got lost in IR GetElementPtr instruction since the IR types are different from debugInfo types and unions are converted to structs in IR.

‘llvm.preserve.array.access.index’ Intrinsic

Syntax:

declare <ret_type>
@llvm.preserve.array.access.index.p0s_union.anons.p0a10s_union.anons(<type> base,
                                                                     i32 dim,
                                                                     i32 index)

Overview:

The ‘llvm.preserve.array.access.index’ intrinsic returns the getelementptr address based on array base base, array dimension dim and the last access index index into the array. The return type ret_type is a pointer type to the array element. The array dim and index are preserved which is more robust than getelementptr instruction which may be subject to compiler transformation. The llvm.preserve.access.index type of metadata is attached to this call instruction to provide array or pointer debuginfo type. The metadata is a DICompositeType or DIDerivedType representing the debuginfo version of type.

Arguments:

The base is the array base address. The dim is the array dimension. The base is a pointer if dim equals 0. The index is the last access index into the array or pointer.

The base argument must be annotated with an elementtype attribute at the call-site. This attribute specifies the getelementptr element type.

Semantics:

The ‘llvm.preserve.array.access.index’ intrinsic produces the same result as a getelementptr with base base and access operands {dim's 0's, index}.

‘llvm.preserve.union.access.index’ Intrinsic

Syntax:

declare <type>
@llvm.preserve.union.access.index.p0s_union.anons.p0s_union.anons(<type> base,
                                                                  i32 di_index)

Overview:

The ‘llvm.preserve.union.access.index’ intrinsic carries the debuginfo field index di_index and returns the base address. The llvm.preserve.access.index type of metadata is attached to this call instruction to provide union debuginfo type. The metadata is a DICompositeType representing the debuginfo version of type. The return type type is the same as the base type.

Arguments:

The base is the union base address. The di_index is the field index in debuginfo.

Semantics:

The ‘llvm.preserve.union.access.index’ intrinsic returns the base address.

‘llvm.preserve.struct.access.index’ Intrinsic

Syntax:

declare <ret_type>
@llvm.preserve.struct.access.index.p0i8.p0s_struct.anon.0s(<type> base,
                                                           i32 gep_index,
                                                           i32 di_index)

Overview:

The ‘llvm.preserve.struct.access.index’ intrinsic returns the getelementptr address based on struct base base and IR struct member index gep_index. The llvm.preserve.access.index type of metadata is attached to this call instruction to provide struct debuginfo type. The metadata is a DICompositeType representing the debuginfo version of type. The return type ret_type is a pointer type to the structure member.

Arguments:

The base is the structure base address. The gep_index is the struct member index based on IR structures. The di_index is the struct member index based on debuginfo.

The base argument must be annotated with an elementtype attribute at the call-site. This attribute specifies the getelementptr element type.

Semantics:

The ‘llvm.preserve.struct.access.index’ intrinsic produces the same result as a getelementptr with base base and access operands {0, gep_index}.

‘llvm.fptrunc.round’ Intrinsic

Syntax:

declare <ty2>
@llvm.fptrunc.round(<type> <value>, metadata <rounding mode>)

Overview:

The ‘llvm.fptrunc.round’ intrinsic truncates floating-point value to type ty2 with a specified rounding mode.

Arguments:

The ‘llvm.fptrunc.round’ intrinsic takes a floating-point value to cast and a floating-point type to cast it to. This argument must be larger in size than the result.

The second argument specifies the rounding mode as described in the constrained intrinsics section. For this intrinsic, the “round.dynamic” mode is not supported.

Semantics:

The ‘llvm.fptrunc.round’ intrinsic casts a value from a larger floating-point type to a smaller floating-point type. This intrinsic is assumed to execute in the default floating-point environment except for the rounding mode. This intrinsic is not supported on all targets. Some targets may not support all rounding modes.