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Yuval Cassuto
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2020 – today
- 2024
- [i29]Yuval Ben-Hur, Yuval Cassuto:
Robust Regression with Ensembles Communicating over Noisy Channels. CoRR abs/2408.10942 (2024) - [i28]Avi Mizrahi, Noam Koren, Ori Rottenstreich, Yuval Cassuto:
Traffic-aware Merkle Trees for Shortening Blockchain Transaction Proofs. IACR Cryptol. ePrint Arch. 2024: 1451 (2024) - 2023
- [j39]Yongjune Kim, Junyoung Shin, Yuval Cassuto, Lav R. Varshney:
Distributed Boosting Classification Over Noisy Communication Channels. IEEE J. Sel. Areas Commun. 41(1): 141-154 (2023) - [j38]Yuval Ben-Hur, Asaf Goren, Da El Klang, Yongjune Kim, Yuval Cassuto:
Ensemble Classification With Noisy Real-Valued Base Functions. IEEE J. Sel. Areas Commun. 41(4): 1067-1080 (2023) - [j37]Yotam Gershon, Yuval Cassuto:
Genomic Compression With Read Alignment at the Decoder. IEEE J. Sel. Areas Inf. Theory 4: 314-330 (2023) - [j36]Jiheon Woo, Chanhee Yoo, Young-Sik Kim, Yuval Cassuto, Yongjune Kim:
Generalized LRS Estimator for Min-Entropy Estimation. IEEE Trans. Inf. Forensics Secur. 18: 3305-3317 (2023) - [c69]Yuval Ben-Hur, Yuval Cassuto:
Construction and Decoding of Codes over the Dual-Parameter Barrier Error Model. ISIT 2023: 1136-1141 - [c68]Natan Peled, Yuval Cassuto:
ECC-Map: A Resilient Wear-Leveled Memory-Device Architecture with Low Mapping Overhead. MEMSYS 2023: 5:1-5:12 - 2022
- [j35]Yongjune Kim, Yoocharn Jeon, Hyeokjin Choi, Cyril Guyot, Yuval Cassuto:
Optimizing Write Fidelity of MRAMs by Alternating Water-Filling Algorithm. IEEE Trans. Commun. 70(9): 5825-5836 (2022) - [j34]Eshed Ram, Yuval Cassuto:
On the Decoding Performance of Spatially Coupled LDPC Codes With Sub-Block Access. IEEE Trans. Inf. Theory 68(6): 3700-3718 (2022) - [c67]Jiheon Woo, Chanhee Yoo, Young-Sik Kim, Yuval Cassuto, Yongjune Kim:
Generalized Longest Repeated Substring Min-Entropy Estimator. ISIT 2022: 342-347 - [c66]Yotam Gershon, Yuval Cassuto:
Genomic Compression with Decoder Alignment under Single Deletion and Multiple Substitutions. ISIT 2022: 998-1003 - [c65]Yuval Ben-Hur, Asaf Goren, Da El Klang, Yongjune Kim, Yuval Cassuto:
Mitigating Noise in Ensemble Classification with Real-Valued Base Functions. ISIT 2022: 2279-2284 - [c64]Yuval Ben-Hur, Yuval Cassuto, Israel Cohen:
Regression with an Ensemble of Noisy Base Functions. MLSP 2022: 1-6 - [i27]Homa Esfahanizadeh, Eshed Ram, Yuval Cassuto, Lara Dolecek:
A Unified Spatially Coupled Code Design: Threshold, Cycles, and Locality. CoRR abs/2203.02052 (2022) - [i26]Yotam Gershon, Yuval Cassuto:
Genomic Compression with Read Alignment at the Decoder. CoRR abs/2205.07947 (2022) - 2021
- [j33]Yuval Cassuto, Jacob Ziv:
Efficient Compression of Long Arbitrary Sequences With No Reference at the Encoder. IEEE Trans. Inf. Theory 67(1): 1-9 (2021) - [j32]Eshed Ram, Yuval Cassuto:
Spatially Coupled LDPC Codes With Sub-Block Locality. IEEE Trans. Inf. Theory 67(5): 2739-2757 (2021) - [j31]Michael Gandelman, Yuval Cassuto:
Treeplication: An Erasure Code for Distributed Full Recovery Under the Random Multiset Channel. IEEE Trans. Inf. Theory 67(6): 3542-3556 (2021) - [j30]Eshed Ram, Yuval Cassuto:
Design of Bilayer and Multi-Layer LDPC Ensembles From Individual Degree Distributions. IEEE Trans. Inf. Theory 67(11): 7096-7109 (2021) - [c63]Yuval Ben-Hur, Yuval Cassuto:
Coding on Dual-Parameter Barrier Channels beyond Worst-Case Correction. GLOBECOM 2021: 1-6 - [c62]Yuval Cassuto, Yongjune Kim:
Boosting for Straggling and Flipping Classifiers. ISIT 2021: 2441-2446 - [c61]Yotam Gershon, Yuval Cassuto:
Efficient Distributed Source Coding of Fragmented Genomic Sequencing Data. ISIT 2021: 3302-3307 - [c60]Eshed Ram, Yuval Cassuto:
On the Decoding Performance of Spatially Coupled LDPC Codes with Sub-block Access. ISTC 2021: 1-5 - [i25]Yongjune Kim, Yoocharn Jeon, Hyeokjin Choi, Cyril Guyot, Yuval Cassuto:
Optimizing Write Fidelity of MRAMs via Iterative Water-filling Algorithm. CoRR abs/2112.02842 (2021) - [i24]Jiheon Woo, Chanhee Yoo, Young-Sik Kim, Yuval Cassuto, Yongjune Kim:
Generalized LRS Estimator for Min-entropy Estimation. CoRR abs/2112.09376 (2021) - 2020
- [j29]Netanel Raviv, Moshe Schwartz, Rami Cohen, Yuval Cassuto:
Hierarchical erasure correction of linear codes. Finite Fields Their Appl. 68: 101743 (2020) - [c59]Yongjune Kim, Yuval Cassuto, Lav R. Varshney:
Distributed Boosting Classifiers over Noisy Channels. ACSSC 2020: 1491-1496 - [c58]Homa Esfahanizadeh, Eshed Ram, Yuval Cassuto, Lara Dolecek:
Spatially Coupled Codes with Sub-Block Locality: Joint Finite Length-Asymptotic Design Approach. ISIT 2020: 467-472 - [c57]Yongjune Kim, Yoocharn Jeon, Cyril Guyot, Yuval Cassuto:
Optimizing the Write Fidelity of MRAMs. ISIT 2020: 792-797 - [i23]Yongjune Kim, Yoocharn Jeon, Cyril Guyot, Yuval Cassuto:
Optimizing the Write Fidelity of MRAMs. CoRR abs/2001.03803 (2020) - [i22]Yuval Cassuto, Jacob Ziv:
Efficient Compression of Long Arbitrary Sequences with No Reference at the Encoder. CoRR abs/2002.09893 (2020) - [i21]Michael Gandelman, Yuval Cassuto:
Treeplication: An Erasure Code for Distributed Full Recovery under the Random Multiset Channel. CoRR abs/2002.09895 (2020) - [i20]Homa Esfahanizadeh, Eshed Ram, Yuval Cassuto, Lara Dolecek:
Spatially Coupled Codes with Sub-Block Locality: Joint Finite Length-Asymptotic Design Approach. CoRR abs/2005.13450 (2020) - [i19]Eshed Ram, Yuval Cassuto:
On the Decoding Performance of Spatially Coupled LDPC Codes with Sub-block Access. CoRR abs/2010.10616 (2020) - [i18]Eshed Ram, Yuval Cassuto:
Design of Bilayer and Multi-layer LDPC Ensembles from Individual Degree Distributions. CoRR abs/2010.14758 (2020)
2010 – 2019
- 2019
- [j28]Yuval Ben-Hur, Yuval Cassuto:
Detection and Coding Schemes for Sneak-Path Interference in Resistive Memory Arrays. IEEE Trans. Commun. 67(6): 3821-3833 (2019) - [j27]Rami Cohen, Netanel Raviv, Yuval Cassuto:
LDPC Codes Over the q-ary Multi-Bit Channel. IEEE Trans. Inf. Theory 65(7): 4293-4306 (2019) - [j26]Amit Solomon, Yuval Cassuto:
Error-Correcting WOM Codes: Concatenation and Joint Design. IEEE Trans. Inf. Theory 65(9): 5529-5546 (2019) - [c56]Yongjune Kim, Won Ho Choi, Cyril Guyot, Yuval Cassuto:
On the Optimal Refresh Power Allocation for Energy-Efficient Memories. GLOBECOM 2019: 1-6 - [c55]Eshed Ram, Yuval Cassuto:
On Decoding Random-Access SC-LDPC Codes. ISIT 2019: 2429-2433 - [i17]Yongjune Kim, Won Ho Choi, Cyril Guyot, Yuval Cassuto:
On the Optimal Refresh Power Allocation for Energy-Efficient Memories. CoRR abs/1907.01112 (2019) - [i16]Yongjune Kim, Yuval Cassuto, Lav R. Varshney:
Boosting Classifiers with Noisy Inference. CoRR abs/1909.04766 (2019) - [i15]Eshed Ram, Yuval Cassuto:
Spatially Coupled LDPC Codes with Sub-Block Locality. CoRR abs/1910.12217 (2019) - 2018
- [j25]Evyatar Hemo, Yuval Cassuto:
A Constrained Coding Scheme for Correcting Asymmetric Magnitude-1 Errors in q-Ary Channels. IEEE Trans. Inf. Theory 64(2): 918-932 (2018) - [j24]Sarit Buzaglo, Yuval Cassuto, Paul H. Siegel, Eitan Yaakobi:
Consecutive Switch Codes. IEEE Trans. Inf. Theory 64(4): 2485-2498 (2018) - [j23]Ori Rottenstreich, Yuval Cassuto:
Optimal Compression for Two-Field Entries in Fixed-Width Memories. IEEE Trans. Inf. Theory 64(6): 4309-4322 (2018) - [c54]Barak Farbman, Yuval Cassuto, Alex Sprintson:
Coded Caching with Low Per-Request Complexity. Allerton 2018: 723-732 - [c53]Eshed Ram, Yuval Cassuto:
LDPC Codes with Local and Global Decoding. ISIT 2018: 1151-1155 - [c52]Amit Solomon, Yuval Cassuto:
Error-Correcting WOM Constructions through Concatenation and Joint Design. ISIT 2018: 1660-1664 - [c51]Netanel Raviv, Yuval Cassuto, Rami Cohen, Moshe Schwartz:
Erasure Correction of Scalar Codes in the Presence of Stragglers. ISIT 2018: 1983-1987 - [c50]Eshed Ram, Yuval Cassuto:
Spatially Coupled LDPC Codes with Random Access. ISTC 2018: 1-5 - [c49]Michael Gandelman, Yuval Cassuto:
Treeplication: An Erasure Code that is Almost as Painless as Replication. ITW 2018: 1-5 - [i14]Eshed Ram, Yuval Cassuto:
LDPC Codes with Local and Global Decoding. CoRR abs/1801.03951 (2018) - [i13]Netanel Raviv, Yuval Cassuto, Rami Cohen, Moshe Schwartz:
Erasure correction of scalar codes in the presence of stragglers. CoRR abs/1802.02265 (2018) - 2017
- [j22]Yair Allouche, Esther M. Arkin, Yuval Cassuto, Alon Efrat, Guy Grebla, Joseph S. B. Mitchell, Swaminathan Sankararaman, Michael Segal:
Secure communication through jammers jointly optimized in geography and time. Pervasive Mob. Comput. 41: 83-105 (2017) - [j21]Lara Dolecek, Yuval Cassuto:
Channel Coding for Nonvolatile Memory Technologies: Theoretical Advances and Practical Considerations. Proc. IEEE 105(9): 1705-1724 (2017) - [j20]Zhiying Wang, Han Mao Kiah, Yuval Cassuto, Jehoshua Bruck:
Switch Codes: Codes for Fully Parallel Reconstruction. IEEE Trans. Inf. Theory 63(4): 2061-2075 (2017) - [j19]Nitzan Adler, Yuval Cassuto:
Burst-Erasure Correcting Codes With Optimal Average Delay. IEEE Trans. Inf. Theory 63(5): 2848-2865 (2017) - [j18]Rami Cohen, Yuval Cassuto:
Coding for Improved Throughput Performance in Network Switches. IEEE/ACM Trans. Netw. 25(5): 2802-2814 (2017) - [c48]Zehui Chen, Clayton Schoeny, Yuval Cassuto, Lara Dolecek:
A coding scheme for reliable in-memory hamming distance computation. ACSSC 2017: 1713-1717 - [c47]Yuval Ben-Hur, Yuval Cassuto:
Detection and coding schemes for parallel interference in resistive memories. ICC 2017: 1-7 - [c46]Tal Mizrahi, Yoram Revah, Yehonathan Refael Kalim, Elad Kapuza, Yuval Cassuto:
FM-Delta: Fault Management packet compression. IM 2017: 596-599 - [c45]Rami Cohen, Yuval Cassuto:
Finite-length LDPC codes on the q-ary multi-bit channel. ISIT 2017: 1212-1216 - [c44]Yuval Cassuto, Evyatar Hemo, Sven Puchinger, Martin Bossert:
Multi-block interleaved codes for local and global read access. ISIT 2017: 1758-1762 - [c43]Ori Rottenstreich, Yuval Cassuto:
Optimal compression of element pairs in fixed-width memories. ITW 2017: 156-160 - [c42]Kfir Mizrachi, Ilan Bloom, Yuval Cassuto:
Memory reliability for cells with strong bit-coupling interference. MEMSYS 2017: 196-204 - [i12]Ori Rottenstreich, Yuval Cassuto:
Optimal Compression for Two-Field Entries in Fixed-Width Memories. CoRR abs/1701.02900 (2017) - [i11]Yuval Cassuto, Evyatar Hemo, Sven Puchinger, Martin Bossert:
Multi-Block Interleaved Codes for Local and Global Read Access. CoRR abs/1701.07184 (2017) - [i10]Tal Mizrahi, Yoram Revah, Yehonathan Refael Kalim, Elad Kapuza, Yuval Cassuto:
FM-Delta: Fault Management Packet Compression. CoRR abs/1701.08104 (2017) - [i9]Rami Cohen, Netanel Raviv, Yuval Cassuto:
LDPC Codes over the q-ary Multi-Bit Channel. CoRR abs/1706.09146 (2017) - 2016
- [j17]Evyatar Hemo, Yuval Cassuto:
d-Imbalance WOM Codes for Reduced Inter-Cell Interference in Multi-Level NVMs. IEEE J. Sel. Areas Commun. 34(9): 2378-2390 (2016) - [j16]Rami Cohen, Yuval Cassuto:
Iterative Decoding of LDPC Codes Over the q-Ary Partial Erasure Channel. IEEE Trans. Inf. Theory 62(5): 2658-2672 (2016) - [j15]Morteza Hashemi, Yuval Cassuto, Ari Trachtenberg:
Fountain Codes With Nonuniform Selection Distributions Through Feedback. IEEE Trans. Inf. Theory 62(7): 4054-4070 (2016) - [j14]Yuval Cassuto, Shahar Kvatinsky, Eitan Yaakobi:
Information-Theoretic Sneak-Path Mitigation in Memristor Crossbar Arrays. IEEE Trans. Inf. Theory 62(9): 4801-4813 (2016) - [c41]Rami Cohen, Yuval Cassuto:
Placement and read algorithms for high throughput in coded network switches. ISIT 2016: 250-254 - [c40]Sarit Buzaglo, Eitan Yaakobi, Yuval Cassuto, Paul H. Siegel:
Consecutive switch codes. ISIT 2016: 660-664 - [c39]Evyatar Hemo, Yuval Cassuto:
d-imbalance WOM codes for reduced inter-cell interference in multi-level NVMs. ISIT 2016: 940-944 - [c38]Yuval Cassuto, Shahar Kvatinsky, Eitan Yaakobi:
Write sneak-path constraints avoiding disturbs in memristor crossbar arrays. ISIT 2016: 950-954 - [c37]Rami Cohen, Yuval Cassuto:
LDPC codes for the q-ary bit-measurement channel. ISTC 2016: 261-265 - [c36]Alexander Spiegelman, Yuval Cassuto, Gregory V. Chockler, Idit Keidar:
Space Bounds for Reliable Storage: Fundamental Limits of Coding. PODC 2016: 249-258 - [c35]Rami Cohen, Yuval Cassuto:
Coded Network Switches for Improved Throughput. SYSTOR 2016: 19:1 - [i8]Rami Cohen, Yuval Cassuto:
Coding for Improved Throughput Performance in Network Switches. CoRR abs/1605.04510 (2016) - [i7]Evyatar Hemo, Yuval Cassuto:
$d$-imbalance WOM Codes for Reduced Inter-Cell Interference in Multi-Level NVMs. CoRR abs/1605.05281 (2016) - [i6]Evyatar Hemo, Yuval Cassuto:
A Constraint Scheme for Correcting Asymmetric Magnitude-1 Errors in q-ary Channels. CoRR abs/1607.00762 (2016) - 2015
- [j13]Evyatar Hemo, Yuval Cassuto:
Performance Coding: Codes for Fast Write and Read in Multi-Level NVMs. IEEE Trans. Commun. 63(3): 581-591 (2015) - [j12]Yuval Cassuto, Amin Shokrollahi:
Online Fountain Codes With Low Overhead. IEEE Trans. Inf. Theory 61(6): 3137-3149 (2015) - [c34]Eyal Zohar, Yuval Cassuto:
Data Compression Cost Optimization. DCC 2015: 393-402 - [c33]Esther M. Arkin, Yuval Cassuto, Alon Efrat, Guy Grebla, Joseph S. B. Mitchell, Swaminathan Sankararaman, Michael Segal:
Optimal placement of protective jammers for securing wireless transmissions in a geographic domain. IPSN 2015: 37-46 - [c32]Zhiying Wang, Han Mao Kiah, Yuval Cassuto:
Optimal binary switch codes with small query size. ISIT 2015: 636-640 - [c31]Rami Cohen, Yuval Cassuto:
Algorithms and throughput analysis for MDS-coded switches. ISIT 2015: 656-660 - [c30]Yuval Cassuto, Koby Crammer:
In-memory hamming similarity computation in resistive arrays. ISIT 2015: 819-823 - [c29]Evyatar Hemo, Yuval Cassuto:
A constraint scheme for correcting massive asymmetric magnitude-1 errors in multi-level NVMs. ISIT 2015: 2086-2090 - [c28]Nitzan Adler, Yuval Cassuto:
Low-delay erasure-correcting codes with optimal average delay. ISIT 2015: 2613-2617 - [c27]Rami Cohen, Yuval Cassuto:
Design of LDPC codes for the q-ary partial erasure channel. ITW 2015: 1-5 - [c26]Yair Allouche, Yuval Cassuto, Alon Efrat, Michael Segal, Esther M. Arkin, Guy Grebla, Joseph S. B. Mitchell, Swaminathan Sankararaman:
Secure Communication through Jammers Jointly Optimized in Geography and Time. MobiHoc 2015: 227-236 - [c25]Alexander Spiegelman, Yuval Cassuto, Gregory V. Chockler, Idit Keidar:
Space Bounds for Reliable Storage: Fundamental Limits of Coding (Keynote). OPODIS 2015: 4:1-4:3 - [i5]Morteza Hashemi, Yuval Cassuto, Ari Trachtenberg:
Fountain Codes with Nonuniform Selection Distributions through Feedback. CoRR abs/1504.01802 (2015) - [i4]Rami Cohen, Yuval Cassuto:
Algorithms and Throughput Analysis for MDS-Coded Switches. CoRR abs/1504.04803 (2015) - [i3]Alexander Spiegelman, Yuval Cassuto, Gregory V. Chockler, Idit Keidar:
Space Bounds for Reliable Storage: Fundamental Limits of Coding. CoRR abs/1507.05169 (2015) - [i2]Rami Cohen, Yuval Cassuto:
Iterative Decoding of LDPC Codes over the q-ary Partial Erasure Channel. CoRR abs/1510.05311 (2015) - 2014
- [j11]Ori Rottenstreich, Marat Radan, Yuval Cassuto, Isaac Keslassy, Carmi Arad, Tal Mizrahi, Yoram Revah, Avinatan Hassidim:
Compressing Forwarding Tables for Datacenter Scalability. IEEE J. Sel. Areas Commun. 32(1): 138-151 (2014) - [j10]Evyatar Hemo, Yuval Cassuto:
Adaptive Threshold Read Algorithms in Multi-Level Non-Volatile Memories. IEEE J. Sel. Areas Commun. 32(5): 847-856 (2014) - [j9]Yifat Levy, Jehoshua Bruck, Yuval Cassuto, Eby G. Friedman, Avinoam Kolodny, Eitan Yaakobi, Shahar Kvatinsky:
Logic operations in memory using a memristive Akers array. Microelectron. J. 45(11): 1429-1437 (2014) - [j8]Yuval Cassuto, Amin Shokrollahi:
LDPC Codes for 2D Arrays. IEEE Trans. Inf. Theory 60(6): 3279-3291 (2014) - [j7]Yuval Cassuto, Eitan Yaakobi:
Short \(Q\) -Ary Fixed-Rate WOM Codes for Guaranteed Rewrites and With Hot/Cold Write Differentiation. IEEE Trans. Inf. Theory 60(7): 3942-3958 (2014) - [c24]Evyatar Hemo, Yuval Cassuto:
Codes for high performance write and read processes in multi-level NVMs. ISIT 2014: 2092-2096 - [c23]Rami Cohen, Yuval Cassuto:
LDPC codes for partial-erasure channels in multi-level memories. ISIT 2014: 2097-2101 - [c22]Rami Cohen, Yuval Cassuto:
Estimation of the decoding threshold of LDPC codes over the q-ary partial erasure channel. ISTC 2014: 198-202 - [c21]Eyal Zohar, Yuval Cassuto:
Automatic and Dynamic Configuration of Data Compression for Web Servers. LISA 2014: 97-108 - [c20]Saher Odeh, Yuval Cassuto:
NAND flash architectures reducing write amplification through multi-write codes. MSST 2014: 1-10 - [i1]Rami Cohen, Yuval Cassuto:
LDPC Codes for Partial-Erasure Channels in Multi-Level Memories. CoRR abs/1401.4799 (2014) - 2013
- [j6]Yuval Cassuto:
What can coding theory do for storage systems? SIGACT News 44(1): 80-88 (2013) - [j5]Yuval Cassuto, Jehoshua Bruck, Robert J. McEliece:
On the Average Complexity of Reed-Solomon List Decoders. IEEE Trans. Inf. Theory 59(4): 2336-2351 (2013) - [c19]Morteza Hashemi, Ari Trachtenberg, Yuval Cassuto:
Delete-and-Conquer: Rateless coding with constrained feedback. Allerton 2013: 350-357 - [c18]Ori Rottenstreich, Marat Radan, Yuval Cassuto, Isaac Keslassy, Carmi Arad, Tal Mizrahi, Yoram Revah, Avinatan Hassidim:
Compressing forwarding tables. INFOCOM 2013: 1231-1239 - [c17]Yuval Cassuto, Shahar Kvatinsky, Eitan Yaakobi:
Sneak-path constraints in memristor crossbar arrays. ISIT 2013: 156-160 - [c16]Evyatar Hemo, Yuval Cassuto:
Adaptive threshold read algorithms in multi-level non-volatile memories. ISIT 2013: 714-718 - [c15]Zhiying Wang, Omer Shaked, Yuval Cassuto, Jehoshua Bruck:
Codes for network switches. ISIT 2013: 1057-1061 - [c14]Ori Rottenstreich, Amit Berman, Yuval Cassuto, Isaac Keslassy:
Compression for fixed-width memories. ISIT 2013: 2379-2383 - 2012
- [j4]Yuval Cassuto, Jehoshua Bruck:
Low-Complexity Array Codes for Random and Clustered 4-Erasures. IEEE Trans. Inf. Theory 58(1): 146-158 (2012) - [c13]Yuval Cassuto, Eitan Yaakobi:
Short q-ary WOM codes with hot/cold write differentiation. ISIT 2012: 1391-1395 - 2011
- [j3]Yuval Cassuto, Mario Blaum:
Codes for Symbol-Pair Read Channels. IEEE Trans. Inf. Theory 57(12): 8011-8020 (2011) - [c12]Yuval Cassuto, Mohammad Amin Shokrollahi:
Array-code ensembles -or- two-dimensional LDPC codes. ISIT 2011: 518-522 - [c11]Yuval Cassuto, Simon Litsyn:
Symbol-pair codes: Algebraic constructions and asymptotic bounds. ISIT 2011: 2348-2352 - [c10]Yuval Cassuto, Amin Shokrollahi:
On-line fountain codes for semi-random loss channels. ITW 2011: 262-266 - 2010
- [j2]Yuval Cassuto, Moshe Schwartz, Vasken Bohossian, Jehoshua Bruck:
Codes for asymmetric limited-magnitude errors with application to multilevel flash memories. IEEE Trans. Inf. Theory 56(4): 1582-1595 (2010) - [c9]Yuval Cassuto, Mario Blaum:
Codes for symbol-pair read channels. ISIT 2010: 988-992 - [c8]Yuval Cassuto, Zvonimir Bandic:
Low-complexity wire-tap codes with security and error-correction guarantees. ITW 2010: 1-5 - [c7]Yuval Cassuto, Marco A. A. Sanvido, Cyril Guyot, David R. Hall, Zvonimir Bandic:
Indirection systems for shingled-recording disk drives. MSST 2010: 1-14
2000 – 2009
- 2009
- [j1]Yuval Cassuto, Jehoshua Bruck:
Cyclic Lowest Density MDS Array Codes. IEEE Trans. Inf. Theory 55(4): 1721-1729 (2009) - 2008
- [c6]Yuval Cassuto, Jehoshua Bruck:
Array codes for clustered column erasures. ISIT 2008: 1726-1730 - 2007
- [c5]Yuval Cassuto, Moshe Schwartz, Vasken Bohossian, Jehoshua Bruck:
Codes for Multi-Level Flash Memories: Correcting Asymmetric Limited-Magnitude Errors. ISIT 2007: 1176-1180 - 2006
- [c4]Sidharth Jaggi, Yuval Cassuto, Michelle Effros:
Low Complexity Encoding for Network Codes. ISIT 2006: 40-44 - [c3]Yuval Cassuto, Jehoshua Bruck:
Cyclic Low-Density MDS Array Codes. ISIT 2006: 2794-2798 - 2005
- [c2]Yuval Cassuto, Jehoshua Bruck:
Network coding for non-uniform demands. ISIT 2005: 1720-1724 - 2004
- [c1]Yuval Cassuto, Jehoshua Bruck:
Miscorrection probability beyond the minimum distance. ISIT 2004: 523
Coauthor Index
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