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Xiaowei Li 0001

李晓维

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unicode name: 李晓维
affiliation: Chinese Academy of Sciences, Institute of Computing Technology, State Key Laboratory of Computer Architecture, Beijing, China
affiliation (1997 - 1999): University of Hong Kong, Department of Electrical and Electronic Engineering, Hong Kong
affiliation (1993 - 2000): Peking University, Department of Computer Science, Beijing, China
affiliation (PhD 1991): Chinese Academy of Sciences, Institute of Computing Technology, Beijing, China

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2020 – today

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2025
[j165]
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Zhiteng Chao, Xindi Zhang, Junying Huang, Zizhen Liu, Yixuan Zhao, Jing Ye, Shaowei Cai, Huawei Li, Xiaowei Li:
A fast test compaction method using dedicated Pure MaxSAT solver embedded in DFT flow. Integr. 100: 102265 (2025)
2024
[j164]
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Yunkun Liao, Jingya Wu, Wenyan Lu, Xiaowei Li, Guihai Yan:
DPU-Direct: Unleashing Remote Accelerators via Enhanced RDMA for Disaggregated Datacenters. IEEE Trans. Computers 73(8): 2081-2095 (2024)
[j163]
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Hongyan Li, Hang Lu, Xiaowei Li:
Mortar-FP8: Morphing the Existing FP32 Infrastructure for High-Performance Deep Learning Acceleration. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(3): 878-891 (2024)
[j162]
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Xinmiao Zhang, Cheng Liu, Jiacheng Ni, Yuanqing Cheng, Lei Zhang, Huawei Li, Xiaowei Li:
PDG: A Prefetcher for Dynamic Graph Updating. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(4): 1246-1259 (2024)
[j161]
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Liang Chang, Hang Lu, Chenglong Li, Xin Zhao, Zhicheng Hu, Jun Zhou, Xiaowei Li:
General Purpose Deep Learning Accelerator Based on Bit Interleaving. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(5): 1470-1483 (2024)
[j160]
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Lian Liu, Ying Wang, Xiandong Zhao, Weiwei Chen, Huawei Li, Xiaowei Li, Yinhe Han:
An Automatic Neural Network Architecture-and-Quantization Joint Optimization Framework for Efficient Model Inference. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(5): 1497-1510 (2024)
[j159]
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Mingkai Chen, Cheng Liu, Shengwen Liang, Lei He, Ying Wang, Lei Zhang, Huawei Li, Xiaowei Li:
An Energy-Efficient In-Memory Accelerator for Graph Construction and Updating. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(6): 1781-1793 (2024)
[j158]
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Yintao He, Bing Li, Ying Wang, Cheng Liu, Huawei Li, Xiaowei Li:
A Task-Adaptive In-Situ ReRAM Computing for Graph Convolutional Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(9): 2635-2646 (2024)
[j157]
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Zizhen Liu, Weiyang He, Chip-Hong Chang, Jing Ye, Huawei Li, Xiaowei Li:
SPFL: A Self-Purified Federated Learning Method Against Poisoning Attacks. IEEE Trans. Inf. Forensics Secur. 19: 6604-6619 (2024)
[j156]
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Haitong Huang, Cheng Liu, Xinghua Xue, Bo Liu, Huawei Li, Xiaowei Li:
MRFI: An Open-Source Multiresolution Fault Injection Framework for Neural Network Processing. IEEE Trans. Very Large Scale Integr. Syst. 32(7): 1325-1335 (2024)
[c292]
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Fuping Li, Ying Wang, Yujie Wang, Mengdi Wang, Yinhe Han, Huawei Li, Xiaowei Li:
Chipletizer: Repartitioning SoCs for Cost-Effective Chiplet Integration. ASPDAC 2024: 58-64
[c291]
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Lei Dai, Shengwen Liang, Ying Wang, Huawei Li, Xiaowei Li:
APoX: Accelerate Graph-Based Deep Point Cloud Analysis via Adaptive Graph Construction. ASPDAC 2024: 231-237
[c290]
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Zhiteng Chao, Xindi Zhang, Junying Huang, Jing Ye, Shaowei Cai, Huawei Li, Xiaowei Li:
A Fast Test Compaction Method for Commercial DFT Flow Using Dedicated Pure-MaxSAT Solver. ASPDAC 2024: 503-508
[c289]
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Yunkun Liao, Jingya Wu, Wenyan Lu, Xiaowei Li, Guihai Yan:
PHD: Parallel Huffman Decoder on FPGA for Extreme Performance and Energy Efficiency. DAC 2024: 6:1-6:6
[c288]
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Jianan Mu, Husheng Han, Shangyi Shi, Jing Ye, Zizhen Liu, Shengwen Liang, Meng Li, Mingzhe Zhang, Song Bian, Xing Hu, Huawei Li, Xiaowei Li:
Alchemist: A Unified Accelerator Architecture for Cross-Scheme Fully Homomorphic Encryption. DAC 2024: 26:1-26:6
[c287]
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Haishuang Fan, Qichu Sun, Jingya Wu, Wenyan Lu, Xiaowei Li, Guihai Yan:
Co-Via: A Video Frame Interpolation Accelerator Exploiting Codec Information Reuse. DAC 2024: 43:1-43:6
[c286]
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Kaiyan Chang, Kun Wang, Nan Yang, Ying Wang, Dantong Jin, Wenlong Zhu, Zhirong Chen, Cangyuan Li, Hao Yan, Yunhao Zhou, Zhuoliang Zhao, Yuan Cheng, Yudong Pan, Yiqi Liu, Mengdi Wang, Shengwen Liang, Yinhe Han, Huawei Li, Xiaowei Li:
Data is all you need: Finetuning LLMs for Chip Design via an Automated design-data augmentation framework. DAC 2024: 60:1-60:6
[c285]
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Lian Liu, Zhaohui Xu, Yintao He, Ying Wang, Huawei Li, Xiaowei Li, Yinhe Han:
Drift: Leveraging Distribution-based Dynamic Precision Quantization for Efficient Deep Neural Network Acceleration. DAC 2024: 140:1-140:6
[c284]
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Yibo Du, Ying Wang, Bing Li, Fuping Li, Shengwen Liang, Huawei Li, Xiaowei Li, Yinhe Han:
Chiplever: Towards Effortless Extension of Chiplet-based System for FHE. DAC 2024: 243:1-243:6
[c283]
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Yibo Du, Shengwen Liang, Ying Wang, Huawei Li, Xiaowei Li, Yinhe Han:
GPACE: An Energy-Efficient PQ-Based GCN Accelerator with Redundancy Reduction. DATE 2024: 1-6
[c282]
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Yintao He, Shixin Zhao, Songyun Qu, Huawei Li, Xiaowei Li, Ying Wang:
Bit-Trimmer: Ineffectual Bit-Operation Removal for CLM Architecture. DATE 2024: 1-6
[c281]
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Shengwen Liang, Ziming Yuan, Ying Wang, Dawen Xu, Huawei Li, Xiaowei Li:
HyQA: Hybrid Near-Data Processing Platform for Embedding Based Question Answering System. DATE 2024: 1-6
[c280]
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Han Yan, Shuai Chen, Junying Huang, Jing Ye, Huawei Li, Xiaowei Li:
A Fully Pipelined High-Performance Elliptic Curve Cryptography Processor for NIST P-256. ETS 2024: 1-4
[c279]
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Yunkun Liao, Jingya Wu, Wenyan Lu, Xiaowei Li, Guihai Yan:
Efficient RNIC Cache Side-Channel Attack Detection Through DPU-Driven Architecture. Euro-Par (2) 2024: 3-17
[c278]
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Yunkun Liao, Hanyue Lin, Jingya Wu, Wenyan Lu, Huawei Li, Xiaowei Li, Guihai Yan:
Athena: Add More Intelligence to RMT-Based Network Data Plane with Low-Bit Quantization. Euro-Par (2) 2024: 259-273
[c277]
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Haishuang Fan, Rui Meng, Qichu Sun, Jingya Wu, Wenyan Lu, Xiaowei Li, Guihai Yan:
AMST: Accelerating Large-Scale Graph Minimum Spanning Tree Computation on FPGA. IPDPS 2024: 157-168
[c276]
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Zhiteng Chao, Qinluan Dai, Jiale Li, Zizhen Liu, Wenxing Li, Hongqin Lyu, Jing Ye, Huawei Li, Xiaowei Li:
A Static Test Compaction Method Based on GCN Assisted Fault Gate Classification. ITC-Asia 2024: 1-6
[c275]
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Mingjun Wang, Hui Wang, Jianan Mu, Zizhen Liu, Jun Gao, Jing Ye, Huawei Li, Xiaowei Li:
Efficient Functional Safety Method for Gate-Level Fine-Grained Digital Circuits with ISO-26262. ITC-Asia 2024: 1-6
[i24]
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  - journals/corr/abs-2403-11202
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Kaiyan Chang, Kun Wang, Nan Yang, Ying Wang, Dantong Jin, Wenlong Zhu, Zhirong Chen, Cangyuan Li, Hao Yan, Yunhao Zhou, Zhuoliang Zhao, Yuan Cheng, Yudong Pan, Yiqi Liu, Mengdi Wang, Shengwen Liang, Yinhe Han, Huawei Li, Xiaowei Li:
Data is all you need: Finetuning LLMs for Chip Design via an Automated design-data augmentation framework. CoRR abs/2403.11202 (2024)
[i23]
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Qing Zhang, Cheng Liu, Siting Liu, Yajuan Hui, Huawei Li, Xiaowei Li:
ApproxPilot: A GNN-based Accelerator Approximation Framework. CoRR abs/2407.11324 (2024)
[i22]
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Fangfa Fu, Wenyu Zhang, Zesong Jiang, Zhiyu Zhu, Guoyu Li, Bing Yang, Cheng Liu, Liyi Xiao, Jinxiang Wang, Huawei Li, Xiaowei Li:
SigDLA: A Deep Learning Accelerator Extension for Signal Processing. CoRR abs/2407.12565 (2024)
[i21]
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Xinmiao Zhang, Zheng Feng, Shengwen Liang, Xinyu Chen, Cheng Liu, Huawei Li, Xiaowei Li:
Graphitron: A Domain Specific Language for FPGA-based Graph Processing Accelerator Generation. CoRR abs/2407.12575 (2024)
[i20]
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Zesong Jiang, Qing Zhang, Cheng Liu, Huawei Li, Xiaowei Li:
IICPilot: An Intelligent Integrated Circuit Backend Design Framework Using Open EDA. CoRR abs/2407.12576 (2024)
2023
[b1]
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Xiaowei Li, Guihai Yan, Cheng Liu:
Built-in Fault-Tolerant Computing Paradigm for Resilient Large-Scale Chip Design - A Self-Test, Self-Diagnosis, and Self-Repair-Based Approach. Springer 2023, ISBN 978-981-19-8550-8, pp. 1-304
[j155]
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Hao Kong, Wenyan Lu, Yan Chen, Jingya Wu, Yu Zhang, Guihai Yan, Xiaowei Li:
DOE: database offloading engine for accelerating SQL processing. Distributed Parallel Databases 41(3): 273-297 (2023)
[j154]
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Yipei Yang, Zongyue Wang, Jing Ye, Junfeng Fan, Shuai Chen, Huawei Li, Xiaowei Li, Yuan Cao:
Chosen ciphertext correlation power analysis on Kyber. Integr. 91: 10-22 (2023)
[j153]
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Wen Li, Ying Wang, Cheng Liu, Yintao He, Lian Liu, Huawei Li, Xiaowei Li:
On-Line Fault Protection for ReRAM-Based Neural Networks. IEEE Trans. Computers 72(2): 423-437 (2023)
[j152]
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Jianan Mu, Yi Ren, Wen Wang, Yizhong Hu, Shuai Chen, Chip-Hong Chang, Junfeng Fan, Jing Ye, Yuan Cao, Huawei Li, Xiaowei Li:
Scalable and Conflict-Free NTT Hardware Accelerator Design: Methodology, Proof, and Implementation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(5): 1504-1517 (2023)
[j151]
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Haitong Huang, Xinghua Xue, Cheng Liu, Ying Wang, Tao Luo, Long Cheng, Huawei Li, Xiaowei Li:
Statistical Modeling of Soft Error Influence on Neural Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(11): 4152-4163 (2023)
[j150]
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Yinghao Yang, Hang Lu, Xiaowei Li:
Poseidon-NDP: Practical Fully Homomorphic Encryption Accelerator Based on Near Data Processing Architecture. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(12): 4749-4762 (2023)
[j149]
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Zizhen Liu, Si Chen, Jing Ye, Junfeng Fan, Huawei Li, Xiaowei Li:
DHSA: efficient doubly homomorphic secure aggregation for cross-silo federated learning. J. Supercomput. 79(3): 2819-2849 (2023)
[j148]
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Cheng Chu, Cheng Liu, Dawen Xu, Ying Wang, Tao Luo, Huawei Li, Xiaowei Li:
Accelerating Deformable Convolution Networks with Dynamic and Irregular Memory Accesses. ACM Trans. Design Autom. Electr. Syst. 28(4): 67:1-67:23 (2023)
[j147]
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Hongyan Li, Hang Lu, Haoxuan Wang, Shengji Deng, Xiaowei Li:
BitXpro: Regularity-Aware Hardware Runtime Pruning for Deep Neural Networks. IEEE Trans. Very Large Scale Integr. Syst. 31(1): 90-103 (2023)
[j146]
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Xinghua Xue, Cheng Liu, Bo Liu, Haitong Huang, Ying Wang, Tao Luo, Lei Zhang, Huawei Li, Xiaowei Li:
Exploring Winograd Convolution for Cost-Effective Neural Network Fault Tolerance. IEEE Trans. Very Large Scale Integr. Syst. 31(11): 1763-1773 (2023)
[j145]
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Xinghua Xue, Cheng Liu, Ying Wang, Bing Yang, Tao Luo, Lei Zhang, Huawei Li, Xiaowei Li:
Soft Error Reliability Analysis of Vision Transformers. IEEE Trans. Very Large Scale Integr. Syst. 31(12): 2126-2136 (2023)
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Zhiteng Chao, Senlin Wang, Pengyu Tian, Shuwen Yuan, Huawei Li, Jing Ye, Xiaowei Li:
A Distributed ATPG System Combining Test Compaction Based on Pure MaxSAT. ATS 2023: 1-6
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Wen Li, Ying Wang, Kaiwei Zou, Huawei Li, Xiaowei Li:
Adversarial Testing: A Novel On-Line Testing Method for Deep Learning Processors. ATS 2023: 1-6
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Jianan Mu, Huajie Tan, Shuai Chen, Min Cai, Jing Ye, Huawei Li, Xiaowei Li:
Configurable and High-Level Pipelined Lattice-Based Post Quantum Cryptography Hardware Accelerator Design. ATS 2023: 1-6
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Yipei Yang, Junying Huang, Zongyue Wang, Jing Ye, Zihao Sun, Junfeng Fan, Shuai Chen, Huawei Li, Xiaowei Li, Yuan Cao:
A Template Attack on Reduction Without Reference Device on Kyber. ATS 2023: 1-6
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Jianan Mu, Huajie Tan, Jiawen Wu, Haotian Lu, Chip-Hong Chang, Shuai Chen, Shengwen Liang, Jing Ye, Huawei Li, Xiaowei Li:
Energy-efficient NTT Design with One-bank SRAM and 2-D PE Array. DATE 2023: 1-2
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Chaofang Ma, Jianan Mu, Jing Ye, Shuai Chen, Yuan Cao, Huawei Li, Xiaowei Li:
Online Reliability Evaluation Design: Select Reliable CRPs for Arbiter PUF and Its Variants. ETS 2023: 1-6
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Haishuang Fan, Jingya Wu, Wenyan Lu, Xiaowei Li, Guihai Yan:
Co-ViSu: a Video Super-Resolution Accelerator Exploiting Codec Information Reuse. FPL 2023: 93-100
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Yunkun Liao, Jingya Wu, Wenyan Lu, Xiaowei Li, Guihai Yan:
Optimize the TX Architecture of RDMA NIC for Performance Isolation in the Cloud Environment. ACM Great Lakes Symposium on VLSI 2023: 29-35
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Hao Kong, Haishuang Fan, Jingya Wu, Liyun Cheng, Yan Chen, Wenyan Lu, Guihai Yan, Xiaowei Li:
KPU-SQL: Kernel Processing Unit for High-Performance SQL Acceleration. ACM Great Lakes Symposium on VLSI 2023: 37-43
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Haishuang Fan, Jingya Wu, Wenyan Lu, Xiaowei Li, Guihai Yan:
M2VT: A Multi-Output Encoder Accelerator for Multiple-Way Video Transcoding. ACM Great Lakes Symposium on VLSI 2023: 69-75
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Yinghao Yang, Huaizhi Zhang, Shengyu Fan, Hang Lu, Mingzhe Zhang, Xiaowei Li:
Poseidon: Practical Homomorphic Encryption Accelerator. HPCA 2023: 870-881
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Erjing Luo, Haitong Huang, Cheng Liu, Guoyu Li, Bing Yang, Ying Wang, Huawei Li, Xiaowei Li:
DeepBurning-MixQ: An Open Source Mixed-Precision Neural Network Accelerator Design Framework for FPGAs. ICCAD 2023: 1-9
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Yibo Du, Ying Wang, Shengwen Liang, Huawei Li, Xiaowei Li, Yinhe Han:
PANG: A Pattern-Aware GCN Accelerator for Universal Graphs. ICCD 2023: 263-266
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Haishuang Fan, Ming Li, Jingya Wu, Wenyan Lu, Xiaowei Li, Guihai Yan:
BitColor: Accelerating Large-Scale Graph Coloring on FPGA with Parallel Bit-Wise Engines. ICPP 2023: 492-502
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Xinghua Xue, Cheng Liu, Ying Wang, Bing Yang, Tao Luo, Lei Zhang, Huawei Li, Xiaowei Li:
Reliability Analysis of Vision Transformers. CoRR abs/2302.10468 (2023)
[i18]
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Xinghua Xue, Cheng Liu, Haitong Huang, Ying Wang, Bing Yang, Tao Luo, Lei Zhang, Huawei Li, Xiaowei Li:
ApproxABFT: Approximate Algorithm-Based Fault Tolerance for Vision Transformers. CoRR abs/2302.10469 (2023)
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Kaiyan Chang, Ying Wang, Haimeng Ren, Mengdi Wang, Shengwen Liang, Yinhe Han, Huawei Li, Xiaowei Li:
ChipGPT: How far are we from natural language hardware design. CoRR abs/2305.14019 (2023)
[i16]
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Haitong Huang, Cheng Liu, Xinghua Xue, Ying Wang, Huawei Li, Xiaowei Li:
MRFI: An Open Source Multi-Resolution Fault Injection Framework for Neural Network Processing. CoRR abs/2306.11758 (2023)
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Xinghua Xue, Cheng Liu, Bo Liu, Haitong Huang, Ying Wang, Tao Luo, Lei Zhang, Huawei Li, Xiaowei Li:
Exploring Winograd Convolution for Cost-effective Neural Network Fault Tolerance. CoRR abs/2308.08230 (2023)
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Erjing Luo, Haitong Huang, Cheng Liu, Guoyu Li, Bing Yang, Ying Wang, Huawei Li, Xiaowei Li:
DeepBurning-MixQ: An Open Source Mixed-Precision Neural Network Accelerator Design Framework for FPGAs. CoRR abs/2308.11334 (2023)
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Zizhen Liu, Weiyang He, Chip-Hong Chang, Jing Ye, Huawei Li, Xiaowei Li:
SPFL: A Self-purified Federated Learning Method Against Poisoning Attacks. CoRR abs/2309.10607 (2023)
[i12]
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Qing Zhang, Cheng Liu, Bo Liu, Haitong Huang, Ying Wang, Huawei Li, Xiaowei Li:
Cross-Layer Optimization for Fault-Tolerant Deep Learning. CoRR abs/2312.13754 (2023)
2022
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Shengwen Liang, Ying Wang, Huawei Li, Xiaowei Li:
Cognitive SSD+: a deep learning engine for energy-efficient unstructured data retrieval. CCF Trans. High Perform. Comput. 4(3): 302-320 (2022)
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Wenxing Li, Ning Lin, Mingzhe Zhang, Hang Lu, Xiaoming Chen, Xiaowei Li:
VNet: a versatile network to train real-time semantic segmentation models on a single GPU. Sci. China Inf. Sci. 65(3) (2022)
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Zihao Sun, Yu Hu, Longxing Yang, Shun Lu, Jilin Mei, Yinhe Han, Xiaowei Li:
STC-NAS: Fast neural architecture search with source-target consistency. Neurocomputing 497: 227-238 (2022)
[j141]
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Ruhui Ma, Jin Cao, Dengguo Feng, Hui Li, Xiaowei Li, Yang Xu:
A robust authentication scheme for remote diagnosis and maintenance in 5G V2N. J. Netw. Comput. Appl. 198: 103281 (2022)
[j140]
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Jingya Wu, Wenyan Lu, Guihai Yan, Xiaowei Li:
Portrait: A holistic computation and bandwidth balanced performance evaluation model for heterogeneous systems. Sustain. Comput. Informatics Syst. 35: 100724 (2022)
[j139]
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Kaiwei Zou, Ying Wang, Long Cheng, Songyun Qu, Huawei Li, Xiaowei Li:
CAP: Communication-Aware Automated Parallelization for Deep Learning Inference on CMP Architectures. IEEE Trans. Computers 71(7): 1626-1639 (2022)
[j138]
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Ying Wang, Yintao He, Long Cheng, Huawei Li, Xiaowei Li:
A Fast Precision Tuning Solution for Always-On DNN Accelerators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(5): 1236-1248 (2022)
[j137]
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Yintao He, Ying Wang, Huawei Li, Xiaowei Li:
Saving Energy of RRAM-Based Neural Accelerator Through State-Aware Computing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(7): 2115-2127 (2022)
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Yongchen Wang, Ying Wang, Huawei Li, Xiaowei Li:
An Efficient Deep Learning Accelerator Architecture for Compressed Video Analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(9): 2808-2820 (2022)
[j135]
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Cheng Liu, Cheng Chu, Dawen Xu, Ying Wang, Qianlong Wang, Huawei Li, Xiaowei Li, Kwang-Ting Cheng:
HyCA: A Hybrid Computing Architecture for Fault-Tolerant Deep Learning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(10): 3400-3413 (2022)
[j134]
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Dawen Xu, Zhuangyu Feng, Cheng Liu, Li Li, Ying Wang, Huawei Li, Xiaowei Li:
Taming Process Variations in CNFET for Efficient Last-Level Cache Design. IEEE Trans. Very Large Scale Integr. Syst. 30(4): 418-431 (2022)
[c260]
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Jianan Mu, Yixuan Zhao, Zongyue Wang, Jing Ye, Junfeng Fan, Shuai Chen, Huawei Li, Xiaowei Li, Yuan Cao:
A Voltage Template Attack on the Modular Polynomial Subtraction in Kyber. ASP-DAC 2022: 672-677
[c259]
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Yintao He, Songyun Qu, Ying Wang, Bing Li, Huawei Li, Xiaowei Li:
InfoX: an energy-efficient ReRAM accelerator design with information-lossless low-bit ADCs. DAC 2022: 97-102
[c258]
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Shengwen Liang, Ying Wang, Ziming Yuan, Cheng Liu, Huawei Li, Xiaowei Li:
VStore: in-storage graph based vector search accelerator. DAC 2022: 997-1002
[c257]
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Fuping Li, Ying Wang, Cheng Liu, Huawei Li, Xiaowei Li:
NoCeption: A Fast PPA Prediction Framework for Network-on-Chips Using Graph Neural Network. DATE 2022: 1035-1040
[c256]
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Fuping Li, Ying Wang, Yuanqing Cheng, Yujie Wang, Yinhe Han, Huawei Li, Xiaowei Li:
GIA: A Reusable General Interposer Architecture for Agile Chiplet Integration. ICCAD 2022: 42:1-42:9
[c255]
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Lei Dai, Ying Wang, Cheng Liu, Fuping Li, Huawei Li, Xiaowei Li:
Reexamining CGRA Memory Sub-system for Higher Memory Utilization and Performance. ICCD 2022: 42-49
[c254]
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Wenyan Lu, Yan Chen, Jingya Wu, Yu Zhang, Xiaowei Li, Guihai Yan:
DOE: Database Offloading Engine for Accelerating SQL Processing. ICDE Workshops 2022: 129-134
[c253]
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Zihao Sun, Yu Hu, Shun Lu, Longxing Yang, Jilin Mei, Yinhe Han, Xiaowei Li:
AGNAS: Attention-Guided Micro and Macro-Architecture Search. ICML 2022: 20777-20789
[c252]
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Longxing Yang, Yu Hu, Shun Lu, Zihao Sun, Jilin Mei, Yinhe Han, Xiaowei Li:
Searching for BurgerFormer with Micro-Meso-Macro Space Design. ICML 2022: 25055-25069
[c251]
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Jingyu Niu, Yu Hu, Wei Li, Guangyan Huang, Yinhe Han, Xiaowei Li:
Closing the Dynamics Gap via Adversarial and Reinforcement Learning for High-Speed Racing. IJCNN 2022: 1-10
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Yixiao Chen, Jinfeng Song, Shuai Chen, Yuan Cao, Jing Ye, Huawei Li, Xiaowei Li, Xin Lou, Enyi Yao:
Exploring the high-throughput and low-delay hardware design of SM4 on FPGA. ISOCC 2022: 211-212
[c249]
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Zizhen Liu, Si Chen, Jing Ye, Junfeng Fan, Huawei Li, Xiaowei Li:
SASH: Efficient secure aggregation based on SHPRG for federated learning. UAI 2022: 1243-1252
[c248]
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Cheng Liu, Zhen Gao, Siting Liu, Xuefei Ning, Huawei Li, Xiaowei Li:
Special Session: Fault-Tolerant Deep Learning: A Hierarchical Perspective. VTS 2022: 1-12
[i11]
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Cheng Liu, Zhen Gao, Siting Liu, Xuefei Ning, Huawei Li, Xiaowei Li:
Fault-Tolerant Deep Learning: A Hierarchical Perspective. CoRR abs/2204.01942 (2022)
[i10]
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Zizhen Liu, Si Chen, Jing Ye, Junfeng Fan, Huawei Li, Xiaowei Li:
DHSA: Efficient Doubly Homomorphic Secure Aggregation for Cross-silo Federated Learning. CoRR abs/2208.07189 (2022)
[i9]
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Haitong Huang, Xinghua Xue, Cheng Liu, Ying Wang, Tao Luo, Long Cheng, Huawei Li, Xiaowei Li:
Statistical Modeling of Soft Error Influence on Neural Networks. CoRR abs/2210.05876 (2022)
2021
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Najmeh Samadiani, Guangyan Huang, Yu Hu, Xiaowei Li:
Happy Emotion Recognition From Unconstrained Videos Using 3D Hybrid Deep Features. IEEE Access 9: 35524-35538 (2021)
[j132]
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Yibin Tang, Ying Wang, Huawei Li, Xiaowei Li:
To cloud or not to cloud: an on-line scheduler for dynamic privacy-protection of deep learning workload on edge devices. CCF Trans. High Perform. Comput. 3(1): 85-100 (2021)
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Lidong Zhang, Mengmeng Zhang, Jian Wang, Xiaowei Li, Wenxing Zhu:
Internet connected vehicle platoon system modeling and linear stability analysis. Comput. Commun. 174: 92-100 (2021)
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Shijun Gong, Jiajun Li, Wenyan Lu, Guihai Yan, Xiaowei Li:
ShuntFlowPlus: An Efficient and Scalable Dataflow Accelerator Architecture for Stream Applications. ACM J. Emerg. Technol. Comput. Syst. 17(4): 59:1-59:24 (2021)
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Shengwen Liang, Ying Wang, Cheng Liu, Lei He, Huawei Li, Dawen Xu, Xiaowei Li:
EnGN: A High-Throughput and Energy-Efficient Accelerator for Large Graph Neural Networks. IEEE Trans. Computers 70(9): 1511-1525 (2021)
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Ying Wang, Yongchen Wang, Cong Shi, Long Cheng, Huawei Li, Xiaowei Li:
An Edge 3D CNN Accelerator for Low-Power Activity Recognition. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(5): 918-930 (2021)
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Ning Lin, Xiaoming Chen, Hang Lu, Xiaowei Li:
Chaotic Weights: A Novel Approach to Protect Intellectual Property of Deep Neural Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(7): 1327-1339 (2021)
[j126]
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Dawen Xu, Meng He, Cheng Liu, Ying Wang, Long Cheng, Huawei Li, Xiaowei Li, Kwang-Ting Cheng:
R2F: A Remote Retraining Framework for AIoT Processors With Computing Errors. IEEE Trans. Very Large Scale Integr. Syst. 29(11): 1955-1966 (2021)
[c247]
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Longxing Yang, Yu Hu, Shun Lu, Zihao Sun, Jilin Mei, Yiming Zeng, Zhiping Shi, Yinhe Han, Xiaowei Li:
DDSAS: Dynamic and Differentiable Space-Architecture Search. ACML 2021: 284-299
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Ning Lin, Xiaoming Chen, Chunwei Xia, Jing Ye, Xiaowei Li:
ChaoPIM: A PIM-based Protection Framework for DNN Accelerators Using Chaotic Encryption. ATS 2021: 1-6
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Yunying Ye, Shan Li, Haihua Shen, Huawei Li, Xiaowei Li:
SeGa: A Trojan Detection Method Combined With Gate Semantics. ATS 2021: 43-48
[c244]
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Shun Lu, Yu Hu, Longxing Yang, Zihao Sun, Jilin Mei, Yiming Zeng, Xiaowei Li:
DU-DARTS: Decreasing the Uncertainty of Differentiable Architecture Search. BMVC 2021: 133
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Lei He, Cheng Liu, Ying Wang, Shengwen Liang, Huawei Li, Xiaowei Li:
GCiM: A Near-Data Processing Accelerator for Graph Construction. DAC 2021: 205-210
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Yintao He, Ying Wang, Cheng Liu, Huawei Li, Xiaowei Li:
TARe: Task-Adaptive in-situ ReRAM Computing for Graph Learning. DAC 2021: 577-582
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Yongchen Wang, Ying Wang, Huawei Li, Xiaowei Li:
PixelSieve: Towards Efficient Activity Analysis From Compressed Video Streams. DAC 2021: 811-816
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Hongyan Li, Hang Lu, Jiawen Huang, Wenxu Wang, Mingzhe Zhang, Wei Chen, Liang Chang, Xiaowei Li:
BitX: Empower Versatile Inference with Hardware Runtime Pruning. ICPP 2021: 15:1-15:12
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Wei Li, Yu Hu, Yinhe Han, Xiaowei Li:
KFS-LIO: Key-Feature Selection for Lightweight Lidar Inertial Odometry. ICRA 2021: 5042-5048
[c238]
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Cangyuan Li, Ying Wang, Cheng Liu, Shengwen Liang, Huawei Li, Xiaowei Li:
GLIST: Towards In-Storage Graph Learning. USENIX ATC 2021: 225-238
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Huawei Li, Xiaowei Li, Yu Huang, Ying Wang, Gary Guo:
Special Session - Test for AI Chips: from DFT to On-line Testing. VTS 2021: 1
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Dawen Xu, Qianlong Wang, Cheng Liu, Cheng Chu, Ying Wang, Huawei Li, Xiaowei Li, Kwang-Ting Cheng:
HyCA: A Hybrid Computing Architecture for Fault Tolerant Deep Learning. CoRR abs/2106.04772 (2021)
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Dawen Xu, Cheng Chu, Cheng Liu, Ying Wang, Huawei Li, Xiaowei Li, Kwang-Ting Cheng:
Energy-Efficient Accelerator Design for Deformable Convolution Networks. CoRR abs/2107.02547 (2021)
[i6]
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Dawen Xu, Meng He, Cheng Liu, Ying Wang, Long Cheng, Huawei Li, Xiaowei Li, Kwang-Ting Cheng:
R2F: A Remote Retraining Framework for AIoT Processors with Computing Errors. CoRR abs/2107.03096 (2021)
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Dawen Xu, Zhuangyu Feng, Cheng Liu, Li Li, Ying Wang, Yuanqing Cheng, Huawei Li, Xiaowei Li:
Taming Process Variations in CNFET for Efficient Last Level Cache Design. CoRR abs/2108.05023 (2021)
[i4]
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Zizhen Liu, Si Chen, Jing Ye, Junfeng Fan, Huawei Li, Xiaowei Li:
Efficient Secure Aggregation Based on SHPRG For Federated Learning. CoRR abs/2111.12321 (2021)
2020
[j125]
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Qingli Guo, Jing Ye, Yu Hu, Guohe Zhang, Xiaowei Li, Huawei Li:
MultiPAD: A Multivariant Partition-Based Method for Audio Adversarial Examples Detection. IEEE Access 8: 63368-63380 (2020)
[j124]
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Chengqiang Yin, Shourui Wang, Xiaowei Li, Guanhao Yuan, Chao Jiang:
Trajectory Tracking Based on Adaptive Sliding Mode Control for Agricultural Tractor. IEEE Access 8: 113021-113029 (2020)
[j123]
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Qingli Guo, Jing Ye, Yiran Chen, Yu Hu, Yazhu Lan, Guohe Zhang, Xiaowei Li:
INOR - An Intelligent noise reduction method to defend against adversarial audio examples. Neurocomputing 401: 160-172 (2020)
[j122]
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Huina Chao, Huawei Li, Xiaoyu Song, Tiancheng Wang, Xiaowei Li:
Evaluating and Constraining Hardware Assertions with Absent Scenarios. J. Comput. Sci. Technol. 35(5): 1198-1216 (2020)
[j121]
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Shuhao Jiang, Jiajun Li, Shijun Gong, Junchao Yan, Guihai Yan, Yi Sun, Xiaowei Li:
BZIP: A compact data memory system for UTXO-based blockchains. J. Syst. Archit. 109: 101809 (2020)
[j120]
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Hang Lu, Mingzhe Zhang, Yinhe Han, Qi Wang, Huawei Li, Xiaowei Li:
Architecting Effectual Computation for Machine Learning Accelerators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(10): 2654-2667 (2020)
[c236]
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Bosheng Liu, Xiaoming Chen, Yinhe Han, Ying Wang, Jiajun Li, Haobo Xu, Xiaowei Li:
Search-free Accelerator for Sparse Convolutional Neural Networks. ASP-DAC 2020: 524-529
[c235]
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Yipei Yang, Jing Ye, Yuan Cao, Jiliang Zhang, Xiaowei Li, Huawei Li, Yu Hu:
Survey: Hardware Trojan Detection for Netlist. ATS 2020: 1-6
[c234]
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Yixuan Zhao, Zhiteng Chao, Jing Ye, Wen Wang, Yuan Cao, Shuai Chen, Xiaowei Li, Huawei Li:
Optimization Space Exploration of Hardware Design for CRYSTALS-KYBER. ATS 2020: 1-6
[c233]
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Beibei Jin, Yu Hu, Qiankun Tang, Jingyu Niu, Zhiping Shi, Yinhe Han, Xiaowei Li:
Exploring Spatial-Temporal Multi-Frequency Analysis for High-Fidelity and Temporal-Consistency Video Prediction. CVPR 2020: 4553-4562
[c232]
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Yintao He, Ying Wang, Xiandong Zhao, Huawei Li, Xiaowei Li:
Towards State-Aware Computation in ReRAM Neural Networks. DAC 2020: 1-6
[c231]
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Yongchen Wang, Ying Wang, Huawei Li, Yinhe Han, Xiaowei Li:
An Efficient Deep Learning Accelerator for Compressed Video Analysis. DAC 2020: 1-6
[c230]
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Qingli Guo, Jing Ye, Jiliang Zhang, Yu Hu, Xiaowei Li, Huawei Li:
Prediction Stability: A New Metric for Quantitatively Evaluating DNN Outputs. ACM Great Lakes Symposium on VLSI 2020: 537-542
[c229]
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Ying Wang, Mengdi Wang, Bing Li, Huawei Li, Xiaowei Li:
A Many-Core Accelerator Design for On-Chip Deep Reinforcement Learning. ICCAD 2020: 46:1-46:7
[c228]
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Shengwen Liang, Cheng Liu, Ying Wang, Huawei Li, Xiaowei Li:
DeepBurning-GL: an Automated Framework for Generating Graph Neural Network Accelerators. ICCAD 2020: 72:1-72:9
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Jingyu Niu, Yu Hu, Beibei Jin, Yinhe Han, Xiaowei Li:
Two-Stage Safe Reinforcement Learning for High-Speed Autonomous Racing. SMC 2020: 3934-3941
[c226]
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Zizhen Liu, Jing Ye, Xing Hu, Huawei Li, Xiaowei Li, Yu Hu:
Sequence Triggered Hardware Trojan in Neural Network Accelerator. VTS 2020: 1-6
[i3]
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Beibei Jin, Yu Hu, Qiankun Tang, Jingyu Niu, Zhiping Shi, Yinhe Han, Xiaowei Li:
Exploring Spatial-Temporal Multi-Frequency Analysis for High-Fidelity and Temporal-Consistency Video Prediction. CoRR abs/2002.09905 (2020)

2010 – 2019

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What is the meaning of the colors in the publication lists?

2019
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Xiaowei Li, Wenjie Li, Jing Ye, Huawei Li, Yu Hu:
Scan Chain Based Attacks and Countermeasures: A Survey. IEEE Access 7: 85055-85065 (2019)
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Sheng Xu, Xiaoming Chen, Ying Wang, Yinhe Han, Xuehai Qian, Xiaowei Li:
PIMSim: A Flexible and Detailed Processing-in-Memory Simulator. IEEE Comput. Archit. Lett. 18(1): 6-9 (2019)
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Bosheng Liu, Xiaoming Chen, Yinhe Han, Jiajun Li, Haobo Xu, Xiaowei Li:
Accelerating DNN-based 3D point cloud processing for mobile computing. Sci. China Inf. Sci. 62(11): 212206:1-212206:11 (2019)
[j116]
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Shichang Zhang, Ying Wang, Xiaoming Chen, Yinhe Han, Yujie Wang, Xiaowei Li:
Thread: Towards fine-grained precision reconfiguration in variable-precision neural network accelerator. IEICE Electron. Express 16(14): 20190145 (2019)
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Qingli Guo, Jing Ye, Bing Li, Yu Hu, Xiaowei Li, Yazhu Lan, Guohe Zhang:
PUFPass: A password management mechanism based on software/hardware codesign. Integr. 64: 173-183 (2019)
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Yibin Tang, Ying Wang, Huawei Li, Xiaowei Li:
MV-Net: Toward Real-Time Deep Learning on Mobile GPGPU Systems. ACM J. Emerg. Technol. Comput. Syst. 15(4): 35:1-35:25 (2019)
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Wenyan Lu, Guihai Yan, Jiajun Li, Shijun Gong, Shuhao Jiang, Jingya Wu, Xiaowei Li:
Promoting the Harmony between Sparsity and Regularity: A Relaxed Synchronous Architecture for Convolutional Neural Networks. IEEE Trans. Computers 68(6): 867-881 (2019)
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Jiajun Li, Shuhao Jiang, Shijun Gong, Jingya Wu, Junchao Yan, Guihai Yan, Xiaowei Li:
SqueezeFlow: A Sparse CNN Accelerator Exploiting Concise Convolution Rules. IEEE Trans. Computers 68(11): 1663-1677 (2019)
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Yun Cheng, Huawei Li, Ying Wang, Xiaowei Li:
Cluster Restoration-Based Trace Signal Selection for Post-Silicon Debug. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(4): 767-779 (2019)
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Hang Lu, Yisong Chang, Guihai Yan, Ning Lin, Xin Wei, Xiaowei Li:
ShuttleNoC: Power-Adaptable Communication Infrastructure for Many-Core Processors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(8): 1438-1451 (2019)
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Ying Wang, Huawei Li, Long Cheng, Xiaowei Li:
A QoS-QoR Aware CNN Accelerator Design Approach. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(11): 1995-2007 (2019)
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Xiaowei Li, Dengqi Yang, Xing Zeng, Benhui Chen, Yuqing Zhang:
Comments on "Provably Secure Dynamic Id-Based Anonymous Two-Factor Authenticated Key Exchange Protocol With Extended Security Model". IEEE Trans. Inf. Forensics Secur. 14(12): 3344-3345 (2019)
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Jiajun Li, Guihai Yan, Wenyan Lu, Shijun Gong, Shuhao Jiang, Jingya Wu, Xiaowei Li:
SynergyFlow: An Elastic Accelerator Architecture Supporting Batch Processing of Large-Scale Deep Neural Networks. ACM Trans. Design Autom. Electr. Syst. 24(1): 8:1-8:27 (2019)
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Sheng Xu, Xiaoming Chen, Ying Wang, Yinhe Han, Xiaowei Li:
CuckooPIM: an efficient and less-blocking coherence mechanism for processing-in-memory systems. ASP-DAC 2019: 140-145
[c224]
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Jiajun Li, Ying Wang, Bosheng Liu, Yinhe Han, Xiaowei Li:
Simulate-the-hardware: training accurate binarized neural networks for low-precision neural accelerators. ASP-DAC 2019: 323-328
[c223]
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Ning Lin, Hang Lu, Xin Wei, Xiaowei Li:
Redeeming chip-level power efficiency by collaborative management of the computation and communication. ASP-DAC 2019: 376-381
[c222]
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Jiajun Li, Guihai Yan, Wenyan Lu, Shuhao Jiang, Shijun Gong, Jingya Wu, Junchao Yan, Xiaowei Li:
TNPU: an efficient accelerator architecture for training convolutional neural networks. ASP-DAC 2019: 450-455
[c221]
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Wen Li, Ying Wang, Huawei Li, Xiaowei Li:
P³M: a PIM-based neural network model protection scheme for deep learning accelerator. ASP-DAC 2019: 633-638
[c220]
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Bosheng Liu, Xiaoming Chen, Ying Wang, Yinhe Han, Jiajun Li, Haobo Xu, Xiaowei Li:
Addressing the issue of processing element under-utilization in general-purpose systolic deep learning accelerators. ASP-DAC 2019: 733-738
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Renjie Lu, Haihua Shen, Yu Su, Huawei Li, Xiaowei Li:
GramsDet: Hardware Trojan Detection Based on Recurrent Neural Network. ATS 2019: 111-116
[c218]
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Ning Lin, Hang Lu, Xin Wei, Xiaowei Li:
HeadStart: Enforcing Optimal Inceptions in Pruning Deep Neural Networks for Efficient Inference on GPGPUs. DAC 2019: 23
[c217]
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Shijun Gong, Jiajun Li, Wenyan Lu, Guihai Yan, Xiaowei Li:
ShuntFlow: An Efficient and Scalable Dataflow Accelerator Architecture for Streaming Applications. DAC 2019: 194
[c216]
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Ying Wang, Shengwen Liang, Huawei Li, Xiaowei Li:
A None-Sparse Inference Accelerator that Distills and Reuses the Computation Redundancy in CNNs. DAC 2019: 202
[c215]
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Yongchen Wang, Ying Wang, Huawei Li, Cong Shi, Xiaowei Li:
Systolic Cube: A Spatial 3D CNN Accelerator Architecture for Low Power Video Analysis. DAC 2019: 210
[c214]
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Kaiwei Zou, Ying Wang, Huawei Li, Xiaowei Li:
Learn-to-Scale: Parallelizing Deep Learning Inference on Chip Multiprocessor Architecture. DATE 2019: 1172-1177
[c213]
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Shengwen Liang, Ying Wang, Cheng Liu, Huawei Li, Xiaowei Li:
InS-DLA: An In-SSD Deep Learning Accelerator for Near-Data Processing. FPL 2019: 173-179
[c212]
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Jingya Wu, Wenyan Lu, Guihai Yan, Xiaowei Li:
MLA: Machine Learning Adaptation for Realtime Streaming Financial Applications. IGSC 2019: 1-6
[c211]
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Yintao He, Ying Wang, Yongchen Wang, Huawei Li, Xiaowei Li:
An Agile Precision-Tunable CNN Accelerator based on ReRAM. ICCAD 2019: 1-7
[c210]
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Wen Li, Ying Wang, Huawei Li, Xiaowei Li:
RRAMedy: Protecting ReRAM-Based Neural Network from Permanent and Soft Faults During Its Lifetime. ICCD 2019: 91-99
[c209]
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Ning Lin, Hang Lu, Xing Hu, Jingliang Gao, Mingzhe Zhang, Xiaowei Li:
When Deep Learning Meets the Edge: Auto-Masking Deep Neural Networks for Efficient Machine Learning on Edge Devices. ICCD 2019: 506-514
[c208]
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Ning Lin, Hang Lu, Jingliang Gao, Shunjie Qiao, Xiaowei Li:
VNet: A Versatile Network for Efficient Real-Time Semantic Segmentation. ICCD 2019: 626-629
[c207]
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Shuhao Jiang, Jiajun Li, Shijun Gong, Junchao Yan, Guihai Yan, Yi Sun, Xiaowei Li:
BZIP: A Compact Data Memory System for UTXO-based Blockchains. ICESS 2019: 1-8
[c206]
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Kuozhong Zhang, Junying Huang, Jing Ye, Xiaochun Ye, Da Wang, Dongrui Fan, Huawei Li, Xiaowei Li, Zhimin Zhang:
iATPG: Instruction-level Automatic Test Program Generation for Vulnerabilities under DVFS attack. IOLTS 2019: 287-292
[c205]
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Michiko Inoue, Xiaowei Li, Cheng-Wen Wu:
Asian Test Symposium - Past, Present and Future -. ITC 2019: 1-4
[c204]
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Huawei Li, Xiaowei Li, Yinhe Han:
China Test Conference (CTC) - Extending the Global Test Forum to China. ITC 2019: 1-4
[c203]
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Yipei Yang, Jing Ye, Xiaowei Li, Yinhe Han, Huawei Li, Yu Hu:
Implementation of Parametric Hardware Trojan in FPGA. ITC-Asia 2019: 37-42
[c202]
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Junying Huang, Jing Ye, Xiaochun Ye, Da Wang, Dongrui Fan, Huawei Li, Xiaowei Li, Zhimin Zhang:
Instruction Vulnerability Test and Code Optimization Against DVFS Attack. ITC-Asia 2019: 49-54
[c201]
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Li Li, Dawen Xu, Kouzi Xing, Cheng Liu, Ying Wang, Huawei Li, Xiaowei Li:
Squeezing the Last MHz for CNN Acceleration on FPGAs. ITC-Asia 2019: 151-156
[c200]
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Shengwen Liang, Ying Wang, Youyou Lu, Zhe Yang, Huawei Li, Xiaowei Li:
Cognitive SSD: A Deep Learning Engine for In-Storage Data Retrieval. USENIX ATC 2019: 395-410
[c199]
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Wen Li, Ying Wang, Huawei Li, Xiaowei Li:
Leveraging Memory PUFs and PIM-based encryption to secure edge deep learning systems. VTS 2019: 1-6
[i2]
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Renjie Lu, Haihua Shen, Feng Zhang, Huawei Li, Wei Zhao, Xiaowei Li:
HTDet: A Clustering Method using Information Entropy for Hardware Trojan Detection. CoRR abs/1906.06996 (2019)
2018
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Xiaowei Li, Guihai Yan, Jing Ye, Ying Wang:
Fault tolerance on-chip: a reliable computing paradigm using self-test, self-diagnosis, and self-repair (3S) approach. Sci. China Inf. Sci. 61(11): 112102:1-112102:17 (2018)
[j105]
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Wenyan Lu, Guihai Yan, Xiaowei Li:
AdaFlow: Aggressive Convolutional Neural Networks Approximation by Leveraging the Input Variability. J. Low Power Electron. 14(4): 481-495 (2018)
[j104]
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Xiaowei Li, Jiajun Li, Guihai Yan:
Optimizing Memory Efficiency for Deep Convolutional Neural Network Accelerators. J. Low Power Electron. 14(4): 496-507 (2018)
[j103]
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Yiming Zeng, Yu Hu, Shice Liu, Jing Ye, Yinhe Han, Xiaowei Li, Ninghui Sun:
RT3D: Real-Time 3-D Vehicle Detection in LiDAR Point Cloud for Autonomous Driving. IEEE Robotics Autom. Lett. 3(4): 3434-3440 (2018)
[j102]
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Ying Wang, Huawei Li, Yinhe Han, Xiaowei Li:
A Low Overhead In-Network Data Compressor for the Memory Hierarchy of Chip Multiprocessors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(6): 1265-1277 (2018)
[j101]
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Ying Wang, Huawei Li, Xiaowei Li:
A Case of On-Chip Memory Subsystem Design for Low-Power CNN Accelerators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(10): 1971-1984 (2018)
[j100]
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Yun Cheng, Huawei Li, Ying Wang, Haihua Shen, Bo Liu, Xiaowei Li:
On Trace Buffer Reuse-Based Trigger Generation in Post-Silicon Debug. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(10): 2166-2179 (2018)
[j99]
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Jing Ye, Qingli Guo, Yu Hu, Xiaowei Li:
Deterministic and Probabilistic Diagnostic Challenge Generation for Arbiter Physical Unclonable Function. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(12): 3186-3197 (2018)
[j98]
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Haihua Shen, Huazhe Tan, Huawei Li, Feng Zhang, Xiaowei Li:
LMDet: A "Naturalness" Statistical Method for Hardware Trojan Detection. IEEE Trans. Very Large Scale Integr. Syst. 26(4): 720-732 (2018)
[c198]
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Wenjie Li, Jing Ye, Xiaowei Li, Huawei Li, Yu Hu:
Bias PUF based Secure Scan Chain Design. AsianHOST 2018: 31-36
[c197]
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Sheng Xu, Ying Wang, Yinhe Han, Xiaowei Li:
PIMCH: Cooperative memory prefetching in processing-in-memory architecture. ASP-DAC 2018: 209-214
[c196]
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Kaiwei Zou, Ying Wang, Huawei Li, Xiaowei Li:
XORiM: A case of in-memory bit-comparator implementation and its performance implications. ASP-DAC 2018: 349-354
[c195]
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Jing Ye, Yu Hu, Xiaowei Li:
Hardware Trojan in FPGA CNN Accelerator. ATS 2018: 68-73
[c194]
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Wei Zhao, Haihua Shen, Huawei Li, Xiaowei Li:
Hardware Trojan Detection Based on Signal Correlation. ATS 2018: 80-85
[c193]
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Qingli Guo, Jing Ye, Yue Gong, Yu Hu, Xiaowei Li:
PUF Based Pay-Per-Device Scheme for IP Protection of CNN Model. ATS 2018: 115-120
[c192]
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Shuhao Jiang, Jiajun Li, Xin He, Guihai Yan, Xuan Zhang, Xiaowei Li:
RiskCap: Minimizing Effort of Error Regulation for Approximate Computing. ATS 2018: 133-138
[c191]
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Jiajun Li, Guihai Yan, Wenyan Lu, Shuhao Jiang, Shijun Gong, Jingya Wu, Xiaowei Li:
CCR: A concise convolution rule for sparse neural network accelerators. DATE 2018: 189-194
[c190]
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Jiajun Li, Guihai Yan, Wenyan Lu, Shuhao Jiang, Shijun Gong, Jingya Wu, Xiaowei Li:
SmartShuttle: Optimizing off-chip memory accesses for deep learning accelerators. DATE 2018: 343-348
[c189]
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Ying Wang, Zhenyu Quan, Jiajun Li, Yinhe Han, Huawei Li, Xiaowei Li:
A retrospective evaluation of energy-efficient object detection solutions on embedded devices. DATE 2018: 709-714
[c188]
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Hang Lu, Xin Wei, Ning Lin, Guihai Yan, Xiaowei Li:
Tetris: re-architecting convolutional neural network computation for machine learning accelerators. ICCAD 2018: 21
[c187]
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Ying Wang, Wen Li, Huawei Li, Xiaowei Li:
Lightweight Timing Channel Protection for Shared DRAM Controller. ITC 2018: 1-10
[c186]
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Ying Wang, Wen Li, Huawei Li, Xiaowei Li:
Leveraging DRAM Refresh to Protect the Memory Timing Channel of Cloud Chip Multi-processors. ITC-Asia 2018: 73-78
[c185]
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Jing Ye, Yipei Yang, Yue Gong, Yu Hu, Xiaowei Li:
Grey Zone in Pre-Silicon Hardware Trojan Detection. ITC-Asia 2018: 79-84
[c184]
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Shice Liu, Yu Hu, Yiming Zeng, Qiankun Tang, Beibei Jin, Yinhe Han, Xiaowei Li:
See and Think: Disentangling Semantic Scene Completion. NeurIPS 2018: 261-272
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Jing Ye, Qingli Guo, Yu Hu, Huawei Li, Xiaowei Li:
Modeling attacks on strong physical unclonable functions strengthened by random number and weak PUF. VTS 2018: 1-6
[i1]
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Hang Lu, Xin Wei, Ning Lin, Guihai Yan, Xiaowei Li:
Tetris: Re-architecting Convolutional Neural Network Computation for Machine Learning Accelerators. CoRR abs/1811.06841 (2018)
2017
[j97]
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Yu Hu, Jing Ye, Zhiping Shi, Xiaowei Li:
LAPS: Layout-Aware Path Selection for Post-Silicon Timing Characterization. IEICE Trans. Inf. Syst. 100-D(2): 323-331 (2017)
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Bing Li, Yu Hu, Ying Wang, Jing Ye, Xiaowei Li:
Power-Utility-Driven Write Management for MLC PCM. ACM J. Emerg. Technol. Comput. Syst. 13(3): 50:1-50:22 (2017)
[j95]
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Ying Wang, Yinhe Han, Cheng Wang, Huawei Li, Xiaowei Li:
Retention-Aware DRAM Assembly and Repair for Future FGR Memories. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(5): 705-718 (2017)
[j94]
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Xin He, Shuhao Jiang, Wenyan Lu, Guihai Yan, Yinhe Han, Xiaowei Li:
Exploiting the Potential of Computation Reuse Through Approximate Computing. IEEE Trans. Multi Scale Comput. Syst. 3(3): 152-165 (2017)
[j93]
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Hang Lu, Guihai Yan, Yinhe Han, Xiaowei Li:
PowerTrader: Enforcing Autonomous Power Management for Future Large-Scale Many-Core Processors. IEEE Trans. Multi Scale Comput. Syst. 3(4): 283-295 (2017)
[j92]
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Lili Song, Ying Wang, Yinhe Han, Huawei Li, Yuanqing Cheng, Xiaowei Li:
STT-RAM Buffer Design for Precision-Tunable General-Purpose Neural Network Accelerator. IEEE Trans. Very Large Scale Integr. Syst. 25(4): 1285-1296 (2017)
[j91]
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Weina Lu, Yu Hu, Jing Ye, Xiaowei Li:
Going Cooler With Timing-Constrained TeSHoP: A Temperature Sensing-Based Hotspot-Driven Placement Technique for FPGAs. IEEE Trans. Very Large Scale Integr. Syst. 25(9): 2525-2537 (2017)
[j90]
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Ying Wang, Jiachao Deng, Yuntan Fang, Huawei Li, Xiaowei Li:
Resilience-Aware Frequency Tuning for Neural-Network-Based Approximate Computing Chips. IEEE Trans. Very Large Scale Integr. Syst. 25(10): 2736-2748 (2017)
[c182]
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Jing Ye, Yue Gong, Yu Hu, Xiaowei Li:
Polymorphic PUF: Exploiting reconfigurability of CPU+FPGA SoC to resist modeling attack. AsianHOST 2017: 43-48
[c181]
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Cheng Wang, Ying Wang, Yinhe Han, Lili Song, Zhenyu Quan, Jiajun Li, Xiaowei Li:
CNN-based object detection solutions for embedded heterogeneous multicore SoCs. ASP-DAC 2017: 105-110
[c180]
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Yibin Tang, Ying Wang, Huawei Li, Xiaowei Li:
ApproxPIM: Exploiting realistic 3D-stacked DRAM for energy-efficient processing in-memory. ASP-DAC 2017: 396-401
[c179]
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Xin He, Guihai Yan, Faqiang Sun, Yinhe Han, Xiaowei Li:
ApproxEye: Enabling approximate computation reuse for microrobotic computer vision. ASP-DAC 2017: 402-407
[c178]
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Shiqi Lian, Ying Wang, Yinhe Han, Xiaowei Li:
BoDNoC: Providing bandwidth-on-demand interconnection for multi-granularity memory systems. ASP-DAC 2017: 738-743
[c177]
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Huina Chao, Huawei Li, Xiaoyu Song, Tiancheng Wang, Xiaowei Li:
On Evaluating and Constraining Assertions Using Conflicts in Absent Scenarios. ATS 2017: 195-200
[c176]
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Dawen Xu, Yi Liao, Ying Wang, Huawei Li, Xiaowei Li:
Selective off-loading to Memory: Task Partitioning and Mapping for PIM-enabled Heterogeneous Systems. Conf. Computing Frontiers 2017: 255-258
[c175]
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Ying Wang, Huawei Li, Xiaowei Li:
Real-Time Meets Approximate Computing: An Elastic CNN Inference Accelerator with Adaptive Trade-off between QoS and QoR. DAC 2017: 33:1-33:6
[c174]
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Shiqi Lian, Yinhe Han, Ying Wang, Yungang Bao, Hang Xiao, Xiaowei Li, Ninghui Sun:
Dadu: Accelerating Inverse Kinematics for High-DOF Robots. DAC 2017: 59:1-59:6
[c173]
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Jing Ye, Qingli Quo, Yu Hu, Xiaowei Li:
Fault diagnosis of arbiter physical unclonable function. DATE 2017: 428-433
[c172]
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Weina Lu, Wenyan Lu, Jing Ye, Yu Hu, Xiaowei Li:
Leveraging FVT-margins in design space exploration for FFGA-based CNN accelerators. FPL 2017: 1-4
[c171]
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Wenyan Lu, Guihai Yan, Jiajun Li, Shijun Gong, Yinhe Han, Xiaowei Li:
FlexFlow: A Flexible Dataflow Accelerator Architecture for Convolutional Neural Networks. HPCA 2017: 553-564
[c170]
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Jing Ye, Yu Hu, Xiaowei Li:
VPUF: Voter based physical unclonable function with high reliability and modeling attack resistance. IOLTS 2017: 74-79
[c169]
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Jing Ye, Yue Gong, Yu Hu, Xiaowei Li:
Polymorphic PUF: Exploiting reconfigurability of CPU+FPGA SoC to resist modeling attack. IOLTS 2017: 205-206
[c168]
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Yiming Zeng, Yu Hu, Shice Liu, Qiankun Tang, Jing Ye, Xiaowei Li:
GeoCueDepth: Exploiting geometric structure cues to estimate depth from a single image. IROS 2017: 17-22
[c167]
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Yun Cheng, Huawei Li, Ying Wang, Yingke Gao, Bo Liu, Xiaowei Li:
Flip-flop clustering based trace signal selection for post-silicon debug. VTS 2017: 1-6
[c166]
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Huawei Li, Xiaowei Li:
Innovative practices session 10C formal verification practices in industry. VTS 2017: 1
2016
[j89]
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Jun Zhou, Huawei Li, Tiancheng Wang, Xiaowei Li:
LOFT: A low-overhead fault-tolerant routing scheme for 3D NoCs. Integr. 52: 41-50 (2016)
[j88]
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Xiaowei Li, Dengqi Yang, Benhui Chen, Yuqing Zhang:
One-round Secure Key Exchange Protocol With Strong Forward Secrecy. KSII Trans. Internet Inf. Syst. 10(11): 5639-5653 (2016)
[j87]
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Xin He, Guihai Yan, Yinhe Han, Xiaowei Li:
Wide Operational Range Processor Power Delivery Design for Both Super-Threshold Voltage and Near-Threshold Voltage Computing. J. Comput. Sci. Technol. 31(2): 253-266 (2016)
[j86]
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Jun Ma, Guihai Yan, Yinhe Han, Xiaowei Li:
An Analytical Framework for Estimating Scale-Out and Scale-Up Power Efficiency of Heterogeneous Manycores. IEEE Trans. Computers 65(2): 367-381 (2016)
[j85]
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Guihai Yan, Faqiang Sun, Huawei Li, Xiaowei Li:
CoreRank: Redeeming "Sick Silicon" by Dynamically Quantifying Core-Level Healthy Condition. IEEE Trans. Computers 65(3): 716-729 (2016)
[j84]
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Jian Wang, Huawei Li, Tao Lv, Tiancheng Wang, Xiaowei Li, Sandip Kundu:
Abstraction-Guided Simulation Using Markov Analysis for Functional Verification. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(2): 285-297 (2016)
[j83]
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Yanhong Zhou, Tiancheng Wang, Huawei Li, Tao Lv, Xiaowei Li:
Functional Test Generation for Hard-to-Reach States Using Path Constraint Solving. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(6): 999-1011 (2016)
[j82]
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Guihai Yan, Jun Ma, Yinhe Han, Xiaowei Li:
EcoUp: Towards Economical Datacenter Upgrading. IEEE Trans. Parallel Distributed Syst. 27(7): 1968-1981 (2016)
[j81]
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Yinhe Han, Jianbo Dong, Kaiheng Weng, Ying Wang, Xiaowei Li:
Enhanced Wear-Rate Leveling for PRAM Lifetime Improvement Considering Process Variation. IEEE Trans. Very Large Scale Integr. Syst. 24(1): 92-102 (2016)
[j80]
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Ying Wang, Yinhe Han, Huawei Li, Xiaowei Li:
VANUCA: Enabling Near-Threshold Voltage Operation in Large-Capacity Cache. IEEE Trans. Very Large Scale Integr. Syst. 24(3): 858-870 (2016)
[j79]
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Ying Wang, Yinhe Han, Huawei Li, Lei Zhang, Yuanqing Cheng, Xiaowei Li:
PSI Conscious Write Scheduling: Architectural Support for Reliable Power Delivery in 3-D Die-Stacked PCM. IEEE Trans. Very Large Scale Integr. Syst. 24(5): 1613-1625 (2016)
[c165]
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Xin He, Guihai Yan, Yinhe Han, Xiaowei Li:
ACR: Enabling computation reuse for approximate computing. ASP-DAC 2016: 643-648
[c164]
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Yingxin Qiu, Huawei Li, Tiancheng Wang, Bo Liu, Yingke Gao, Xiaowei Li:
Property Coverage Analysis Based Trustworthiness Verification for Potential Threats from EDA Tools. ATS 2016: 43-48
[c163]
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Qingli Guo, Jing Ye, Yue Gong, Yu Hu, Xiaowei Li:
Efficient Attack on Non-linear Current Mirror PUF with Genetic Algorithm. ATS 2016: 49-54
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Jing Ye, Yu Hu, Xiaowei Li:
POSTER: Attack on Non-Linear Physical Unclonable Function. CCS 2016: 1751-1753
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Ying Wang, Yinhe Han, Jun Zhou, Huawei Li, Xiaowei Li:
DISCO: a low overhead in-network data compressor for energy-efficient chip multi-processors. DAC 2016: 37:1-37:6
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Ying Wang, Jie Xu, Yinhe Han, Huawei Li, Xiaowei Li:
DeepBurning: automatic generation of FPGA-based learning accelerators for the neural network family. DAC 2016: 110:1-110:6
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Lili Song, Ying Wang, Yinhe Han, Xin Zhao, Bosheng Liu, Xiaowei Li:
C-brain: a deep learning accelerator that tames the diversity of CNNs through adaptive data-level parallelization. DAC 2016: 123:1-123:6
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Ying Wang, Huawei Li, Xiaowei Li:
Frequency scheduling for resilient chip multi-processors operating at Near Threshold Voltage. DATE 2016: 1164-1167
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Jing Ye, Yu Hu, Xiaowei Li:
DCPUF: Placement and Routing Constraint based Dynamically Configured Physical Unclonable Function on FPGA (Abstact Only). FPGA 2016: 279
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Weina Lu, Yu Hu, Jing Ye, Xiaowei Li:
TeSHoP: A Temperature Sensing based Hotspot-Driven Placement technique for FPGAs. FPL 2016: 1-4
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Jing Ye, Yu Hu, Xiaowei Li:
RPUF: Physical Unclonable Function with Randomized Challenge to resist modeling attack. AsianHOST 2016: 1-6
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Ying Wang, Huawei Li, Xiaowei Li:
Re-architecting the on-chip memory sub-system of machine-learning accelerator for embedded devices. ICCAD 2016: 13
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Huina Chao, Huawei Li, Tiancheng Wang, Xiaowei Li, Bo Liu:
An accurate algorithm for computing mutation coverage in model checking. ITC 2016: 1-10
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Yanhong Zhou, Huawei Li, Tiancheng Wang, Bo Liu, Yingke Gao, Xiaowei Li:
Path constraint solving based test generation for observability-enhanced branch coverage. VTS 2016: 1-6
2015
[j78]
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Bosheng Liu, Ying Wang, Zhiqiang You, Yinhe Han, Xiaowei Li:
A signal degradation reduction method for memristor ratioed logic (MRL) gates. IEICE Electron. Express 12(8): 20150062 (2015)
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Songwei Pei, Huawei Li, Song Jin, Jun Liu, Xiaowei Li:
An on-chip frequency programmable test clock generation and application method for small delay defect detection. Integr. 49: 87-97 (2015)
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Gefei Zhang, Dan Fan, Yuqing Zhang, Xiaowei Li, Xuefeng Liu:
A privacy preserving authentication scheme for roaming services in global mobility networks. Secur. Commun. Networks 8(16): 2850-2859 (2015)
[j75]
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Jing Ye, Yu Huang, Yu Hu, Wu-Tung Cheng, Ruifeng Guo, Liyang Lai, Ting-Pu Tai, Xiaowei Li, Wei-pin Changchien, Daw-Ming Lee, Ji-Jan Chen, Sandeep C. Eruvathi, Kartik K. Kumara, Charles C. C. Liu, Sam Pan:
Diagnosis and Layout Aware (DLA) Scan Chain Stitching. IEEE Trans. Very Large Scale Integr. Syst. 23(3): 466-479 (2015)
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Ying Wang, Yinhe Han, Lei Zhang, Binzhang Fu, Cheng Liu, Huawei Li, Xiaowei Li:
Economizing TSV Resources in 3-D Network-on-Chip Design. IEEE Trans. Very Large Scale Integr. Syst. 23(3): 493-506 (2015)
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Ying Wang, Lei Zhang, Yinhe Han, Huawei Li, Xiaowei Li:
Data Remapping for Static NUCA in Degradable Chip Multiprocessors. IEEE Trans. Very Large Scale Integr. Syst. 23(5): 879-892 (2015)
[j72]
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Hang Lu, Binzhang Fu, Ying Wang, Yinhe Han, Guihai Yan, Xiaowei Li:
RISO: Enforce Noninterfered Performance With Relaxed Network-on-Chip Isolation in Many-Core Cloud Processors. IEEE Trans. Very Large Scale Integr. Syst. 23(12): 3053-3064 (2015)
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Hang Lu, Guihai Yan, Yinhe Han, Ying Wang, Xiaowei Li:
ShuttleNoC: Boosting on-chip communication efficiency by enabling localized power adaptation. ASP-DAC 2015: 142-147
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Guopei Liu, Ying Wang, Sen Li, Huawei Li, Xiaowei Li:
A Lightweight Timing Channel Protection for Shared Memory Controllers. ATS 2015: 55-60
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Jun Zhou, Huawei Li, Tiancheng Wang, Sen Li, Ying Wang, Xiaowei Li:
TWiN: A Turn-Guided Reliable Routing Scheme for Wireless 3D NoCs. ATS 2015: 85-90
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Jun Zhou, Huawei Li, Tiancheng Wang, Ying Wang, Xiaowei Li:
TURO: A lightweight turn-guided routing scheme for 3D NoCs. COOL Chips 2015: 1-3
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Ying Wang, Yinhe Han, Cheng Wang, Huawei Li, Xiaowei Li:
RADAR: a case for retention-aware DRAM assembly and repair in future FGR DRAM memory. DAC 2015: 19:1-19:6
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Ying Wang, Yinhe Han, Lei Zhang, Huawei Li, Xiaowei Li:
ProPRAM: exploiting the transparent logic resources in non-volatile memory for near data computing. DAC 2015: 47:1-47:6
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Yang Liu, Shiyan Hu, Jie Wu, Yiyu Shi, Yier Jin, Yu Hu, Xiaowei Li:
Impact assessment of net metering on smart home cyberattack detection. DAC 2015: 97:1-97:6
[c144]
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Jiachao Deng, Yuntan Fang, Zidong Du, Ying Wang, Huawei Li, Olivier Temam, Paolo Ienne, David Novo, Xiaowei Li, Yunji Chen, Chengyong Wu:
Retraining-based timing error mitigation for hardware neural networks. DATE 2015: 593-596
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Jing Ye, Yu Hu, Xiaowei Li:
OPUF: Obfuscation logic based physical unclonable function. IOLTS 2015: 156-161
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Ying Wang, Lili Song, Yinhe Han, Yuanqing Cheng, Huawei Li, Xiaowei Li:
A case of precision-tunable STT-RAM memory design for approximate neural network. ISCAS 2015: 1534-1537
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Yun Cheng, Ying Wang, Huawei Li, Xiaowei Li:
A Similarity Based Circuit Partitioning and Trimming Method to Defend against Hardware Trojans. ISVLSI 2015: 368-373
2014
[j71]
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Xueliang Li, Guihai Yan, Yinhe Han, Xiaowei Li:
SmartCap: Using Machine Learning for Power Adaptation of Smartphone's Application Processor. ACM Trans. Design Autom. Electr. Syst. 20(1): 8:1-8:16 (2014)
[j70]
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Binzhang Fu, Yinhe Han, Huawei Li, Xiaowei Li:
ZoneDefense: A Fault-Tolerant Routing for 2-D Meshes Without Virtual Channels. IEEE Trans. Very Large Scale Integr. Syst. 22(1): 113-126 (2014)
[j69]
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Keheng Huang, Yu Hu, Xiaowei Li:
Reliability-Oriented Placement and Routing Algorithm for SRAM-Based FPGAs. IEEE Trans. Very Large Scale Integr. Syst. 22(2): 256-269 (2014)
[j68]
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Jing Ye, Yu Hu, Xiaowei Li, Wu-Tung Cheng, Yu Huang, Huaxing Tang:
Diagnose Failures Caused by Multiple Locations at a Time. IEEE Trans. Very Large Scale Integr. Syst. 22(4): 824-837 (2014)
[j67]
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Yuntan Fang, Huawei Li, Xiaowei Li:
Lifetime Enhancement Techniques for PCM-Based Image Buffer in Multimedia Applications. IEEE Trans. Very Large Scale Integr. Syst. 22(6): 1450-1455 (2014)
[j66]
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Dawen Xu, Huawei Li, Amirali Ghofrani, Kwang-Ting Cheng, Yinhe Han, Xiaowei Li:
Test-Quality Optimization for Variable $n$ -Detections of Transition Faults. IEEE Trans. Very Large Scale Integr. Syst. 22(8): 1738-1749 (2014)
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Xing Hu, Guihai Yan, Yu Hu, Xiaowei Li:
Orchestrator: Guarding Against Voltage Emergencies in Multithreaded Applications. IEEE Trans. Very Large Scale Integr. Syst. 22(12): 2476-2487 (2014)
[c140]
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Jun Ma, Guihai Yan, Yinhe Han, Xiaowei Li:
Amphisbaena: Modeling two orthogonal ways to hunt on heterogeneous many-cores. ASP-DAC 2014: 394-399
[c139]
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Yun Cheng, Huawei Li, Xiaowei Li:
An On-Line Timing Error Detection Method for Silicon Debug. ATS 2014: 263-268
[c138]
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Jibing Qiu, Guihai Yan, Xiaowei Li:
On-Chip Delay Sensor for Environments with Large Temperature Fluctuations. ATS 2014: 275-280
[c137]
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Xin He, Guihai Yan, Yinhe Han, Xiaowei Li:
SuperRange: Wide operational range power delivery design for both STV and NTV computing. DATE 2014: 1-6
[c136]
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Bing Li, Shuchang Shan, Yu Hu, Xiaowei Li:
Partial-SET: Write speedup of PCM main memory. DATE 2014: 1-4
[c135]
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Jian Wang, Huawei Li, Tao Lv, Tiancheng Wang, Xiaowei Li:
Functional test generation guided by steady-state probabilities of abstract design. DATE 2014: 1-4
[c134]
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Yinhe Han, Ying Wang, Huawei Li, Xiaowei Li:
Data-aware DRAM refresh to squeeze the margin of retention time in hybrid memory cube. ICCAD 2014: 295-300
[c133]
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Jun Zhou, Huawei Li, Yuntan Fang, Tiancheng Wang, Yuanqing Cheng, Xiaowei Li:
HARS: A High-Performance Reliable Routing Scheme for 3D NoCs. ISVLSI 2014: 392-397
[c132]
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Bing Li, Yu Hu, Xiaowei Li:
Short-SET: An energy-efficient write scheme for MLC PCM. NVMSA 2014: 1-6
[c131]
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Jian Wang, Huawei Li, Xiaowei Li:
A novel abstraction-guided simulation approach using posterior probabilities for verification. VLSI-DAT 2014: 1-4
2013
[j64]
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Xiaowei Li, Yuqing Zhang, Xuefeng Liu, Jin Cao:
A Lightweight Three-Party Privacy-preserving Authentication Key Exchange Protocol Using Smart Card. KSII Trans. Internet Inf. Syst. 7(5): 1313-1327 (2013)
[j63]
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Xiaowei Li, Yuqing Zhang, Xuefeng Liu, Jin Cao, Qianqian Zhao:
A New Roaming Authentication Framework For Wireless Communication. KSII Trans. Internet Inf. Syst. 7(8): 2061-2080 (2013)
[j62]
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Yuanqing Cheng, Lei Zhang, Yinhe Han, Xiaowei Li:
TSV Minimization for Circuit - Partitioned 3D SoC Test Wrapper Design. J. Comput. Sci. Technol. 28(1): 119-128 (2013)
[j61]
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Yinhe Han, Cheng Liu, Hang Lu, Wen-Bo Li, Lei Zhang, Xiaowei Li:
RevivePath: Resilient Network-on-Chip Design Through Data Path Salvaging of Router. J. Comput. Sci. Technol. 28(6): 1045-1053 (2013)
[j60]
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Xiaowei Li, Yuqing Zhang, Geifei Zhang:
A new certificateless authenticated key agreement protocol for SIP with different KGCs. Secur. Commun. Networks 6(5): 631-643 (2013)
[j59]
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Xiaowei Li, Yuqing Zhang:
A simple and robust anonymous two-factor authenticated key exchange protocol. Secur. Commun. Networks 6(6): 711-722 (2013)
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Yuanqing Cheng, Lei Zhang, Yinhe Han, Xiaowei Li:
Thermal-Constrained Task Allocation for Interconnect Energy Reduction in 3-D Homogeneous MPSoCs. IEEE Trans. Very Large Scale Integr. Syst. 21(2): 239-249 (2013)
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Song Jin, Yinhe Han, Huawei Li, Xiaowei Li:
Unified Capture Scheme for Small Delay Defect Detection and Aging Prediction. IEEE Trans. Very Large Scale Integr. Syst. 21(5): 821-833 (2013)
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Zijian He, Tao Lv, Huawei Li, Xiaowei Li:
Test Path Selection for Capturing Delay Failures Under Statistical Timing Model. IEEE Trans. Very Large Scale Integr. Syst. 21(7): 1210-1219 (2013)
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Ying Zhang, Huawei Li, Xiaowei Li:
Automatic Test Program Generation Using Executing-Trace-Based Constraint Extraction for Embedded Processors. IEEE Trans. Very Large Scale Integr. Syst. 21(7): 1220-1233 (2013)
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Yanhong Zhou, Tiancheng Wang, Tao Lv, Huawei Li, Xiaowei Li:
Path Constraint Solving Based Test Generation for Hard-to-Reach States. Asian Test Symposium 2013: 239-244
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Hang Lu, Guihai Yan, Yinhe Han, Binzhang Fu, Xiaowei Li:
RISO: relaxed network-on-chip isolation for cloud processors. DAC 2013: 38:1-38:6
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Xueliang Li, Guihai Yan, Yinhe Han, Xiaowei Li:
SmartCap: user experience-oriented power adaptation for smartphone's application processor. DATE 2013: 57-60
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Xing Hu, Guihai Yan, Yu Hu, Xiaowei Li:
Orchestrator: a low-cost solution to reduce voltage emergencies for multi-threaded applications. DATE 2013: 208-213
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Xiaolin Zhang, Jing Ye, Yu Hu, Xiaowei Li:
Capturing post-silicon variation by layout-aware path-delay testing. DATE 2013: 288-291
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Enshan Yang, Keheng Huang, Yu Hu, Xiaowei Li, Jian Gong, Hongjin Liu, Bo Liu:
HHC: Hierarchical hardware checkpointing to accelerate fault recovery for SRAM-based FPGAs. IOLTS 2013: 193-198
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Yinhe Han, Ying Wang, Huawei Li, Xiaowei Li:
Enabling Near-Threshold Voltage(NTV) operation in Multi-VDD cache for power reduction. ISCAS 2013: 337-340
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Yinhe Han, Song Jin, Jibing Qiu, Qiang Xu, Xiaowei Li:
On predicting NBTI-induced circuit aging by isolating leakage change. ISQED 2013: 46-52
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Jing Ye, Yu Huang, Yu Hu, Wu-Tung Cheng, Ruifeng Guo, Liyang Lai, Ting-Pu Tai, Xiaowei Li, Wei-pin Changchien, Daw-Ming Lee, Ji-Jan Chen, Sandeep C. Eruvathi, Kartik K. Kumara, Charles C. C. Liu, Sam Pan:
Diagnosis and Layout Aware (DLA) scan chain stitching. ITC 2013: 1-10
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Bing Li, Shuchang Shan, Yu Hu, Xiaowei Li:
Tolerating Noise in MLC PCM with Multi-Bit Error Correction Code. PRDC 2013: 226-231
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Yuntan Fang, Huawei Li, Xiaowei Li:
RSAK: Random stream attack for phase change memory in video applications. VTS 2013: 1-6
2012
[j54]
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Xiang Fu, Huawei Li, Xiaowei Li:
Testable Path Selection and Grouping for Faster Than At-Speed Testing. IEEE Trans. Very Large Scale Integr. Syst. 20(2): 236-247 (2012)
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Songjun Pan, Yu Hu, Xiaowei Li:
IVF: Characterizing the Vulnerability of Microprocessor Structures to Intermittent Faults. IEEE Trans. Very Large Scale Integr. Syst. 20(5): 777-790 (2012)
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Songwei Pei, Huawei Li, Xiaowei Li:
A High-Precision On-Chip Path Delay Measurement Architecture. IEEE Trans. Very Large Scale Integr. Syst. 20(9): 1565-1577 (2012)
[j51]
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Songwei Pei, Huawei Li, Xiaowei Li:
Flip-Flop Selection for Partial Enhanced Scan to Reduce Transition Test Data Volume. IEEE Trans. Very Large Scale Integr. Syst. 20(12): 2157-2169 (2012)
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Hongsong Zhu, Xinrong Li, Yongjun Xu, Xiaowei Li, Yan Liu:
An energy-efficient link quality monitoring scheme for wireless networks. Wirel. Commun. Mob. Comput. 12(4): 333-344 (2012)
[c119]
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Ke Yue, Frank Lockom, Zheng Li, Soumia Ghalim, Shangping Ren, Lei Zhang, Xiaowei Li:
Hungarian algorithm based virtualization to maintain application timing similarity for defect-tolerant NoC. ASP-DAC 2012: 493-498
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Yu Hu, Xinli Gu, Xiaowei Li:
In-Field Testing of NAND Flash Storage: Why and How? Asian Test Symposium 2012: 69
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Yuntan Fang, Huawei Li, Xiaowei Li:
SoftPCM: Enhancing Energy Efficiency and Lifetime of Phase Change Memory in Video Applications via Approximate Write. Asian Test Symposium 2012: 131-136
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Jianliang Gao, Jianxin Wang, Yinhe Han, Lei Zhang, Xiaowei Li:
A clustering-based scheme for concurrent trace in debugging NoC-based multicore systems. DATE 2012: 27-32
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Keheng Huang, Yu Hu, Xiaowei Li, Bo Liu, Hongjin Liu, Jian Gong:
Off-path leakage power aware routing for SRAM-based FPGAs. DATE 2012: 87-92
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Xiaowei Li, Yuqing Zhang, Xuefeng Liu, Jin Cao, Qianqian Zhao:
A lightweight roaming authentication protocol for anonymous wireless communication. GLOBECOM 2012: 1029-1034
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Guihai Yan, Yingmin Li, Yinhe Han, Xiaowei Li, Minyi Guo, Xiaoyao Liang:
AgileRegulator: A hybrid voltage regulator scheme redeeming dark silicon for power efficiency in a multicore architecture. HPCA 2012: 287-298
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Xuefeng Zhu, Huawei Li, Xiaowei Li:
Statistical SDFC: A metric for evaluating test quality of small delay faults. VLSI-DAT 2012: 1-4
2011
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Jia Li, Yu Hu, Xiaowei Li:
Scan chain design for shift power reduction in scan-based testing. Sci. China Inf. Sci. 54(4): 767-777 (2011)
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Yu Hu, Zhongliang Chen, Xiaowei Li:
Oware: Operand width Aware Redundant Execution for Whole-Processor Error Detection. Intell. Autom. Soft Comput. 17(6): 771-780 (2011)
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Jun Zhou, Yongjun Xu, Xiaowei Li:
A Security Mechanism For RFID With Dependable Proxy. Intell. Autom. Soft Comput. 17(6): 815-825 (2011)
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Binzhang Fu, Yinhe Han, Huawei Li, Xiaowei Li:
A New Multiple-Round Dimension-Order Routing for Networks-on-Chip. IEICE Trans. Inf. Syst. 94-D(4): 809-821 (2011)
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Song Jin, Yinhe Han, Huawei Li, Xiaowei Li:
Statistical lifetime reliability optimization considering joint effect of process variation and aging. Integr. 44(3): 185-191 (2011)
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Jia Li, Xiao Liu, Yubin Zhang, Yu Hu, Xiaowei Li, Qiang Xu:
Capture-power-aware test data compression using selective encoding. Integr. 44(3): 205-216 (2011)
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Dong-Rui Fan, Xiaowei Li, Guo-Jie Li:
New Methodologies for Parallel Architecture. J. Comput. Sci. Technol. 26(4): 578-587 (2011)
[j42]
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Guihai Yan, Yinhe Han, Xiaowei Li:
ReviveNet: A Self-Adaptive Architecture for Improving Lifetime Reliability via Localized Timing Adaptation. IEEE Trans. Computers 60(9): 1219-1232 (2011)
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Yu Yang, Yongjun Xu, Xiaowei Li, Canfeng Chen:
A Loss Inference Algorithm for Wireless Sensor Networks to Improve Data Reliability of Digital Ecosystems. IEEE Trans. Ind. Electron. 58(6): 2126-2137 (2011)
[j40]
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Zhulin An, Hongsong Zhu, Xinrong Li, Chaonong Xu, Yongjun Xu, Xiaowei Li:
Nonidentical Linear Pulse-Coupled Oscillators Model With Application to Time Synchronization in Wireless Sensor Networks. IEEE Trans. Ind. Electron. 58(6): 2205-2215 (2011)
[j39]
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Guihai Yan, Yinhe Han, Hui Liu, Xiaoyao Liang, Xiaowei Li:
MicroFix: Using timing interpolation and delay sensors for power reduction. ACM Trans. Design Autom. Electr. Syst. 16(2): 16:1-16:21 (2011)
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Guihai Yan, Yinhe Han, Xiaowei Li:
SVFD: A Versatile Online Fault Detection Scheme via Checking of Stability Violation. IEEE Trans. Very Large Scale Integr. Syst. 19(9): 1627-1640 (2011)
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Ying Zhang, Huawei Li, Yinghua Min, Xiaowei Li:
Selected Transition Time Adjustment for Tolerating Crosstalk Effects on Network-on-Chip Interconnects. IEEE Trans. Very Large Scale Integr. Syst. 19(10): 1787-1800 (2011)
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Minjin Zhang, Huawei Li, Xiaowei Li:
Path Delay Test Generation Toward Activation of Worst Case Coupling Effects. IEEE Trans. Very Large Scale Integr. Syst. 19(11): 1969-1982 (2011)
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Cheng Liu, Lei Zhang, Yinhe Han, Xiaowei Li:
Vertical interconnects squeezing in symmetric 3D mesh Network-on-Chip. ASP-DAC 2011: 357-362
[c110]
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Cheng Liu, Lei Zhang, Yinhe Han, Xiaowei Li:
A resilient on-chip router design through data path salvaging. ASP-DAC 2011: 437-442
[c109]
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Yuanqing Cheng, Lei Zhang, Yinhe Han, Jun Liu, Xiaowei Li:
Wrapper Chain Design for Testing TSVs Minimization in Circuit-Partitioned 3D SoC. Asian Test Symposium 2011: 181-186
[c108]
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Yuntan Fang, Huawei Li, Xiaowei Li:
A Fault Criticality Evaluation Framework of Digital Systems for Error Tolerant Video Applications. Asian Test Symposium 2011: 329-334
[c107]
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Keheng Huang, Yu Hu, Xiaowei Li, Gengxin Hua, Hongjin Liu, Bo Liu:
Exploiting Free LUT Entries to Mitigate Soft Errors in SRAM-based FPGAs. Asian Test Symposium 2011: 438-443
[c106]
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Jianbo Dong, Lei Zhang, Yinhe Han, Ying Wang, Xiaowei Li:
Wear rate leveling: lifetime enhancement of PRAM with endurance variation. DAC 2011: 972-977
[c105]
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Keheng Huang, Yu Hu, Xiaowei Li:
Cross-layer optimized placement and routing for FPGA soft error mitigation. DATE 2011: 58-63
[c104]
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Songjun Pan, Yu Hu, Xing Hu, Xiaowei Li:
A cost-effective substantial-impact-filter based method to tolerate voltage emergencies. DATE 2011: 311-315
[c103]
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Jing Ye, Yu Hu, Xiaowei Li:
On diagnosis of multiple faults using compacted responses. DATE 2011: 679-684
[c102]
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Jianliang Gao, Yinhe Han, Xiaowei Li:
Eliminating data invalidation in debugging multiple-clock chips. DATE 2011: 691-696
[c101]
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Ying Wang, Lei Zhang, Yinhe Han, Huawei Li, Xiaowei Li:
Flex memory: Exploiting and managing abundant off-chip optical bandwidth. DATE 2011: 968-973
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Shuchang Shan, Yu Hu, Xiaowei Li:
Transparent dynamic binding with fault-tolerant cache coherence protocol for chip multiprocessors. DSN 2011: 291-302
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Ke Yue, Soumia Ghalim, Zheng Li, Frank Lockom, Shangping Ren, Lei Zhang, Xiaowei Li:
A greedy approach to tolerate defect cores for multimedia applications. ESTIMedia 2011: 112-119
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Binzhang Fu, Yinhe Han, Jun Ma, Huawei Li, Xiaowei Li:
An abacus turn model for time/space-efficient reconfigurable routing. ISCA 2011: 259-270
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Guihai Yan, Xiaowei Li:
Online timing variation tolerance for digital integrated circuits. ITC 2011: 1-10
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Songwei Pei, Huawei Li, Xiaowei Li:
A unified test architecture for on-line and off-line delay fault detections. VTS 2011: 272-277
2010
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Xiang Fu, Huawei Li, Xiaowei Li:
Testable Critical Path Selection Considering Process Variation. IEICE Trans. Inf. Syst. 93-D(1): 59-67 (2010)
[j34]
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Jianliang Gao, Yinhe Han, Xiaowei Li:
A Novel Post-Silicon Debug Mechanism Based on Suspect Window. IEICE Trans. Inf. Syst. 93-D(5): 1175-1185 (2010)
[j33]
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Jun Liu, Yinhe Han, Xiaowei Li:
Extended Selective Encoding of Scan Slices for Reducing Test Data and Test Power. IEICE Trans. Inf. Syst. 93-D(8): 2223-2232 (2010)
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Jianbo Dong, Lei Zhang, Yinhe Han, Guihai Yan, Xiaowei Li:
Performance-asymmetry-aware scheduling for Chip Multiprocessors with static core coupling. J. Syst. Archit. 56(10): 534-542 (2010)
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Jia Li, Qiang Xu, Yu Hu, Xiaowei Li:
X-Filling for Simultaneous Shift- and Capture-Power Reduction in At-Speed Scan-Based Testing. IEEE Trans. Very Large Scale Integr. Syst. 18(7): 1081-1092 (2010)
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Zhulin An, Hongsong Zhu, Meilin Zhang, Chaonong Xu, Yongjun Xu, Xiaowei Li:
Linear Pulse-Coupled Oscillators Model¬ - A New Approach for Time Synchronization in Wireless Sensor Networks. Wirel. Sens. Netw. 2(2): 108-114 (2010)
[j29]
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Yu Yang, Zhulin An, Yongjun Xu, Xiaowei Li, Canfeng Chen:
Passive Loss Inference in Wireless Sensor Networks Using EM Algorithm. Wirel. Sens. Netw. 2(7): 512-519 (2010)
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Zijian He, Tao Lv, Huawei Li, Xiaowei Li:
Graph partition based path selection for testing of small delay defects. ASP-DAC 2010: 499-504
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Xiang Fu, Huawei Li, Xiaowei Li:
On Selection of Testable Paths with Specified Lengths for Faster-Than-At-Speed Testing. Asian Test Symposium 2010: 45-48
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Song Jin, Yinhe Han, Huawei Li, Xiaowei Li:
P^(2)CLRAF: An Pre- and Post-Silicon Cooperated Circuit Lifetime Reliability Analysis Framework. Asian Test Symposium 2010: 117-120
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Jing Ye, Xiaolin Zhang, Yu Hu, Xiaowei Li:
Substantial Fault Pair At-a-Time (SFPAT): An Automatic Diagnostic Pattern Generation Method. Asian Test Symposium 2010: 192-197
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Zijian He, Tao Lv, Huawei Li, Xiaowei Li:
An Efficient Algorithm for Finding a Universal Set of Testable Long Paths. Asian Test Symposium 2010: 319-324
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Ying Zhang, Huawei Li, Xiaowei Li:
Software-Based Self-Testing of Processors Using Expanded Instructions. Asian Test Symposium 2010: 415-420
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Songjun Pan, Yu Hu, Xiaowei Li:
IVF: Characterizing the vulnerability of microprocessor structures to intermittent faults. DATE 2010: 238-243
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Tao Zhang, Tao Lv, Xiaowei Li:
An abstraction-guided simulation approach using Markov models for microprocessor verification. DATE 2010: 484-489
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Jing Ye, Yu Hu, Xiaowei Li:
Diagnosis of multiple arbitrary faults with mask and reinforcement effect. DATE 2010: 885-890
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Binzhang Fu, Yinhe Han, Huawei Li, Xiaowei Li:
Accelerating Lightpath setup via broadcasting in binary-tree waveguide in Optical NoCs. DATE 2010: 933-936
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Songwei Pei, Huawei Li, Xiaowei Li:
An on-chip clock generation scheme for faster-than-at-speed delay testing. DATE 2010: 1353-1356
[c84]
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Lei Zhang, Yue Yu, Jianbo Dong, Yinhe Han, Shangping Ren, Xiaowei Li:
Performance-asymmetry-aware topology virtualization for defect-tolerant NoC-based many-core processors. DATE 2010: 1566-1571
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Guihai Yan, Xiaoyao Liang, Yinhe Han, Xiaowei Li:
Leveraging the core-level complementary effects of PVT variations to reduce timing emergencies in multi-core processors. ISCA 2010: 485-496
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Huawei Li, Dawen Xu, Yinhe Han, Kwang-Ting Cheng, Xiaowei Li:
nGFSIM : A GPU-based fault simulator for 1-to-n detection and its applications. ITC 2010: 343-352
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Zijian He, Tao Lv, Huawei Li, Xiaowei Li:
On generation of a universal path candidate set containing testable long paths. ITC 2010: 816
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Ying Wang, Lei Zhang, Yinhe Han, Huawei Li, Xiaowei Li:
Address Remapping for Static NUCA in NoC-Based Degradable Chip-Multiprocessors. PRDC 2010: 70-76
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Li Wang, Yair Leiferman, Shangping Ren, Kevin A. Kwiat, Xiaowei Li:
Improving complex distributed software system availability through information hiding. SAC 2010: 452-456
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Zijian He, Tao Lv, Huawei Li, Xiaowei Li:
Fast path selection for testing of small delay defects considering path correlations. VTS 2010: 3-8

2000 – 2009

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What is the meaning of the colors in the publication lists?

2009
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Fei-Yue Wang, Ninghui Sun, Wenji Mao, Xiaowei Li:
Preface. J. Comput. Sci. Technol. 24(6): 997-999 (2009)
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Ying Zhang, Huawei Li, Xiaowei Li:
Selected Crosstalk Avoidance Code for Reliable Network-on-Chip. J. Comput. Sci. Technol. 24(6): 1074-1085 (2009)
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Lei Zhang, Yinhe Han, Qiang Xu, Xiaowei Li, Huawei Li:
On Topology Reconfiguration for Defect-Tolerant NoC-Based Homogeneous Manycore Systems. IEEE Trans. Very Large Scale Integr. Syst. 17(9): 1173-1186 (2009)
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Songwei Pei, Huawei Li, Xiaowei Li:
A Low Overhead On-Chip Path Delay Measurement Circuit. Asian Test Symposium 2009: 145-150
[c76]
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Jun Liu, Yinhe Han, Xiaowei Li:
Extended Selective Encoding of Scan Slices for Reducing Test Data and Test Power. Asian Test Symposium 2009: 319-324
[c75]
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Song Jin, Yinhe Han, Lei Zhang, Huawei Li, Xiaowei Li, Guihai Yan:
M-IVC: Using Multiple Input Vectors to Minimize Aging-Induced Delay. Asian Test Symposium 2009: 437-442
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Guihai Yan, Yinhe Han, Xiaowei Li:
A unified online Fault Detection scheme via checking of Stability Violation. DATE 2009: 496-501
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Guihai Yan, Yinhe Han, Hui Liu, Xiaoyao Liang, Xiaowei Li:
MicroFix: exploiting path-grained timing adaptability for improving power-performance efficiency. ISLPED 2009: 395-400
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Jianbo Dong, Lei Zhang, Yinhe Han, Guihai Yan, Xiaowei Li:
Variation-Aware Scheduling for Chip Multiprocessors with Thread Level Redundancy. PRDC 2009: 17-22
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Jie Wang, Huawei Li, Yinghua Min, Xiaowei Li, Huaguo Liang:
Impact of Hazards on Pattern Selection for Small Delay Defects. PRDC 2009: 49-54
[c70]
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Songwei Pei, Huawei Li, Xiaowei Li:
Flip-Flop Selection for Transition Test Pattern Reduction Using Partial Enhanced Scan. PRDC 2009: 75-80
[c69]
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Binzhang Fu, Yinhe Han, Huawei Li, Xiaowei Li:
A New Multiple-Round DOR Routing for 2D Network-on-Chip Meshes. PRDC 2009: 276-281
[c68]
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Songjun Pan, Yu Hu, Xiaowei Li:
Online Computing and Predicting Architectural Vulnerability Factor of Microprocessor Structures. PRDC 2009: 345-350
[c67]
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Jianliang Gao, Yinhe Han, Xiaowei Li:
A New Post-Silicon Debug Approach Based on Suspect Window. VTS 2009: 85-90
[c66]
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Tao Lv, Huawei Li, Xiaowei Li:
Automatic Selection of Internal Observation Signals for Design Verification. VTS 2009: 203-208
[c65]
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Yu Yang, Yongjun Xu, Xiaowei Li:
A sensor network performance inference algorithm based on passive measurement. WCNC 2009: 2284-2289
2008
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Guihai Yan, Yinhe Han, Xiaowei Li, Hui Liu:
BAT: Performance-Driven Crosstalk Mitigation Based on Bus-Grouping Asynchronous Transmission. IEICE Trans. Electron. 91-C(10): 1690-1697 (2008)
[j24]
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Da Wang, Yu Hu, Huawei Li, Xiaowei Li:
Design-for-Testability Features and Test Implementation of a Giga Hertz General Purpose Microprocessor. J. Comput. Sci. Technol. 23(6): 1037-1046 (2008)
[j23]
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Limin Sun, Hongsong Zhu, Bin Duan, Xiaowei Li, Yi Sun:
Analysis of Forwarding Mechanisms on Fine-Grain Gradient Sinking Model in WSN. J. Signal Process. Syst. 51(2): 145-159 (2008)
[c64]
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Fei Wang, Yu Hu, Huawei Li, Xiaowei Li:
A design- for-diagnosis technique for diagnosing both scan chain faults and combinational circuit faults. ASP-DAC 2008: 571-576
[c63]
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Jia Li, Qiang Xu, Yu Hu, Xiaowei Li:
On reducing both shift and capture power for scan-based testing. ASP-DAC 2008: 653-658
[c62]
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Xiang Fu, Huawei Li, Yu Hu, Xiaowei Li:
Robust test generation for power supply noise induced path delay faults. ASP-DAC 2008: 659-662
[c61]
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Fei Wang, Yu Hu, Yu Huang, Jing Ye, Xiaowei Li:
Observation Point Oriented Deterministic Diagnosis Pattern Generation (DDPG) for Chain Diagnosis. ATS 2008: 190-192
[c60]
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Ying Zhang, Huawei Li, Xiaowei Li:
Reliable Network-on-Chip Router for Crosstalk and Soft Error Tolerance. ATS 2008: 438-443
[c59]
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Lei Zhang, Yinhe Han, Qiang Xu, Xiaowei Li:
Defect Tolerance in Homogeneous Manycore Processors Using Core-Level Redundancy with Unified Topology. DATE 2008: 891-896
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Jia Li, Qiang Xu, Yu Hu, Xiaowei Li:
iFill: An Impact-Oriented X-Filling Method for Shift- and Capture-Power Reduction in At-Speed Scan-Based Testing. DATE 2008: 1184-1189
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Jia Li, Qiang Xu, Yu Hu, Xiaowei Li:
Channel Width Utilization Improvement in Testing NoC-Based Systems for Test Time Reduction. DELTA 2008: 26-31
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Fei Wang, Yu Hu, Xiaowei Li:
Adaptive Diagnostic Pattern Generation for Scan Chains. DELTA 2008: 129-132
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Da Wang, Rui Li, Yu Hu, Huawei Li, Xiaowei Li:
A Case Study on At-Speed Testing for a Gigahertz Microprocessor. DELTA 2008: 326-331
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Minjin Zhang, Huawei Li, Xiaowei Li:
Static Crosstalk Noise Analysis with Transition Map. DELTA 2008: 462-465
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Hui Liu, Huawei Li, Yu Hu, Xiaowei Li:
A Scan-Based Delay Test Method for Reduction of Overtesting. DELTA 2008: 521-526
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Jia Li, Xiao Liu, Yubin Zhang, Yu Hu, Xiaowei Li, Qiang Xu:
On capture power-aware test data compression for scan-based testing. ICCAD 2008: 67-72
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Fei Wang, Yu Hu, Huawei Li, Xiaowei Li, Jing Ye, Yu Huang:
Deterministic Diagnostic Pattern Generation (DDPG) for Compound Defects. ITC 2008: 1-10
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Jing Ye, Fei Wang, Yu Hu, Xiaowei Li:
Diagnosis of Mask-Effect Multiple Timing Faults in Scan Chains. ITC 2008: 1
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Ying Zhang, Huawei Li, Xiaowei Li, Yu Hu:
Codeword Selection for Crosstalk Avoidance and Error Correction on Interconnects. VTS 2008: 377-382
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Minjin Zhang, Huawei Li, Xiaowei Li:
Multiple Coupling Effects Oriented Path Delay Test Generation. VTS 2008: 383-388
2007
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Guangyan Huang, Xiaowei Li, Jing He, Xin Li:
Data Mining via Minimal Spanning Tree Clustering for Prolonging Lifetime of Wireless Sensor Networks. Int. J. Inf. Technol. Decis. Mak. 6(2): 235-251 (2007)
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Wei Wang, Yu Hu, Yinhe Han, Xiaowei Li, You-Sheng Zhang:
Leakage Current Optimization Techniques During Test Based on Don't Care Bits Assignment. J. Comput. Sci. Technol. 22(5): 673-680 (2007)
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Yinhe Han, Yu Hu, Xiaowei Li, Huawei Li, Anshuman Chandra:
Embedded Test Decompressor to Reduce the Required Channels and Vector Memory of Tester for Complex Processor Circuit. IEEE Trans. Very Large Scale Integr. Syst. 15(5): 531-540 (2007)
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Minjin Zhang, Xiaowei Li:
Test Generation for Crosstalk Glitches Considering Multiple Coupling Effects. ATS 2007: 259-264
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Shaohua Lei, Yinhe Han, Xiaowei Li:
Frequency Analysis Method for Propagation of Transient Errors in Combinational Logic. ATS 2007: 323-328
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Lei Zhang, Huawei Li, Xiaowei Li:
A Routing Algorithm for Random Error Tolerance in Network-on-Chip. HCI (4) 2007: 1210-1219
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Tao Lv, Tong Xu, Yang Zhao, Huawei Li, Xiaowei Li:
Bug analysis and corresponding error models in real designs. HLDVT 2007: 59-64
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Da Wang, Xiaoxin Fan, Xiang Fu, Hui Liu, Ke Wen, Rui Li, Huawei Li, Yu Hu, Xiaowei Li:
The design-for-testability features of a general purpose microprocessor. ITC 2007: 1-9
2006
[j19]
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Yinhe Han, Huawei Li, Xiaowei Li, Anshuman Chandra:
Response compaction for system-on-a-chip based on advanced convolutional codes. Sci. China Ser. F Inf. Sci. 49(2): 262-272 (2006)
[j18]
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Tao Lv, Jianping Fan, Xiaowei Li, Ling-Yi Liu:
Observability Statement Coverage Based on Dynamic Factored Use-Definition Chains for Functional Verification. J. Electron. Test. 22(3): 273-285 (2006)
[j17]
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Yu Hu, Yinhe Han, Xiaowei Li, Huawei Li, Xiaoqing Wen:
Compression/Scan Co-design for Reducing Test Data Volume, Scan-in Power Dissipation, and Test Application Time. IEICE Trans. Inf. Syst. 89-D(10): 2616-2625 (2006)
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Yinhe Han, Xiaowei Li, Huawei Li, Anshuman Chandra:
Embedded test resource for SoC to reduce required tester channels based on advanced convolutional codes. IEEE Trans. Instrum. Meas. 55(2): 389-399 (2006)
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Lei Xie, Yongjun Xu, Xiaowei Li, Yuefei Zhu:
A Lightweight Scheme for Trust Relationship Establishment in Ubiquitous Sensor Networks. CIT 2006: 229
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Hongyang Chen, Ping Deng, Yongjun Xu, Xiaowei Li:
A Novel Localization Scheme Based on RSS Data for Wireless Sensor Networks. APWeb Workshops 2006: 315-320
[c40]
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Jia Li, Yu Hu, Xiaowei Li:
A Scan Chain Adjustment Technology for Test Power Reduction. ATS 2006: 11-16
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Tao Lv, Ling-Yi Liu, Yang Zhao, Huawei Li, Xiaowei Li:
An Observability Branch Coverage Metric Based on Dynamic Factored Use-Define Chains. ATS 2006: 89-94
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Yu Hu, Cheng Li, Jia Li, Yinhe Han, Xiaowei Li, Wei Wang, Hua-Wei Li, Laung-Terng Wang, Xiaoqing Wen:
Test data compression based on clustered random access scan. ATS 2006: 231-236
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Tong Liu, Huawei Li, Xiaowei Li, Yinhe Han:
Fast Packet Classification using Group Bit Vector. GLOBECOM 2006
[c36]
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Guangyan Huang, Xiaowei Li, Jing He:
Clustering Versus Evenly Distributing Energy Dissipation in Wireless Sensor Routing for Prolonging Network Lifetime. International Conference on Computational Science (2) 2006: 1069-1072
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Jie Don, Yu Hu, Yinhe Han, Xiaowei Li:
An on-chip combinational decompressor for reducing test data volume. ISCAS 2006
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Huawei Li, Pei-Fu Shen, Xiaowei Li:
Robust Test Generation for Precise Crosstalk-induced Path Delay Faults. VTS 2006: 300-305
2005
[j15]
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Huawei Li, Xiaowei Li:
Selection of Crosstalk-Induced Faults in Enhanced Delay Test. J. Electron. Test. 21(2): 181-195 (2005)
[j14]
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Yinhe Han, Yu Hu, Xiaowei Li, Huawei Li, Anshuman Chandra, Xiaoqing Wen:
Wrapper Scan Chains Design for Rapid and Low Power Testing of Embedded Cores. IEICE Trans. Inf. Syst. 88-D(9): 2126-2134 (2005)
[j13]
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Xiaowei Li, Guanghui Li, Ming Shao:
Formal Verification Techniques Based on Boolean Satisfiability Problem. J. Comput. Sci. Technol. 20(1): 38-47 (2005)
[j12]
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Xiaowei Li:
Perface. J. Comput. Sci. Technol. 20(2): 145 (2005)
[j11]
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Yinhe Han, Xiaowei Li, Huawei Li, Anshuman Chandra:
Test Resource Partitioning Based on Efficient Response Compaction for Test Time and Tester Channels Reduction. J. Comput. Sci. Technol. 20(2): 201-209 (2005)
[j10]
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Wei Lu, Xiu-Tao Yang, Tao Lv, Xiaowei Li:
An Efficient Evaluation and Vector Generation Method for Observability-Enhanced Statement Coverage. J. Comput. Sci. Technol. 20(6): 875-884 (2005)
[j9]
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Shuguang Gong, Huawei Li, Xiaowei Li:
An innovative free memory design for network processors in home network gateway. IEEE Trans. Consumer Electron. 51(4): 1182-1187 (2005)
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Yinhe Han, Yu Hu, Huawei Li, Xiaowei Li:
Theoretic analysis and enhanced X-tolerance of test response compact based on convolutional code. ASP-DAC 2005: 53-58
[c32]
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Shuguang Gong, Huawei Li, Yufeng Xu, Tong Liu, Xiaowei Li:
Design of an efficient memory subsystem for network processor. ASP-DAC 2005: 897-900
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Yongjun Xu, Jinghua Chen, Zuying Luo, Xiaowei Li:
Vector extraction for average total power estimation. ASP-DAC 2005: 1086-1089
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Guangmei Zhang, Chen Rui, Xiaowei Li, Congying Han:
The Automatic Generation of Basis Set of Path for Path Testing. Asian Test Symposium 2005: 46-51
[c29]
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Guangyan Huang, Guangmei Zhang, Xiaowei Li, Yunzhan Gong:
A State Machine for Detecting C/C++ Memory Faults. Asian Test Symposium 2005: 82-87
[c28]
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Pei-Fu Shen, Huawei Li, Yongjun Xu, Xiaowei Li:
Non-robust Test Generation for Crosstalk-Induced Delay Faults. Asian Test Symposium 2005: 120-125
[c27]
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Yinhe Han, Xiaowei Li, Shivakumar Swaminathan, Yu Hu, Anshuman Chandra:
Scan Data Volume Reduction Using Periodically Alterable MUXs Decompressor. Asian Test Symposium 2005: 372-377
[c26]
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Yanzhuo Tan, Yinhe Han, Xiaowei Li, Feiyin Lu, Yuchuan Chen:
Validation analysis and test flow optimization of VLSI chip. ISCAS (6) 2005: 5666-5669
[c25]
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Ji Li, Yinhe Han, Xiaowei Li:
Deterministic and low power BIST based on scan slice overlapping. ISCAS (6) 2005: 5670-5673
[c24]
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Yinhe Han, Yu Hu, Huawei Li, Xiaowei Li:
Using MUXs Network to Hide Bunches of Scan Chains. ISQED 2005: 238-243
[c23]
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Yu Hu, Xiaowei Li, Huawei Li, Xiaoqing Wen:
Compression/Scan Co-Design for Reducing Test Data Volume, Scan-in Power Dissipation and Test Application Time. PRDC 2005: 175-182
2004
[j8]
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Xiaowei Li:
Conference Reports. IEEE Des. Test Comput. 21(1): 68- (2004)
[j7]
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Yongjun Xu, Zuying Luo, Xiaowei Li, Li-Jian Li, Xianlong Hong:
Leakage Current Estimation of CMOS Circuit with Stack Effect. J. Comput. Sci. Technol. 19(5): 708-717 (2004)
[c22]
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Yinhe Han, Yu Hu, Huawei Li, Xiaowei Li, Anshuman Chandra:
Rapid and Energy-Efficient Testing for Embedded Cores. Asian Test Symposium 2004: 8-13
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Yu Hu, Yinhe Han, Huawei Li, Tao Lv, Xiaowei Li:
Pair Balance-Based Test Scheduling for SOCs. Asian Test Symposium 2004: 236-241
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Guanghui Li, Xiaowei Li:
Circuit-Width Based Heuristic for Boolean Reasoning. Asian Test Symposium 2004: 336-341
[c19]
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Yinhe Han, Xiaowei Li:
Simultaneous Reduction of Test Data Volume and Testing Power for Scan-Based Test. ESA/VLSI 2004: 374-381
[c18]
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Yinhe Han, Yu Hu, Huawei Li, Xiaowei Li, Anshuman Chandra:
Response Compaction for Test Time and Test Pins Reduction Based on Advanced Convolutional Codes. DFT 2004: 298-305
[c17]
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Yongjun Xu, Zuying Luo, Xiaowei Li:
A maximum total leakage current estimation method. ISCAS (2) 2004: 757-760
2003
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Zhigang Yin, Yinghua Min, Xiaowei Li, Huawei Li:
A Novel RT-Level Behavioral Description Based ATPG Method. J. Comput. Sci. Technol. 18(3): 308-317 (2003)
[c16]
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Yunzhan Gong, Wanli Xu, Xiaowei Li:
An Expression's Single Fault Model and the Testing Methods. Asian Test Symposium 2003: 110-115
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Tao Lv, Jianping Fan, Xiaowei Li:
An Efficient Observability Evaluation Algorithm Based on Factored Use-Def Chains. Asian Test Symposium 2003: 161-167
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Huawei Li, Yue Zhang, Xiaowei Li:
Delay Test Pattern Generation Considering Crosstalk-Induced Effects. Asian Test Symposium 2003: 178-183
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Yongjun Xu, Zuying Luo, Zhiguo Chen, Xiaowei Li:
Average Leakage Current Macromodeling for Dual-Threshold Voltage Circuits. Asian Test Symposium 2003: 196-201
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Yinhe Han, Yongjun Xu, Huawei Li, Xiaowei Li, Anshuman Chandra:
Test Resource Partitioning Based on Efficient Response Compaction for Test Time and Teste. Asian Test Symposium 2003: 440-445
[c11]
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Guanghui Li, Ming Shao, Xiaowei Li:
Design Error Diagnosis Based on Verification Techniques. Asian Test Symposium 2003: 474-477
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Ming Shao, Guanghui Li, Xiaowei Li:
SAT-Based Algorithm of Verification for Port Order Fault. Asian Test Symposium 2003: 478-481
2002
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Zuying Luo, Yinghua Min, Shiyuan Yang, Xiaowei Li:
The monotonic increasing relationship between average powers of CMOS VLSI circuits with and without delay and its applications. Sci. China Ser. F Inf. Sci. 45(6): 401-415 (2002)
[c9]
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Zuying Luo, Xiaowei Li, Huawei Li, Shiyuan Yang, Yinghua Min:
Test Power Optimization Techniques for CMOS Circuits. Asian Test Symposium 2002: 332-337
2001
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Xiaowei Li, Paul Y. S. Cheung:
A Loop-Based Apparatus for At-Speed Self-Testing. J. Comput. Sci. Technol. 16(3): 278-285 (2001)
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Zhigang Yin, Yinghua Min, Xiaowei Li:
An Approach to RTL Fault Extraction and Test Generation. Asian Test Symposium 2001: 219-224
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Xiaowei Li, Huawei Li, Yinghua Min:
Reducing Power Dissipation during At-Speed Test Application. DFT 2001: 116-
2000
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Xiaowei Li, Paul Y. S. Cheung, Hideo Fujiwara:
LFSR-Based Deterministic TPG for Two-Pattern Testing. J. Electron. Test. 16(5): 419-426 (2000)
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Xiaowei Li, Paul Y. S. Cheung:
High Level Synthesis for Loop-Based BIST. J. Comput. Sci. Technol. 15(4): 338-345 (2000)
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Xiaowei Li, Paul Y. S. Cheung:
Exploiting Deterministic TPG for Path Delay Testing. J. Comput. Sci. Technol. 15(5): 472-479 (2000)
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Xiaowei Li, Toshimitsu Masuzawa, Hideo Fujiwara:
Strong self-testability for data paths high-level synthesis. Asian Test Symposium 2000: 229-234

1990 – 1999

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1999
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Xiaowei Li, Paul Y. S. Cheung:
Data Path Synthesis for BIST with Low Area Overhead. ASP-DAC 1999: 275-278
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Xiaowei Li, Paul Y. S. Cheung:
Exploiting Test Resource Optimization in Data Path Synthesis for BIST. Great Lakes Symposium on VLSI 1999: 342-343
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Xiaowei Li, Paul Y. S. Cheung:
An approach to behavioral synthesis for loop-based BIST. ISCAS (6) 1999: 374-377
1998
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Xiaowei Li, Paul Y. S. Cheung:
Exploiting BIST Approach for Two-Pattern Testing. Asian Test Symposium 1998: 424-429
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Xiaowei Li, Paul Y. S. Cheung:
High-Level BIST Synthesis for Delay Testing. DFT 1998: 318-

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