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ORCIDSamuel H. Fuller
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2020 – today
- 2023
[j14]Saurav Maji
, Utsav Banerjee, Samuel H. Fuller, Anantha P. Chandrakasan:
A Threshold Implementation-Based Neural Network Accelerator With Power and Electromagnetic Side-Channel Countermeasures. IEEE J. Solid State Circuits 58(1): 141-154 (2023)- 2022
- [c19]Saurav Maji, Utsav Banerjee, Samuel H. Fuller, Anantha P. Chandrakasan:
A ThreshoId-ImpIementation-Based Neural-Network Accelerator Securing Model Parameters and Inputs Against Power Side-Channel Attacks. ISSCC 2022: 518-520 - 2021
- [c18]Saurav Maji, Utsav Banerjee, Samuel H. Fuller, Rabia Tugce Yazicigil, Anantha P. Chandrakasan:
Securing Embedded Medical Devices using Dual-Factor Authentication. CBMS 2021: 574-579 - 2020
- [c17]Saurav Maji, Utsav Banerjee, Samuel H. Fuller, Mohamed R. Abdelhamid, Phillip M. Nadeau, Rabia Tugce Yazicigil, Anantha P. Chandrakasan:
A Low-Power Dual-Factor Authentication Unit for Secure Implantable Devices. CICC 2020: 1-4 - [i1]Saurav Maji, Utsav Banerjee, Samuel H. Fuller, Mohamed R. Abdelhamid, Phillip M. Nadeau, Rabia Tugce Yazicigil, Anantha P. Chandrakasan:
A Low-Power Dual-Factor Authentication Unit for Secure Implantable Devices. CoRR abs/2004.13709 (2020)
2010 – 2019
- 2017
- [c16]Utsav Banerjee, Chiraag Juvekar, Samuel H. Fuller, Anantha P. Chandrakasan:
eeDTLS: Energy-Efficient Datagram Transport Layer Security for the Internet of Things. GLOBECOM 2017: 1-6 - 2011
- [j13]Samuel H. Fuller, Lynette I. Millett:
Computing Performance: Game Over or Next Level? Computer 44(1): 31-38 (2011)
1970 – 1979
- 1978
- [j12]Gordon Bell, Samuel H. Fuller, Daniel P. Siewiorek:
Forword to the Special Issue on Computer Architecture. Commun. ACM 21(1): 3 (1978) - [j11]Samuel H. Fuller, Patrick F. McGehearty:
Minimizing Latency in CCD Memories. IEEE Trans. Computers 27(3): 252-254 (1978) - 1977
- [j10]Samuel H. Fuller, William E. Burr:
Measurement and Evaluation of Alternative Computer Architectures. Computer 10(10): 24-35 (1977) - [c15]Samuel H. Fuller, Harold S. Stone, William E. Burr:
Initial selection and screening of the CFA candidate computer architectures. AFIPS National Computer Conference 1977: 139-146 - [c14]Samuel H. Fuller, Paul Shaman, David Lamb, William E. Burr:
Evaluation of computer architectures via test programs. AFIPS National Computer Conference 1977: 147-160 - [c13]Thomas M. McWilliams, Samuel H. Fuller, W. H. Sherwood:
Using LSI processor bit-slices to build a PDP-11: a case study in microcomputer design. AFIPS National Computer Conference 1977: 243-253 - [c12]Richard J. Swan, Samuel H. Fuller, Daniel P. Siewiorek:
Cm*: a modular, multi-microprocessor. AFIPS National Computer Conference 1977: 637-644 - [c11]Madhav V. Marathe, Samuel H. Fuller:
A Study of Multiprocessor Contention for Shared Data in C.MMP. Int. CMG Conference 1977: 255-262 - 1976
- [j9]Philip L. Karlton, Samuel H. Fuller, R. E. Scroggs, E. B. Kaehler:
Performance of Height-Balanced Trees. Commun. ACM 19(1): 23-28 (1976) - [j8]Samuel H. Fuller, G. A. Mathew:
Implementing microprogram storage with PLA's. SIGARCH Comput. Archit. News 5(2): 6-11 (1976) - [j7]Samuel H. Fuller, Victor R. Lesser, Gordon Bell, Charles H. Kaman:
The Effects of Emerging Technology and Emulation Requirements on Microprogramming. IEEE Trans. Computers 25(10): 1000-1009 (1976) - [c10]Samuel H. Fuller, Daniel P. Siewiorek, Richard J. Swan:
The Design of a Multi-Micro-Computer System. ISCA 1976: 123 - [c9]Samuel H. Fuller:
Price/Performance Comparison of C.mmp and the PDP-10. ISCA 1976: 195-202 - 1975
- [b1]Samuel H. Fuller:
Analysis of Drum and Disk Storage Units. Lecture Notes in Computer Science 31, Springer 1975, ISBN 3-540-07186-5 - [j6]George E. Rossmann, Michael J. Flynn, Samuel H. Fuller, C. Gordon Bell, Frederick P. Brooks Jr., Herbert Hellerman:
A Course of Study in Computer Hardware Architecture. Computer 8(12): 44-63 (1975) - [j5]Samuel H. Fuller, Forest Baskett:
An Analysis of Drum Storage Units. J. ACM 22(1): 83-105 (1975) - [c8]Samuel H. Fuller, Daniel P. Siewiorek, Richard J. Swan:
Computer modules - an architecture for a modular multi-microprocessor. ACM Annual Conference 1975: 129-133 - 1974
- [j4]Samuel H. Fuller:
Minimal-Total-Processing Time Drum and Disk Scheduling Disciplines. Commun. ACM 17(7): 376-381 (1974) - [c7]Samuel H. Fuller, Victor R. Lesser, Gordon C. Bell, Charles H. Kaman:
Microprogramming and its relationship to emulation and technology. MICRO 1974: 151-158 - 1973
- [j3]Harold S. Stone, Samuel H. Fuller:
On the Near-Optimality of the Shortest-Latency-Time-First Drum Scheduling Discipline. Commun. ACM 16(6): 352-353 (1973) - [j2]Samuel H. Fuller, Daniel P. Siewiorek:
Some observations on semiconductor technology and the architecture of large digital modules. Computer 6(10): 15-22 (1973) - [c6]Samuel Henry Fuller:
The analysis and scheduling of devices having rotational delays. ACM Annual Conference 1973 - [c5]Dileep Bhandarkar, Samuel H. Fuller:
Markov Chain Models for Analyzing Memory Interference in Multiprocessor Computer Systems. ISCA 1973: 1-6 - [c4]Samuel H. Fuller, Daniel P. Siewiorek, Richard J. Swan:
Computer Modules: An Architecture for Large Digital Modules. ISCA 1973: 231-237 - [c3]Samuel H. Fuller:
Performance of an I/O channel with multiple paging drums. SIGME 1973: 13-21 - [c2]Samuel H. Fuller:
Random Arrival and the MTPT Drum Scheduling Discipline. SOSP 1973: 54-57 - [c1]Donald D. Chamberlin, Samuel H. Fuller, Leonard Y. Liu:
A Page Allocation Strategy for Multiprogramming Systems with Virtual Memory. SOSP 1973: 66-72 - 1972
- [j1]Samuel H. Fuller:
An Optimal Drum Scheduling Algorithm. IEEE Trans. Computers 21(11): 1153-1165 (1972)
Coauthor Index
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